1# RUN: llc -mtriple=arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s
2#
3# This checks alignment of a new block when a big basic block is split up.
4#
5--- |
6  ; ModuleID = '<stdin>'
7  source_filename = "<stdin>"
8  target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
9  target triple = "arm-arm--eabi"
10
11  declare i32 @llvm.arm.space(i32, i32) #0
12
13  define dso_local i32 @ARM(i64* %LL, i32 %A.coerce) local_unnamed_addr #1 {
14  entry:
15    %S = alloca half, align 2
16    %tmp.0.extract.trunc = trunc i32 %A.coerce to i16
17    %0 = bitcast i16 %tmp.0.extract.trunc to half
18    store volatile half 0xH3C00, half* %S, align 2
19    store volatile i64 4242424242424242, i64* %LL, align 8
20    %1 = call i32 @llvm.arm.space(i32 8920, i32 undef)
21    %S.0.S.0.570 = load volatile half, half* %S, align 2
22    %add298 = fadd half %S.0.S.0.570, 0xH2E66
23    store volatile half %add298, half* %S, align 2
24    %2 = call i32 @llvm.arm.space(i32 1350, i32 undef)
25    %3 = bitcast half %add298 to i16
26    %tmp343.0.insert.ext = zext i16 %3 to i32
27    ret i32 %tmp343.0.insert.ext
28  }
29
30  attributes #0 = { nounwind }
31  attributes #1 = { minsize nounwind optsize "target-features"="+crc,+crypto,+dsp,+fp-armv8,+fullfp16,+hwdiv,+hwdiv-arm,+neon,+ras,+strict-align,-thumb-mode" }
32
33...
34---
35name:            ARM
36alignment:       2
37tracksRegLiveness: true
38liveins:
39  - { reg: '$r0' }
40frameInfo:
41  stackSize:       4
42  maxAlignment:    2
43  maxCallFrameSize: 0
44stack:
45  - { id: 0, name: S, offset: -2, size: 2, alignment: 2, stack-id: 0, local-offset: -2 }
46constants:
47  - id:              0
48    value:           i32 1576323506
49    alignment:       4
50  - id:              1
51    value:           i32 987766
52    alignment:       4
53  - id:              2
54    value:           half 0xH2E66
55    alignment:       2
56
57#CHECK:  B %[[BB4:bb.[0-9]]]
58#CHECK:  bb.{{.}} (align 2):
59#CHECK:    successors:
60#CHECK:    CONSTPOOL_ENTRY {{.}}, %const.{{.}}, 4
61#CHECK:  bb.{{.}} (align 2):
62#CHECK:    successors:
63#CHECK:    CONSTPOOL_ENTRY {{.}}, %const.{{.}}, 4
64#CHECK:  bb.{{.}} (align 1):
65#CHECK:    successors:
66#CHECK:    CONSTPOOL_ENTRY {{.}}, %const.{{.}}, 2
67#CHECK:  [[BB4]].entry (align 2):
68
69body:             |
70  bb.0.entry:
71    liveins: $r0
72
73    $sp = frame-setup SUBri $sp, 4, 14, $noreg, $noreg
74    frame-setup CFI_INSTRUCTION def_cfa_offset 4
75    renamable $s0 = FCONSTH 112, 14, $noreg
76    renamable $r1 = LDRcp %const.0, 0, 14, $noreg :: (load 4 from constant-pool)
77    renamable $r2 = LDRcp %const.1, 0, 14, $noreg :: (load 4 from constant-pool)
78    VSTRH killed renamable $s0, $sp, 1, 14, $noreg :: (volatile store 2 into %ir.S)
79    STRi12 killed renamable $r2, renamable $r0, 4, 14, $noreg :: (volatile store 4 into %ir.LL + 4)
80    renamable $s0 = VLDRH %const.2, 0, 14, $noreg :: (load 2 from constant-pool)
81    STRi12 killed renamable $r1, killed renamable $r0, 0, 14, $noreg :: (volatile store 4 into %ir.LL, align 8)
82    dead renamable $r0 = SPACE 8920, undef renamable $r0
83    renamable $s2 = VLDRH $sp, 1, 14, $noreg :: (volatile dereferenceable load 2 from %ir.S)
84    renamable $s0 = VADDH killed renamable $s2, killed renamable $s0, 14, $noreg
85    VSTRH renamable $s0, $sp, 1, 14, $noreg :: (volatile store 2 into %ir.S)
86    renamable $r0 = VMOVRH killed renamable $s0, 14, $noreg
87    dead renamable $r1 = SPACE 1350, undef renamable $r0
88    $sp = ADDri $sp, 4, 14, $noreg, $noreg
89    MOVPCLR 14, $noreg, implicit killed $r0
90
91...
92