1; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o -| FileCheck %s 2; RUN: llc -mtriple=arm-eabi -mattr=+neon -regalloc=basic %s -o - | FileCheck %s 3 4%struct.__neon_int8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> } 5%struct.__neon_int16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> } 6%struct.__neon_int32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> } 7%struct.__neon_float32x2x3_t = type { <2 x float>, <2 x float>, <2 x float> } 8%struct.__neon_int64x1x3_t = type { <1 x i64>, <1 x i64>, <1 x i64> } 9 10%struct.__neon_int8x16x3_t = type { <16 x i8>, <16 x i8>, <16 x i8> } 11%struct.__neon_int16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> } 12%struct.__neon_int32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> } 13%struct.__neon_float32x4x3_t = type { <4 x float>, <4 x float>, <4 x float> } 14 15define <8 x i8> @vld3i8(i8* %A) nounwind { 16;CHECK-LABEL: vld3i8: 17;Check the alignment value. Max for this instruction is 64 bits: 18;CHECK: vld3.8 {d16, d17, d18}, [{{r[0-9]+|lr}}:64] 19 %tmp1 = call %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8.p0i8(i8* %A, i32 32) 20 %tmp2 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 0 21 %tmp3 = extractvalue %struct.__neon_int8x8x3_t %tmp1, 2 22 %tmp4 = add <8 x i8> %tmp2, %tmp3 23 ret <8 x i8> %tmp4 24} 25 26define <4 x i16> @vld3i16(i16* %A) nounwind { 27;CHECK-LABEL: vld3i16: 28;CHECK: vld3.16 29 %tmp0 = bitcast i16* %A to i8* 30 %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16.p0i8(i8* %tmp0, i32 1) 31 %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0 32 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2 33 %tmp4 = add <4 x i16> %tmp2, %tmp3 34 ret <4 x i16> %tmp4 35} 36 37;Check for a post-increment updating load with register increment. 38define <4 x i16> @vld3i16_update(i16** %ptr, i32 %inc) nounwind { 39;CHECK-LABEL: vld3i16_update: 40;CHECK: vld3.16 {d16, d17, d18}, [{{r[0-9]+|lr}}], {{r[0-9]+|lr}} 41 %A = load i16*, i16** %ptr 42 %tmp0 = bitcast i16* %A to i8* 43 %tmp1 = call %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16.p0i8(i8* %tmp0, i32 1) 44 %tmp2 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 0 45 %tmp3 = extractvalue %struct.__neon_int16x4x3_t %tmp1, 2 46 %tmp4 = add <4 x i16> %tmp2, %tmp3 47 %tmp5 = getelementptr i16, i16* %A, i32 %inc 48 store i16* %tmp5, i16** %ptr 49 ret <4 x i16> %tmp4 50} 51 52define <2 x i32> @vld3i32(i32* %A) nounwind { 53;CHECK-LABEL: vld3i32: 54;CHECK: vld3.32 55 %tmp0 = bitcast i32* %A to i8* 56 %tmp1 = call %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32.p0i8(i8* %tmp0, i32 1) 57 %tmp2 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 0 58 %tmp3 = extractvalue %struct.__neon_int32x2x3_t %tmp1, 2 59 %tmp4 = add <2 x i32> %tmp2, %tmp3 60 ret <2 x i32> %tmp4 61} 62 63define <2 x float> @vld3f(float* %A) nounwind { 64;CHECK-LABEL: vld3f: 65;CHECK: vld3.32 66 %tmp0 = bitcast float* %A to i8* 67 %tmp1 = call %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32.p0i8(i8* %tmp0, i32 1) 68 %tmp2 = extractvalue %struct.__neon_float32x2x3_t %tmp1, 0 69 %tmp3 = extractvalue %struct.__neon_float32x2x3_t %tmp1, 2 70 %tmp4 = fadd <2 x float> %tmp2, %tmp3 71 ret <2 x float> %tmp4 72} 73 74define <1 x i64> @vld3i64(i64* %A) nounwind { 75;CHECK-LABEL: vld3i64: 76;Check the alignment value. Max for this instruction is 64 bits: 77;CHECK: vld1.64 {d16, d17, d18}, [{{r[0-9]+|lr}}:64] 78 %tmp0 = bitcast i64* %A to i8* 79 %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64.p0i8(i8* %tmp0, i32 16) 80 %tmp2 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 0 81 %tmp3 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 2 82 %tmp4 = add <1 x i64> %tmp2, %tmp3 83 ret <1 x i64> %tmp4 84} 85 86define <1 x i64> @vld3i64_update(i64** %ptr, i64* %A) nounwind { 87;CHECK-LABEL: vld3i64_update: 88;CHECK: vld1.64 {d16, d17, d18}, [{{r[0-9]+|lr}}:64]! 89 %tmp0 = bitcast i64* %A to i8* 90 %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64.p0i8(i8* %tmp0, i32 16) 91 %tmp5 = getelementptr i64, i64* %A, i32 3 92 store i64* %tmp5, i64** %ptr 93 %tmp2 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 0 94 %tmp3 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 2 95 %tmp4 = add <1 x i64> %tmp2, %tmp3 96 ret <1 x i64> %tmp4 97} 98 99define <1 x i64> @vld3i64_reg_update(i64** %ptr, i64* %A) nounwind { 100;CHECK-LABEL: vld3i64_reg_update: 101;CHECK: vld1.64 {d16, d17, d18}, [{{r[0-9]+|lr}}:64], {{r[0-9]+|lr}} 102 %tmp0 = bitcast i64* %A to i8* 103 %tmp1 = call %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64.p0i8(i8* %tmp0, i32 16) 104 %tmp5 = getelementptr i64, i64* %A, i32 1 105 store i64* %tmp5, i64** %ptr 106 %tmp2 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 0 107 %tmp3 = extractvalue %struct.__neon_int64x1x3_t %tmp1, 2 108 %tmp4 = add <1 x i64> %tmp2, %tmp3 109 ret <1 x i64> %tmp4 110} 111 112define <16 x i8> @vld3Qi8(i8* %A) nounwind { 113;CHECK-LABEL: vld3Qi8: 114;Check the alignment value. Max for this instruction is 64 bits: 115;CHECK: vld3.8 {d16, d18, d20}, [{{r[0-9]+|lr}}:64]! 116;CHECK: vld3.8 {d17, d19, d21}, [{{r[0-9]+|lr}}:64] 117 %tmp1 = call %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8.p0i8(i8* %A, i32 32) 118 %tmp2 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 0 119 %tmp3 = extractvalue %struct.__neon_int8x16x3_t %tmp1, 2 120 %tmp4 = add <16 x i8> %tmp2, %tmp3 121 ret <16 x i8> %tmp4 122} 123 124define <8 x i16> @vld3Qi16(i16* %A) nounwind { 125;CHECK-LABEL: vld3Qi16: 126;CHECK: vld3.16 127;CHECK: vld3.16 128 %tmp0 = bitcast i16* %A to i8* 129 %tmp1 = call %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16.p0i8(i8* %tmp0, i32 1) 130 %tmp2 = extractvalue %struct.__neon_int16x8x3_t %tmp1, 0 131 %tmp3 = extractvalue %struct.__neon_int16x8x3_t %tmp1, 2 132 %tmp4 = add <8 x i16> %tmp2, %tmp3 133 ret <8 x i16> %tmp4 134} 135 136define <4 x i32> @vld3Qi32(i32* %A) nounwind { 137;CHECK-LABEL: vld3Qi32: 138;CHECK: vld3.32 139;CHECK: vld3.32 140 %tmp0 = bitcast i32* %A to i8* 141 %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32.p0i8(i8* %tmp0, i32 1) 142 %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0 143 %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2 144 %tmp4 = add <4 x i32> %tmp2, %tmp3 145 ret <4 x i32> %tmp4 146} 147 148;Check for a post-increment updating load. 149define <4 x i32> @vld3Qi32_update(i32** %ptr) nounwind { 150;CHECK-LABEL: vld3Qi32_update: 151;CHECK: vld3.32 {d16, d18, d20}, {{\[}}[[R:r[0-9]+|lr]]]! 152;CHECK: vld3.32 {d17, d19, d21}, {{\[}}[[R]]]! 153 %A = load i32*, i32** %ptr 154 %tmp0 = bitcast i32* %A to i8* 155 %tmp1 = call %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32.p0i8(i8* %tmp0, i32 1) 156 %tmp2 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 0 157 %tmp3 = extractvalue %struct.__neon_int32x4x3_t %tmp1, 2 158 %tmp4 = add <4 x i32> %tmp2, %tmp3 159 %tmp5 = getelementptr i32, i32* %A, i32 12 160 store i32* %tmp5, i32** %ptr 161 ret <4 x i32> %tmp4 162} 163 164define <4 x float> @vld3Qf(float* %A) nounwind { 165;CHECK-LABEL: vld3Qf: 166;CHECK: vld3.32 167;CHECK: vld3.32 168 %tmp0 = bitcast float* %A to i8* 169 %tmp1 = call %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32.p0i8(i8* %tmp0, i32 1) 170 %tmp2 = extractvalue %struct.__neon_float32x4x3_t %tmp1, 0 171 %tmp3 = extractvalue %struct.__neon_float32x4x3_t %tmp1, 2 172 %tmp4 = fadd <4 x float> %tmp2, %tmp3 173 ret <4 x float> %tmp4 174} 175 176declare %struct.__neon_int8x8x3_t @llvm.arm.neon.vld3.v8i8.p0i8(i8*, i32) nounwind readonly 177declare %struct.__neon_int16x4x3_t @llvm.arm.neon.vld3.v4i16.p0i8(i8*, i32) nounwind readonly 178declare %struct.__neon_int32x2x3_t @llvm.arm.neon.vld3.v2i32.p0i8(i8*, i32) nounwind readonly 179declare %struct.__neon_float32x2x3_t @llvm.arm.neon.vld3.v2f32.p0i8(i8*, i32) nounwind readonly 180declare %struct.__neon_int64x1x3_t @llvm.arm.neon.vld3.v1i64.p0i8(i8*, i32) nounwind readonly 181 182declare %struct.__neon_int8x16x3_t @llvm.arm.neon.vld3.v16i8.p0i8(i8*, i32) nounwind readonly 183declare %struct.__neon_int16x8x3_t @llvm.arm.neon.vld3.v8i16.p0i8(i8*, i32) nounwind readonly 184declare %struct.__neon_int32x4x3_t @llvm.arm.neon.vld3.v4i32.p0i8(i8*, i32) nounwind readonly 185declare %struct.__neon_float32x4x3_t @llvm.arm.neon.vld3.v4f32.p0i8(i8*, i32) nounwind readonly 186