1# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py 2# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=22 -dispatch-stats -register-file-stats -resource-pressure=false -timeline -timeline-max-iterations=3 < %s | FileCheck %s 3 4idiv %eax 5 6# CHECK: Iterations: 22 7# CHECK-NEXT: Instructions: 22 8# CHECK-NEXT: Total Cycles: 553 9# CHECK-NEXT: Dispatch Width: 2 10# CHECK-NEXT: IPC: 0.04 11# CHECK-NEXT: Block RThroughput: 25.0 12 13# CHECK: Instruction Info: 14# CHECK-NEXT: [1]: #uOps 15# CHECK-NEXT: [2]: Latency 16# CHECK-NEXT: [3]: RThroughput 17# CHECK-NEXT: [4]: MayLoad 18# CHECK-NEXT: [5]: MayStore 19# CHECK-NEXT: [6]: HasSideEffects (U) 20 21# CHECK: [1] [2] [3] [4] [5] [6] Instructions: 22# CHECK-NEXT: 2 25 25.00 U idivl %eax 23 24# CHECK: Dynamic Dispatch Stall Cycles: 25# CHECK-NEXT: RAT - Register unavailable: 6 26# CHECK-NEXT: RCU - Retire tokens unavailable: 0 27# CHECK-NEXT: SCHEDQ - Scheduler full: 0 28# CHECK-NEXT: LQ - Load queue full: 0 29# CHECK-NEXT: SQ - Store queue full: 0 30# CHECK-NEXT: GROUP - Static restrictions on the dispatch group: 0 31 32# CHECK: Dispatch Logic - number of cycles where we saw N instructions dispatched: 33# CHECK-NEXT: [# dispatched], [# cycles] 34# CHECK-NEXT: 0, 531 (96.0%) 35# CHECK-NEXT: 1, 22 (4.0%) 36 37# CHECK: Register File statistics: 38# CHECK-NEXT: Total number of mappings created: 66 39# CHECK-NEXT: Max number of mappings used: 63 40 41# CHECK: * Register File #1 -- JFpuPRF: 42# CHECK-NEXT: Number of physical registers: 72 43# CHECK-NEXT: Total number of mappings created: 0 44# CHECK-NEXT: Max number of mappings used: 0 45 46# CHECK: * Register File #2 -- JIntegerPRF: 47# CHECK-NEXT: Number of physical registers: 64 48# CHECK-NEXT: Total number of mappings created: 66 49# CHECK-NEXT: Max number of mappings used: 63 50 51# CHECK: Timeline view: 52# CHECK-NEXT: 0123456789 0123456789 0123456789 01234567 53# CHECK-NEXT: Index 0123456789 0123456789 0123456789 0123456789 54 55# CHECK: [0,0] DeeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . . . . . . idivl %eax 56# CHECK-NEXT: [1,0] .D========================eeeeeeeeeeeeeeeeeeeeeeeeeER . . . . . . idivl %eax 57# CHECK-NEXT: [2,0] . D================================================eeeeeeeeeeeeeeeeeeeeeeeeeER idivl %eax 58 59# CHECK: Average Wait times (based on the timeline view): 60# CHECK-NEXT: [0]: Executions 61# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue 62# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready 63# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage 64 65# CHECK: [0] [1] [2] [3] 66# CHECK-NEXT: 0. 3 25.0 0.3 0.0 idivl %eax 67