1//===- AArch64SchedPredExynos.td - AArch64 Sched Preds -----*- tablegen -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines scheduling predicate definitions that are used by the 11// AArch64 Exynos processors. 12// 13//===----------------------------------------------------------------------===// 14 15// Auxiliary predicates. 16 17// Check the shift in arithmetic and logic instructions. 18def ExynosCheckShift : CheckAny<[CheckShiftBy0, 19 CheckAll< 20 [CheckShiftLSL, 21 CheckAny< 22 [CheckShiftBy1, 23 CheckShiftBy2, 24 CheckShiftBy3]>]>]>; 25 26// Exynos predicates. 27 28// Identify BLR specifying the LR register as the indirect target register. 29def ExynosBranchLinkLRPred : MCSchedPredicate< 30 CheckAll<[CheckOpcode<[BLR]>, 31 CheckRegOperand<0, LR>]>>; 32 33// Identify arithmetic instructions without or with limited extension or shift. 34def ExynosArithFn : TIIPredicate< 35 "isExynosArithFast", 36 MCOpcodeSwitchStatement< 37 [MCOpcodeSwitchCase< 38 IsArithExtOp.ValidOpcodes, 39 MCReturnStatement< 40 CheckAny<[CheckExtBy0, 41 CheckAll< 42 [CheckAny< 43 [CheckExtUXTW, 44 CheckExtUXTX]>, 45 CheckAny< 46 [CheckExtBy1, 47 CheckExtBy2, 48 CheckExtBy3]>]>]>>>, 49 MCOpcodeSwitchCase< 50 IsArithShiftOp.ValidOpcodes, 51 MCReturnStatement<ExynosCheckShift>>, 52 MCOpcodeSwitchCase< 53 IsArithUnshiftOp.ValidOpcodes, 54 MCReturnStatement<TruePred>>], 55 MCReturnStatement<FalsePred>>>; 56def ExynosArithPred : MCSchedPredicate<ExynosArithFn>; 57 58// Identify logic instructions with limited shift. 59def ExynosLogicFn : TIIPredicate< 60 "isExynosLogicFast", 61 MCOpcodeSwitchStatement< 62 [MCOpcodeSwitchCase< 63 IsLogicShiftOp.ValidOpcodes, 64 MCReturnStatement<ExynosCheckShift>>, 65 MCOpcodeSwitchCase< 66 IsLogicUnshiftOp.ValidOpcodes, 67 MCReturnStatement<TruePred>>], 68 MCReturnStatement<FalsePred>>>; 69def ExynosLogicPred : MCSchedPredicate<ExynosLogicFn>; 70 71// Identify more logic instructions with limited shift. 72def ExynosLogicExFn : TIIPredicate< 73 "isExynosLogicExFast", 74 MCOpcodeSwitchStatement< 75 [MCOpcodeSwitchCase< 76 IsLogicShiftOp.ValidOpcodes, 77 MCReturnStatement< 78 CheckAny< 79 [ExynosCheckShift, 80 CheckAll< 81 [CheckShiftLSL, 82 CheckShiftBy8]>]>>>, 83 MCOpcodeSwitchCase< 84 IsLogicUnshiftOp.ValidOpcodes, 85 MCReturnStatement<TruePred>>], 86 MCReturnStatement<FalsePred>>>; 87def ExynosLogicExPred : MCSchedPredicate<ExynosLogicExFn>; 88 89// Identify a load or store using the register offset addressing mode 90// with a scaled non-extended register. 91def ExynosScaledIdxFn : TIIPredicate<"isExynosScaledAddr", 92 MCOpcodeSwitchStatement< 93 [MCOpcodeSwitchCase< 94 IsLoadStoreRegOffsetOp.ValidOpcodes, 95 MCReturnStatement< 96 CheckAny< 97 [CheckMemExtSXTW, 98 CheckMemExtUXTW, 99 CheckMemScaled]>>>], 100 MCReturnStatement<FalsePred>>>; 101def ExynosScaledIdxPred : MCSchedPredicate<ExynosScaledIdxFn>; 102 103// Identify FP instructions. 104def ExynosFPPred : MCSchedPredicate<CheckAny<[CheckDForm, CheckQForm]>>; 105 106// Identify 128-bit NEON instructions. 107def ExynosQFormPred : MCSchedPredicate<CheckQForm>; 108 109// Identify instructions that reset a register efficiently. 110def ExynosResetFn : TIIPredicate< 111 "isExynosResetFast", 112 MCOpcodeSwitchStatement< 113 [MCOpcodeSwitchCase< 114 [ADR, ADRP, 115 MOVNWi, MOVNXi, 116 MOVZWi, MOVZXi], 117 MCReturnStatement<TruePred>>, 118 MCOpcodeSwitchCase< 119 [ORRWri, ORRXri], 120 MCReturnStatement< 121 CheckAll< 122 [CheckIsRegOperand<1>, 123 CheckAny< 124 [CheckRegOperand<1, WZR>, 125 CheckRegOperand<1, XZR>]>]>>>], 126 MCReturnStatement< 127 CheckAny< 128 [IsCopyIdiomFn, 129 IsZeroFPIdiomFn]>>>>; 130def ExynosResetPred : MCSchedPredicate<ExynosResetFn>; 131 132// Identify EXTR as the alias for ROR (immediate). 133def ExynosRotateRightImmPred : MCSchedPredicate< 134 CheckAll<[CheckOpcode<[EXTRWrri, EXTRXrri]>, 135 CheckSameRegOperand<1, 2>]>>; 136 137// Identify cheap arithmetic and logic immediate instructions. 138def ExynosCheapFn : TIIPredicate< 139 "isExynosCheapAsMove", 140 MCOpcodeSwitchStatement< 141 [MCOpcodeSwitchCase< 142 IsArithLogicImmOp.ValidOpcodes, 143 MCReturnStatement<TruePred>>], 144 MCReturnStatement< 145 CheckAny< 146 [ExynosArithFn, ExynosResetFn, ExynosLogicFn]>>>>; 147