1# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=NO_AVX512VL --check-prefix=NO_AVX512F --check-prefix=AVX 2# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=NO_AVX512VL --check-prefix=AVX512ALL --check-prefix=AVX512F 3# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX512ALL --check-prefix=AVX512VL 4 5 6--- | 7 define <8 x i32> @test_load_v8i32_noalign(<8 x i32>* %p1) { 8 %r = load <8 x i32>, <8 x i32>* %p1, align 1 9 ret <8 x i32> %r 10 } 11 12 define <8 x i32> @test_load_v8i32_align(<8 x i32>* %p1) { 13 %r = load <8 x i32>, <8 x i32>* %p1, align 32 14 ret <8 x i32> %r 15 } 16 17 define void @test_store_v8i32_noalign(<8 x i32> %val, <8 x i32>* %p1) { 18 store <8 x i32> %val, <8 x i32>* %p1, align 1 19 ret void 20 } 21 22 define void @test_store_v8i32_align(<8 x i32> %val, <8 x i32>* %p1) { 23 store <8 x i32> %val, <8 x i32>* %p1, align 32 24 ret void 25 } 26 27 28... 29--- 30name: test_load_v8i32_noalign 31# ALL-LABEL: name: test_load_v8i32_noalign 32alignment: 4 33legalized: true 34regBankSelected: true 35# NO_AVX512F: registers: 36# NO_AVX512F-NEXT: - { id: 0, class: gr64, preferred-register: '' } 37# NO_AVX512F-NEXT: - { id: 1, class: vr256, preferred-register: '' } 38# 39# AVX512ALL: registers: 40# AVX512ALL-NEXT: - { id: 0, class: gr64, preferred-register: '' } 41# AVX512ALL-NEXT: - { id: 1, class: vr256x, preferred-register: '' } 42registers: 43 - { id: 0, class: gpr } 44 - { id: 1, class: vecr } 45# NO_AVX512F: %0:gr64 = COPY $rdi 46# NO_AVX512F-NEXT: %1:vr256 = VMOVUPSYrm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1, align 1) 47# NO_AVX512F-NEXT: $ymm0 = COPY %1 48# NO_AVX512F-NEXT: RET 0, implicit $ymm0 49# 50# AVX512F: %0:gr64 = COPY $rdi 51# AVX512F-NEXT: %1:vr256x = VMOVUPSZ256rm_NOVLX %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1, align 1) 52# AVX512F-NEXT: $ymm0 = COPY %1 53# AVX512F-NEXT: RET 0, implicit $ymm0 54# 55# AVX512VL: %0:gr64 = COPY $rdi 56# AVX512VL-NEXT: %1:vr256x = VMOVUPSZ256rm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1, align 1) 57# AVX512VL-NEXT: $ymm0 = COPY %1 58# AVX512VL-NEXT: RET 0, implicit $ymm0 59body: | 60 bb.1 (%ir-block.0): 61 liveins: $rdi 62 63 %0(p0) = COPY $rdi 64 %1(<8 x s32>) = G_LOAD %0(p0) :: (load 32 from %ir.p1, align 1) 65 $ymm0 = COPY %1(<8 x s32>) 66 RET 0, implicit $ymm0 67 68... 69--- 70name: test_load_v8i32_align 71# ALL-LABEL: name: test_load_v8i32_align 72alignment: 4 73legalized: true 74regBankSelected: true 75registers: 76 - { id: 0, class: gpr } 77 - { id: 1, class: vecr } 78# NO_AVX512F: %0:gr64 = COPY $rdi 79# NO_AVX512F-NEXT: %1:vr256 = VMOVAPSYrm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1) 80# NO_AVX512F-NEXT: $ymm0 = COPY %1 81# NO_AVX512F-NEXT: RET 0, implicit $ymm0 82# 83# AVX512F: %0:gr64 = COPY $rdi 84# AVX512F-NEXT: %1:vr256x = VMOVAPSZ256rm_NOVLX %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1) 85# AVX512F-NEXT: $ymm0 = COPY %1 86# AVX512F-NEXT: RET 0, implicit $ymm0 87# 88# AVX512VL: %0:gr64 = COPY $rdi 89# AVX512VL-NEXT: %1:vr256x = VMOVAPSZ256rm %0, 1, $noreg, 0, $noreg :: (load 32 from %ir.p1) 90# AVX512VL-NEXT: $ymm0 = COPY %1 91# AVX512VL-NEXT: RET 0, implicit $ymm0 92body: | 93 bb.1 (%ir-block.0): 94 liveins: $rdi 95 96 %0(p0) = COPY $rdi 97 %1(<8 x s32>) = G_LOAD %0(p0) :: (load 32 from %ir.p1) 98 $ymm0 = COPY %1(<8 x s32>) 99 RET 0, implicit $ymm0 100 101... 102--- 103name: test_store_v8i32_noalign 104# ALL-LABEL: name: test_store_v8i32_noalign 105alignment: 4 106legalized: true 107regBankSelected: true 108# NO_AVX512F: registers: 109# NO_AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '' } 110# NO_AVX512F-NEXT: - { id: 1, class: gr64, preferred-register: '' } 111# 112# AVX512ALL: registers: 113# AVX512ALL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } 114# AVX512ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' } 115registers: 116 - { id: 0, class: vecr } 117 - { id: 1, class: gpr } 118# NO_AVX512F: %0:vr256 = COPY $ymm0 119# NO_AVX512F-NEXT: %1:gr64 = COPY $rdi 120# NO_AVX512F-NEXT: VMOVUPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1, align 1) 121# NO_AVX512F-NEXT: RET 0 122# 123# AVX512F: %0:vr256x = COPY $ymm0 124# AVX512F-NEXT: %1:gr64 = COPY $rdi 125# AVX512F-NEXT: VMOVUPSZ256mr_NOVLX %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1, align 1) 126# AVX512F-NEXT: RET 0 127# 128# AVX512VL: %0:vr256x = COPY $ymm0 129# AVX512VL-NEXT: %1:gr64 = COPY $rdi 130# AVX512VL-NEXT: VMOVUPSZ256mr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1, align 1) 131# AVX512VL-NEXT: RET 0 132body: | 133 bb.1 (%ir-block.0): 134 liveins: $rdi, $ymm0 135 136 %0(<8 x s32>) = COPY $ymm0 137 %1(p0) = COPY $rdi 138 G_STORE %0(<8 x s32>), %1(p0) :: (store 32 into %ir.p1, align 1) 139 RET 0 140 141... 142--- 143name: test_store_v8i32_align 144# ALL-LABEL: name: test_store_v8i32_align 145alignment: 4 146legalized: true 147regBankSelected: true 148# NO_AVX512F: registers: 149# NO_AVX512F-NEXT: - { id: 0, class: vr256, preferred-register: '' } 150# NO_AVX512F-NEXT: - { id: 1, class: gr64, preferred-register: '' } 151# 152# AVX512ALL: registers: 153# AVX512ALL-NEXT: - { id: 0, class: vr256x, preferred-register: '' } 154# AVX512ALL-NEXT: - { id: 1, class: gr64, preferred-register: '' } 155registers: 156 - { id: 0, class: vecr } 157 - { id: 1, class: gpr } 158# NO_AVX512F: %0:vr256 = COPY $ymm0 159# NO_AVX512F-NEXT: %1:gr64 = COPY $rdi 160# NO_AVX512F-NEXT: VMOVAPSYmr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1) 161# NO_AVX512F-NEXT: RET 0 162# 163# AVX512F: %0:vr256x = COPY $ymm0 164# AVX512F-NEXT: %1:gr64 = COPY $rdi 165# AVX512F-NEXT: VMOVAPSZ256mr_NOVLX %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1) 166# AVX512F-NEXT: RET 0 167# 168# AVX512VL: %0:vr256x = COPY $ymm0 169# AVX512VL-NEXT: %1:gr64 = COPY $rdi 170# AVX512VL-NEXT: VMOVAPSZ256mr %1, 1, $noreg, 0, $noreg, %0 :: (store 32 into %ir.p1) 171# AVX512VL-NEXT: RET 0 172body: | 173 bb.1 (%ir-block.0): 174 liveins: $rdi, $ymm0 175 176 %0(<8 x s32>) = COPY $ymm0 177 %1(p0) = COPY $rdi 178 G_STORE %0(<8 x s32>), %1(p0) :: (store 32 into %ir.p1) 179 RET 0 180 181... 182