1 //===--- ARM.h - Declare ARM target feature support -------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares ARM TargetInfo objects. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 15 #define LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 16 17 #include "OSTargets.h" 18 #include "clang/Basic/TargetInfo.h" 19 #include "clang/Basic/TargetOptions.h" 20 #include "llvm/ADT/Triple.h" 21 #include "llvm/Support/Compiler.h" 22 #include "llvm/Support/TargetParser.h" 23 24 namespace clang { 25 namespace targets { 26 27 class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo { 28 // Possible FPU choices. 29 enum FPUMode { 30 VFP2FPU = (1 << 0), 31 VFP3FPU = (1 << 1), 32 VFP4FPU = (1 << 2), 33 NeonFPU = (1 << 3), 34 FPARMV8 = (1 << 4) 35 }; 36 37 // Possible HWDiv features. 38 enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) }; 39 FPUModeIsVFP(FPUMode Mode)40 static bool FPUModeIsVFP(FPUMode Mode) { 41 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU | FPARMV8); 42 } 43 44 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 45 static const char *const GCCRegNames[]; 46 47 std::string ABI, CPU; 48 49 StringRef CPUProfile; 50 StringRef CPUAttr; 51 52 enum { FP_Default, FP_VFP, FP_Neon } FPMath; 53 54 llvm::ARM::ISAKind ArchISA; 55 llvm::ARM::ArchKind ArchKind = llvm::ARM::ArchKind::ARMV4T; 56 llvm::ARM::ProfileKind ArchProfile; 57 unsigned ArchVersion; 58 59 unsigned FPU : 5; 60 61 unsigned IsAAPCS : 1; 62 unsigned HWDiv : 2; 63 64 // Initialized via features. 65 unsigned SoftFloat : 1; 66 unsigned SoftFloatABI : 1; 67 68 unsigned CRC : 1; 69 unsigned Crypto : 1; 70 unsigned DSP : 1; 71 unsigned Unaligned : 1; 72 unsigned DotProd : 1; 73 74 enum { 75 LDREX_B = (1 << 0), /// byte (8-bit) 76 LDREX_H = (1 << 1), /// half (16-bit) 77 LDREX_W = (1 << 2), /// word (32-bit) 78 LDREX_D = (1 << 3), /// double (64-bit) 79 }; 80 81 uint32_t LDREX; 82 83 // ACLE 6.5.1 Hardware floating point 84 enum { 85 HW_FP_HP = (1 << 1), /// half (16-bit) 86 HW_FP_SP = (1 << 2), /// single (32-bit) 87 HW_FP_DP = (1 << 3), /// double (64-bit) 88 }; 89 uint32_t HW_FP; 90 91 static const Builtin::Info BuiltinInfo[]; 92 93 void setABIAAPCS(); 94 void setABIAPCS(bool IsAAPCS16); 95 96 void setArchInfo(); 97 void setArchInfo(llvm::ARM::ArchKind Kind); 98 99 void setAtomic(); 100 101 bool isThumb() const; 102 bool supportsThumb() const; 103 bool supportsThumb2() const; 104 105 StringRef getCPUAttr() const; 106 StringRef getCPUProfile() const; 107 108 public: 109 ARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 110 111 StringRef getABI() const override; 112 bool setABI(const std::string &Name) override; 113 114 // FIXME: This should be based on Arch attributes, not CPU names. 115 bool 116 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, 117 StringRef CPU, 118 const std::vector<std::string> &FeaturesVec) const override; 119 120 bool handleTargetFeatures(std::vector<std::string> &Features, 121 DiagnosticsEngine &Diags) override; 122 123 bool hasFeature(StringRef Feature) const override; 124 125 bool isValidCPUName(StringRef Name) const override; 126 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; 127 128 bool setCPU(const std::string &Name) override; 129 130 bool setFPMath(StringRef Name) override; 131 useFP16ConversionIntrinsics()132 bool useFP16ConversionIntrinsics() const override { 133 return false; 134 } 135 136 void getTargetDefinesARMV81A(const LangOptions &Opts, 137 MacroBuilder &Builder) const; 138 139 void getTargetDefinesARMV82A(const LangOptions &Opts, 140 MacroBuilder &Builder) const; 141 void getTargetDefines(const LangOptions &Opts, 142 MacroBuilder &Builder) const override; 143 144 ArrayRef<Builtin::Info> getTargetBuiltins() const override; 145 146 bool isCLZForZeroUndef() const override; 147 BuiltinVaListKind getBuiltinVaListKind() const override; 148 149 ArrayRef<const char *> getGCCRegNames() const override; 150 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override; 151 bool validateAsmConstraint(const char *&Name, 152 TargetInfo::ConstraintInfo &Info) const override; 153 std::string convertConstraint(const char *&Constraint) const override; 154 bool 155 validateConstraintModifier(StringRef Constraint, char Modifier, unsigned Size, 156 std::string &SuggestedModifier) const override; 157 const char *getClobbers() const override; 158 getConstraintRegister(StringRef Constraint,StringRef Expression)159 StringRef getConstraintRegister(StringRef Constraint, 160 StringRef Expression) const override { 161 return Expression; 162 } 163 164 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; 165 166 int getEHDataRegisterNumber(unsigned RegNo) const override; 167 168 bool hasSjLjLowering() const override; 169 }; 170 171 class LLVM_LIBRARY_VISIBILITY ARMleTargetInfo : public ARMTargetInfo { 172 public: 173 ARMleTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 174 void getTargetDefines(const LangOptions &Opts, 175 MacroBuilder &Builder) const override; 176 }; 177 178 class LLVM_LIBRARY_VISIBILITY ARMbeTargetInfo : public ARMTargetInfo { 179 public: 180 ARMbeTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 181 void getTargetDefines(const LangOptions &Opts, 182 MacroBuilder &Builder) const override; 183 }; 184 185 class LLVM_LIBRARY_VISIBILITY WindowsARMTargetInfo 186 : public WindowsTargetInfo<ARMleTargetInfo> { 187 const llvm::Triple Triple; 188 189 public: 190 WindowsARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 191 192 void getVisualStudioDefines(const LangOptions &Opts, 193 MacroBuilder &Builder) const; 194 195 BuiltinVaListKind getBuiltinVaListKind() const override; 196 197 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; 198 }; 199 200 // Windows ARM + Itanium C++ ABI Target 201 class LLVM_LIBRARY_VISIBILITY ItaniumWindowsARMleTargetInfo 202 : public WindowsARMTargetInfo { 203 public: 204 ItaniumWindowsARMleTargetInfo(const llvm::Triple &Triple, 205 const TargetOptions &Opts); 206 207 void getTargetDefines(const LangOptions &Opts, 208 MacroBuilder &Builder) const override; 209 }; 210 211 // Windows ARM, MS (C++) ABI 212 class LLVM_LIBRARY_VISIBILITY MicrosoftARMleTargetInfo 213 : public WindowsARMTargetInfo { 214 public: 215 MicrosoftARMleTargetInfo(const llvm::Triple &Triple, 216 const TargetOptions &Opts); 217 218 void getTargetDefines(const LangOptions &Opts, 219 MacroBuilder &Builder) const override; 220 }; 221 222 // ARM MinGW target 223 class LLVM_LIBRARY_VISIBILITY MinGWARMTargetInfo : public WindowsARMTargetInfo { 224 public: 225 MinGWARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 226 227 void getTargetDefines(const LangOptions &Opts, 228 MacroBuilder &Builder) const override; 229 }; 230 231 // ARM Cygwin target 232 class LLVM_LIBRARY_VISIBILITY CygwinARMTargetInfo : public ARMleTargetInfo { 233 public: 234 CygwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 235 236 void getTargetDefines(const LangOptions &Opts, 237 MacroBuilder &Builder) const override; 238 }; 239 240 class LLVM_LIBRARY_VISIBILITY DarwinARMTargetInfo 241 : public DarwinTargetInfo<ARMleTargetInfo> { 242 protected: 243 void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 244 MacroBuilder &Builder) const override; 245 246 public: 247 DarwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 248 }; 249 250 // 32-bit RenderScript is armv7 with width and align of 'long' set to 8-bytes 251 class LLVM_LIBRARY_VISIBILITY RenderScript32TargetInfo 252 : public ARMleTargetInfo { 253 public: 254 RenderScript32TargetInfo(const llvm::Triple &Triple, 255 const TargetOptions &Opts); 256 257 void getTargetDefines(const LangOptions &Opts, 258 MacroBuilder &Builder) const override; 259 }; 260 261 } // namespace targets 262 } // namespace clang 263 264 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 265