1;; Machine Description for Renesas RL78 processors 2;; Copyright (C) 2011-2013 Free Software Foundation, Inc. 3;; Contributed by Red Hat. 4 5;; This file is part of GCC. 6 7;; GCC is free software; you can redistribute it and/or modify 8;; it under the terms of the GNU General Public License as published by 9;; the Free Software Foundation; either version 3, or (at your option) 10;; any later version. 11 12;; GCC is distributed in the hope that it will be useful, 13;; but WITHOUT ANY WARRANTY; without even the implied warranty of 14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15;; GNU General Public License for more details. 16 17;; You should have received a copy of the GNU General Public License 18;; along with GCC; see the file COPYING3. If not see 19;; <http://www.gnu.org/licenses/>. 20 21;;---------- Moving ------------------------ 22 23(define_expand "movqi" 24 [(set (match_operand:QI 0 "nonimmediate_operand") 25 (match_operand:QI 1 "general_operand"))] 26 "" 27 { 28 if (MEM_P (operand0) && MEM_P (operand1)) 29 operands[1] = copy_to_mode_reg (QImode, operand1); 30 if (rl78_far_p (operand0) && rl78_far_p (operand1)) 31 operands[1] = copy_to_mode_reg (QImode, operand1); 32 33 /* FIXME: Not sure how GCC can generate (SUBREG (SYMBOL_REF)), 34 but it does. Since this makes no sense, reject it here. */ 35 if (GET_CODE (operand1) == SUBREG 36 && GET_CODE (XEXP (operand1, 0)) == SYMBOL_REF) 37 FAIL; 38 39 if (CONST_INT_P (operand1) && ! IN_RANGE (INTVAL (operand1), (-1 << 8) + 1, (1 << 8) - 1)) 40 gcc_unreachable(); 41 } 42) 43 44(define_expand "movhi" 45 [(set (match_operand:HI 0 "nonimmediate_operand") 46 (match_operand:HI 1 "general_operand"))] 47 "" 48 { 49 if (MEM_P (operand0) && MEM_P (operand1)) 50 operands[1] = copy_to_mode_reg (HImode, operand1); 51 if (rl78_far_p (operand0) && rl78_far_p (operand1)) 52 operands[1] = copy_to_mode_reg (HImode, operand1); 53 54 /* FIXME: Not sure how GCC can generate (SUBREG (SYMBOL_REF)), 55 but it does. Since this makes no sense, reject it here. */ 56 if (GET_CODE (operand1) == SUBREG 57 && GET_CODE (XEXP (operand1, 0)) == SYMBOL_REF) 58 FAIL; 59 } 60) 61 62(define_expand "movsi" 63 [(set (match_operand:SI 0 "nonimmediate_operand") 64 (match_operand:SI 1 "general_operand"))] 65 "" 66 { 67 rl78_expand_movsi (operands); 68 DONE; 69 } 70) 71 72;;---------- Conversions ------------------------ 73 74(define_expand "zero_extendqihi2" 75 [(set (match_operand:HI 0 "nonimmediate_operand") 76 (zero_extend:HI (match_operand:QI 1 "general_operand")))] 77 "" 78 "if (rl78_force_nonfar_2 (operands, gen_zero_extendqihi2)) 79 DONE;" 80 ) 81 82(define_expand "extendqihi2" 83 [(set (match_operand:HI 0 "nonimmediate_operand") 84 (sign_extend:HI (match_operand:QI 1 "general_operand")))] 85 "" 86 "if (rl78_force_nonfar_2 (operands, gen_extendqihi2)) 87 DONE;" 88 ) 89 90;;---------- Arithmetic ------------------------ 91 92(define_expand "add<mode>3" 93 [(set (match_operand:QHI 0 "nonimmediate_operand") 94 (plus:QHI (match_operand:QHI 1 "general_operand") 95 (match_operand:QHI 2 "general_operand"))) 96 ] 97 "" 98 "if (rl78_force_nonfar_3 (operands, gen_add<mode>3)) 99 DONE;" 100) 101 102(define_expand "sub<mode>3" 103 [(set (match_operand:QHI 0 "nonimmediate_operand") 104 (minus:QHI (match_operand:QHI 1 "general_operand") 105 (match_operand:QHI 2 "general_operand"))) 106 ] 107 "" 108 "if (rl78_force_nonfar_3 (operands, gen_sub<mode>3)) 109 DONE;" 110) 111 112(define_expand "neg<mode>2" 113 [(set (match_operand:QHI 0 "nonimmediate_operand") 114 (minus:QHI (const_int 0) 115 (match_operand:QHI 1 "general_operand"))) 116 ] 117 "" 118 "if (rl78_force_nonfar_2 (operands, gen_neg<mode>2)) 119 DONE;" 120) 121 122(define_expand "umulqihi3" 123 [(set (match_operand:HI 0 "register_operand") 124 (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand")) 125 (zero_extend:HI (match_operand:QI 2 "register_operand"))))] 126 "" 127 "" 128) 129 130(define_expand "andqi3" 131 [(set (match_operand:QI 0 "nonimmediate_operand") 132 (and:QI (match_operand:QI 1 "general_operand") 133 (match_operand:QI 2 "general_operand"))) 134 ] 135 "" 136 "if (rl78_force_nonfar_3 (operands, gen_andqi3)) 137 DONE;" 138) 139 140(define_expand "iorqi3" 141 [(set (match_operand:QI 0 "nonimmediate_operand") 142 (ior:QI (match_operand:QI 1 "general_operand") 143 (match_operand:QI 2 "general_operand"))) 144 ] 145 "" 146 "if (rl78_force_nonfar_3 (operands, gen_iorqi3)) 147 DONE;" 148) 149 150(define_expand "xorqi3" 151 [(set (match_operand:QI 0 "nonimmediate_operand") 152 (xor:QI (match_operand:QI 1 "general_operand") 153 (match_operand:QI 2 "general_operand"))) 154 ] 155 "" 156 "if (rl78_force_nonfar_3 (operands, gen_xorqi3)) 157 DONE;" 158) 159 160(define_expand "one_cmplqi2" 161 [(set (match_operand:QI 0 "nonimmediate_operand") 162 (xor:QI (match_operand:QI 1 "general_operand") 163 (const_int 255))) 164 ] 165 "" 166 "if (rl78_force_nonfar_2 (operands, gen_one_cmplqi2)) 167 DONE;" 168) 169 170;;---------- Shifts ------------------------ 171 172(define_expand "ashl<mode>3" 173 [(set (match_operand:QHI 0 "nonimmediate_operand") 174 (ashift:QHI (match_operand:QHI 1 "general_operand") 175 (match_operand:QI 2 "general_operand"))) 176 ] 177 "" 178 "if (rl78_force_nonfar_3 (operands, gen_ashl<mode>3)) 179 DONE;" 180) 181 182(define_expand "ashr<mode>3" 183 [(set (match_operand:QHI 0 "nonimmediate_operand") 184 (ashiftrt:QHI (match_operand:QHI 1 "general_operand") 185 (match_operand:QI 2 "general_operand"))) 186 ] 187 "" 188 "if (rl78_force_nonfar_3 (operands, gen_ashr<mode>3)) 189 DONE;" 190) 191 192(define_expand "lshr<mode>3" 193 [(set (match_operand:QHI 0 "nonimmediate_operand") 194 (lshiftrt:QHI (match_operand:QHI 1 "general_operand") 195 (match_operand:QI 2 "general_operand"))) 196 ] 197 "" 198 "if (rl78_force_nonfar_3 (operands, gen_lshr<mode>3)) 199 DONE;" 200) 201 202(define_expand "ashrsi3" 203 [(set (match_operand:SI 0 "register_operand") 204 (ashiftrt:SI (match_operand:SI 1 "register_operand") 205 (match_operand:SI 2 "immediate_operand"))) 206 ] 207 "" 208 "if (GET_CODE (operands[2]) != CONST_INT) 209 FAIL;" 210) 211 212;;---------- Branching ------------------------ 213 214(define_expand "indirect_jump" 215 [(set (pc) 216 (match_operand:HI 0 "nonimmediate_operand"))] 217 "" 218 "" 219) 220 221(define_expand "call" 222 [(call (match_operand:HI 0 "memory_operand") 223 (match_operand 1 ""))] 224 "" 225 "" 226) 227 228(define_expand "call_value" 229 [(set (match_operand 0 "register_operand") 230 (call (match_operand:HI 1 "memory_operand") 231 (match_operand 2 "")))] 232 "" 233 "" 234) 235 236(define_expand "cbranchqi4" 237 [(set (pc) (if_then_else 238 (match_operator 0 "rl78_cmp_operator" 239 [(match_operand:QI 1 "general_operand") 240 (match_operand:QI 2 "general_operand")]) 241 (label_ref (match_operand 3 "" "")) 242 (pc)))] 243 "" 244 "rl78_expand_compare (operands);" 245) 246 247(define_expand "cbranchhi4" 248 [(set (pc) (if_then_else 249 (match_operator 0 "rl78_cmp_operator" 250 [(match_operand:HI 1 "general_operand") 251 (match_operand:HI 2 "general_operand")]) 252 (label_ref (match_operand 3 "" "")) 253 (pc)))] 254 "" 255 "rl78_expand_compare (operands);" 256) 257