1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2018 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "target.h"
25 #include "rtl.h"
26 #include "tree.h"
27 #include "gimple.h"
28 #include "predict.h"
29 #include "memmodel.h"
30 #include "tm_p.h"
31 #include "ssa.h"
32 #include "expmed.h"
33 #include "optabs.h"
34 #include "regs.h"
35 #include "emit-rtl.h"
36 #include "recog.h"
37 #include "cgraph.h"
38 #include "diagnostic.h"
39 #include "alias.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
42 #include "attribs.h"
43 #include "varasm.h"
44 #include "except.h"
45 #include "insn-attr.h"
46 #include "dojump.h"
47 #include "explow.h"
48 #include "calls.h"
49 #include "stmt.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
51 #include "expr.h"
52 #include "optabs-tree.h"
53 #include "libfuncs.h"
54 #include "reload.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
57 #include "tree-ssa-live.h"
58 #include "tree-outof-ssa.h"
59 #include "tree-ssa-address.h"
60 #include "builtins.h"
61 #include "tree-chkp.h"
62 #include "rtl-chkp.h"
63 #include "ccmp.h"
64 #include "rtx-vector-builder.h"
65
66
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
73 int cse_not_expected;
74
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned, unsigned, HOST_WIDE_INT,
77 unsigned HOST_WIDE_INT, unsigned HOST_WIDE_INT,
78 unsigned HOST_WIDE_INT);
79 static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
80 static void clear_by_pieces (rtx, unsigned HOST_WIDE_INT, unsigned int);
81 static rtx_insn *compress_float_constant (rtx, rtx);
82 static rtx get_subtarget (rtx);
83 static void store_constructor (tree, rtx, int, poly_int64, bool);
84 static rtx store_field (rtx, poly_int64, poly_int64, poly_uint64, poly_uint64,
85 machine_mode, tree, alias_set_type, bool, bool);
86
87 static unsigned HOST_WIDE_INT highest_pow2_factor_for_target (const_tree, const_tree);
88
89 static int is_aligning_offset (const_tree, const_tree);
90 static rtx reduce_to_bit_field_precision (rtx, rtx, tree);
91 static rtx do_store_flag (sepops, rtx, machine_mode);
92 #ifdef PUSH_ROUNDING
93 static void emit_single_push_insn (machine_mode, rtx, tree);
94 #endif
95 static void do_tablejump (rtx, machine_mode, rtx, rtx, rtx,
96 profile_probability);
97 static rtx const_vector_from_tree (tree);
98 static rtx const_scalar_mask_from_tree (scalar_int_mode, tree);
99 static tree tree_expr_size (const_tree);
100 static HOST_WIDE_INT int_expr_size (tree);
101 static void convert_mode_scalar (rtx, rtx, int);
102
103
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
107
108 void
init_expr_target(void)109 init_expr_target (void)
110 {
111 rtx pat;
112 int num_clobbers;
113 rtx mem, mem1;
114 rtx reg;
115
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem = gen_rtx_MEM (word_mode, stack_pointer_rtx);
120 mem1 = gen_rtx_MEM (word_mode, frame_pointer_rtx);
121
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
125
126 rtx_insn *insn = as_a<rtx_insn *> (rtx_alloc (INSN));
127 pat = gen_rtx_SET (NULL_RTX, NULL_RTX);
128 PATTERN (insn) = pat;
129
130 for (machine_mode mode = VOIDmode; (int) mode < NUM_MACHINE_MODES;
131 mode = (machine_mode) ((int) mode + 1))
132 {
133 int regno;
134
135 direct_load[(int) mode] = direct_store[(int) mode] = 0;
136 PUT_MODE (mem, mode);
137 PUT_MODE (mem1, mode);
138
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
141
142 if (mode != VOIDmode && mode != BLKmode)
143 for (regno = 0; regno < FIRST_PSEUDO_REGISTER
144 && (direct_load[(int) mode] == 0 || direct_store[(int) mode] == 0);
145 regno++)
146 {
147 if (!targetm.hard_regno_mode_ok (regno, mode))
148 continue;
149
150 set_mode_and_regno (reg, mode, regno);
151
152 SET_SRC (pat) = mem;
153 SET_DEST (pat) = reg;
154 if (recog (pat, insn, &num_clobbers) >= 0)
155 direct_load[(int) mode] = 1;
156
157 SET_SRC (pat) = mem1;
158 SET_DEST (pat) = reg;
159 if (recog (pat, insn, &num_clobbers) >= 0)
160 direct_load[(int) mode] = 1;
161
162 SET_SRC (pat) = reg;
163 SET_DEST (pat) = mem;
164 if (recog (pat, insn, &num_clobbers) >= 0)
165 direct_store[(int) mode] = 1;
166
167 SET_SRC (pat) = reg;
168 SET_DEST (pat) = mem1;
169 if (recog (pat, insn, &num_clobbers) >= 0)
170 direct_store[(int) mode] = 1;
171 }
172 }
173
174 mem = gen_rtx_MEM (VOIDmode, gen_raw_REG (Pmode, LAST_VIRTUAL_REGISTER + 1));
175
176 opt_scalar_float_mode mode_iter;
177 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_FLOAT)
178 {
179 scalar_float_mode mode = mode_iter.require ();
180 scalar_float_mode srcmode;
181 FOR_EACH_MODE_UNTIL (srcmode, mode)
182 {
183 enum insn_code ic;
184
185 ic = can_extend_p (mode, srcmode, 0);
186 if (ic == CODE_FOR_nothing)
187 continue;
188
189 PUT_MODE (mem, srcmode);
190
191 if (insn_operand_matches (ic, 1, mem))
192 float_extend_from_mem[mode][srcmode] = true;
193 }
194 }
195 }
196
197 /* This is run at the start of compiling a function. */
198
199 void
init_expr(void)200 init_expr (void)
201 {
202 memset (&crtl->expr, 0, sizeof (crtl->expr));
203 }
204
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
207 fixed-point.
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
210
211 void
convert_move(rtx to,rtx from,int unsignedp)212 convert_move (rtx to, rtx from, int unsignedp)
213 {
214 machine_mode to_mode = GET_MODE (to);
215 machine_mode from_mode = GET_MODE (from);
216
217 gcc_assert (to_mode != BLKmode);
218 gcc_assert (from_mode != BLKmode);
219
220 /* If the source and destination are already the same, then there's
221 nothing to do. */
222 if (to == from)
223 return;
224
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
227 TO here. */
228
229 scalar_int_mode to_int_mode;
230 if (GET_CODE (from) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from)
232 && is_a <scalar_int_mode> (to_mode, &to_int_mode)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from))
234 >= GET_MODE_PRECISION (to_int_mode))
235 && SUBREG_CHECK_PROMOTED_SIGN (from, unsignedp))
236 from = gen_lowpart (to_int_mode, from), from_mode = to_int_mode;
237
238 gcc_assert (GET_CODE (to) != SUBREG || !SUBREG_PROMOTED_VAR_P (to));
239
240 if (to_mode == from_mode
241 || (from_mode == VOIDmode && CONSTANT_P (from)))
242 {
243 emit_move_insn (to, from);
244 return;
245 }
246
247 if (VECTOR_MODE_P (to_mode) || VECTOR_MODE_P (from_mode))
248 {
249 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode),
250 GET_MODE_BITSIZE (to_mode)));
251
252 if (VECTOR_MODE_P (to_mode))
253 from = simplify_gen_subreg (to_mode, from, GET_MODE (from), 0);
254 else
255 to = simplify_gen_subreg (from_mode, to, GET_MODE (to), 0);
256
257 emit_move_insn (to, from);
258 return;
259 }
260
261 if (GET_CODE (to) == CONCAT && GET_CODE (from) == CONCAT)
262 {
263 convert_move (XEXP (to, 0), XEXP (from, 0), unsignedp);
264 convert_move (XEXP (to, 1), XEXP (from, 1), unsignedp);
265 return;
266 }
267
268 convert_mode_scalar (to, from, unsignedp);
269 }
270
271 /* Like convert_move, but deals only with scalar modes. */
272
273 static void
convert_mode_scalar(rtx to,rtx from,int unsignedp)274 convert_mode_scalar (rtx to, rtx from, int unsignedp)
275 {
276 /* Both modes should be scalar types. */
277 scalar_mode from_mode = as_a <scalar_mode> (GET_MODE (from));
278 scalar_mode to_mode = as_a <scalar_mode> (GET_MODE (to));
279 bool to_real = SCALAR_FLOAT_MODE_P (to_mode);
280 bool from_real = SCALAR_FLOAT_MODE_P (from_mode);
281 enum insn_code code;
282 rtx libcall;
283
284 gcc_assert (to_real == from_real);
285
286 /* rtx code for making an equivalent value. */
287 enum rtx_code equiv_code = (unsignedp < 0 ? UNKNOWN
288 : (unsignedp ? ZERO_EXTEND : SIGN_EXTEND));
289
290 if (to_real)
291 {
292 rtx value;
293 rtx_insn *insns;
294 convert_optab tab;
295
296 gcc_assert ((GET_MODE_PRECISION (from_mode)
297 != GET_MODE_PRECISION (to_mode))
298 || (DECIMAL_FLOAT_MODE_P (from_mode)
299 != DECIMAL_FLOAT_MODE_P (to_mode)));
300
301 if (GET_MODE_PRECISION (from_mode) == GET_MODE_PRECISION (to_mode))
302 /* Conversion between decimal float and binary float, same size. */
303 tab = DECIMAL_FLOAT_MODE_P (from_mode) ? trunc_optab : sext_optab;
304 else if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode))
305 tab = sext_optab;
306 else
307 tab = trunc_optab;
308
309 /* Try converting directly if the insn is supported. */
310
311 code = convert_optab_handler (tab, to_mode, from_mode);
312 if (code != CODE_FOR_nothing)
313 {
314 emit_unop_insn (code, to, from,
315 tab == sext_optab ? FLOAT_EXTEND : FLOAT_TRUNCATE);
316 return;
317 }
318
319 /* Otherwise use a libcall. */
320 libcall = convert_optab_libfunc (tab, to_mode, from_mode);
321
322 /* Is this conversion implemented yet? */
323 gcc_assert (libcall);
324
325 start_sequence ();
326 value = emit_library_call_value (libcall, NULL_RTX, LCT_CONST, to_mode,
327 from, from_mode);
328 insns = get_insns ();
329 end_sequence ();
330 emit_libcall_block (insns, to, value,
331 tab == trunc_optab ? gen_rtx_FLOAT_TRUNCATE (to_mode,
332 from)
333 : gen_rtx_FLOAT_EXTEND (to_mode, from));
334 return;
335 }
336
337 /* Handle pointer conversion. */ /* SPEE 900220. */
338 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
339 {
340 convert_optab ctab;
341
342 if (GET_MODE_PRECISION (from_mode) > GET_MODE_PRECISION (to_mode))
343 ctab = trunc_optab;
344 else if (unsignedp)
345 ctab = zext_optab;
346 else
347 ctab = sext_optab;
348
349 if (convert_optab_handler (ctab, to_mode, from_mode)
350 != CODE_FOR_nothing)
351 {
352 emit_unop_insn (convert_optab_handler (ctab, to_mode, from_mode),
353 to, from, UNKNOWN);
354 return;
355 }
356 }
357
358 /* Targets are expected to provide conversion insns between PxImode and
359 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
360 if (GET_MODE_CLASS (to_mode) == MODE_PARTIAL_INT)
361 {
362 scalar_int_mode full_mode
363 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode));
364
365 gcc_assert (convert_optab_handler (trunc_optab, to_mode, full_mode)
366 != CODE_FOR_nothing);
367
368 if (full_mode != from_mode)
369 from = convert_to_mode (full_mode, from, unsignedp);
370 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, full_mode),
371 to, from, UNKNOWN);
372 return;
373 }
374 if (GET_MODE_CLASS (from_mode) == MODE_PARTIAL_INT)
375 {
376 rtx new_from;
377 scalar_int_mode full_mode
378 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode));
379 convert_optab ctab = unsignedp ? zext_optab : sext_optab;
380 enum insn_code icode;
381
382 icode = convert_optab_handler (ctab, full_mode, from_mode);
383 gcc_assert (icode != CODE_FOR_nothing);
384
385 if (to_mode == full_mode)
386 {
387 emit_unop_insn (icode, to, from, UNKNOWN);
388 return;
389 }
390
391 new_from = gen_reg_rtx (full_mode);
392 emit_unop_insn (icode, new_from, from, UNKNOWN);
393
394 /* else proceed to integer conversions below. */
395 from_mode = full_mode;
396 from = new_from;
397 }
398
399 /* Make sure both are fixed-point modes or both are not. */
400 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode) ==
401 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode));
402 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode))
403 {
404 /* If we widen from_mode to to_mode and they are in the same class,
405 we won't saturate the result.
406 Otherwise, always saturate the result to play safe. */
407 if (GET_MODE_CLASS (from_mode) == GET_MODE_CLASS (to_mode)
408 && GET_MODE_SIZE (from_mode) < GET_MODE_SIZE (to_mode))
409 expand_fixed_convert (to, from, 0, 0);
410 else
411 expand_fixed_convert (to, from, 0, 1);
412 return;
413 }
414
415 /* Now both modes are integers. */
416
417 /* Handle expanding beyond a word. */
418 if (GET_MODE_PRECISION (from_mode) < GET_MODE_PRECISION (to_mode)
419 && GET_MODE_PRECISION (to_mode) > BITS_PER_WORD)
420 {
421 rtx_insn *insns;
422 rtx lowpart;
423 rtx fill_value;
424 rtx lowfrom;
425 int i;
426 scalar_mode lowpart_mode;
427 int nwords = CEIL (GET_MODE_SIZE (to_mode), UNITS_PER_WORD);
428
429 /* Try converting directly if the insn is supported. */
430 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
431 != CODE_FOR_nothing)
432 {
433 /* If FROM is a SUBREG, put it into a register. Do this
434 so that we always generate the same set of insns for
435 better cse'ing; if an intermediate assignment occurred,
436 we won't be doing the operation directly on the SUBREG. */
437 if (optimize > 0 && GET_CODE (from) == SUBREG)
438 from = force_reg (from_mode, from);
439 emit_unop_insn (code, to, from, equiv_code);
440 return;
441 }
442 /* Next, try converting via full word. */
443 else if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD
444 && ((code = can_extend_p (to_mode, word_mode, unsignedp))
445 != CODE_FOR_nothing))
446 {
447 rtx word_to = gen_reg_rtx (word_mode);
448 if (REG_P (to))
449 {
450 if (reg_overlap_mentioned_p (to, from))
451 from = force_reg (from_mode, from);
452 emit_clobber (to);
453 }
454 convert_move (word_to, from, unsignedp);
455 emit_unop_insn (code, to, word_to, equiv_code);
456 return;
457 }
458
459 /* No special multiword conversion insn; do it by hand. */
460 start_sequence ();
461
462 /* Since we will turn this into a no conflict block, we must ensure
463 the source does not overlap the target so force it into an isolated
464 register when maybe so. Likewise for any MEM input, since the
465 conversion sequence might require several references to it and we
466 must ensure we're getting the same value every time. */
467
468 if (MEM_P (from) || reg_overlap_mentioned_p (to, from))
469 from = force_reg (from_mode, from);
470
471 /* Get a copy of FROM widened to a word, if necessary. */
472 if (GET_MODE_PRECISION (from_mode) < BITS_PER_WORD)
473 lowpart_mode = word_mode;
474 else
475 lowpart_mode = from_mode;
476
477 lowfrom = convert_to_mode (lowpart_mode, from, unsignedp);
478
479 lowpart = gen_lowpart (lowpart_mode, to);
480 emit_move_insn (lowpart, lowfrom);
481
482 /* Compute the value to put in each remaining word. */
483 if (unsignedp)
484 fill_value = const0_rtx;
485 else
486 fill_value = emit_store_flag_force (gen_reg_rtx (word_mode),
487 LT, lowfrom, const0_rtx,
488 lowpart_mode, 0, -1);
489
490 /* Fill the remaining words. */
491 for (i = GET_MODE_SIZE (lowpart_mode) / UNITS_PER_WORD; i < nwords; i++)
492 {
493 int index = (WORDS_BIG_ENDIAN ? nwords - i - 1 : i);
494 rtx subword = operand_subword (to, index, 1, to_mode);
495
496 gcc_assert (subword);
497
498 if (fill_value != subword)
499 emit_move_insn (subword, fill_value);
500 }
501
502 insns = get_insns ();
503 end_sequence ();
504
505 emit_insn (insns);
506 return;
507 }
508
509 /* Truncating multi-word to a word or less. */
510 if (GET_MODE_PRECISION (from_mode) > BITS_PER_WORD
511 && GET_MODE_PRECISION (to_mode) <= BITS_PER_WORD)
512 {
513 if (!((MEM_P (from)
514 && ! MEM_VOLATILE_P (from)
515 && direct_load[(int) to_mode]
516 && ! mode_dependent_address_p (XEXP (from, 0),
517 MEM_ADDR_SPACE (from)))
518 || REG_P (from)
519 || GET_CODE (from) == SUBREG))
520 from = force_reg (from_mode, from);
521 convert_move (to, gen_lowpart (word_mode, from), 0);
522 return;
523 }
524
525 /* Now follow all the conversions between integers
526 no more than a word long. */
527
528 /* For truncation, usually we can just refer to FROM in a narrower mode. */
529 if (GET_MODE_BITSIZE (to_mode) < GET_MODE_BITSIZE (from_mode)
530 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode, from_mode))
531 {
532 if (!((MEM_P (from)
533 && ! MEM_VOLATILE_P (from)
534 && direct_load[(int) to_mode]
535 && ! mode_dependent_address_p (XEXP (from, 0),
536 MEM_ADDR_SPACE (from)))
537 || REG_P (from)
538 || GET_CODE (from) == SUBREG))
539 from = force_reg (from_mode, from);
540 if (REG_P (from) && REGNO (from) < FIRST_PSEUDO_REGISTER
541 && !targetm.hard_regno_mode_ok (REGNO (from), to_mode))
542 from = copy_to_reg (from);
543 emit_move_insn (to, gen_lowpart (to_mode, from));
544 return;
545 }
546
547 /* Handle extension. */
548 if (GET_MODE_PRECISION (to_mode) > GET_MODE_PRECISION (from_mode))
549 {
550 /* Convert directly if that works. */
551 if ((code = can_extend_p (to_mode, from_mode, unsignedp))
552 != CODE_FOR_nothing)
553 {
554 emit_unop_insn (code, to, from, equiv_code);
555 return;
556 }
557 else
558 {
559 scalar_mode intermediate;
560 rtx tmp;
561 int shift_amount;
562
563 /* Search for a mode to convert via. */
564 opt_scalar_mode intermediate_iter;
565 FOR_EACH_MODE_FROM (intermediate_iter, from_mode)
566 {
567 scalar_mode intermediate = intermediate_iter.require ();
568 if (((can_extend_p (to_mode, intermediate, unsignedp)
569 != CODE_FOR_nothing)
570 || (GET_MODE_SIZE (to_mode) < GET_MODE_SIZE (intermediate)
571 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode,
572 intermediate)))
573 && (can_extend_p (intermediate, from_mode, unsignedp)
574 != CODE_FOR_nothing))
575 {
576 convert_move (to, convert_to_mode (intermediate, from,
577 unsignedp), unsignedp);
578 return;
579 }
580 }
581
582 /* No suitable intermediate mode.
583 Generate what we need with shifts. */
584 shift_amount = (GET_MODE_PRECISION (to_mode)
585 - GET_MODE_PRECISION (from_mode));
586 from = gen_lowpart (to_mode, force_reg (from_mode, from));
587 tmp = expand_shift (LSHIFT_EXPR, to_mode, from, shift_amount,
588 to, unsignedp);
589 tmp = expand_shift (RSHIFT_EXPR, to_mode, tmp, shift_amount,
590 to, unsignedp);
591 if (tmp != to)
592 emit_move_insn (to, tmp);
593 return;
594 }
595 }
596
597 /* Support special truncate insns for certain modes. */
598 if (convert_optab_handler (trunc_optab, to_mode,
599 from_mode) != CODE_FOR_nothing)
600 {
601 emit_unop_insn (convert_optab_handler (trunc_optab, to_mode, from_mode),
602 to, from, UNKNOWN);
603 return;
604 }
605
606 /* Handle truncation of volatile memrefs, and so on;
607 the things that couldn't be truncated directly,
608 and for which there was no special instruction.
609
610 ??? Code above formerly short-circuited this, for most integer
611 mode pairs, with a force_reg in from_mode followed by a recursive
612 call to this routine. Appears always to have been wrong. */
613 if (GET_MODE_PRECISION (to_mode) < GET_MODE_PRECISION (from_mode))
614 {
615 rtx temp = force_reg (to_mode, gen_lowpart (to_mode, from));
616 emit_move_insn (to, temp);
617 return;
618 }
619
620 /* Mode combination is not recognized. */
621 gcc_unreachable ();
622 }
623
624 /* Return an rtx for a value that would result
625 from converting X to mode MODE.
626 Both X and MODE may be floating, or both integer.
627 UNSIGNEDP is nonzero if X is an unsigned value.
628 This can be done by referring to a part of X in place
629 or by copying to a new temporary with conversion. */
630
631 rtx
convert_to_mode(machine_mode mode,rtx x,int unsignedp)632 convert_to_mode (machine_mode mode, rtx x, int unsignedp)
633 {
634 return convert_modes (mode, VOIDmode, x, unsignedp);
635 }
636
637 /* Return an rtx for a value that would result
638 from converting X from mode OLDMODE to mode MODE.
639 Both modes may be floating, or both integer.
640 UNSIGNEDP is nonzero if X is an unsigned value.
641
642 This can be done by referring to a part of X in place
643 or by copying to a new temporary with conversion.
644
645 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
646
647 rtx
convert_modes(machine_mode mode,machine_mode oldmode,rtx x,int unsignedp)648 convert_modes (machine_mode mode, machine_mode oldmode, rtx x, int unsignedp)
649 {
650 rtx temp;
651 scalar_int_mode int_mode;
652
653 /* If FROM is a SUBREG that indicates that we have already done at least
654 the required extension, strip it. */
655
656 if (GET_CODE (x) == SUBREG
657 && SUBREG_PROMOTED_VAR_P (x)
658 && is_a <scalar_int_mode> (mode, &int_mode)
659 && (GET_MODE_PRECISION (subreg_promoted_mode (x))
660 >= GET_MODE_PRECISION (int_mode))
661 && SUBREG_CHECK_PROMOTED_SIGN (x, unsignedp))
662 x = gen_lowpart (int_mode, SUBREG_REG (x));
663
664 if (GET_MODE (x) != VOIDmode)
665 oldmode = GET_MODE (x);
666
667 if (mode == oldmode)
668 return x;
669
670 if (CONST_SCALAR_INT_P (x)
671 && is_int_mode (mode, &int_mode))
672 {
673 /* If the caller did not tell us the old mode, then there is not
674 much to do with respect to canonicalization. We have to
675 assume that all the bits are significant. */
676 if (GET_MODE_CLASS (oldmode) != MODE_INT)
677 oldmode = MAX_MODE_INT;
678 wide_int w = wide_int::from (rtx_mode_t (x, oldmode),
679 GET_MODE_PRECISION (int_mode),
680 unsignedp ? UNSIGNED : SIGNED);
681 return immed_wide_int_const (w, int_mode);
682 }
683
684 /* We can do this with a gen_lowpart if both desired and current modes
685 are integer, and this is either a constant integer, a register, or a
686 non-volatile MEM. */
687 scalar_int_mode int_oldmode;
688 if (is_int_mode (mode, &int_mode)
689 && is_int_mode (oldmode, &int_oldmode)
690 && GET_MODE_PRECISION (int_mode) <= GET_MODE_PRECISION (int_oldmode)
691 && ((MEM_P (x) && !MEM_VOLATILE_P (x) && direct_load[(int) int_mode])
692 || CONST_POLY_INT_P (x)
693 || (REG_P (x)
694 && (!HARD_REGISTER_P (x)
695 || targetm.hard_regno_mode_ok (REGNO (x), int_mode))
696 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode, GET_MODE (x)))))
697 return gen_lowpart (int_mode, x);
698
699 /* Converting from integer constant into mode is always equivalent to an
700 subreg operation. */
701 if (VECTOR_MODE_P (mode) && GET_MODE (x) == VOIDmode)
702 {
703 gcc_assert (known_eq (GET_MODE_BITSIZE (mode),
704 GET_MODE_BITSIZE (oldmode)));
705 return simplify_gen_subreg (mode, x, oldmode, 0);
706 }
707
708 temp = gen_reg_rtx (mode);
709 convert_move (temp, x, unsignedp);
710 return temp;
711 }
712
713 /* Return the largest alignment we can use for doing a move (or store)
714 of MAX_PIECES. ALIGN is the largest alignment we could use. */
715
716 static unsigned int
alignment_for_piecewise_move(unsigned int max_pieces,unsigned int align)717 alignment_for_piecewise_move (unsigned int max_pieces, unsigned int align)
718 {
719 scalar_int_mode tmode
720 = int_mode_for_size (max_pieces * BITS_PER_UNIT, 1).require ();
721
722 if (align >= GET_MODE_ALIGNMENT (tmode))
723 align = GET_MODE_ALIGNMENT (tmode);
724 else
725 {
726 scalar_int_mode xmode = NARROWEST_INT_MODE;
727 opt_scalar_int_mode mode_iter;
728 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
729 {
730 tmode = mode_iter.require ();
731 if (GET_MODE_SIZE (tmode) > max_pieces
732 || targetm.slow_unaligned_access (tmode, align))
733 break;
734 xmode = tmode;
735 }
736
737 align = MAX (align, GET_MODE_ALIGNMENT (xmode));
738 }
739
740 return align;
741 }
742
743 /* Return the widest integer mode that is narrower than SIZE bytes. */
744
745 static scalar_int_mode
widest_int_mode_for_size(unsigned int size)746 widest_int_mode_for_size (unsigned int size)
747 {
748 scalar_int_mode result = NARROWEST_INT_MODE;
749
750 gcc_checking_assert (size > 1);
751
752 opt_scalar_int_mode tmode;
753 FOR_EACH_MODE_IN_CLASS (tmode, MODE_INT)
754 if (GET_MODE_SIZE (tmode.require ()) < size)
755 result = tmode.require ();
756
757 return result;
758 }
759
760 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
761 and should be performed piecewise. */
762
763 static bool
can_do_by_pieces(unsigned HOST_WIDE_INT len,unsigned int align,enum by_pieces_operation op)764 can_do_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align,
765 enum by_pieces_operation op)
766 {
767 return targetm.use_by_pieces_infrastructure_p (len, align, op,
768 optimize_insn_for_speed_p ());
769 }
770
771 /* Determine whether the LEN bytes can be moved by using several move
772 instructions. Return nonzero if a call to move_by_pieces should
773 succeed. */
774
775 bool
can_move_by_pieces(unsigned HOST_WIDE_INT len,unsigned int align)776 can_move_by_pieces (unsigned HOST_WIDE_INT len, unsigned int align)
777 {
778 return can_do_by_pieces (len, align, MOVE_BY_PIECES);
779 }
780
781 /* Return number of insns required to perform operation OP by pieces
782 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
783
784 unsigned HOST_WIDE_INT
by_pieces_ninsns(unsigned HOST_WIDE_INT l,unsigned int align,unsigned int max_size,by_pieces_operation op)785 by_pieces_ninsns (unsigned HOST_WIDE_INT l, unsigned int align,
786 unsigned int max_size, by_pieces_operation op)
787 {
788 unsigned HOST_WIDE_INT n_insns = 0;
789
790 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
791
792 while (max_size > 1 && l > 0)
793 {
794 scalar_int_mode mode = widest_int_mode_for_size (max_size);
795 enum insn_code icode;
796
797 unsigned int modesize = GET_MODE_SIZE (mode);
798
799 icode = optab_handler (mov_optab, mode);
800 if (icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode))
801 {
802 unsigned HOST_WIDE_INT n_pieces = l / modesize;
803 l %= modesize;
804 switch (op)
805 {
806 default:
807 n_insns += n_pieces;
808 break;
809
810 case COMPARE_BY_PIECES:
811 int batch = targetm.compare_by_pieces_branch_ratio (mode);
812 int batch_ops = 4 * batch - 1;
813 unsigned HOST_WIDE_INT full = n_pieces / batch;
814 n_insns += full * batch_ops;
815 if (n_pieces % batch != 0)
816 n_insns++;
817 break;
818
819 }
820 }
821 max_size = modesize;
822 }
823
824 gcc_assert (!l);
825 return n_insns;
826 }
827
828 /* Used when performing piecewise block operations, holds information
829 about one of the memory objects involved. The member functions
830 can be used to generate code for loading from the object and
831 updating the address when iterating. */
832
833 class pieces_addr
834 {
835 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
836 stack pushes. */
837 rtx m_obj;
838 /* The address of the object. Can differ from that seen in the
839 MEM rtx if we copied the address to a register. */
840 rtx m_addr;
841 /* Nonzero if the address on the object has an autoincrement already,
842 signifies whether that was an increment or decrement. */
843 signed char m_addr_inc;
844 /* Nonzero if we intend to use autoinc without the address already
845 having autoinc form. We will insert add insns around each memory
846 reference, expecting later passes to form autoinc addressing modes.
847 The only supported options are predecrement and postincrement. */
848 signed char m_explicit_inc;
849 /* True if we have either of the two possible cases of using
850 autoincrement. */
851 bool m_auto;
852 /* True if this is an address to be used for load operations rather
853 than stores. */
854 bool m_is_load;
855
856 /* Optionally, a function to obtain constants for any given offset into
857 the objects, and data associated with it. */
858 by_pieces_constfn m_constfn;
859 void *m_cfndata;
860 public:
861 pieces_addr (rtx, bool, by_pieces_constfn, void *);
862 rtx adjust (scalar_int_mode, HOST_WIDE_INT);
863 void increment_address (HOST_WIDE_INT);
864 void maybe_predec (HOST_WIDE_INT);
865 void maybe_postinc (HOST_WIDE_INT);
866 void decide_autoinc (machine_mode, bool, HOST_WIDE_INT);
get_addr_inc()867 int get_addr_inc ()
868 {
869 return m_addr_inc;
870 }
871 };
872
873 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
874 true if the operation to be performed on this object is a load
875 rather than a store. For stores, OBJ can be NULL, in which case we
876 assume the operation is a stack push. For loads, the optional
877 CONSTFN and its associated CFNDATA can be used in place of the
878 memory load. */
879
pieces_addr(rtx obj,bool is_load,by_pieces_constfn constfn,void * cfndata)880 pieces_addr::pieces_addr (rtx obj, bool is_load, by_pieces_constfn constfn,
881 void *cfndata)
882 : m_obj (obj), m_is_load (is_load), m_constfn (constfn), m_cfndata (cfndata)
883 {
884 m_addr_inc = 0;
885 m_auto = false;
886 if (obj)
887 {
888 rtx addr = XEXP (obj, 0);
889 rtx_code code = GET_CODE (addr);
890 m_addr = addr;
891 bool dec = code == PRE_DEC || code == POST_DEC;
892 bool inc = code == PRE_INC || code == POST_INC;
893 m_auto = inc || dec;
894 if (m_auto)
895 m_addr_inc = dec ? -1 : 1;
896
897 /* While we have always looked for these codes here, the code
898 implementing the memory operation has never handled them.
899 Support could be added later if necessary or beneficial. */
900 gcc_assert (code != PRE_INC && code != POST_DEC);
901 }
902 else
903 {
904 m_addr = NULL_RTX;
905 if (!is_load)
906 {
907 m_auto = true;
908 if (STACK_GROWS_DOWNWARD)
909 m_addr_inc = -1;
910 else
911 m_addr_inc = 1;
912 }
913 else
914 gcc_assert (constfn != NULL);
915 }
916 m_explicit_inc = 0;
917 if (constfn)
918 gcc_assert (is_load);
919 }
920
921 /* Decide whether to use autoinc for an address involved in a memory op.
922 MODE is the mode of the accesses, REVERSE is true if we've decided to
923 perform the operation starting from the end, and LEN is the length of
924 the operation. Don't override an earlier decision to set m_auto. */
925
926 void
decide_autoinc(machine_mode ARG_UNUSED (mode),bool reverse,HOST_WIDE_INT len)927 pieces_addr::decide_autoinc (machine_mode ARG_UNUSED (mode), bool reverse,
928 HOST_WIDE_INT len)
929 {
930 if (m_auto || m_obj == NULL_RTX)
931 return;
932
933 bool use_predec = (m_is_load
934 ? USE_LOAD_PRE_DECREMENT (mode)
935 : USE_STORE_PRE_DECREMENT (mode));
936 bool use_postinc = (m_is_load
937 ? USE_LOAD_POST_INCREMENT (mode)
938 : USE_STORE_POST_INCREMENT (mode));
939 machine_mode addr_mode = get_address_mode (m_obj);
940
941 if (use_predec && reverse)
942 {
943 m_addr = copy_to_mode_reg (addr_mode,
944 plus_constant (addr_mode,
945 m_addr, len));
946 m_auto = true;
947 m_explicit_inc = -1;
948 }
949 else if (use_postinc && !reverse)
950 {
951 m_addr = copy_to_mode_reg (addr_mode, m_addr);
952 m_auto = true;
953 m_explicit_inc = 1;
954 }
955 else if (CONSTANT_P (m_addr))
956 m_addr = copy_to_mode_reg (addr_mode, m_addr);
957 }
958
959 /* Adjust the address to refer to the data at OFFSET in MODE. If we
960 are using autoincrement for this address, we don't add the offset,
961 but we still modify the MEM's properties. */
962
963 rtx
adjust(scalar_int_mode mode,HOST_WIDE_INT offset)964 pieces_addr::adjust (scalar_int_mode mode, HOST_WIDE_INT offset)
965 {
966 if (m_constfn)
967 return m_constfn (m_cfndata, offset, mode);
968 if (m_obj == NULL_RTX)
969 return NULL_RTX;
970 if (m_auto)
971 return adjust_automodify_address (m_obj, mode, m_addr, offset);
972 else
973 return adjust_address (m_obj, mode, offset);
974 }
975
976 /* Emit an add instruction to increment the address by SIZE. */
977
978 void
increment_address(HOST_WIDE_INT size)979 pieces_addr::increment_address (HOST_WIDE_INT size)
980 {
981 rtx amount = gen_int_mode (size, GET_MODE (m_addr));
982 emit_insn (gen_add2_insn (m_addr, amount));
983 }
984
985 /* If we are supposed to decrement the address after each access, emit code
986 to do so now. Increment by SIZE (which has should have the correct sign
987 already). */
988
989 void
maybe_predec(HOST_WIDE_INT size)990 pieces_addr::maybe_predec (HOST_WIDE_INT size)
991 {
992 if (m_explicit_inc >= 0)
993 return;
994 gcc_assert (HAVE_PRE_DECREMENT);
995 increment_address (size);
996 }
997
998 /* If we are supposed to decrement the address after each access, emit code
999 to do so now. Increment by SIZE. */
1000
1001 void
maybe_postinc(HOST_WIDE_INT size)1002 pieces_addr::maybe_postinc (HOST_WIDE_INT size)
1003 {
1004 if (m_explicit_inc <= 0)
1005 return;
1006 gcc_assert (HAVE_POST_INCREMENT);
1007 increment_address (size);
1008 }
1009
1010 /* This structure is used by do_op_by_pieces to describe the operation
1011 to be performed. */
1012
1013 class op_by_pieces_d
1014 {
1015 protected:
1016 pieces_addr m_to, m_from;
1017 unsigned HOST_WIDE_INT m_len;
1018 HOST_WIDE_INT m_offset;
1019 unsigned int m_align;
1020 unsigned int m_max_size;
1021 bool m_reverse;
1022
1023 /* Virtual functions, overriden by derived classes for the specific
1024 operation. */
1025 virtual void generate (rtx, rtx, machine_mode) = 0;
1026 virtual bool prepare_mode (machine_mode, unsigned int) = 0;
finish_mode(machine_mode)1027 virtual void finish_mode (machine_mode)
1028 {
1029 }
1030
1031 public:
1032 op_by_pieces_d (rtx, bool, rtx, bool, by_pieces_constfn, void *,
1033 unsigned HOST_WIDE_INT, unsigned int);
1034 void run ();
1035 };
1036
1037 /* The constructor for an op_by_pieces_d structure. We require two
1038 objects named TO and FROM, which are identified as loads or stores
1039 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1040 and its associated FROM_CFN_DATA can be used to replace loads with
1041 constant values. LEN describes the length of the operation. */
1042
op_by_pieces_d(rtx to,bool to_load,rtx from,bool from_load,by_pieces_constfn from_cfn,void * from_cfn_data,unsigned HOST_WIDE_INT len,unsigned int align)1043 op_by_pieces_d::op_by_pieces_d (rtx to, bool to_load,
1044 rtx from, bool from_load,
1045 by_pieces_constfn from_cfn,
1046 void *from_cfn_data,
1047 unsigned HOST_WIDE_INT len,
1048 unsigned int align)
1049 : m_to (to, to_load, NULL, NULL),
1050 m_from (from, from_load, from_cfn, from_cfn_data),
1051 m_len (len), m_max_size (MOVE_MAX_PIECES + 1)
1052 {
1053 int toi = m_to.get_addr_inc ();
1054 int fromi = m_from.get_addr_inc ();
1055 if (toi >= 0 && fromi >= 0)
1056 m_reverse = false;
1057 else if (toi <= 0 && fromi <= 0)
1058 m_reverse = true;
1059 else
1060 gcc_unreachable ();
1061
1062 m_offset = m_reverse ? len : 0;
1063 align = MIN (to ? MEM_ALIGN (to) : align,
1064 from ? MEM_ALIGN (from) : align);
1065
1066 /* If copying requires more than two move insns,
1067 copy addresses to registers (to make displacements shorter)
1068 and use post-increment if available. */
1069 if (by_pieces_ninsns (len, align, m_max_size, MOVE_BY_PIECES) > 2)
1070 {
1071 /* Find the mode of the largest comparison. */
1072 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1073
1074 m_from.decide_autoinc (mode, m_reverse, len);
1075 m_to.decide_autoinc (mode, m_reverse, len);
1076 }
1077
1078 align = alignment_for_piecewise_move (MOVE_MAX_PIECES, align);
1079 m_align = align;
1080 }
1081
1082 /* This function contains the main loop used for expanding a block
1083 operation. First move what we can in the largest integer mode,
1084 then go to successively smaller modes. For every access, call
1085 GENFUN with the two operands and the EXTRA_DATA. */
1086
1087 void
run()1088 op_by_pieces_d::run ()
1089 {
1090 while (m_max_size > 1 && m_len > 0)
1091 {
1092 scalar_int_mode mode = widest_int_mode_for_size (m_max_size);
1093
1094 if (prepare_mode (mode, m_align))
1095 {
1096 unsigned int size = GET_MODE_SIZE (mode);
1097 rtx to1 = NULL_RTX, from1;
1098
1099 while (m_len >= size)
1100 {
1101 if (m_reverse)
1102 m_offset -= size;
1103
1104 to1 = m_to.adjust (mode, m_offset);
1105 from1 = m_from.adjust (mode, m_offset);
1106
1107 m_to.maybe_predec (-(HOST_WIDE_INT)size);
1108 m_from.maybe_predec (-(HOST_WIDE_INT)size);
1109
1110 generate (to1, from1, mode);
1111
1112 m_to.maybe_postinc (size);
1113 m_from.maybe_postinc (size);
1114
1115 if (!m_reverse)
1116 m_offset += size;
1117
1118 m_len -= size;
1119 }
1120
1121 finish_mode (mode);
1122 }
1123
1124 m_max_size = GET_MODE_SIZE (mode);
1125 }
1126
1127 /* The code above should have handled everything. */
1128 gcc_assert (!m_len);
1129 }
1130
1131 /* Derived class from op_by_pieces_d, providing support for block move
1132 operations. */
1133
1134 class move_by_pieces_d : public op_by_pieces_d
1135 {
1136 insn_gen_fn m_gen_fun;
1137 void generate (rtx, rtx, machine_mode);
1138 bool prepare_mode (machine_mode, unsigned int);
1139
1140 public:
move_by_pieces_d(rtx to,rtx from,unsigned HOST_WIDE_INT len,unsigned int align)1141 move_by_pieces_d (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1142 unsigned int align)
1143 : op_by_pieces_d (to, false, from, true, NULL, NULL, len, align)
1144 {
1145 }
1146 rtx finish_endp (int);
1147 };
1148
1149 /* Return true if MODE can be used for a set of copies, given an
1150 alignment ALIGN. Prepare whatever data is necessary for later
1151 calls to generate. */
1152
1153 bool
prepare_mode(machine_mode mode,unsigned int align)1154 move_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1155 {
1156 insn_code icode = optab_handler (mov_optab, mode);
1157 m_gen_fun = GEN_FCN (icode);
1158 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1159 }
1160
1161 /* A callback used when iterating for a compare_by_pieces_operation.
1162 OP0 and OP1 are the values that have been loaded and should be
1163 compared in MODE. If OP0 is NULL, this means we should generate a
1164 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1165 gen function that should be used to generate the mode. */
1166
1167 void
generate(rtx op0,rtx op1,machine_mode mode ATTRIBUTE_UNUSED)1168 move_by_pieces_d::generate (rtx op0, rtx op1,
1169 machine_mode mode ATTRIBUTE_UNUSED)
1170 {
1171 #ifdef PUSH_ROUNDING
1172 if (op0 == NULL_RTX)
1173 {
1174 emit_single_push_insn (mode, op1, NULL);
1175 return;
1176 }
1177 #endif
1178 emit_insn (m_gen_fun (op0, op1));
1179 }
1180
1181 /* Perform the final adjustment at the end of a string to obtain the
1182 correct return value for the block operation. If ENDP is 1 return
1183 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1184 end minus one byte ala stpcpy. */
1185
1186 rtx
finish_endp(int endp)1187 move_by_pieces_d::finish_endp (int endp)
1188 {
1189 gcc_assert (!m_reverse);
1190 if (endp == 2)
1191 {
1192 m_to.maybe_postinc (-1);
1193 --m_offset;
1194 }
1195 return m_to.adjust (QImode, m_offset);
1196 }
1197
1198 /* Generate several move instructions to copy LEN bytes from block FROM to
1199 block TO. (These are MEM rtx's with BLKmode).
1200
1201 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1202 used to push FROM to the stack.
1203
1204 ALIGN is maximum stack alignment we can assume.
1205
1206 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1207 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1208 stpcpy. */
1209
1210 rtx
move_by_pieces(rtx to,rtx from,unsigned HOST_WIDE_INT len,unsigned int align,int endp)1211 move_by_pieces (rtx to, rtx from, unsigned HOST_WIDE_INT len,
1212 unsigned int align, int endp)
1213 {
1214 #ifndef PUSH_ROUNDING
1215 if (to == NULL)
1216 gcc_unreachable ();
1217 #endif
1218
1219 move_by_pieces_d data (to, from, len, align);
1220
1221 data.run ();
1222
1223 if (endp)
1224 return data.finish_endp (endp);
1225 else
1226 return to;
1227 }
1228
1229 /* Derived class from op_by_pieces_d, providing support for block move
1230 operations. */
1231
1232 class store_by_pieces_d : public op_by_pieces_d
1233 {
1234 insn_gen_fn m_gen_fun;
1235 void generate (rtx, rtx, machine_mode);
1236 bool prepare_mode (machine_mode, unsigned int);
1237
1238 public:
store_by_pieces_d(rtx to,by_pieces_constfn cfn,void * cfn_data,unsigned HOST_WIDE_INT len,unsigned int align)1239 store_by_pieces_d (rtx to, by_pieces_constfn cfn, void *cfn_data,
1240 unsigned HOST_WIDE_INT len, unsigned int align)
1241 : op_by_pieces_d (to, false, NULL_RTX, true, cfn, cfn_data, len, align)
1242 {
1243 }
1244 rtx finish_endp (int);
1245 };
1246
1247 /* Return true if MODE can be used for a set of stores, given an
1248 alignment ALIGN. Prepare whatever data is necessary for later
1249 calls to generate. */
1250
1251 bool
prepare_mode(machine_mode mode,unsigned int align)1252 store_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1253 {
1254 insn_code icode = optab_handler (mov_optab, mode);
1255 m_gen_fun = GEN_FCN (icode);
1256 return icode != CODE_FOR_nothing && align >= GET_MODE_ALIGNMENT (mode);
1257 }
1258
1259 /* A callback used when iterating for a store_by_pieces_operation.
1260 OP0 and OP1 are the values that have been loaded and should be
1261 compared in MODE. If OP0 is NULL, this means we should generate a
1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1263 gen function that should be used to generate the mode. */
1264
1265 void
generate(rtx op0,rtx op1,machine_mode)1266 store_by_pieces_d::generate (rtx op0, rtx op1, machine_mode)
1267 {
1268 emit_insn (m_gen_fun (op0, op1));
1269 }
1270
1271 /* Perform the final adjustment at the end of a string to obtain the
1272 correct return value for the block operation. If ENDP is 1 return
1273 memory at the end ala mempcpy, and if ENDP is 2 return memory the
1274 end minus one byte ala stpcpy. */
1275
1276 rtx
finish_endp(int endp)1277 store_by_pieces_d::finish_endp (int endp)
1278 {
1279 gcc_assert (!m_reverse);
1280 if (endp == 2)
1281 {
1282 m_to.maybe_postinc (-1);
1283 --m_offset;
1284 }
1285 return m_to.adjust (QImode, m_offset);
1286 }
1287
1288 /* Determine whether the LEN bytes generated by CONSTFUN can be
1289 stored to memory using several move instructions. CONSTFUNDATA is
1290 a pointer which will be passed as argument in every CONSTFUN call.
1291 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1292 a memset operation and false if it's a copy of a constant string.
1293 Return nonzero if a call to store_by_pieces should succeed. */
1294
1295 int
can_store_by_pieces(unsigned HOST_WIDE_INT len,rtx (* constfun)(void *,HOST_WIDE_INT,scalar_int_mode),void * constfundata,unsigned int align,bool memsetp)1296 can_store_by_pieces (unsigned HOST_WIDE_INT len,
1297 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1298 void *constfundata, unsigned int align, bool memsetp)
1299 {
1300 unsigned HOST_WIDE_INT l;
1301 unsigned int max_size;
1302 HOST_WIDE_INT offset = 0;
1303 enum insn_code icode;
1304 int reverse;
1305 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1306 rtx cst ATTRIBUTE_UNUSED;
1307
1308 if (len == 0)
1309 return 1;
1310
1311 if (!targetm.use_by_pieces_infrastructure_p (len, align,
1312 memsetp
1313 ? SET_BY_PIECES
1314 : STORE_BY_PIECES,
1315 optimize_insn_for_speed_p ()))
1316 return 0;
1317
1318 align = alignment_for_piecewise_move (STORE_MAX_PIECES, align);
1319
1320 /* We would first store what we can in the largest integer mode, then go to
1321 successively smaller modes. */
1322
1323 for (reverse = 0;
1324 reverse <= (HAVE_PRE_DECREMENT || HAVE_POST_DECREMENT);
1325 reverse++)
1326 {
1327 l = len;
1328 max_size = STORE_MAX_PIECES + 1;
1329 while (max_size > 1 && l > 0)
1330 {
1331 scalar_int_mode mode = widest_int_mode_for_size (max_size);
1332
1333 icode = optab_handler (mov_optab, mode);
1334 if (icode != CODE_FOR_nothing
1335 && align >= GET_MODE_ALIGNMENT (mode))
1336 {
1337 unsigned int size = GET_MODE_SIZE (mode);
1338
1339 while (l >= size)
1340 {
1341 if (reverse)
1342 offset -= size;
1343
1344 cst = (*constfun) (constfundata, offset, mode);
1345 if (!targetm.legitimate_constant_p (mode, cst))
1346 return 0;
1347
1348 if (!reverse)
1349 offset += size;
1350
1351 l -= size;
1352 }
1353 }
1354
1355 max_size = GET_MODE_SIZE (mode);
1356 }
1357
1358 /* The code above should have handled everything. */
1359 gcc_assert (!l);
1360 }
1361
1362 return 1;
1363 }
1364
1365 /* Generate several move instructions to store LEN bytes generated by
1366 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1367 pointer which will be passed as argument in every CONSTFUN call.
1368 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1369 a memset operation and false if it's a copy of a constant string.
1370 If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
1371 mempcpy, and if ENDP is 2 return memory the end minus one byte ala
1372 stpcpy. */
1373
1374 rtx
store_by_pieces(rtx to,unsigned HOST_WIDE_INT len,rtx (* constfun)(void *,HOST_WIDE_INT,scalar_int_mode),void * constfundata,unsigned int align,bool memsetp,int endp)1375 store_by_pieces (rtx to, unsigned HOST_WIDE_INT len,
1376 rtx (*constfun) (void *, HOST_WIDE_INT, scalar_int_mode),
1377 void *constfundata, unsigned int align, bool memsetp, int endp)
1378 {
1379 if (len == 0)
1380 {
1381 gcc_assert (endp != 2);
1382 return to;
1383 }
1384
1385 gcc_assert (targetm.use_by_pieces_infrastructure_p
1386 (len, align,
1387 memsetp ? SET_BY_PIECES : STORE_BY_PIECES,
1388 optimize_insn_for_speed_p ()));
1389
1390 store_by_pieces_d data (to, constfun, constfundata, len, align);
1391 data.run ();
1392
1393 if (endp)
1394 return data.finish_endp (endp);
1395 else
1396 return to;
1397 }
1398
1399 /* Callback routine for clear_by_pieces.
1400 Return const0_rtx unconditionally. */
1401
1402 static rtx
clear_by_pieces_1(void *,HOST_WIDE_INT,scalar_int_mode)1403 clear_by_pieces_1 (void *, HOST_WIDE_INT, scalar_int_mode)
1404 {
1405 return const0_rtx;
1406 }
1407
1408 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1409 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1410
1411 static void
clear_by_pieces(rtx to,unsigned HOST_WIDE_INT len,unsigned int align)1412 clear_by_pieces (rtx to, unsigned HOST_WIDE_INT len, unsigned int align)
1413 {
1414 if (len == 0)
1415 return;
1416
1417 store_by_pieces_d data (to, clear_by_pieces_1, NULL, len, align);
1418 data.run ();
1419 }
1420
1421 /* Context used by compare_by_pieces_genfn. It stores the fail label
1422 to jump to in case of miscomparison, and for branch ratios greater than 1,
1423 it stores an accumulator and the current and maximum counts before
1424 emitting another branch. */
1425
1426 class compare_by_pieces_d : public op_by_pieces_d
1427 {
1428 rtx_code_label *m_fail_label;
1429 rtx m_accumulator;
1430 int m_count, m_batch;
1431
1432 void generate (rtx, rtx, machine_mode);
1433 bool prepare_mode (machine_mode, unsigned int);
1434 void finish_mode (machine_mode);
1435 public:
compare_by_pieces_d(rtx op0,rtx op1,by_pieces_constfn op1_cfn,void * op1_cfn_data,HOST_WIDE_INT len,int align,rtx_code_label * fail_label)1436 compare_by_pieces_d (rtx op0, rtx op1, by_pieces_constfn op1_cfn,
1437 void *op1_cfn_data, HOST_WIDE_INT len, int align,
1438 rtx_code_label *fail_label)
1439 : op_by_pieces_d (op0, true, op1, true, op1_cfn, op1_cfn_data, len, align)
1440 {
1441 m_fail_label = fail_label;
1442 }
1443 };
1444
1445 /* A callback used when iterating for a compare_by_pieces_operation.
1446 OP0 and OP1 are the values that have been loaded and should be
1447 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1448 context structure. */
1449
1450 void
generate(rtx op0,rtx op1,machine_mode mode)1451 compare_by_pieces_d::generate (rtx op0, rtx op1, machine_mode mode)
1452 {
1453 if (m_batch > 1)
1454 {
1455 rtx temp = expand_binop (mode, sub_optab, op0, op1, NULL_RTX,
1456 true, OPTAB_LIB_WIDEN);
1457 if (m_count != 0)
1458 temp = expand_binop (mode, ior_optab, m_accumulator, temp, temp,
1459 true, OPTAB_LIB_WIDEN);
1460 m_accumulator = temp;
1461
1462 if (++m_count < m_batch)
1463 return;
1464
1465 m_count = 0;
1466 op0 = m_accumulator;
1467 op1 = const0_rtx;
1468 m_accumulator = NULL_RTX;
1469 }
1470 do_compare_rtx_and_jump (op0, op1, NE, true, mode, NULL_RTX, NULL,
1471 m_fail_label, profile_probability::uninitialized ());
1472 }
1473
1474 /* Return true if MODE can be used for a set of moves and comparisons,
1475 given an alignment ALIGN. Prepare whatever data is necessary for
1476 later calls to generate. */
1477
1478 bool
prepare_mode(machine_mode mode,unsigned int align)1479 compare_by_pieces_d::prepare_mode (machine_mode mode, unsigned int align)
1480 {
1481 insn_code icode = optab_handler (mov_optab, mode);
1482 if (icode == CODE_FOR_nothing
1483 || align < GET_MODE_ALIGNMENT (mode)
1484 || !can_compare_p (EQ, mode, ccp_jump))
1485 return false;
1486 m_batch = targetm.compare_by_pieces_branch_ratio (mode);
1487 if (m_batch < 0)
1488 return false;
1489 m_accumulator = NULL_RTX;
1490 m_count = 0;
1491 return true;
1492 }
1493
1494 /* Called after expanding a series of comparisons in MODE. If we have
1495 accumulated results for which we haven't emitted a branch yet, do
1496 so now. */
1497
1498 void
finish_mode(machine_mode mode)1499 compare_by_pieces_d::finish_mode (machine_mode mode)
1500 {
1501 if (m_accumulator != NULL_RTX)
1502 do_compare_rtx_and_jump (m_accumulator, const0_rtx, NE, true, mode,
1503 NULL_RTX, NULL, m_fail_label,
1504 profile_probability::uninitialized ());
1505 }
1506
1507 /* Generate several move instructions to compare LEN bytes from blocks
1508 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1509
1510 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1511 used to push FROM to the stack.
1512
1513 ALIGN is maximum stack alignment we can assume.
1514
1515 Optionally, the caller can pass a constfn and associated data in A1_CFN
1516 and A1_CFN_DATA. describing that the second operand being compared is a
1517 known constant and how to obtain its data. */
1518
1519 static rtx
compare_by_pieces(rtx arg0,rtx arg1,unsigned HOST_WIDE_INT len,rtx target,unsigned int align,by_pieces_constfn a1_cfn,void * a1_cfn_data)1520 compare_by_pieces (rtx arg0, rtx arg1, unsigned HOST_WIDE_INT len,
1521 rtx target, unsigned int align,
1522 by_pieces_constfn a1_cfn, void *a1_cfn_data)
1523 {
1524 rtx_code_label *fail_label = gen_label_rtx ();
1525 rtx_code_label *end_label = gen_label_rtx ();
1526
1527 if (target == NULL_RTX
1528 || !REG_P (target) || REGNO (target) < FIRST_PSEUDO_REGISTER)
1529 target = gen_reg_rtx (TYPE_MODE (integer_type_node));
1530
1531 compare_by_pieces_d data (arg0, arg1, a1_cfn, a1_cfn_data, len, align,
1532 fail_label);
1533
1534 data.run ();
1535
1536 emit_move_insn (target, const0_rtx);
1537 emit_jump (end_label);
1538 emit_barrier ();
1539 emit_label (fail_label);
1540 emit_move_insn (target, const1_rtx);
1541 emit_label (end_label);
1542
1543 return target;
1544 }
1545
1546 /* Emit code to move a block Y to a block X. This may be done with
1547 string-move instructions, with multiple scalar move instructions,
1548 or with a library call.
1549
1550 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1551 SIZE is an rtx that says how long they are.
1552 ALIGN is the maximum alignment we can assume they have.
1553 METHOD describes what kind of copy this is, and what mechanisms may be used.
1554 MIN_SIZE is the minimal size of block to move
1555 MAX_SIZE is the maximal size of block to move, if it can not be represented
1556 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1557
1558 Return the address of the new block, if memcpy is called and returns it,
1559 0 otherwise. */
1560
1561 rtx
emit_block_move_hints(rtx x,rtx y,rtx size,enum block_op_methods method,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size)1562 emit_block_move_hints (rtx x, rtx y, rtx size, enum block_op_methods method,
1563 unsigned int expected_align, HOST_WIDE_INT expected_size,
1564 unsigned HOST_WIDE_INT min_size,
1565 unsigned HOST_WIDE_INT max_size,
1566 unsigned HOST_WIDE_INT probable_max_size)
1567 {
1568 int may_use_call;
1569 rtx retval = 0;
1570 unsigned int align;
1571
1572 gcc_assert (size);
1573 if (CONST_INT_P (size) && INTVAL (size) == 0)
1574 return 0;
1575
1576 switch (method)
1577 {
1578 case BLOCK_OP_NORMAL:
1579 case BLOCK_OP_TAILCALL:
1580 may_use_call = 1;
1581 break;
1582
1583 case BLOCK_OP_CALL_PARM:
1584 may_use_call = block_move_libcall_safe_for_call_parm ();
1585
1586 /* Make inhibit_defer_pop nonzero around the library call
1587 to force it to pop the arguments right away. */
1588 NO_DEFER_POP;
1589 break;
1590
1591 case BLOCK_OP_NO_LIBCALL:
1592 may_use_call = 0;
1593 break;
1594
1595 case BLOCK_OP_NO_LIBCALL_RET:
1596 may_use_call = -1;
1597 break;
1598
1599 default:
1600 gcc_unreachable ();
1601 }
1602
1603 gcc_assert (MEM_P (x) && MEM_P (y));
1604 align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1605 gcc_assert (align >= BITS_PER_UNIT);
1606
1607 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1608 block copy is more efficient for other large modes, e.g. DCmode. */
1609 x = adjust_address (x, BLKmode, 0);
1610 y = adjust_address (y, BLKmode, 0);
1611
1612 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1613 can be incorrect is coming from __builtin_memcpy. */
1614 if (CONST_INT_P (size))
1615 {
1616 x = shallow_copy_rtx (x);
1617 y = shallow_copy_rtx (y);
1618 set_mem_size (x, INTVAL (size));
1619 set_mem_size (y, INTVAL (size));
1620 }
1621
1622 if (CONST_INT_P (size) && can_move_by_pieces (INTVAL (size), align))
1623 move_by_pieces (x, y, INTVAL (size), align, 0);
1624 else if (emit_block_move_via_movmem (x, y, size, align,
1625 expected_align, expected_size,
1626 min_size, max_size, probable_max_size))
1627 ;
1628 else if (may_use_call
1629 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x))
1630 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y)))
1631 {
1632 if (may_use_call < 0)
1633 return pc_rtx;
1634
1635 retval = emit_block_copy_via_libcall (x, y, size,
1636 method == BLOCK_OP_TAILCALL);
1637 }
1638
1639 else
1640 emit_block_move_via_loop (x, y, size, align);
1641
1642 if (method == BLOCK_OP_CALL_PARM)
1643 OK_DEFER_POP;
1644
1645 return retval;
1646 }
1647
1648 rtx
emit_block_move(rtx x,rtx y,rtx size,enum block_op_methods method)1649 emit_block_move (rtx x, rtx y, rtx size, enum block_op_methods method)
1650 {
1651 unsigned HOST_WIDE_INT max, min = 0;
1652 if (GET_CODE (size) == CONST_INT)
1653 min = max = UINTVAL (size);
1654 else
1655 max = GET_MODE_MASK (GET_MODE (size));
1656 return emit_block_move_hints (x, y, size, method, 0, -1,
1657 min, max, max);
1658 }
1659
1660 /* A subroutine of emit_block_move. Returns true if calling the
1661 block move libcall will not clobber any parameters which may have
1662 already been placed on the stack. */
1663
1664 static bool
block_move_libcall_safe_for_call_parm(void)1665 block_move_libcall_safe_for_call_parm (void)
1666 {
1667 #if defined (REG_PARM_STACK_SPACE)
1668 tree fn;
1669 #endif
1670
1671 /* If arguments are pushed on the stack, then they're safe. */
1672 if (PUSH_ARGS)
1673 return true;
1674
1675 /* If registers go on the stack anyway, any argument is sure to clobber
1676 an outgoing argument. */
1677 #if defined (REG_PARM_STACK_SPACE)
1678 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1679 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1680 depend on its argument. */
1681 (void) fn;
1682 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn ? NULL_TREE : TREE_TYPE (fn)))
1683 && REG_PARM_STACK_SPACE (fn) != 0)
1684 return false;
1685 #endif
1686
1687 /* If any argument goes in memory, then it might clobber an outgoing
1688 argument. */
1689 {
1690 CUMULATIVE_ARGS args_so_far_v;
1691 cumulative_args_t args_so_far;
1692 tree fn, arg;
1693
1694 fn = builtin_decl_implicit (BUILT_IN_MEMCPY);
1695 INIT_CUMULATIVE_ARGS (args_so_far_v, TREE_TYPE (fn), NULL_RTX, 0, 3);
1696 args_so_far = pack_cumulative_args (&args_so_far_v);
1697
1698 arg = TYPE_ARG_TYPES (TREE_TYPE (fn));
1699 for ( ; arg != void_list_node ; arg = TREE_CHAIN (arg))
1700 {
1701 machine_mode mode = TYPE_MODE (TREE_VALUE (arg));
1702 rtx tmp = targetm.calls.function_arg (args_so_far, mode,
1703 NULL_TREE, true);
1704 if (!tmp || !REG_P (tmp))
1705 return false;
1706 if (targetm.calls.arg_partial_bytes (args_so_far, mode, NULL, 1))
1707 return false;
1708 targetm.calls.function_arg_advance (args_so_far, mode,
1709 NULL_TREE, true);
1710 }
1711 }
1712 return true;
1713 }
1714
1715 /* A subroutine of emit_block_move. Expand a movmem pattern;
1716 return true if successful. */
1717
1718 static bool
emit_block_move_via_movmem(rtx x,rtx y,rtx size,unsigned int align,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size)1719 emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align,
1720 unsigned int expected_align, HOST_WIDE_INT expected_size,
1721 unsigned HOST_WIDE_INT min_size,
1722 unsigned HOST_WIDE_INT max_size,
1723 unsigned HOST_WIDE_INT probable_max_size)
1724 {
1725 int save_volatile_ok = volatile_ok;
1726
1727 if (expected_align < align)
1728 expected_align = align;
1729 if (expected_size != -1)
1730 {
1731 if ((unsigned HOST_WIDE_INT)expected_size > probable_max_size)
1732 expected_size = probable_max_size;
1733 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
1734 expected_size = min_size;
1735 }
1736
1737 /* Since this is a move insn, we don't care about volatility. */
1738 volatile_ok = 1;
1739
1740 /* Try the most limited insn first, because there's no point
1741 including more than one in the machine description unless
1742 the more limited one has some advantage. */
1743
1744 opt_scalar_int_mode mode_iter;
1745 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
1746 {
1747 scalar_int_mode mode = mode_iter.require ();
1748 enum insn_code code = direct_optab_handler (movmem_optab, mode);
1749
1750 if (code != CODE_FOR_nothing
1751 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1752 here because if SIZE is less than the mode mask, as it is
1753 returned by the macro, it will definitely be less than the
1754 actual mode mask. Since SIZE is within the Pmode address
1755 space, we limit MODE to Pmode. */
1756 && ((CONST_INT_P (size)
1757 && ((unsigned HOST_WIDE_INT) INTVAL (size)
1758 <= (GET_MODE_MASK (mode) >> 1)))
1759 || max_size <= (GET_MODE_MASK (mode) >> 1)
1760 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
1761 {
1762 struct expand_operand ops[9];
1763 unsigned int nops;
1764
1765 /* ??? When called via emit_block_move_for_call, it'd be
1766 nice if there were some way to inform the backend, so
1767 that it doesn't fail the expansion because it thinks
1768 emitting the libcall would be more efficient. */
1769 nops = insn_data[(int) code].n_generator_args;
1770 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
1771
1772 create_fixed_operand (&ops[0], x);
1773 create_fixed_operand (&ops[1], y);
1774 /* The check above guarantees that this size conversion is valid. */
1775 create_convert_operand_to (&ops[2], size, mode, true);
1776 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
1777 if (nops >= 6)
1778 {
1779 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
1780 create_integer_operand (&ops[5], expected_size);
1781 }
1782 if (nops >= 8)
1783 {
1784 create_integer_operand (&ops[6], min_size);
1785 /* If we can not represent the maximal size,
1786 make parameter NULL. */
1787 if ((HOST_WIDE_INT) max_size != -1)
1788 create_integer_operand (&ops[7], max_size);
1789 else
1790 create_fixed_operand (&ops[7], NULL);
1791 }
1792 if (nops == 9)
1793 {
1794 /* If we can not represent the maximal size,
1795 make parameter NULL. */
1796 if ((HOST_WIDE_INT) probable_max_size != -1)
1797 create_integer_operand (&ops[8], probable_max_size);
1798 else
1799 create_fixed_operand (&ops[8], NULL);
1800 }
1801 if (maybe_expand_insn (code, nops, ops))
1802 {
1803 volatile_ok = save_volatile_ok;
1804 return true;
1805 }
1806 }
1807 }
1808
1809 volatile_ok = save_volatile_ok;
1810 return false;
1811 }
1812
1813 /* A subroutine of emit_block_move. Copy the data via an explicit
1814 loop. This is used only when libcalls are forbidden. */
1815 /* ??? It'd be nice to copy in hunks larger than QImode. */
1816
1817 static void
emit_block_move_via_loop(rtx x,rtx y,rtx size,unsigned int align ATTRIBUTE_UNUSED)1818 emit_block_move_via_loop (rtx x, rtx y, rtx size,
1819 unsigned int align ATTRIBUTE_UNUSED)
1820 {
1821 rtx_code_label *cmp_label, *top_label;
1822 rtx iter, x_addr, y_addr, tmp;
1823 machine_mode x_addr_mode = get_address_mode (x);
1824 machine_mode y_addr_mode = get_address_mode (y);
1825 machine_mode iter_mode;
1826
1827 iter_mode = GET_MODE (size);
1828 if (iter_mode == VOIDmode)
1829 iter_mode = word_mode;
1830
1831 top_label = gen_label_rtx ();
1832 cmp_label = gen_label_rtx ();
1833 iter = gen_reg_rtx (iter_mode);
1834
1835 emit_move_insn (iter, const0_rtx);
1836
1837 x_addr = force_operand (XEXP (x, 0), NULL_RTX);
1838 y_addr = force_operand (XEXP (y, 0), NULL_RTX);
1839 do_pending_stack_adjust ();
1840
1841 emit_jump (cmp_label);
1842 emit_label (top_label);
1843
1844 tmp = convert_modes (x_addr_mode, iter_mode, iter, true);
1845 x_addr = simplify_gen_binary (PLUS, x_addr_mode, x_addr, tmp);
1846
1847 if (x_addr_mode != y_addr_mode)
1848 tmp = convert_modes (y_addr_mode, iter_mode, iter, true);
1849 y_addr = simplify_gen_binary (PLUS, y_addr_mode, y_addr, tmp);
1850
1851 x = change_address (x, QImode, x_addr);
1852 y = change_address (y, QImode, y_addr);
1853
1854 emit_move_insn (x, y);
1855
1856 tmp = expand_simple_binop (iter_mode, PLUS, iter, const1_rtx, iter,
1857 true, OPTAB_LIB_WIDEN);
1858 if (tmp != iter)
1859 emit_move_insn (iter, tmp);
1860
1861 emit_label (cmp_label);
1862
1863 emit_cmp_and_jump_insns (iter, size, LT, NULL_RTX, iter_mode,
1864 true, top_label,
1865 profile_probability::guessed_always ()
1866 .apply_scale (9, 10));
1867 }
1868
1869 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1870 TAILCALL is true if this is a tail call. */
1871
1872 rtx
emit_block_op_via_libcall(enum built_in_function fncode,rtx dst,rtx src,rtx size,bool tailcall)1873 emit_block_op_via_libcall (enum built_in_function fncode, rtx dst, rtx src,
1874 rtx size, bool tailcall)
1875 {
1876 rtx dst_addr, src_addr;
1877 tree call_expr, dst_tree, src_tree, size_tree;
1878 machine_mode size_mode;
1879
1880 /* Since dst and src are passed to a libcall, mark the corresponding
1881 tree EXPR as addressable. */
1882 tree dst_expr = MEM_EXPR (dst);
1883 tree src_expr = MEM_EXPR (src);
1884 if (dst_expr)
1885 mark_addressable (dst_expr);
1886 if (src_expr)
1887 mark_addressable (src_expr);
1888
1889 dst_addr = copy_addr_to_reg (XEXP (dst, 0));
1890 dst_addr = convert_memory_address (ptr_mode, dst_addr);
1891 dst_tree = make_tree (ptr_type_node, dst_addr);
1892
1893 src_addr = copy_addr_to_reg (XEXP (src, 0));
1894 src_addr = convert_memory_address (ptr_mode, src_addr);
1895 src_tree = make_tree (ptr_type_node, src_addr);
1896
1897 size_mode = TYPE_MODE (sizetype);
1898 size = convert_to_mode (size_mode, size, 1);
1899 size = copy_to_mode_reg (size_mode, size);
1900 size_tree = make_tree (sizetype, size);
1901
1902 /* It is incorrect to use the libcall calling conventions for calls to
1903 memcpy/memmove/memcmp because they can be provided by the user. */
1904 tree fn = builtin_decl_implicit (fncode);
1905 call_expr = build_call_expr (fn, 3, dst_tree, src_tree, size_tree);
1906 CALL_EXPR_TAILCALL (call_expr) = tailcall;
1907
1908 return expand_call (call_expr, NULL_RTX, false);
1909 }
1910
1911 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1912 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1913 otherwise return null. */
1914
1915 rtx
expand_cmpstrn_or_cmpmem(insn_code icode,rtx target,rtx arg1_rtx,rtx arg2_rtx,tree arg3_type,rtx arg3_rtx,HOST_WIDE_INT align)1916 expand_cmpstrn_or_cmpmem (insn_code icode, rtx target, rtx arg1_rtx,
1917 rtx arg2_rtx, tree arg3_type, rtx arg3_rtx,
1918 HOST_WIDE_INT align)
1919 {
1920 machine_mode insn_mode = insn_data[icode].operand[0].mode;
1921
1922 if (target && (!REG_P (target) || HARD_REGISTER_P (target)))
1923 target = NULL_RTX;
1924
1925 struct expand_operand ops[5];
1926 create_output_operand (&ops[0], target, insn_mode);
1927 create_fixed_operand (&ops[1], arg1_rtx);
1928 create_fixed_operand (&ops[2], arg2_rtx);
1929 create_convert_operand_from (&ops[3], arg3_rtx, TYPE_MODE (arg3_type),
1930 TYPE_UNSIGNED (arg3_type));
1931 create_integer_operand (&ops[4], align);
1932 if (maybe_expand_insn (icode, 5, ops))
1933 return ops[0].value;
1934 return NULL_RTX;
1935 }
1936
1937 /* Expand a block compare between X and Y with length LEN using the
1938 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1939 of the expression that was used to calculate the length. ALIGN
1940 gives the known minimum common alignment. */
1941
1942 static rtx
emit_block_cmp_via_cmpmem(rtx x,rtx y,rtx len,tree len_type,rtx target,unsigned align)1943 emit_block_cmp_via_cmpmem (rtx x, rtx y, rtx len, tree len_type, rtx target,
1944 unsigned align)
1945 {
1946 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1947 implementing memcmp because it will stop if it encounters two
1948 zero bytes. */
1949 insn_code icode = direct_optab_handler (cmpmem_optab, SImode);
1950
1951 if (icode == CODE_FOR_nothing)
1952 return NULL_RTX;
1953
1954 return expand_cmpstrn_or_cmpmem (icode, target, x, y, len_type, len, align);
1955 }
1956
1957 /* Emit code to compare a block Y to a block X. This may be done with
1958 string-compare instructions, with multiple scalar instructions,
1959 or with a library call.
1960
1961 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1962 they are. LEN_TYPE is the type of the expression that was used to
1963 calculate it.
1964
1965 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1966 value of a normal memcmp call, instead we can just compare for equality.
1967 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1968 returning NULL_RTX.
1969
1970 Optionally, the caller can pass a constfn and associated data in Y_CFN
1971 and Y_CFN_DATA. describing that the second operand being compared is a
1972 known constant and how to obtain its data.
1973 Return the result of the comparison, or NULL_RTX if we failed to
1974 perform the operation. */
1975
1976 rtx
emit_block_cmp_hints(rtx x,rtx y,rtx len,tree len_type,rtx target,bool equality_only,by_pieces_constfn y_cfn,void * y_cfndata)1977 emit_block_cmp_hints (rtx x, rtx y, rtx len, tree len_type, rtx target,
1978 bool equality_only, by_pieces_constfn y_cfn,
1979 void *y_cfndata)
1980 {
1981 rtx result = 0;
1982
1983 if (CONST_INT_P (len) && INTVAL (len) == 0)
1984 return const0_rtx;
1985
1986 gcc_assert (MEM_P (x) && MEM_P (y));
1987 unsigned int align = MIN (MEM_ALIGN (x), MEM_ALIGN (y));
1988 gcc_assert (align >= BITS_PER_UNIT);
1989
1990 x = adjust_address (x, BLKmode, 0);
1991 y = adjust_address (y, BLKmode, 0);
1992
1993 if (equality_only
1994 && CONST_INT_P (len)
1995 && can_do_by_pieces (INTVAL (len), align, COMPARE_BY_PIECES))
1996 result = compare_by_pieces (x, y, INTVAL (len), target, align,
1997 y_cfn, y_cfndata);
1998 else
1999 result = emit_block_cmp_via_cmpmem (x, y, len, len_type, target, align);
2000
2001 return result;
2002 }
2003
2004 /* Copy all or part of a value X into registers starting at REGNO.
2005 The number of registers to be filled is NREGS. */
2006
2007 void
move_block_to_reg(int regno,rtx x,int nregs,machine_mode mode)2008 move_block_to_reg (int regno, rtx x, int nregs, machine_mode mode)
2009 {
2010 if (nregs == 0)
2011 return;
2012
2013 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
2014 x = validize_mem (force_const_mem (mode, x));
2015
2016 /* See if the machine can do this with a load multiple insn. */
2017 if (targetm.have_load_multiple ())
2018 {
2019 rtx_insn *last = get_last_insn ();
2020 rtx first = gen_rtx_REG (word_mode, regno);
2021 if (rtx_insn *pat = targetm.gen_load_multiple (first, x,
2022 GEN_INT (nregs)))
2023 {
2024 emit_insn (pat);
2025 return;
2026 }
2027 else
2028 delete_insns_since (last);
2029 }
2030
2031 for (int i = 0; i < nregs; i++)
2032 emit_move_insn (gen_rtx_REG (word_mode, regno + i),
2033 operand_subword_force (x, i, mode));
2034 }
2035
2036 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2037 The number of registers to be filled is NREGS. */
2038
2039 void
move_block_from_reg(int regno,rtx x,int nregs)2040 move_block_from_reg (int regno, rtx x, int nregs)
2041 {
2042 if (nregs == 0)
2043 return;
2044
2045 /* See if the machine can do this with a store multiple insn. */
2046 if (targetm.have_store_multiple ())
2047 {
2048 rtx_insn *last = get_last_insn ();
2049 rtx first = gen_rtx_REG (word_mode, regno);
2050 if (rtx_insn *pat = targetm.gen_store_multiple (x, first,
2051 GEN_INT (nregs)))
2052 {
2053 emit_insn (pat);
2054 return;
2055 }
2056 else
2057 delete_insns_since (last);
2058 }
2059
2060 for (int i = 0; i < nregs; i++)
2061 {
2062 rtx tem = operand_subword (x, i, 1, BLKmode);
2063
2064 gcc_assert (tem);
2065
2066 emit_move_insn (tem, gen_rtx_REG (word_mode, regno + i));
2067 }
2068 }
2069
2070 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2071 ORIG, where ORIG is a non-consecutive group of registers represented by
2072 a PARALLEL. The clone is identical to the original except in that the
2073 original set of registers is replaced by a new set of pseudo registers.
2074 The new set has the same modes as the original set. */
2075
2076 rtx
gen_group_rtx(rtx orig)2077 gen_group_rtx (rtx orig)
2078 {
2079 int i, length;
2080 rtx *tmps;
2081
2082 gcc_assert (GET_CODE (orig) == PARALLEL);
2083
2084 length = XVECLEN (orig, 0);
2085 tmps = XALLOCAVEC (rtx, length);
2086
2087 /* Skip a NULL entry in first slot. */
2088 i = XEXP (XVECEXP (orig, 0, 0), 0) ? 0 : 1;
2089
2090 if (i)
2091 tmps[0] = 0;
2092
2093 for (; i < length; i++)
2094 {
2095 machine_mode mode = GET_MODE (XEXP (XVECEXP (orig, 0, i), 0));
2096 rtx offset = XEXP (XVECEXP (orig, 0, i), 1);
2097
2098 tmps[i] = gen_rtx_EXPR_LIST (VOIDmode, gen_reg_rtx (mode), offset);
2099 }
2100
2101 return gen_rtx_PARALLEL (GET_MODE (orig), gen_rtvec_v (length, tmps));
2102 }
2103
2104 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2105 except that values are placed in TMPS[i], and must later be moved
2106 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2107
2108 static void
emit_group_load_1(rtx * tmps,rtx dst,rtx orig_src,tree type,poly_int64 ssize)2109 emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type,
2110 poly_int64 ssize)
2111 {
2112 rtx src;
2113 int start, i;
2114 machine_mode m = GET_MODE (orig_src);
2115
2116 gcc_assert (GET_CODE (dst) == PARALLEL);
2117
2118 if (m != VOIDmode
2119 && !SCALAR_INT_MODE_P (m)
2120 && !MEM_P (orig_src)
2121 && GET_CODE (orig_src) != CONCAT)
2122 {
2123 scalar_int_mode imode;
2124 if (int_mode_for_mode (GET_MODE (orig_src)).exists (&imode))
2125 {
2126 src = gen_reg_rtx (imode);
2127 emit_move_insn (gen_lowpart (GET_MODE (orig_src), src), orig_src);
2128 }
2129 else
2130 {
2131 src = assign_stack_temp (GET_MODE (orig_src), ssize);
2132 emit_move_insn (src, orig_src);
2133 }
2134 emit_group_load_1 (tmps, dst, src, type, ssize);
2135 return;
2136 }
2137
2138 /* Check for a NULL entry, used to indicate that the parameter goes
2139 both on the stack and in registers. */
2140 if (XEXP (XVECEXP (dst, 0, 0), 0))
2141 start = 0;
2142 else
2143 start = 1;
2144
2145 /* Process the pieces. */
2146 for (i = start; i < XVECLEN (dst, 0); i++)
2147 {
2148 machine_mode mode = GET_MODE (XEXP (XVECEXP (dst, 0, i), 0));
2149 poly_int64 bytepos = INTVAL (XEXP (XVECEXP (dst, 0, i), 1));
2150 poly_int64 bytelen = GET_MODE_SIZE (mode);
2151 poly_int64 shift = 0;
2152
2153 /* Handle trailing fragments that run over the size of the struct.
2154 It's the target's responsibility to make sure that the fragment
2155 cannot be strictly smaller in some cases and strictly larger
2156 in others. */
2157 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2158 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2159 {
2160 /* Arrange to shift the fragment to where it belongs.
2161 extract_bit_field loads to the lsb of the reg. */
2162 if (
2163 #ifdef BLOCK_REG_PADDING
2164 BLOCK_REG_PADDING (GET_MODE (orig_src), type, i == start)
2165 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2166 #else
2167 BYTES_BIG_ENDIAN
2168 #endif
2169 )
2170 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2171 bytelen = ssize - bytepos;
2172 gcc_assert (maybe_gt (bytelen, 0));
2173 }
2174
2175 /* If we won't be loading directly from memory, protect the real source
2176 from strange tricks we might play; but make sure that the source can
2177 be loaded directly into the destination. */
2178 src = orig_src;
2179 if (!MEM_P (orig_src)
2180 && (!CONSTANT_P (orig_src)
2181 || (GET_MODE (orig_src) != mode
2182 && GET_MODE (orig_src) != VOIDmode)))
2183 {
2184 if (GET_MODE (orig_src) == VOIDmode)
2185 src = gen_reg_rtx (mode);
2186 else
2187 src = gen_reg_rtx (GET_MODE (orig_src));
2188
2189 emit_move_insn (src, orig_src);
2190 }
2191
2192 /* Optimize the access just a bit. */
2193 if (MEM_P (src)
2194 && (! targetm.slow_unaligned_access (mode, MEM_ALIGN (src))
2195 || MEM_ALIGN (src) >= GET_MODE_ALIGNMENT (mode))
2196 && multiple_p (bytepos * BITS_PER_UNIT, GET_MODE_ALIGNMENT (mode))
2197 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2198 {
2199 tmps[i] = gen_reg_rtx (mode);
2200 emit_move_insn (tmps[i], adjust_address (src, mode, bytepos));
2201 }
2202 else if (COMPLEX_MODE_P (mode)
2203 && GET_MODE (src) == mode
2204 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2205 /* Let emit_move_complex do the bulk of the work. */
2206 tmps[i] = src;
2207 else if (GET_CODE (src) == CONCAT)
2208 {
2209 poly_int64 slen = GET_MODE_SIZE (GET_MODE (src));
2210 poly_int64 slen0 = GET_MODE_SIZE (GET_MODE (XEXP (src, 0)));
2211 unsigned int elt;
2212 poly_int64 subpos;
2213
2214 if (can_div_trunc_p (bytepos, slen0, &elt, &subpos)
2215 && known_le (subpos + bytelen, slen0))
2216 {
2217 /* The following assumes that the concatenated objects all
2218 have the same size. In this case, a simple calculation
2219 can be used to determine the object and the bit field
2220 to be extracted. */
2221 tmps[i] = XEXP (src, elt);
2222 if (maybe_ne (subpos, 0)
2223 || maybe_ne (subpos + bytelen, slen0)
2224 || (!CONSTANT_P (tmps[i])
2225 && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode)))
2226 tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
2227 subpos * BITS_PER_UNIT,
2228 1, NULL_RTX, mode, mode, false,
2229 NULL);
2230 }
2231 else
2232 {
2233 rtx mem;
2234
2235 gcc_assert (known_eq (bytepos, 0));
2236 mem = assign_stack_temp (GET_MODE (src), slen);
2237 emit_move_insn (mem, src);
2238 tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
2239 0, 1, NULL_RTX, mode, mode, false,
2240 NULL);
2241 }
2242 }
2243 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2244 SIMD register, which is currently broken. While we get GCC
2245 to emit proper RTL for these cases, let's dump to memory. */
2246 else if (VECTOR_MODE_P (GET_MODE (dst))
2247 && REG_P (src))
2248 {
2249 poly_uint64 slen = GET_MODE_SIZE (GET_MODE (src));
2250 rtx mem;
2251
2252 mem = assign_stack_temp (GET_MODE (src), slen);
2253 emit_move_insn (mem, src);
2254 tmps[i] = adjust_address (mem, mode, bytepos);
2255 }
2256 else if (CONSTANT_P (src) && GET_MODE (dst) != BLKmode
2257 && XVECLEN (dst, 0) > 1)
2258 tmps[i] = simplify_gen_subreg (mode, src, GET_MODE (dst), bytepos);
2259 else if (CONSTANT_P (src))
2260 {
2261 if (known_eq (bytelen, ssize))
2262 tmps[i] = src;
2263 else
2264 {
2265 rtx first, second;
2266
2267 /* TODO: const_wide_int can have sizes other than this... */
2268 gcc_assert (known_eq (2 * bytelen, ssize));
2269 split_double (src, &first, &second);
2270 if (i)
2271 tmps[i] = second;
2272 else
2273 tmps[i] = first;
2274 }
2275 }
2276 else if (REG_P (src) && GET_MODE (src) == mode)
2277 tmps[i] = src;
2278 else
2279 tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
2280 bytepos * BITS_PER_UNIT, 1, NULL_RTX,
2281 mode, mode, false, NULL);
2282
2283 if (maybe_ne (shift, 0))
2284 tmps[i] = expand_shift (LSHIFT_EXPR, mode, tmps[i],
2285 shift, tmps[i], 0);
2286 }
2287 }
2288
2289 /* Emit code to move a block SRC of type TYPE to a block DST,
2290 where DST is non-consecutive registers represented by a PARALLEL.
2291 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2292 if not known. */
2293
2294 void
emit_group_load(rtx dst,rtx src,tree type,poly_int64 ssize)2295 emit_group_load (rtx dst, rtx src, tree type, poly_int64 ssize)
2296 {
2297 rtx *tmps;
2298 int i;
2299
2300 tmps = XALLOCAVEC (rtx, XVECLEN (dst, 0));
2301 emit_group_load_1 (tmps, dst, src, type, ssize);
2302
2303 /* Copy the extracted pieces into the proper (probable) hard regs. */
2304 for (i = 0; i < XVECLEN (dst, 0); i++)
2305 {
2306 rtx d = XEXP (XVECEXP (dst, 0, i), 0);
2307 if (d == NULL)
2308 continue;
2309 emit_move_insn (d, tmps[i]);
2310 }
2311 }
2312
2313 /* Similar, but load SRC into new pseudos in a format that looks like
2314 PARALLEL. This can later be fed to emit_group_move to get things
2315 in the right place. */
2316
2317 rtx
emit_group_load_into_temps(rtx parallel,rtx src,tree type,poly_int64 ssize)2318 emit_group_load_into_temps (rtx parallel, rtx src, tree type, poly_int64 ssize)
2319 {
2320 rtvec vec;
2321 int i;
2322
2323 vec = rtvec_alloc (XVECLEN (parallel, 0));
2324 emit_group_load_1 (&RTVEC_ELT (vec, 0), parallel, src, type, ssize);
2325
2326 /* Convert the vector to look just like the original PARALLEL, except
2327 with the computed values. */
2328 for (i = 0; i < XVECLEN (parallel, 0); i++)
2329 {
2330 rtx e = XVECEXP (parallel, 0, i);
2331 rtx d = XEXP (e, 0);
2332
2333 if (d)
2334 {
2335 d = force_reg (GET_MODE (d), RTVEC_ELT (vec, i));
2336 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), d, XEXP (e, 1));
2337 }
2338 RTVEC_ELT (vec, i) = e;
2339 }
2340
2341 return gen_rtx_PARALLEL (GET_MODE (parallel), vec);
2342 }
2343
2344 /* Emit code to move a block SRC to block DST, where SRC and DST are
2345 non-consecutive groups of registers, each represented by a PARALLEL. */
2346
2347 void
emit_group_move(rtx dst,rtx src)2348 emit_group_move (rtx dst, rtx src)
2349 {
2350 int i;
2351
2352 gcc_assert (GET_CODE (src) == PARALLEL
2353 && GET_CODE (dst) == PARALLEL
2354 && XVECLEN (src, 0) == XVECLEN (dst, 0));
2355
2356 /* Skip first entry if NULL. */
2357 for (i = XEXP (XVECEXP (src, 0, 0), 0) ? 0 : 1; i < XVECLEN (src, 0); i++)
2358 emit_move_insn (XEXP (XVECEXP (dst, 0, i), 0),
2359 XEXP (XVECEXP (src, 0, i), 0));
2360 }
2361
2362 /* Move a group of registers represented by a PARALLEL into pseudos. */
2363
2364 rtx
emit_group_move_into_temps(rtx src)2365 emit_group_move_into_temps (rtx src)
2366 {
2367 rtvec vec = rtvec_alloc (XVECLEN (src, 0));
2368 int i;
2369
2370 for (i = 0; i < XVECLEN (src, 0); i++)
2371 {
2372 rtx e = XVECEXP (src, 0, i);
2373 rtx d = XEXP (e, 0);
2374
2375 if (d)
2376 e = alloc_EXPR_LIST (REG_NOTE_KIND (e), copy_to_reg (d), XEXP (e, 1));
2377 RTVEC_ELT (vec, i) = e;
2378 }
2379
2380 return gen_rtx_PARALLEL (GET_MODE (src), vec);
2381 }
2382
2383 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2384 where SRC is non-consecutive registers represented by a PARALLEL.
2385 SSIZE represents the total size of block ORIG_DST, or -1 if not
2386 known. */
2387
2388 void
emit_group_store(rtx orig_dst,rtx src,tree type ATTRIBUTE_UNUSED,poly_int64 ssize)2389 emit_group_store (rtx orig_dst, rtx src, tree type ATTRIBUTE_UNUSED,
2390 poly_int64 ssize)
2391 {
2392 rtx *tmps, dst;
2393 int start, finish, i;
2394 machine_mode m = GET_MODE (orig_dst);
2395
2396 gcc_assert (GET_CODE (src) == PARALLEL);
2397
2398 if (!SCALAR_INT_MODE_P (m)
2399 && !MEM_P (orig_dst) && GET_CODE (orig_dst) != CONCAT)
2400 {
2401 scalar_int_mode imode;
2402 if (int_mode_for_mode (GET_MODE (orig_dst)).exists (&imode))
2403 {
2404 dst = gen_reg_rtx (imode);
2405 emit_group_store (dst, src, type, ssize);
2406 dst = gen_lowpart (GET_MODE (orig_dst), dst);
2407 }
2408 else
2409 {
2410 dst = assign_stack_temp (GET_MODE (orig_dst), ssize);
2411 emit_group_store (dst, src, type, ssize);
2412 }
2413 emit_move_insn (orig_dst, dst);
2414 return;
2415 }
2416
2417 /* Check for a NULL entry, used to indicate that the parameter goes
2418 both on the stack and in registers. */
2419 if (XEXP (XVECEXP (src, 0, 0), 0))
2420 start = 0;
2421 else
2422 start = 1;
2423 finish = XVECLEN (src, 0);
2424
2425 tmps = XALLOCAVEC (rtx, finish);
2426
2427 /* Copy the (probable) hard regs into pseudos. */
2428 for (i = start; i < finish; i++)
2429 {
2430 rtx reg = XEXP (XVECEXP (src, 0, i), 0);
2431 if (!REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER)
2432 {
2433 tmps[i] = gen_reg_rtx (GET_MODE (reg));
2434 emit_move_insn (tmps[i], reg);
2435 }
2436 else
2437 tmps[i] = reg;
2438 }
2439
2440 /* If we won't be storing directly into memory, protect the real destination
2441 from strange tricks we might play. */
2442 dst = orig_dst;
2443 if (GET_CODE (dst) == PARALLEL)
2444 {
2445 rtx temp;
2446
2447 /* We can get a PARALLEL dst if there is a conditional expression in
2448 a return statement. In that case, the dst and src are the same,
2449 so no action is necessary. */
2450 if (rtx_equal_p (dst, src))
2451 return;
2452
2453 /* It is unclear if we can ever reach here, but we may as well handle
2454 it. Allocate a temporary, and split this into a store/load to/from
2455 the temporary. */
2456 temp = assign_stack_temp (GET_MODE (dst), ssize);
2457 emit_group_store (temp, src, type, ssize);
2458 emit_group_load (dst, temp, type, ssize);
2459 return;
2460 }
2461 else if (!MEM_P (dst) && GET_CODE (dst) != CONCAT)
2462 {
2463 machine_mode outer = GET_MODE (dst);
2464 machine_mode inner;
2465 poly_int64 bytepos;
2466 bool done = false;
2467 rtx temp;
2468
2469 if (!REG_P (dst) || REGNO (dst) < FIRST_PSEUDO_REGISTER)
2470 dst = gen_reg_rtx (outer);
2471
2472 /* Make life a bit easier for combine. */
2473 /* If the first element of the vector is the low part
2474 of the destination mode, use a paradoxical subreg to
2475 initialize the destination. */
2476 if (start < finish)
2477 {
2478 inner = GET_MODE (tmps[start]);
2479 bytepos = subreg_lowpart_offset (inner, outer);
2480 if (known_eq (INTVAL (XEXP (XVECEXP (src, 0, start), 1)), bytepos))
2481 {
2482 temp = simplify_gen_subreg (outer, tmps[start],
2483 inner, 0);
2484 if (temp)
2485 {
2486 emit_move_insn (dst, temp);
2487 done = true;
2488 start++;
2489 }
2490 }
2491 }
2492
2493 /* If the first element wasn't the low part, try the last. */
2494 if (!done
2495 && start < finish - 1)
2496 {
2497 inner = GET_MODE (tmps[finish - 1]);
2498 bytepos = subreg_lowpart_offset (inner, outer);
2499 if (known_eq (INTVAL (XEXP (XVECEXP (src, 0, finish - 1), 1)),
2500 bytepos))
2501 {
2502 temp = simplify_gen_subreg (outer, tmps[finish - 1],
2503 inner, 0);
2504 if (temp)
2505 {
2506 emit_move_insn (dst, temp);
2507 done = true;
2508 finish--;
2509 }
2510 }
2511 }
2512
2513 /* Otherwise, simply initialize the result to zero. */
2514 if (!done)
2515 emit_move_insn (dst, CONST0_RTX (outer));
2516 }
2517
2518 /* Process the pieces. */
2519 for (i = start; i < finish; i++)
2520 {
2521 poly_int64 bytepos = INTVAL (XEXP (XVECEXP (src, 0, i), 1));
2522 machine_mode mode = GET_MODE (tmps[i]);
2523 poly_int64 bytelen = GET_MODE_SIZE (mode);
2524 poly_uint64 adj_bytelen;
2525 rtx dest = dst;
2526
2527 /* Handle trailing fragments that run over the size of the struct.
2528 It's the target's responsibility to make sure that the fragment
2529 cannot be strictly smaller in some cases and strictly larger
2530 in others. */
2531 gcc_checking_assert (ordered_p (bytepos + bytelen, ssize));
2532 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2533 adj_bytelen = ssize - bytepos;
2534 else
2535 adj_bytelen = bytelen;
2536
2537 if (GET_CODE (dst) == CONCAT)
2538 {
2539 if (known_le (bytepos + adj_bytelen,
2540 GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2541 dest = XEXP (dst, 0);
2542 else if (known_ge (bytepos, GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)))))
2543 {
2544 bytepos -= GET_MODE_SIZE (GET_MODE (XEXP (dst, 0)));
2545 dest = XEXP (dst, 1);
2546 }
2547 else
2548 {
2549 machine_mode dest_mode = GET_MODE (dest);
2550 machine_mode tmp_mode = GET_MODE (tmps[i]);
2551
2552 gcc_assert (known_eq (bytepos, 0) && XVECLEN (src, 0));
2553
2554 if (GET_MODE_ALIGNMENT (dest_mode)
2555 >= GET_MODE_ALIGNMENT (tmp_mode))
2556 {
2557 dest = assign_stack_temp (dest_mode,
2558 GET_MODE_SIZE (dest_mode));
2559 emit_move_insn (adjust_address (dest,
2560 tmp_mode,
2561 bytepos),
2562 tmps[i]);
2563 dst = dest;
2564 }
2565 else
2566 {
2567 dest = assign_stack_temp (tmp_mode,
2568 GET_MODE_SIZE (tmp_mode));
2569 emit_move_insn (dest, tmps[i]);
2570 dst = adjust_address (dest, dest_mode, bytepos);
2571 }
2572 break;
2573 }
2574 }
2575
2576 /* Handle trailing fragments that run over the size of the struct. */
2577 if (known_size_p (ssize) && maybe_gt (bytepos + bytelen, ssize))
2578 {
2579 /* store_bit_field always takes its value from the lsb.
2580 Move the fragment to the lsb if it's not already there. */
2581 if (
2582 #ifdef BLOCK_REG_PADDING
2583 BLOCK_REG_PADDING (GET_MODE (orig_dst), type, i == start)
2584 == (BYTES_BIG_ENDIAN ? PAD_UPWARD : PAD_DOWNWARD)
2585 #else
2586 BYTES_BIG_ENDIAN
2587 #endif
2588 )
2589 {
2590 poly_int64 shift = (bytelen - (ssize - bytepos)) * BITS_PER_UNIT;
2591 tmps[i] = expand_shift (RSHIFT_EXPR, mode, tmps[i],
2592 shift, tmps[i], 0);
2593 }
2594
2595 /* Make sure not to write past the end of the struct. */
2596 store_bit_field (dest,
2597 adj_bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2598 bytepos * BITS_PER_UNIT, ssize * BITS_PER_UNIT - 1,
2599 VOIDmode, tmps[i], false);
2600 }
2601
2602 /* Optimize the access just a bit. */
2603 else if (MEM_P (dest)
2604 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (dest))
2605 || MEM_ALIGN (dest) >= GET_MODE_ALIGNMENT (mode))
2606 && multiple_p (bytepos * BITS_PER_UNIT,
2607 GET_MODE_ALIGNMENT (mode))
2608 && known_eq (bytelen, GET_MODE_SIZE (mode)))
2609 emit_move_insn (adjust_address (dest, mode, bytepos), tmps[i]);
2610
2611 else
2612 store_bit_field (dest, bytelen * BITS_PER_UNIT, bytepos * BITS_PER_UNIT,
2613 0, 0, mode, tmps[i], false);
2614 }
2615
2616 /* Copy from the pseudo into the (probable) hard reg. */
2617 if (orig_dst != dst)
2618 emit_move_insn (orig_dst, dst);
2619 }
2620
2621 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2622 of the value stored in X. */
2623
2624 rtx
maybe_emit_group_store(rtx x,tree type)2625 maybe_emit_group_store (rtx x, tree type)
2626 {
2627 machine_mode mode = TYPE_MODE (type);
2628 gcc_checking_assert (GET_MODE (x) == VOIDmode || GET_MODE (x) == mode);
2629 if (GET_CODE (x) == PARALLEL)
2630 {
2631 rtx result = gen_reg_rtx (mode);
2632 emit_group_store (result, x, type, int_size_in_bytes (type));
2633 return result;
2634 }
2635 return x;
2636 }
2637
2638 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2639
2640 This is used on targets that return BLKmode values in registers. */
2641
2642 static void
copy_blkmode_from_reg(rtx target,rtx srcreg,tree type)2643 copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
2644 {
2645 unsigned HOST_WIDE_INT bytes = int_size_in_bytes (type);
2646 rtx src = NULL, dst = NULL;
2647 unsigned HOST_WIDE_INT bitsize = MIN (TYPE_ALIGN (type), BITS_PER_WORD);
2648 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0;
2649 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2650 fixed_size_mode mode = as_a <fixed_size_mode> (GET_MODE (srcreg));
2651 fixed_size_mode tmode = as_a <fixed_size_mode> (GET_MODE (target));
2652 fixed_size_mode copy_mode;
2653
2654 /* BLKmode registers created in the back-end shouldn't have survived. */
2655 gcc_assert (mode != BLKmode);
2656
2657 /* If the structure doesn't take up a whole number of words, see whether
2658 SRCREG is padded on the left or on the right. If it's on the left,
2659 set PADDING_CORRECTION to the number of bits to skip.
2660
2661 In most ABIs, the structure will be returned at the least end of
2662 the register, which translates to right padding on little-endian
2663 targets and left padding on big-endian targets. The opposite
2664 holds if the structure is returned at the most significant
2665 end of the register. */
2666 if (bytes % UNITS_PER_WORD != 0
2667 && (targetm.calls.return_in_msb (type)
2668 ? !BYTES_BIG_ENDIAN
2669 : BYTES_BIG_ENDIAN))
2670 padding_correction
2671 = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD) * BITS_PER_UNIT));
2672
2673 /* We can use a single move if we have an exact mode for the size. */
2674 else if (MEM_P (target)
2675 && (!targetm.slow_unaligned_access (mode, MEM_ALIGN (target))
2676 || MEM_ALIGN (target) >= GET_MODE_ALIGNMENT (mode))
2677 && bytes == GET_MODE_SIZE (mode))
2678 {
2679 emit_move_insn (adjust_address (target, mode, 0), srcreg);
2680 return;
2681 }
2682
2683 /* And if we additionally have the same mode for a register. */
2684 else if (REG_P (target)
2685 && GET_MODE (target) == mode
2686 && bytes == GET_MODE_SIZE (mode))
2687 {
2688 emit_move_insn (target, srcreg);
2689 return;
2690 }
2691
2692 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2693 into a new pseudo which is a full word. */
2694 if (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
2695 {
2696 srcreg = convert_to_mode (word_mode, srcreg, TYPE_UNSIGNED (type));
2697 mode = word_mode;
2698 }
2699
2700 /* Copy the structure BITSIZE bits at a time. If the target lives in
2701 memory, take care of not reading/writing past its end by selecting
2702 a copy mode suited to BITSIZE. This should always be possible given
2703 how it is computed.
2704
2705 If the target lives in register, make sure not to select a copy mode
2706 larger than the mode of the register.
2707
2708 We could probably emit more efficient code for machines which do not use
2709 strict alignment, but it doesn't seem worth the effort at the current
2710 time. */
2711
2712 copy_mode = word_mode;
2713 if (MEM_P (target))
2714 {
2715 opt_scalar_int_mode mem_mode = int_mode_for_size (bitsize, 1);
2716 if (mem_mode.exists ())
2717 copy_mode = mem_mode.require ();
2718 }
2719 else if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2720 copy_mode = tmode;
2721
2722 for (bitpos = 0, xbitpos = padding_correction;
2723 bitpos < bytes * BITS_PER_UNIT;
2724 bitpos += bitsize, xbitpos += bitsize)
2725 {
2726 /* We need a new source operand each time xbitpos is on a
2727 word boundary and when xbitpos == padding_correction
2728 (the first time through). */
2729 if (xbitpos % BITS_PER_WORD == 0 || xbitpos == padding_correction)
2730 src = operand_subword_force (srcreg, xbitpos / BITS_PER_WORD, mode);
2731
2732 /* We need a new destination operand each time bitpos is on
2733 a word boundary. */
2734 if (REG_P (target) && GET_MODE_BITSIZE (tmode) < BITS_PER_WORD)
2735 dst = target;
2736 else if (bitpos % BITS_PER_WORD == 0)
2737 dst = operand_subword (target, bitpos / BITS_PER_WORD, 1, tmode);
2738
2739 /* Use xbitpos for the source extraction (right justified) and
2740 bitpos for the destination store (left justified). */
2741 store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
2742 extract_bit_field (src, bitsize,
2743 xbitpos % BITS_PER_WORD, 1,
2744 NULL_RTX, copy_mode, copy_mode,
2745 false, NULL),
2746 false);
2747 }
2748 }
2749
2750 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2751 register if it contains any data, otherwise return null.
2752
2753 This is used on targets that return BLKmode values in registers. */
2754
2755 rtx
copy_blkmode_to_reg(machine_mode mode_in,tree src)2756 copy_blkmode_to_reg (machine_mode mode_in, tree src)
2757 {
2758 int i, n_regs;
2759 unsigned HOST_WIDE_INT bitpos, xbitpos, padding_correction = 0, bytes;
2760 unsigned int bitsize;
2761 rtx *dst_words, dst, x, src_word = NULL_RTX, dst_word = NULL_RTX;
2762 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2763 fixed_size_mode mode = as_a <fixed_size_mode> (mode_in);
2764 fixed_size_mode dst_mode;
2765
2766 gcc_assert (TYPE_MODE (TREE_TYPE (src)) == BLKmode);
2767
2768 x = expand_normal (src);
2769
2770 bytes = arg_int_size_in_bytes (TREE_TYPE (src));
2771 if (bytes == 0)
2772 return NULL_RTX;
2773
2774 /* If the structure doesn't take up a whole number of words, see
2775 whether the register value should be padded on the left or on
2776 the right. Set PADDING_CORRECTION to the number of padding
2777 bits needed on the left side.
2778
2779 In most ABIs, the structure will be returned at the least end of
2780 the register, which translates to right padding on little-endian
2781 targets and left padding on big-endian targets. The opposite
2782 holds if the structure is returned at the most significant
2783 end of the register. */
2784 if (bytes % UNITS_PER_WORD != 0
2785 && (targetm.calls.return_in_msb (TREE_TYPE (src))
2786 ? !BYTES_BIG_ENDIAN
2787 : BYTES_BIG_ENDIAN))
2788 padding_correction = (BITS_PER_WORD - ((bytes % UNITS_PER_WORD)
2789 * BITS_PER_UNIT));
2790
2791 n_regs = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
2792 dst_words = XALLOCAVEC (rtx, n_regs);
2793 bitsize = MIN (TYPE_ALIGN (TREE_TYPE (src)), BITS_PER_WORD);
2794
2795 /* Copy the structure BITSIZE bits at a time. */
2796 for (bitpos = 0, xbitpos = padding_correction;
2797 bitpos < bytes * BITS_PER_UNIT;
2798 bitpos += bitsize, xbitpos += bitsize)
2799 {
2800 /* We need a new destination pseudo each time xbitpos is
2801 on a word boundary and when xbitpos == padding_correction
2802 (the first time through). */
2803 if (xbitpos % BITS_PER_WORD == 0
2804 || xbitpos == padding_correction)
2805 {
2806 /* Generate an appropriate register. */
2807 dst_word = gen_reg_rtx (word_mode);
2808 dst_words[xbitpos / BITS_PER_WORD] = dst_word;
2809
2810 /* Clear the destination before we move anything into it. */
2811 emit_move_insn (dst_word, CONST0_RTX (word_mode));
2812 }
2813
2814 /* We need a new source operand each time bitpos is on a word
2815 boundary. */
2816 if (bitpos % BITS_PER_WORD == 0)
2817 src_word = operand_subword_force (x, bitpos / BITS_PER_WORD, BLKmode);
2818
2819 /* Use bitpos for the source extraction (left justified) and
2820 xbitpos for the destination store (right justified). */
2821 store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
2822 0, 0, word_mode,
2823 extract_bit_field (src_word, bitsize,
2824 bitpos % BITS_PER_WORD, 1,
2825 NULL_RTX, word_mode, word_mode,
2826 false, NULL),
2827 false);
2828 }
2829
2830 if (mode == BLKmode)
2831 {
2832 /* Find the smallest integer mode large enough to hold the
2833 entire structure. */
2834 opt_scalar_int_mode mode_iter;
2835 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
2836 if (GET_MODE_SIZE (mode_iter.require ()) >= bytes)
2837 break;
2838
2839 /* A suitable mode should have been found. */
2840 mode = mode_iter.require ();
2841 }
2842
2843 if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (word_mode))
2844 dst_mode = word_mode;
2845 else
2846 dst_mode = mode;
2847 dst = gen_reg_rtx (dst_mode);
2848
2849 for (i = 0; i < n_regs; i++)
2850 emit_move_insn (operand_subword (dst, i, 0, dst_mode), dst_words[i]);
2851
2852 if (mode != dst_mode)
2853 dst = gen_lowpart (mode, dst);
2854
2855 return dst;
2856 }
2857
2858 /* Add a USE expression for REG to the (possibly empty) list pointed
2859 to by CALL_FUSAGE. REG must denote a hard register. */
2860
2861 void
use_reg_mode(rtx * call_fusage,rtx reg,machine_mode mode)2862 use_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2863 {
2864 gcc_assert (REG_P (reg));
2865
2866 if (!HARD_REGISTER_P (reg))
2867 return;
2868
2869 *call_fusage
2870 = gen_rtx_EXPR_LIST (mode, gen_rtx_USE (VOIDmode, reg), *call_fusage);
2871 }
2872
2873 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2874 to by CALL_FUSAGE. REG must denote a hard register. */
2875
2876 void
clobber_reg_mode(rtx * call_fusage,rtx reg,machine_mode mode)2877 clobber_reg_mode (rtx *call_fusage, rtx reg, machine_mode mode)
2878 {
2879 gcc_assert (REG_P (reg) && REGNO (reg) < FIRST_PSEUDO_REGISTER);
2880
2881 *call_fusage
2882 = gen_rtx_EXPR_LIST (mode, gen_rtx_CLOBBER (VOIDmode, reg), *call_fusage);
2883 }
2884
2885 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2886 starting at REGNO. All of these registers must be hard registers. */
2887
2888 void
use_regs(rtx * call_fusage,int regno,int nregs)2889 use_regs (rtx *call_fusage, int regno, int nregs)
2890 {
2891 int i;
2892
2893 gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER);
2894
2895 for (i = 0; i < nregs; i++)
2896 use_reg (call_fusage, regno_reg_rtx[regno + i]);
2897 }
2898
2899 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2900 PARALLEL REGS. This is for calls that pass values in multiple
2901 non-contiguous locations. The Irix 6 ABI has examples of this. */
2902
2903 void
use_group_regs(rtx * call_fusage,rtx regs)2904 use_group_regs (rtx *call_fusage, rtx regs)
2905 {
2906 int i;
2907
2908 for (i = 0; i < XVECLEN (regs, 0); i++)
2909 {
2910 rtx reg = XEXP (XVECEXP (regs, 0, i), 0);
2911
2912 /* A NULL entry means the parameter goes both on the stack and in
2913 registers. This can also be a MEM for targets that pass values
2914 partially on the stack and partially in registers. */
2915 if (reg != 0 && REG_P (reg))
2916 use_reg (call_fusage, reg);
2917 }
2918 }
2919
2920 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2921 assigment and the code of the expresion on the RHS is CODE. Return
2922 NULL otherwise. */
2923
2924 static gimple *
get_def_for_expr(tree name,enum tree_code code)2925 get_def_for_expr (tree name, enum tree_code code)
2926 {
2927 gimple *def_stmt;
2928
2929 if (TREE_CODE (name) != SSA_NAME)
2930 return NULL;
2931
2932 def_stmt = get_gimple_for_ssa_name (name);
2933 if (!def_stmt
2934 || gimple_assign_rhs_code (def_stmt) != code)
2935 return NULL;
2936
2937 return def_stmt;
2938 }
2939
2940 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2941 assigment and the class of the expresion on the RHS is CLASS. Return
2942 NULL otherwise. */
2943
2944 static gimple *
get_def_for_expr_class(tree name,enum tree_code_class tclass)2945 get_def_for_expr_class (tree name, enum tree_code_class tclass)
2946 {
2947 gimple *def_stmt;
2948
2949 if (TREE_CODE (name) != SSA_NAME)
2950 return NULL;
2951
2952 def_stmt = get_gimple_for_ssa_name (name);
2953 if (!def_stmt
2954 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt)) != tclass)
2955 return NULL;
2956
2957 return def_stmt;
2958 }
2959
2960 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2961 its length in bytes. */
2962
2963 rtx
clear_storage_hints(rtx object,rtx size,enum block_op_methods method,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size)2964 clear_storage_hints (rtx object, rtx size, enum block_op_methods method,
2965 unsigned int expected_align, HOST_WIDE_INT expected_size,
2966 unsigned HOST_WIDE_INT min_size,
2967 unsigned HOST_WIDE_INT max_size,
2968 unsigned HOST_WIDE_INT probable_max_size)
2969 {
2970 machine_mode mode = GET_MODE (object);
2971 unsigned int align;
2972
2973 gcc_assert (method == BLOCK_OP_NORMAL || method == BLOCK_OP_TAILCALL);
2974
2975 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
2976 just move a zero. Otherwise, do this a piece at a time. */
2977 if (mode != BLKmode
2978 && CONST_INT_P (size)
2979 && known_eq (INTVAL (size), GET_MODE_SIZE (mode)))
2980 {
2981 rtx zero = CONST0_RTX (mode);
2982 if (zero != NULL)
2983 {
2984 emit_move_insn (object, zero);
2985 return NULL;
2986 }
2987
2988 if (COMPLEX_MODE_P (mode))
2989 {
2990 zero = CONST0_RTX (GET_MODE_INNER (mode));
2991 if (zero != NULL)
2992 {
2993 write_complex_part (object, zero, 0);
2994 write_complex_part (object, zero, 1);
2995 return NULL;
2996 }
2997 }
2998 }
2999
3000 if (size == const0_rtx)
3001 return NULL;
3002
3003 align = MEM_ALIGN (object);
3004
3005 if (CONST_INT_P (size)
3006 && targetm.use_by_pieces_infrastructure_p (INTVAL (size), align,
3007 CLEAR_BY_PIECES,
3008 optimize_insn_for_speed_p ()))
3009 clear_by_pieces (object, INTVAL (size), align);
3010 else if (set_storage_via_setmem (object, size, const0_rtx, align,
3011 expected_align, expected_size,
3012 min_size, max_size, probable_max_size))
3013 ;
3014 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object)))
3015 return set_storage_via_libcall (object, size, const0_rtx,
3016 method == BLOCK_OP_TAILCALL);
3017 else
3018 gcc_unreachable ();
3019
3020 return NULL;
3021 }
3022
3023 rtx
clear_storage(rtx object,rtx size,enum block_op_methods method)3024 clear_storage (rtx object, rtx size, enum block_op_methods method)
3025 {
3026 unsigned HOST_WIDE_INT max, min = 0;
3027 if (GET_CODE (size) == CONST_INT)
3028 min = max = UINTVAL (size);
3029 else
3030 max = GET_MODE_MASK (GET_MODE (size));
3031 return clear_storage_hints (object, size, method, 0, -1, min, max, max);
3032 }
3033
3034
3035 /* A subroutine of clear_storage. Expand a call to memset.
3036 Return the return value of memset, 0 otherwise. */
3037
3038 rtx
set_storage_via_libcall(rtx object,rtx size,rtx val,bool tailcall)3039 set_storage_via_libcall (rtx object, rtx size, rtx val, bool tailcall)
3040 {
3041 tree call_expr, fn, object_tree, size_tree, val_tree;
3042 machine_mode size_mode;
3043
3044 object = copy_addr_to_reg (XEXP (object, 0));
3045 object_tree = make_tree (ptr_type_node, object);
3046
3047 if (!CONST_INT_P (val))
3048 val = convert_to_mode (TYPE_MODE (integer_type_node), val, 1);
3049 val_tree = make_tree (integer_type_node, val);
3050
3051 size_mode = TYPE_MODE (sizetype);
3052 size = convert_to_mode (size_mode, size, 1);
3053 size = copy_to_mode_reg (size_mode, size);
3054 size_tree = make_tree (sizetype, size);
3055
3056 /* It is incorrect to use the libcall calling conventions for calls to
3057 memset because it can be provided by the user. */
3058 fn = builtin_decl_implicit (BUILT_IN_MEMSET);
3059 call_expr = build_call_expr (fn, 3, object_tree, val_tree, size_tree);
3060 CALL_EXPR_TAILCALL (call_expr) = tailcall;
3061
3062 return expand_call (call_expr, NULL_RTX, false);
3063 }
3064
3065 /* Expand a setmem pattern; return true if successful. */
3066
3067 bool
set_storage_via_setmem(rtx object,rtx size,rtx val,unsigned int align,unsigned int expected_align,HOST_WIDE_INT expected_size,unsigned HOST_WIDE_INT min_size,unsigned HOST_WIDE_INT max_size,unsigned HOST_WIDE_INT probable_max_size)3068 set_storage_via_setmem (rtx object, rtx size, rtx val, unsigned int align,
3069 unsigned int expected_align, HOST_WIDE_INT expected_size,
3070 unsigned HOST_WIDE_INT min_size,
3071 unsigned HOST_WIDE_INT max_size,
3072 unsigned HOST_WIDE_INT probable_max_size)
3073 {
3074 /* Try the most limited insn first, because there's no point
3075 including more than one in the machine description unless
3076 the more limited one has some advantage. */
3077
3078 if (expected_align < align)
3079 expected_align = align;
3080 if (expected_size != -1)
3081 {
3082 if ((unsigned HOST_WIDE_INT)expected_size > max_size)
3083 expected_size = max_size;
3084 if ((unsigned HOST_WIDE_INT)expected_size < min_size)
3085 expected_size = min_size;
3086 }
3087
3088 opt_scalar_int_mode mode_iter;
3089 FOR_EACH_MODE_IN_CLASS (mode_iter, MODE_INT)
3090 {
3091 scalar_int_mode mode = mode_iter.require ();
3092 enum insn_code code = direct_optab_handler (setmem_optab, mode);
3093
3094 if (code != CODE_FOR_nothing
3095 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3096 here because if SIZE is less than the mode mask, as it is
3097 returned by the macro, it will definitely be less than the
3098 actual mode mask. Since SIZE is within the Pmode address
3099 space, we limit MODE to Pmode. */
3100 && ((CONST_INT_P (size)
3101 && ((unsigned HOST_WIDE_INT) INTVAL (size)
3102 <= (GET_MODE_MASK (mode) >> 1)))
3103 || max_size <= (GET_MODE_MASK (mode) >> 1)
3104 || GET_MODE_BITSIZE (mode) >= GET_MODE_BITSIZE (Pmode)))
3105 {
3106 struct expand_operand ops[9];
3107 unsigned int nops;
3108
3109 nops = insn_data[(int) code].n_generator_args;
3110 gcc_assert (nops == 4 || nops == 6 || nops == 8 || nops == 9);
3111
3112 create_fixed_operand (&ops[0], object);
3113 /* The check above guarantees that this size conversion is valid. */
3114 create_convert_operand_to (&ops[1], size, mode, true);
3115 create_convert_operand_from (&ops[2], val, byte_mode, true);
3116 create_integer_operand (&ops[3], align / BITS_PER_UNIT);
3117 if (nops >= 6)
3118 {
3119 create_integer_operand (&ops[4], expected_align / BITS_PER_UNIT);
3120 create_integer_operand (&ops[5], expected_size);
3121 }
3122 if (nops >= 8)
3123 {
3124 create_integer_operand (&ops[6], min_size);
3125 /* If we can not represent the maximal size,
3126 make parameter NULL. */
3127 if ((HOST_WIDE_INT) max_size != -1)
3128 create_integer_operand (&ops[7], max_size);
3129 else
3130 create_fixed_operand (&ops[7], NULL);
3131 }
3132 if (nops == 9)
3133 {
3134 /* If we can not represent the maximal size,
3135 make parameter NULL. */
3136 if ((HOST_WIDE_INT) probable_max_size != -1)
3137 create_integer_operand (&ops[8], probable_max_size);
3138 else
3139 create_fixed_operand (&ops[8], NULL);
3140 }
3141 if (maybe_expand_insn (code, nops, ops))
3142 return true;
3143 }
3144 }
3145
3146 return false;
3147 }
3148
3149
3150 /* Write to one of the components of the complex value CPLX. Write VAL to
3151 the real part if IMAG_P is false, and the imaginary part if its true. */
3152
3153 void
write_complex_part(rtx cplx,rtx val,bool imag_p)3154 write_complex_part (rtx cplx, rtx val, bool imag_p)
3155 {
3156 machine_mode cmode;
3157 scalar_mode imode;
3158 unsigned ibitsize;
3159
3160 if (GET_CODE (cplx) == CONCAT)
3161 {
3162 emit_move_insn (XEXP (cplx, imag_p), val);
3163 return;
3164 }
3165
3166 cmode = GET_MODE (cplx);
3167 imode = GET_MODE_INNER (cmode);
3168 ibitsize = GET_MODE_BITSIZE (imode);
3169
3170 /* For MEMs simplify_gen_subreg may generate an invalid new address
3171 because, e.g., the original address is considered mode-dependent
3172 by the target, which restricts simplify_subreg from invoking
3173 adjust_address_nv. Instead of preparing fallback support for an
3174 invalid address, we call adjust_address_nv directly. */
3175 if (MEM_P (cplx))
3176 {
3177 emit_move_insn (adjust_address_nv (cplx, imode,
3178 imag_p ? GET_MODE_SIZE (imode) : 0),
3179 val);
3180 return;
3181 }
3182
3183 /* If the sub-object is at least word sized, then we know that subregging
3184 will work. This special case is important, since store_bit_field
3185 wants to operate on integer modes, and there's rarely an OImode to
3186 correspond to TCmode. */
3187 if (ibitsize >= BITS_PER_WORD
3188 /* For hard regs we have exact predicates. Assume we can split
3189 the original object if it spans an even number of hard regs.
3190 This special case is important for SCmode on 64-bit platforms
3191 where the natural size of floating-point regs is 32-bit. */
3192 || (REG_P (cplx)
3193 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3194 && REG_NREGS (cplx) % 2 == 0))
3195 {
3196 rtx part = simplify_gen_subreg (imode, cplx, cmode,
3197 imag_p ? GET_MODE_SIZE (imode) : 0);
3198 if (part)
3199 {
3200 emit_move_insn (part, val);
3201 return;
3202 }
3203 else
3204 /* simplify_gen_subreg may fail for sub-word MEMs. */
3205 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3206 }
3207
3208 store_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0, 0, 0, imode, val,
3209 false);
3210 }
3211
3212 /* Extract one of the components of the complex value CPLX. Extract the
3213 real part if IMAG_P is false, and the imaginary part if it's true. */
3214
3215 rtx
read_complex_part(rtx cplx,bool imag_p)3216 read_complex_part (rtx cplx, bool imag_p)
3217 {
3218 machine_mode cmode;
3219 scalar_mode imode;
3220 unsigned ibitsize;
3221
3222 if (GET_CODE (cplx) == CONCAT)
3223 return XEXP (cplx, imag_p);
3224
3225 cmode = GET_MODE (cplx);
3226 imode = GET_MODE_INNER (cmode);
3227 ibitsize = GET_MODE_BITSIZE (imode);
3228
3229 /* Special case reads from complex constants that got spilled to memory. */
3230 if (MEM_P (cplx) && GET_CODE (XEXP (cplx, 0)) == SYMBOL_REF)
3231 {
3232 tree decl = SYMBOL_REF_DECL (XEXP (cplx, 0));
3233 if (decl && TREE_CODE (decl) == COMPLEX_CST)
3234 {
3235 tree part = imag_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
3236 if (CONSTANT_CLASS_P (part))
3237 return expand_expr (part, NULL_RTX, imode, EXPAND_NORMAL);
3238 }
3239 }
3240
3241 /* For MEMs simplify_gen_subreg may generate an invalid new address
3242 because, e.g., the original address is considered mode-dependent
3243 by the target, which restricts simplify_subreg from invoking
3244 adjust_address_nv. Instead of preparing fallback support for an
3245 invalid address, we call adjust_address_nv directly. */
3246 if (MEM_P (cplx))
3247 return adjust_address_nv (cplx, imode,
3248 imag_p ? GET_MODE_SIZE (imode) : 0);
3249
3250 /* If the sub-object is at least word sized, then we know that subregging
3251 will work. This special case is important, since extract_bit_field
3252 wants to operate on integer modes, and there's rarely an OImode to
3253 correspond to TCmode. */
3254 if (ibitsize >= BITS_PER_WORD
3255 /* For hard regs we have exact predicates. Assume we can split
3256 the original object if it spans an even number of hard regs.
3257 This special case is important for SCmode on 64-bit platforms
3258 where the natural size of floating-point regs is 32-bit. */
3259 || (REG_P (cplx)
3260 && REGNO (cplx) < FIRST_PSEUDO_REGISTER
3261 && REG_NREGS (cplx) % 2 == 0))
3262 {
3263 rtx ret = simplify_gen_subreg (imode, cplx, cmode,
3264 imag_p ? GET_MODE_SIZE (imode) : 0);
3265 if (ret)
3266 return ret;
3267 else
3268 /* simplify_gen_subreg may fail for sub-word MEMs. */
3269 gcc_assert (MEM_P (cplx) && ibitsize < BITS_PER_WORD);
3270 }
3271
3272 return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
3273 true, NULL_RTX, imode, imode, false, NULL);
3274 }
3275
3276 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3277 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3278 represented in NEW_MODE. If FORCE is true, this will never happen, as
3279 we'll force-create a SUBREG if needed. */
3280
3281 static rtx
emit_move_change_mode(machine_mode new_mode,machine_mode old_mode,rtx x,bool force)3282 emit_move_change_mode (machine_mode new_mode,
3283 machine_mode old_mode, rtx x, bool force)
3284 {
3285 rtx ret;
3286
3287 if (push_operand (x, GET_MODE (x)))
3288 {
3289 ret = gen_rtx_MEM (new_mode, XEXP (x, 0));
3290 MEM_COPY_ATTRIBUTES (ret, x);
3291 }
3292 else if (MEM_P (x))
3293 {
3294 /* We don't have to worry about changing the address since the
3295 size in bytes is supposed to be the same. */
3296 if (reload_in_progress)
3297 {
3298 /* Copy the MEM to change the mode and move any
3299 substitutions from the old MEM to the new one. */
3300 ret = adjust_address_nv (x, new_mode, 0);
3301 copy_replacements (x, ret);
3302 }
3303 else
3304 ret = adjust_address (x, new_mode, 0);
3305 }
3306 else
3307 {
3308 /* Note that we do want simplify_subreg's behavior of validating
3309 that the new mode is ok for a hard register. If we were to use
3310 simplify_gen_subreg, we would create the subreg, but would
3311 probably run into the target not being able to implement it. */
3312 /* Except, of course, when FORCE is true, when this is exactly what
3313 we want. Which is needed for CCmodes on some targets. */
3314 if (force)
3315 ret = simplify_gen_subreg (new_mode, x, old_mode, 0);
3316 else
3317 ret = simplify_subreg (new_mode, x, old_mode, 0);
3318 }
3319
3320 return ret;
3321 }
3322
3323 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3324 an integer mode of the same size as MODE. Returns the instruction
3325 emitted, or NULL if such a move could not be generated. */
3326
3327 static rtx_insn *
emit_move_via_integer(machine_mode mode,rtx x,rtx y,bool force)3328 emit_move_via_integer (machine_mode mode, rtx x, rtx y, bool force)
3329 {
3330 scalar_int_mode imode;
3331 enum insn_code code;
3332
3333 /* There must exist a mode of the exact size we require. */
3334 if (!int_mode_for_mode (mode).exists (&imode))
3335 return NULL;
3336
3337 /* The target must support moves in this mode. */
3338 code = optab_handler (mov_optab, imode);
3339 if (code == CODE_FOR_nothing)
3340 return NULL;
3341
3342 x = emit_move_change_mode (imode, mode, x, force);
3343 if (x == NULL_RTX)
3344 return NULL;
3345 y = emit_move_change_mode (imode, mode, y, force);
3346 if (y == NULL_RTX)
3347 return NULL;
3348 return emit_insn (GEN_FCN (code) (x, y));
3349 }
3350
3351 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3352 Return an equivalent MEM that does not use an auto-increment. */
3353
3354 rtx
emit_move_resolve_push(machine_mode mode,rtx x)3355 emit_move_resolve_push (machine_mode mode, rtx x)
3356 {
3357 enum rtx_code code = GET_CODE (XEXP (x, 0));
3358 rtx temp;
3359
3360 poly_int64 adjust = GET_MODE_SIZE (mode);
3361 #ifdef PUSH_ROUNDING
3362 adjust = PUSH_ROUNDING (adjust);
3363 #endif
3364 if (code == PRE_DEC || code == POST_DEC)
3365 adjust = -adjust;
3366 else if (code == PRE_MODIFY || code == POST_MODIFY)
3367 {
3368 rtx expr = XEXP (XEXP (x, 0), 1);
3369
3370 gcc_assert (GET_CODE (expr) == PLUS || GET_CODE (expr) == MINUS);
3371 poly_int64 val = rtx_to_poly_int64 (XEXP (expr, 1));
3372 if (GET_CODE (expr) == MINUS)
3373 val = -val;
3374 gcc_assert (known_eq (adjust, val) || known_eq (adjust, -val));
3375 adjust = val;
3376 }
3377
3378 /* Do not use anti_adjust_stack, since we don't want to update
3379 stack_pointer_delta. */
3380 temp = expand_simple_binop (Pmode, PLUS, stack_pointer_rtx,
3381 gen_int_mode (adjust, Pmode), stack_pointer_rtx,
3382 0, OPTAB_LIB_WIDEN);
3383 if (temp != stack_pointer_rtx)
3384 emit_move_insn (stack_pointer_rtx, temp);
3385
3386 switch (code)
3387 {
3388 case PRE_INC:
3389 case PRE_DEC:
3390 case PRE_MODIFY:
3391 temp = stack_pointer_rtx;
3392 break;
3393 case POST_INC:
3394 case POST_DEC:
3395 case POST_MODIFY:
3396 temp = plus_constant (Pmode, stack_pointer_rtx, -adjust);
3397 break;
3398 default:
3399 gcc_unreachable ();
3400 }
3401
3402 return replace_equiv_address (x, temp);
3403 }
3404
3405 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3406 X is known to satisfy push_operand, and MODE is known to be complex.
3407 Returns the last instruction emitted. */
3408
3409 rtx_insn *
emit_move_complex_push(machine_mode mode,rtx x,rtx y)3410 emit_move_complex_push (machine_mode mode, rtx x, rtx y)
3411 {
3412 scalar_mode submode = GET_MODE_INNER (mode);
3413 bool imag_first;
3414
3415 #ifdef PUSH_ROUNDING
3416 poly_int64 submodesize = GET_MODE_SIZE (submode);
3417
3418 /* In case we output to the stack, but the size is smaller than the
3419 machine can push exactly, we need to use move instructions. */
3420 if (maybe_ne (PUSH_ROUNDING (submodesize), submodesize))
3421 {
3422 x = emit_move_resolve_push (mode, x);
3423 return emit_move_insn (x, y);
3424 }
3425 #endif
3426
3427 /* Note that the real part always precedes the imag part in memory
3428 regardless of machine's endianness. */
3429 switch (GET_CODE (XEXP (x, 0)))
3430 {
3431 case PRE_DEC:
3432 case POST_DEC:
3433 imag_first = true;
3434 break;
3435 case PRE_INC:
3436 case POST_INC:
3437 imag_first = false;
3438 break;
3439 default:
3440 gcc_unreachable ();
3441 }
3442
3443 emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3444 read_complex_part (y, imag_first));
3445 return emit_move_insn (gen_rtx_MEM (submode, XEXP (x, 0)),
3446 read_complex_part (y, !imag_first));
3447 }
3448
3449 /* A subroutine of emit_move_complex. Perform the move from Y to X
3450 via two moves of the parts. Returns the last instruction emitted. */
3451
3452 rtx_insn *
emit_move_complex_parts(rtx x,rtx y)3453 emit_move_complex_parts (rtx x, rtx y)
3454 {
3455 /* Show the output dies here. This is necessary for SUBREGs
3456 of pseudos since we cannot track their lifetimes correctly;
3457 hard regs shouldn't appear here except as return values. */
3458 if (!reload_completed && !reload_in_progress
3459 && REG_P (x) && !reg_overlap_mentioned_p (x, y))
3460 emit_clobber (x);
3461
3462 write_complex_part (x, read_complex_part (y, false), false);
3463 write_complex_part (x, read_complex_part (y, true), true);
3464
3465 return get_last_insn ();
3466 }
3467
3468 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3469 MODE is known to be complex. Returns the last instruction emitted. */
3470
3471 static rtx_insn *
emit_move_complex(machine_mode mode,rtx x,rtx y)3472 emit_move_complex (machine_mode mode, rtx x, rtx y)
3473 {
3474 bool try_int;
3475
3476 /* Need to take special care for pushes, to maintain proper ordering
3477 of the data, and possibly extra padding. */
3478 if (push_operand (x, mode))
3479 return emit_move_complex_push (mode, x, y);
3480
3481 /* See if we can coerce the target into moving both values at once, except
3482 for floating point where we favor moving as parts if this is easy. */
3483 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3484 && optab_handler (mov_optab, GET_MODE_INNER (mode)) != CODE_FOR_nothing
3485 && !(REG_P (x)
3486 && HARD_REGISTER_P (x)
3487 && REG_NREGS (x) == 1)
3488 && !(REG_P (y)
3489 && HARD_REGISTER_P (y)
3490 && REG_NREGS (y) == 1))
3491 try_int = false;
3492 /* Not possible if the values are inherently not adjacent. */
3493 else if (GET_CODE (x) == CONCAT || GET_CODE (y) == CONCAT)
3494 try_int = false;
3495 /* Is possible if both are registers (or subregs of registers). */
3496 else if (register_operand (x, mode) && register_operand (y, mode))
3497 try_int = true;
3498 /* If one of the operands is a memory, and alignment constraints
3499 are friendly enough, we may be able to do combined memory operations.
3500 We do not attempt this if Y is a constant because that combination is
3501 usually better with the by-parts thing below. */
3502 else if ((MEM_P (x) ? !CONSTANT_P (y) : MEM_P (y))
3503 && (!STRICT_ALIGNMENT
3504 || get_mode_alignment (mode) == BIGGEST_ALIGNMENT))
3505 try_int = true;
3506 else
3507 try_int = false;
3508
3509 if (try_int)
3510 {
3511 rtx_insn *ret;
3512
3513 /* For memory to memory moves, optimal behavior can be had with the
3514 existing block move logic. */
3515 if (MEM_P (x) && MEM_P (y))
3516 {
3517 emit_block_move (x, y, gen_int_mode (GET_MODE_SIZE (mode), Pmode),
3518 BLOCK_OP_NO_LIBCALL);
3519 return get_last_insn ();
3520 }
3521
3522 ret = emit_move_via_integer (mode, x, y, true);
3523 if (ret)
3524 return ret;
3525 }
3526
3527 return emit_move_complex_parts (x, y);
3528 }
3529
3530 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3531 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3532
3533 static rtx_insn *
emit_move_ccmode(machine_mode mode,rtx x,rtx y)3534 emit_move_ccmode (machine_mode mode, rtx x, rtx y)
3535 {
3536 rtx_insn *ret;
3537
3538 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3539 if (mode != CCmode)
3540 {
3541 enum insn_code code = optab_handler (mov_optab, CCmode);
3542 if (code != CODE_FOR_nothing)
3543 {
3544 x = emit_move_change_mode (CCmode, mode, x, true);
3545 y = emit_move_change_mode (CCmode, mode, y, true);
3546 return emit_insn (GEN_FCN (code) (x, y));
3547 }
3548 }
3549
3550 /* Otherwise, find the MODE_INT mode of the same width. */
3551 ret = emit_move_via_integer (mode, x, y, false);
3552 gcc_assert (ret != NULL);
3553 return ret;
3554 }
3555
3556 /* Return true if word I of OP lies entirely in the
3557 undefined bits of a paradoxical subreg. */
3558
3559 static bool
undefined_operand_subword_p(const_rtx op,int i)3560 undefined_operand_subword_p (const_rtx op, int i)
3561 {
3562 if (GET_CODE (op) != SUBREG)
3563 return false;
3564 machine_mode innermostmode = GET_MODE (SUBREG_REG (op));
3565 poly_int64 offset = i * UNITS_PER_WORD + subreg_memory_offset (op);
3566 return (known_ge (offset, GET_MODE_SIZE (innermostmode))
3567 || known_le (offset, -UNITS_PER_WORD));
3568 }
3569
3570 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3571 MODE is any multi-word or full-word mode that lacks a move_insn
3572 pattern. Note that you will get better code if you define such
3573 patterns, even if they must turn into multiple assembler instructions. */
3574
3575 static rtx_insn *
emit_move_multi_word(machine_mode mode,rtx x,rtx y)3576 emit_move_multi_word (machine_mode mode, rtx x, rtx y)
3577 {
3578 rtx_insn *last_insn = 0;
3579 rtx_insn *seq;
3580 rtx inner;
3581 bool need_clobber;
3582 int i, mode_size;
3583
3584 /* This function can only handle cases where the number of words is
3585 known at compile time. */
3586 mode_size = GET_MODE_SIZE (mode).to_constant ();
3587 gcc_assert (mode_size >= UNITS_PER_WORD);
3588
3589 /* If X is a push on the stack, do the push now and replace
3590 X with a reference to the stack pointer. */
3591 if (push_operand (x, mode))
3592 x = emit_move_resolve_push (mode, x);
3593
3594 /* If we are in reload, see if either operand is a MEM whose address
3595 is scheduled for replacement. */
3596 if (reload_in_progress && MEM_P (x)
3597 && (inner = find_replacement (&XEXP (x, 0))) != XEXP (x, 0))
3598 x = replace_equiv_address_nv (x, inner);
3599 if (reload_in_progress && MEM_P (y)
3600 && (inner = find_replacement (&XEXP (y, 0))) != XEXP (y, 0))
3601 y = replace_equiv_address_nv (y, inner);
3602
3603 start_sequence ();
3604
3605 need_clobber = false;
3606 for (i = 0; i < CEIL (mode_size, UNITS_PER_WORD); i++)
3607 {
3608 rtx xpart = operand_subword (x, i, 1, mode);
3609 rtx ypart;
3610
3611 /* Do not generate code for a move if it would come entirely
3612 from the undefined bits of a paradoxical subreg. */
3613 if (undefined_operand_subword_p (y, i))
3614 continue;
3615
3616 ypart = operand_subword (y, i, 1, mode);
3617
3618 /* If we can't get a part of Y, put Y into memory if it is a
3619 constant. Otherwise, force it into a register. Then we must
3620 be able to get a part of Y. */
3621 if (ypart == 0 && CONSTANT_P (y))
3622 {
3623 y = use_anchored_address (force_const_mem (mode, y));
3624 ypart = operand_subword (y, i, 1, mode);
3625 }
3626 else if (ypart == 0)
3627 ypart = operand_subword_force (y, i, mode);
3628
3629 gcc_assert (xpart && ypart);
3630
3631 need_clobber |= (GET_CODE (xpart) == SUBREG);
3632
3633 last_insn = emit_move_insn (xpart, ypart);
3634 }
3635
3636 seq = get_insns ();
3637 end_sequence ();
3638
3639 /* Show the output dies here. This is necessary for SUBREGs
3640 of pseudos since we cannot track their lifetimes correctly;
3641 hard regs shouldn't appear here except as return values.
3642 We never want to emit such a clobber after reload. */
3643 if (x != y
3644 && ! (reload_in_progress || reload_completed)
3645 && need_clobber != 0)
3646 emit_clobber (x);
3647
3648 emit_insn (seq);
3649
3650 return last_insn;
3651 }
3652
3653 /* Low level part of emit_move_insn.
3654 Called just like emit_move_insn, but assumes X and Y
3655 are basically valid. */
3656
3657 rtx_insn *
emit_move_insn_1(rtx x,rtx y)3658 emit_move_insn_1 (rtx x, rtx y)
3659 {
3660 machine_mode mode = GET_MODE (x);
3661 enum insn_code code;
3662
3663 gcc_assert ((unsigned int) mode < (unsigned int) MAX_MACHINE_MODE);
3664
3665 code = optab_handler (mov_optab, mode);
3666 if (code != CODE_FOR_nothing)
3667 return emit_insn (GEN_FCN (code) (x, y));
3668
3669 /* Expand complex moves by moving real part and imag part. */
3670 if (COMPLEX_MODE_P (mode))
3671 return emit_move_complex (mode, x, y);
3672
3673 if (GET_MODE_CLASS (mode) == MODE_DECIMAL_FLOAT
3674 || ALL_FIXED_POINT_MODE_P (mode))
3675 {
3676 rtx_insn *result = emit_move_via_integer (mode, x, y, true);
3677
3678 /* If we can't find an integer mode, use multi words. */
3679 if (result)
3680 return result;
3681 else
3682 return emit_move_multi_word (mode, x, y);
3683 }
3684
3685 if (GET_MODE_CLASS (mode) == MODE_CC)
3686 return emit_move_ccmode (mode, x, y);
3687
3688 /* Try using a move pattern for the corresponding integer mode. This is
3689 only safe when simplify_subreg can convert MODE constants into integer
3690 constants. At present, it can only do this reliably if the value
3691 fits within a HOST_WIDE_INT. */
3692 if (!CONSTANT_P (y)
3693 || known_le (GET_MODE_BITSIZE (mode), HOST_BITS_PER_WIDE_INT))
3694 {
3695 rtx_insn *ret = emit_move_via_integer (mode, x, y, lra_in_progress);
3696
3697 if (ret)
3698 {
3699 if (! lra_in_progress || recog (PATTERN (ret), ret, 0) >= 0)
3700 return ret;
3701 }
3702 }
3703
3704 return emit_move_multi_word (mode, x, y);
3705 }
3706
3707 /* Generate code to copy Y into X.
3708 Both Y and X must have the same mode, except that
3709 Y can be a constant with VOIDmode.
3710 This mode cannot be BLKmode; use emit_block_move for that.
3711
3712 Return the last instruction emitted. */
3713
3714 rtx_insn *
emit_move_insn(rtx x,rtx y)3715 emit_move_insn (rtx x, rtx y)
3716 {
3717 machine_mode mode = GET_MODE (x);
3718 rtx y_cst = NULL_RTX;
3719 rtx_insn *last_insn;
3720 rtx set;
3721
3722 gcc_assert (mode != BLKmode
3723 && (GET_MODE (y) == mode || GET_MODE (y) == VOIDmode));
3724
3725 if (CONSTANT_P (y))
3726 {
3727 if (optimize
3728 && SCALAR_FLOAT_MODE_P (GET_MODE (x))
3729 && (last_insn = compress_float_constant (x, y)))
3730 return last_insn;
3731
3732 y_cst = y;
3733
3734 if (!targetm.legitimate_constant_p (mode, y))
3735 {
3736 y = force_const_mem (mode, y);
3737
3738 /* If the target's cannot_force_const_mem prevented the spill,
3739 assume that the target's move expanders will also take care
3740 of the non-legitimate constant. */
3741 if (!y)
3742 y = y_cst;
3743 else
3744 y = use_anchored_address (y);
3745 }
3746 }
3747
3748 /* If X or Y are memory references, verify that their addresses are valid
3749 for the machine. */
3750 if (MEM_P (x)
3751 && (! memory_address_addr_space_p (GET_MODE (x), XEXP (x, 0),
3752 MEM_ADDR_SPACE (x))
3753 && ! push_operand (x, GET_MODE (x))))
3754 x = validize_mem (x);
3755
3756 if (MEM_P (y)
3757 && ! memory_address_addr_space_p (GET_MODE (y), XEXP (y, 0),
3758 MEM_ADDR_SPACE (y)))
3759 y = validize_mem (y);
3760
3761 gcc_assert (mode != BLKmode);
3762
3763 last_insn = emit_move_insn_1 (x, y);
3764
3765 if (y_cst && REG_P (x)
3766 && (set = single_set (last_insn)) != NULL_RTX
3767 && SET_DEST (set) == x
3768 && ! rtx_equal_p (y_cst, SET_SRC (set)))
3769 set_unique_reg_note (last_insn, REG_EQUAL, copy_rtx (y_cst));
3770
3771 return last_insn;
3772 }
3773
3774 /* Generate the body of an instruction to copy Y into X.
3775 It may be a list of insns, if one insn isn't enough. */
3776
3777 rtx_insn *
gen_move_insn(rtx x,rtx y)3778 gen_move_insn (rtx x, rtx y)
3779 {
3780 rtx_insn *seq;
3781
3782 start_sequence ();
3783 emit_move_insn_1 (x, y);
3784 seq = get_insns ();
3785 end_sequence ();
3786 return seq;
3787 }
3788
3789 /* If Y is representable exactly in a narrower mode, and the target can
3790 perform the extension directly from constant or memory, then emit the
3791 move as an extension. */
3792
3793 static rtx_insn *
compress_float_constant(rtx x,rtx y)3794 compress_float_constant (rtx x, rtx y)
3795 {
3796 machine_mode dstmode = GET_MODE (x);
3797 machine_mode orig_srcmode = GET_MODE (y);
3798 machine_mode srcmode;
3799 const REAL_VALUE_TYPE *r;
3800 int oldcost, newcost;
3801 bool speed = optimize_insn_for_speed_p ();
3802
3803 r = CONST_DOUBLE_REAL_VALUE (y);
3804
3805 if (targetm.legitimate_constant_p (dstmode, y))
3806 oldcost = set_src_cost (y, orig_srcmode, speed);
3807 else
3808 oldcost = set_src_cost (force_const_mem (dstmode, y), dstmode, speed);
3809
3810 FOR_EACH_MODE_UNTIL (srcmode, orig_srcmode)
3811 {
3812 enum insn_code ic;
3813 rtx trunc_y;
3814 rtx_insn *last_insn;
3815
3816 /* Skip if the target can't extend this way. */
3817 ic = can_extend_p (dstmode, srcmode, 0);
3818 if (ic == CODE_FOR_nothing)
3819 continue;
3820
3821 /* Skip if the narrowed value isn't exact. */
3822 if (! exact_real_truncate (srcmode, r))
3823 continue;
3824
3825 trunc_y = const_double_from_real_value (*r, srcmode);
3826
3827 if (targetm.legitimate_constant_p (srcmode, trunc_y))
3828 {
3829 /* Skip if the target needs extra instructions to perform
3830 the extension. */
3831 if (!insn_operand_matches (ic, 1, trunc_y))
3832 continue;
3833 /* This is valid, but may not be cheaper than the original. */
3834 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3835 dstmode, speed);
3836 if (oldcost < newcost)
3837 continue;
3838 }
3839 else if (float_extend_from_mem[dstmode][srcmode])
3840 {
3841 trunc_y = force_const_mem (srcmode, trunc_y);
3842 /* This is valid, but may not be cheaper than the original. */
3843 newcost = set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode, trunc_y),
3844 dstmode, speed);
3845 if (oldcost < newcost)
3846 continue;
3847 trunc_y = validize_mem (trunc_y);
3848 }
3849 else
3850 continue;
3851
3852 /* For CSE's benefit, force the compressed constant pool entry
3853 into a new pseudo. This constant may be used in different modes,
3854 and if not, combine will put things back together for us. */
3855 trunc_y = force_reg (srcmode, trunc_y);
3856
3857 /* If x is a hard register, perform the extension into a pseudo,
3858 so that e.g. stack realignment code is aware of it. */
3859 rtx target = x;
3860 if (REG_P (x) && HARD_REGISTER_P (x))
3861 target = gen_reg_rtx (dstmode);
3862
3863 emit_unop_insn (ic, target, trunc_y, UNKNOWN);
3864 last_insn = get_last_insn ();
3865
3866 if (REG_P (target))
3867 set_unique_reg_note (last_insn, REG_EQUAL, y);
3868
3869 if (target != x)
3870 return emit_move_insn (x, target);
3871 return last_insn;
3872 }
3873
3874 return NULL;
3875 }
3876
3877 /* Pushing data onto the stack. */
3878
3879 /* Push a block of length SIZE (perhaps variable)
3880 and return an rtx to address the beginning of the block.
3881 The value may be virtual_outgoing_args_rtx.
3882
3883 EXTRA is the number of bytes of padding to push in addition to SIZE.
3884 BELOW nonzero means this padding comes at low addresses;
3885 otherwise, the padding comes at high addresses. */
3886
3887 rtx
push_block(rtx size,poly_int64 extra,int below)3888 push_block (rtx size, poly_int64 extra, int below)
3889 {
3890 rtx temp;
3891
3892 size = convert_modes (Pmode, ptr_mode, size, 1);
3893 if (CONSTANT_P (size))
3894 anti_adjust_stack (plus_constant (Pmode, size, extra));
3895 else if (REG_P (size) && known_eq (extra, 0))
3896 anti_adjust_stack (size);
3897 else
3898 {
3899 temp = copy_to_mode_reg (Pmode, size);
3900 if (maybe_ne (extra, 0))
3901 temp = expand_binop (Pmode, add_optab, temp,
3902 gen_int_mode (extra, Pmode),
3903 temp, 0, OPTAB_LIB_WIDEN);
3904 anti_adjust_stack (temp);
3905 }
3906
3907 if (STACK_GROWS_DOWNWARD)
3908 {
3909 temp = virtual_outgoing_args_rtx;
3910 if (maybe_ne (extra, 0) && below)
3911 temp = plus_constant (Pmode, temp, extra);
3912 }
3913 else
3914 {
3915 if (CONST_INT_P (size))
3916 temp = plus_constant (Pmode, virtual_outgoing_args_rtx,
3917 -INTVAL (size) - (below ? 0 : extra));
3918 else if (maybe_ne (extra, 0) && !below)
3919 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3920 negate_rtx (Pmode, plus_constant (Pmode, size,
3921 extra)));
3922 else
3923 temp = gen_rtx_PLUS (Pmode, virtual_outgoing_args_rtx,
3924 negate_rtx (Pmode, size));
3925 }
3926
3927 return memory_address (NARROWEST_INT_MODE, temp);
3928 }
3929
3930 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3931
3932 static rtx
mem_autoinc_base(rtx mem)3933 mem_autoinc_base (rtx mem)
3934 {
3935 if (MEM_P (mem))
3936 {
3937 rtx addr = XEXP (mem, 0);
3938 if (GET_RTX_CLASS (GET_CODE (addr)) == RTX_AUTOINC)
3939 return XEXP (addr, 0);
3940 }
3941 return NULL;
3942 }
3943
3944 /* A utility routine used here, in reload, and in try_split. The insns
3945 after PREV up to and including LAST are known to adjust the stack,
3946 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3947 placing notes as appropriate. PREV may be NULL, indicating the
3948 entire insn sequence prior to LAST should be scanned.
3949
3950 The set of allowed stack pointer modifications is small:
3951 (1) One or more auto-inc style memory references (aka pushes),
3952 (2) One or more addition/subtraction with the SP as destination,
3953 (3) A single move insn with the SP as destination,
3954 (4) A call_pop insn,
3955 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3956
3957 Insns in the sequence that do not modify the SP are ignored,
3958 except for noreturn calls.
3959
3960 The return value is the amount of adjustment that can be trivially
3961 verified, via immediate operand or auto-inc. If the adjustment
3962 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
3963
3964 poly_int64
find_args_size_adjust(rtx_insn * insn)3965 find_args_size_adjust (rtx_insn *insn)
3966 {
3967 rtx dest, set, pat;
3968 int i;
3969
3970 pat = PATTERN (insn);
3971 set = NULL;
3972
3973 /* Look for a call_pop pattern. */
3974 if (CALL_P (insn))
3975 {
3976 /* We have to allow non-call_pop patterns for the case
3977 of emit_single_push_insn of a TLS address. */
3978 if (GET_CODE (pat) != PARALLEL)
3979 return 0;
3980
3981 /* All call_pop have a stack pointer adjust in the parallel.
3982 The call itself is always first, and the stack adjust is
3983 usually last, so search from the end. */
3984 for (i = XVECLEN (pat, 0) - 1; i > 0; --i)
3985 {
3986 set = XVECEXP (pat, 0, i);
3987 if (GET_CODE (set) != SET)
3988 continue;
3989 dest = SET_DEST (set);
3990 if (dest == stack_pointer_rtx)
3991 break;
3992 }
3993 /* We'd better have found the stack pointer adjust. */
3994 if (i == 0)
3995 return 0;
3996 /* Fall through to process the extracted SET and DEST
3997 as if it was a standalone insn. */
3998 }
3999 else if (GET_CODE (pat) == SET)
4000 set = pat;
4001 else if ((set = single_set (insn)) != NULL)
4002 ;
4003 else if (GET_CODE (pat) == PARALLEL)
4004 {
4005 /* ??? Some older ports use a parallel with a stack adjust
4006 and a store for a PUSH_ROUNDING pattern, rather than a
4007 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4008 /* ??? See h8300 and m68k, pushqi1. */
4009 for (i = XVECLEN (pat, 0) - 1; i >= 0; --i)
4010 {
4011 set = XVECEXP (pat, 0, i);
4012 if (GET_CODE (set) != SET)
4013 continue;
4014 dest = SET_DEST (set);
4015 if (dest == stack_pointer_rtx)
4016 break;
4017
4018 /* We do not expect an auto-inc of the sp in the parallel. */
4019 gcc_checking_assert (mem_autoinc_base (dest) != stack_pointer_rtx);
4020 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4021 != stack_pointer_rtx);
4022 }
4023 if (i < 0)
4024 return 0;
4025 }
4026 else
4027 return 0;
4028
4029 dest = SET_DEST (set);
4030
4031 /* Look for direct modifications of the stack pointer. */
4032 if (REG_P (dest) && REGNO (dest) == STACK_POINTER_REGNUM)
4033 {
4034 /* Look for a trivial adjustment, otherwise assume nothing. */
4035 /* Note that the SPU restore_stack_block pattern refers to
4036 the stack pointer in V4SImode. Consider that non-trivial. */
4037 if (SCALAR_INT_MODE_P (GET_MODE (dest))
4038 && GET_CODE (SET_SRC (set)) == PLUS
4039 && XEXP (SET_SRC (set), 0) == stack_pointer_rtx
4040 && CONST_INT_P (XEXP (SET_SRC (set), 1)))
4041 return INTVAL (XEXP (SET_SRC (set), 1));
4042 /* ??? Reload can generate no-op moves, which will be cleaned
4043 up later. Recognize it and continue searching. */
4044 else if (rtx_equal_p (dest, SET_SRC (set)))
4045 return 0;
4046 else
4047 return HOST_WIDE_INT_MIN;
4048 }
4049 else
4050 {
4051 rtx mem, addr;
4052
4053 /* Otherwise only think about autoinc patterns. */
4054 if (mem_autoinc_base (dest) == stack_pointer_rtx)
4055 {
4056 mem = dest;
4057 gcc_checking_assert (mem_autoinc_base (SET_SRC (set))
4058 != stack_pointer_rtx);
4059 }
4060 else if (mem_autoinc_base (SET_SRC (set)) == stack_pointer_rtx)
4061 mem = SET_SRC (set);
4062 else
4063 return 0;
4064
4065 addr = XEXP (mem, 0);
4066 switch (GET_CODE (addr))
4067 {
4068 case PRE_INC:
4069 case POST_INC:
4070 return GET_MODE_SIZE (GET_MODE (mem));
4071 case PRE_DEC:
4072 case POST_DEC:
4073 return -GET_MODE_SIZE (GET_MODE (mem));
4074 case PRE_MODIFY:
4075 case POST_MODIFY:
4076 addr = XEXP (addr, 1);
4077 gcc_assert (GET_CODE (addr) == PLUS);
4078 gcc_assert (XEXP (addr, 0) == stack_pointer_rtx);
4079 gcc_assert (CONST_INT_P (XEXP (addr, 1)));
4080 return INTVAL (XEXP (addr, 1));
4081 default:
4082 gcc_unreachable ();
4083 }
4084 }
4085 }
4086
4087 poly_int64
fixup_args_size_notes(rtx_insn * prev,rtx_insn * last,poly_int64 end_args_size)4088 fixup_args_size_notes (rtx_insn *prev, rtx_insn *last,
4089 poly_int64 end_args_size)
4090 {
4091 poly_int64 args_size = end_args_size;
4092 bool saw_unknown = false;
4093 rtx_insn *insn;
4094
4095 for (insn = last; insn != prev; insn = PREV_INSN (insn))
4096 {
4097 if (!NONDEBUG_INSN_P (insn))
4098 continue;
4099
4100 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4101 a call argument containing a TLS address that itself requires
4102 a call to __tls_get_addr. The handling of stack_pointer_delta
4103 in emit_single_push_insn is supposed to ensure that any such
4104 notes are already correct. */
4105 rtx note = find_reg_note (insn, REG_ARGS_SIZE, NULL_RTX);
4106 gcc_assert (!note || known_eq (args_size, get_args_size (note)));
4107
4108 poly_int64 this_delta = find_args_size_adjust (insn);
4109 if (known_eq (this_delta, 0))
4110 {
4111 if (!CALL_P (insn)
4112 || ACCUMULATE_OUTGOING_ARGS
4113 || find_reg_note (insn, REG_NORETURN, NULL_RTX) == NULL_RTX)
4114 continue;
4115 }
4116
4117 gcc_assert (!saw_unknown);
4118 if (known_eq (this_delta, HOST_WIDE_INT_MIN))
4119 saw_unknown = true;
4120
4121 if (!note)
4122 add_args_size_note (insn, args_size);
4123 if (STACK_GROWS_DOWNWARD)
4124 this_delta = -poly_uint64 (this_delta);
4125
4126 if (saw_unknown)
4127 args_size = HOST_WIDE_INT_MIN;
4128 else
4129 args_size -= this_delta;
4130 }
4131
4132 return args_size;
4133 }
4134
4135 #ifdef PUSH_ROUNDING
4136 /* Emit single push insn. */
4137
4138 static void
emit_single_push_insn_1(machine_mode mode,rtx x,tree type)4139 emit_single_push_insn_1 (machine_mode mode, rtx x, tree type)
4140 {
4141 rtx dest_addr;
4142 poly_int64 rounded_size = PUSH_ROUNDING (GET_MODE_SIZE (mode));
4143 rtx dest;
4144 enum insn_code icode;
4145
4146 /* If there is push pattern, use it. Otherwise try old way of throwing
4147 MEM representing push operation to move expander. */
4148 icode = optab_handler (push_optab, mode);
4149 if (icode != CODE_FOR_nothing)
4150 {
4151 struct expand_operand ops[1];
4152
4153 create_input_operand (&ops[0], x, mode);
4154 if (maybe_expand_insn (icode, 1, ops))
4155 return;
4156 }
4157 if (known_eq (GET_MODE_SIZE (mode), rounded_size))
4158 dest_addr = gen_rtx_fmt_e (STACK_PUSH_CODE, Pmode, stack_pointer_rtx);
4159 /* If we are to pad downward, adjust the stack pointer first and
4160 then store X into the stack location using an offset. This is
4161 because emit_move_insn does not know how to pad; it does not have
4162 access to type. */
4163 else if (targetm.calls.function_arg_padding (mode, type) == PAD_DOWNWARD)
4164 {
4165 emit_move_insn (stack_pointer_rtx,
4166 expand_binop (Pmode,
4167 STACK_GROWS_DOWNWARD ? sub_optab
4168 : add_optab,
4169 stack_pointer_rtx,
4170 gen_int_mode (rounded_size, Pmode),
4171 NULL_RTX, 0, OPTAB_LIB_WIDEN));
4172
4173 poly_int64 offset = rounded_size - GET_MODE_SIZE (mode);
4174 if (STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_DEC)
4175 /* We have already decremented the stack pointer, so get the
4176 previous value. */
4177 offset += rounded_size;
4178
4179 if (!STACK_GROWS_DOWNWARD && STACK_PUSH_CODE == POST_INC)
4180 /* We have already incremented the stack pointer, so get the
4181 previous value. */
4182 offset -= rounded_size;
4183
4184 dest_addr = plus_constant (Pmode, stack_pointer_rtx, offset);
4185 }
4186 else
4187 {
4188 if (STACK_GROWS_DOWNWARD)
4189 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4190 dest_addr = plus_constant (Pmode, stack_pointer_rtx, -rounded_size);
4191 else
4192 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4193 dest_addr = plus_constant (Pmode, stack_pointer_rtx, rounded_size);
4194
4195 dest_addr = gen_rtx_PRE_MODIFY (Pmode, stack_pointer_rtx, dest_addr);
4196 }
4197
4198 dest = gen_rtx_MEM (mode, dest_addr);
4199
4200 if (type != 0)
4201 {
4202 set_mem_attributes (dest, type, 1);
4203
4204 if (cfun->tail_call_marked)
4205 /* Function incoming arguments may overlap with sibling call
4206 outgoing arguments and we cannot allow reordering of reads
4207 from function arguments with stores to outgoing arguments
4208 of sibling calls. */
4209 set_mem_alias_set (dest, 0);
4210 }
4211 emit_move_insn (dest, x);
4212 }
4213
4214 /* Emit and annotate a single push insn. */
4215
4216 static void
emit_single_push_insn(machine_mode mode,rtx x,tree type)4217 emit_single_push_insn (machine_mode mode, rtx x, tree type)
4218 {
4219 poly_int64 delta, old_delta = stack_pointer_delta;
4220 rtx_insn *prev = get_last_insn ();
4221 rtx_insn *last;
4222
4223 emit_single_push_insn_1 (mode, x, type);
4224
4225 /* Adjust stack_pointer_delta to describe the situation after the push
4226 we just performed. Note that we must do this after the push rather
4227 than before the push in case calculating X needs pushes and pops of
4228 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4229 for such pushes and pops must not include the effect of the future
4230 push of X. */
4231 stack_pointer_delta += PUSH_ROUNDING (GET_MODE_SIZE (mode));
4232
4233 last = get_last_insn ();
4234
4235 /* Notice the common case where we emitted exactly one insn. */
4236 if (PREV_INSN (last) == prev)
4237 {
4238 add_args_size_note (last, stack_pointer_delta);
4239 return;
4240 }
4241
4242 delta = fixup_args_size_notes (prev, last, stack_pointer_delta);
4243 gcc_assert (known_eq (delta, HOST_WIDE_INT_MIN)
4244 || known_eq (delta, old_delta));
4245 }
4246 #endif
4247
4248 /* If reading SIZE bytes from X will end up reading from
4249 Y return the number of bytes that overlap. Return -1
4250 if there is no overlap or -2 if we can't determine
4251 (for example when X and Y have different base registers). */
4252
4253 static int
memory_load_overlap(rtx x,rtx y,HOST_WIDE_INT size)4254 memory_load_overlap (rtx x, rtx y, HOST_WIDE_INT size)
4255 {
4256 rtx tmp = plus_constant (Pmode, x, size);
4257 rtx sub = simplify_gen_binary (MINUS, Pmode, tmp, y);
4258
4259 if (!CONST_INT_P (sub))
4260 return -2;
4261
4262 HOST_WIDE_INT val = INTVAL (sub);
4263
4264 return IN_RANGE (val, 1, size) ? val : -1;
4265 }
4266
4267 /* Generate code to push X onto the stack, assuming it has mode MODE and
4268 type TYPE.
4269 MODE is redundant except when X is a CONST_INT (since they don't
4270 carry mode info).
4271 SIZE is an rtx for the size of data to be copied (in bytes),
4272 needed only if X is BLKmode.
4273 Return true if successful. May return false if asked to push a
4274 partial argument during a sibcall optimization (as specified by
4275 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4276 to not overlap.
4277
4278 ALIGN (in bits) is maximum alignment we can assume.
4279
4280 If PARTIAL and REG are both nonzero, then copy that many of the first
4281 bytes of X into registers starting with REG, and push the rest of X.
4282 The amount of space pushed is decreased by PARTIAL bytes.
4283 REG must be a hard register in this case.
4284 If REG is zero but PARTIAL is not, take any all others actions for an
4285 argument partially in registers, but do not actually load any
4286 registers.
4287
4288 EXTRA is the amount in bytes of extra space to leave next to this arg.
4289 This is ignored if an argument block has already been allocated.
4290
4291 On a machine that lacks real push insns, ARGS_ADDR is the address of
4292 the bottom of the argument block for this call. We use indexing off there
4293 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4294 argument block has not been preallocated.
4295
4296 ARGS_SO_FAR is the size of args previously pushed for this call.
4297
4298 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4299 for arguments passed in registers. If nonzero, it will be the number
4300 of bytes required. */
4301
4302 bool
emit_push_insn(rtx x,machine_mode mode,tree type,rtx size,unsigned int align,int partial,rtx reg,poly_int64 extra,rtx args_addr,rtx args_so_far,int reg_parm_stack_space,rtx alignment_pad,bool sibcall_p)4303 emit_push_insn (rtx x, machine_mode mode, tree type, rtx size,
4304 unsigned int align, int partial, rtx reg, poly_int64 extra,
4305 rtx args_addr, rtx args_so_far, int reg_parm_stack_space,
4306 rtx alignment_pad, bool sibcall_p)
4307 {
4308 rtx xinner;
4309 pad_direction stack_direction
4310 = STACK_GROWS_DOWNWARD ? PAD_DOWNWARD : PAD_UPWARD;
4311
4312 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4313 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4314 Default is below for small data on big-endian machines; else above. */
4315 pad_direction where_pad = targetm.calls.function_arg_padding (mode, type);
4316
4317 /* Invert direction if stack is post-decrement.
4318 FIXME: why? */
4319 if (STACK_PUSH_CODE == POST_DEC)
4320 if (where_pad != PAD_NONE)
4321 where_pad = (where_pad == PAD_DOWNWARD ? PAD_UPWARD : PAD_DOWNWARD);
4322
4323 xinner = x;
4324
4325 int nregs = partial / UNITS_PER_WORD;
4326 rtx *tmp_regs = NULL;
4327 int overlapping = 0;
4328
4329 if (mode == BLKmode
4330 || (STRICT_ALIGNMENT && align < GET_MODE_ALIGNMENT (mode)))
4331 {
4332 /* Copy a block into the stack, entirely or partially. */
4333
4334 rtx temp;
4335 int used;
4336 int offset;
4337 int skip;
4338
4339 offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4340 used = partial - offset;
4341
4342 if (mode != BLKmode)
4343 {
4344 /* A value is to be stored in an insufficiently aligned
4345 stack slot; copy via a suitably aligned slot if
4346 necessary. */
4347 size = gen_int_mode (GET_MODE_SIZE (mode), Pmode);
4348 if (!MEM_P (xinner))
4349 {
4350 temp = assign_temp (type, 1, 1);
4351 emit_move_insn (temp, xinner);
4352 xinner = temp;
4353 }
4354 }
4355
4356 gcc_assert (size);
4357
4358 /* USED is now the # of bytes we need not copy to the stack
4359 because registers will take care of them. */
4360
4361 if (partial != 0)
4362 xinner = adjust_address (xinner, BLKmode, used);
4363
4364 /* If the partial register-part of the arg counts in its stack size,
4365 skip the part of stack space corresponding to the registers.
4366 Otherwise, start copying to the beginning of the stack space,
4367 by setting SKIP to 0. */
4368 skip = (reg_parm_stack_space == 0) ? 0 : used;
4369
4370 #ifdef PUSH_ROUNDING
4371 /* Do it with several push insns if that doesn't take lots of insns
4372 and if there is no difficulty with push insns that skip bytes
4373 on the stack for alignment purposes. */
4374 if (args_addr == 0
4375 && PUSH_ARGS
4376 && CONST_INT_P (size)
4377 && skip == 0
4378 && MEM_ALIGN (xinner) >= align
4379 && can_move_by_pieces ((unsigned) INTVAL (size) - used, align)
4380 /* Here we avoid the case of a structure whose weak alignment
4381 forces many pushes of a small amount of data,
4382 and such small pushes do rounding that causes trouble. */
4383 && ((!targetm.slow_unaligned_access (word_mode, align))
4384 || align >= BIGGEST_ALIGNMENT
4385 || known_eq (PUSH_ROUNDING (align / BITS_PER_UNIT),
4386 align / BITS_PER_UNIT))
4387 && known_eq (PUSH_ROUNDING (INTVAL (size)), INTVAL (size)))
4388 {
4389 /* Push padding now if padding above and stack grows down,
4390 or if padding below and stack grows up.
4391 But if space already allocated, this has already been done. */
4392 if (maybe_ne (extra, 0)
4393 && args_addr == 0
4394 && where_pad != PAD_NONE
4395 && where_pad != stack_direction)
4396 anti_adjust_stack (gen_int_mode (extra, Pmode));
4397
4398 move_by_pieces (NULL, xinner, INTVAL (size) - used, align, 0);
4399 }
4400 else
4401 #endif /* PUSH_ROUNDING */
4402 {
4403 rtx target;
4404
4405 /* Otherwise make space on the stack and copy the data
4406 to the address of that space. */
4407
4408 /* Deduct words put into registers from the size we must copy. */
4409 if (partial != 0)
4410 {
4411 if (CONST_INT_P (size))
4412 size = GEN_INT (INTVAL (size) - used);
4413 else
4414 size = expand_binop (GET_MODE (size), sub_optab, size,
4415 gen_int_mode (used, GET_MODE (size)),
4416 NULL_RTX, 0, OPTAB_LIB_WIDEN);
4417 }
4418
4419 /* Get the address of the stack space.
4420 In this case, we do not deal with EXTRA separately.
4421 A single stack adjust will do. */
4422 if (! args_addr)
4423 {
4424 temp = push_block (size, extra, where_pad == PAD_DOWNWARD);
4425 extra = 0;
4426 }
4427 else if (CONST_INT_P (args_so_far))
4428 temp = memory_address (BLKmode,
4429 plus_constant (Pmode, args_addr,
4430 skip + INTVAL (args_so_far)));
4431 else
4432 temp = memory_address (BLKmode,
4433 plus_constant (Pmode,
4434 gen_rtx_PLUS (Pmode,
4435 args_addr,
4436 args_so_far),
4437 skip));
4438
4439 if (!ACCUMULATE_OUTGOING_ARGS)
4440 {
4441 /* If the source is referenced relative to the stack pointer,
4442 copy it to another register to stabilize it. We do not need
4443 to do this if we know that we won't be changing sp. */
4444
4445 if (reg_mentioned_p (virtual_stack_dynamic_rtx, temp)
4446 || reg_mentioned_p (virtual_outgoing_args_rtx, temp))
4447 temp = copy_to_reg (temp);
4448 }
4449
4450 target = gen_rtx_MEM (BLKmode, temp);
4451
4452 /* We do *not* set_mem_attributes here, because incoming arguments
4453 may overlap with sibling call outgoing arguments and we cannot
4454 allow reordering of reads from function arguments with stores
4455 to outgoing arguments of sibling calls. We do, however, want
4456 to record the alignment of the stack slot. */
4457 /* ALIGN may well be better aligned than TYPE, e.g. due to
4458 PARM_BOUNDARY. Assume the caller isn't lying. */
4459 set_mem_align (target, align);
4460
4461 /* If part should go in registers and pushing to that part would
4462 overwrite some of the values that need to go into regs, load the
4463 overlapping values into temporary pseudos to be moved into the hard
4464 regs at the end after the stack pushing has completed.
4465 We cannot load them directly into the hard regs here because
4466 they can be clobbered by the block move expansions.
4467 See PR 65358. */
4468
4469 if (partial > 0 && reg != 0 && mode == BLKmode
4470 && GET_CODE (reg) != PARALLEL)
4471 {
4472 overlapping = memory_load_overlap (XEXP (x, 0), temp, partial);
4473 if (overlapping > 0)
4474 {
4475 gcc_assert (overlapping % UNITS_PER_WORD == 0);
4476 overlapping /= UNITS_PER_WORD;
4477
4478 tmp_regs = XALLOCAVEC (rtx, overlapping);
4479
4480 for (int i = 0; i < overlapping; i++)
4481 tmp_regs[i] = gen_reg_rtx (word_mode);
4482
4483 for (int i = 0; i < overlapping; i++)
4484 emit_move_insn (tmp_regs[i],
4485 operand_subword_force (target, i, mode));
4486 }
4487 else if (overlapping == -1)
4488 overlapping = 0;
4489 /* Could not determine whether there is overlap.
4490 Fail the sibcall. */
4491 else
4492 {
4493 overlapping = 0;
4494 if (sibcall_p)
4495 return false;
4496 }
4497 }
4498 emit_block_move (target, xinner, size, BLOCK_OP_CALL_PARM);
4499 }
4500 }
4501 else if (partial > 0)
4502 {
4503 /* Scalar partly in registers. This case is only supported
4504 for fixed-wdth modes. */
4505 int size = GET_MODE_SIZE (mode).to_constant ();
4506 size /= UNITS_PER_WORD;
4507 int i;
4508 int not_stack;
4509 /* # bytes of start of argument
4510 that we must make space for but need not store. */
4511 int offset = partial % (PARM_BOUNDARY / BITS_PER_UNIT);
4512 int args_offset = INTVAL (args_so_far);
4513 int skip;
4514
4515 /* Push padding now if padding above and stack grows down,
4516 or if padding below and stack grows up.
4517 But if space already allocated, this has already been done. */
4518 if (maybe_ne (extra, 0)
4519 && args_addr == 0
4520 && where_pad != PAD_NONE
4521 && where_pad != stack_direction)
4522 anti_adjust_stack (gen_int_mode (extra, Pmode));
4523
4524 /* If we make space by pushing it, we might as well push
4525 the real data. Otherwise, we can leave OFFSET nonzero
4526 and leave the space uninitialized. */
4527 if (args_addr == 0)
4528 offset = 0;
4529
4530 /* Now NOT_STACK gets the number of words that we don't need to
4531 allocate on the stack. Convert OFFSET to words too. */
4532 not_stack = (partial - offset) / UNITS_PER_WORD;
4533 offset /= UNITS_PER_WORD;
4534
4535 /* If the partial register-part of the arg counts in its stack size,
4536 skip the part of stack space corresponding to the registers.
4537 Otherwise, start copying to the beginning of the stack space,
4538 by setting SKIP to 0. */
4539 skip = (reg_parm_stack_space == 0) ? 0 : not_stack;
4540
4541 if (CONSTANT_P (x) && !targetm.legitimate_constant_p (mode, x))
4542 x = validize_mem (force_const_mem (mode, x));
4543
4544 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4545 SUBREGs of such registers are not allowed. */
4546 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER
4547 && GET_MODE_CLASS (GET_MODE (x)) != MODE_INT))
4548 x = copy_to_reg (x);
4549
4550 /* Loop over all the words allocated on the stack for this arg. */
4551 /* We can do it by words, because any scalar bigger than a word
4552 has a size a multiple of a word. */
4553 for (i = size - 1; i >= not_stack; i--)
4554 if (i >= not_stack + offset)
4555 if (!emit_push_insn (operand_subword_force (x, i, mode),
4556 word_mode, NULL_TREE, NULL_RTX, align, 0, NULL_RTX,
4557 0, args_addr,
4558 GEN_INT (args_offset + ((i - not_stack + skip)
4559 * UNITS_PER_WORD)),
4560 reg_parm_stack_space, alignment_pad, sibcall_p))
4561 return false;
4562 }
4563 else
4564 {
4565 rtx addr;
4566 rtx dest;
4567
4568 /* Push padding now if padding above and stack grows down,
4569 or if padding below and stack grows up.
4570 But if space already allocated, this has already been done. */
4571 if (maybe_ne (extra, 0)
4572 && args_addr == 0
4573 && where_pad != PAD_NONE
4574 && where_pad != stack_direction)
4575 anti_adjust_stack (gen_int_mode (extra, Pmode));
4576
4577 #ifdef PUSH_ROUNDING
4578 if (args_addr == 0 && PUSH_ARGS)
4579 emit_single_push_insn (mode, x, type);
4580 else
4581 #endif
4582 {
4583 addr = simplify_gen_binary (PLUS, Pmode, args_addr, args_so_far);
4584 dest = gen_rtx_MEM (mode, memory_address (mode, addr));
4585
4586 /* We do *not* set_mem_attributes here, because incoming arguments
4587 may overlap with sibling call outgoing arguments and we cannot
4588 allow reordering of reads from function arguments with stores
4589 to outgoing arguments of sibling calls. We do, however, want
4590 to record the alignment of the stack slot. */
4591 /* ALIGN may well be better aligned than TYPE, e.g. due to
4592 PARM_BOUNDARY. Assume the caller isn't lying. */
4593 set_mem_align (dest, align);
4594
4595 emit_move_insn (dest, x);
4596 }
4597 }
4598
4599 /* Move the partial arguments into the registers and any overlapping
4600 values that we moved into the pseudos in tmp_regs. */
4601 if (partial > 0 && reg != 0)
4602 {
4603 /* Handle calls that pass values in multiple non-contiguous locations.
4604 The Irix 6 ABI has examples of this. */
4605 if (GET_CODE (reg) == PARALLEL)
4606 emit_group_load (reg, x, type, -1);
4607 else
4608 {
4609 gcc_assert (partial % UNITS_PER_WORD == 0);
4610 move_block_to_reg (REGNO (reg), x, nregs - overlapping, mode);
4611
4612 for (int i = 0; i < overlapping; i++)
4613 emit_move_insn (gen_rtx_REG (word_mode, REGNO (reg)
4614 + nregs - overlapping + i),
4615 tmp_regs[i]);
4616
4617 }
4618 }
4619
4620 if (maybe_ne (extra, 0) && args_addr == 0 && where_pad == stack_direction)
4621 anti_adjust_stack (gen_int_mode (extra, Pmode));
4622
4623 if (alignment_pad && args_addr == 0)
4624 anti_adjust_stack (alignment_pad);
4625
4626 return true;
4627 }
4628
4629 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4630 operations. */
4631
4632 static rtx
get_subtarget(rtx x)4633 get_subtarget (rtx x)
4634 {
4635 return (optimize
4636 || x == 0
4637 /* Only registers can be subtargets. */
4638 || !REG_P (x)
4639 /* Don't use hard regs to avoid extending their life. */
4640 || REGNO (x) < FIRST_PSEUDO_REGISTER
4641 ? 0 : x);
4642 }
4643
4644 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4645 FIELD is a bitfield. Returns true if the optimization was successful,
4646 and there's nothing else to do. */
4647
4648 static bool
optimize_bitfield_assignment_op(poly_uint64 pbitsize,poly_uint64 pbitpos,poly_uint64 pbitregion_start,poly_uint64 pbitregion_end,machine_mode mode1,rtx str_rtx,tree to,tree src,bool reverse)4649 optimize_bitfield_assignment_op (poly_uint64 pbitsize,
4650 poly_uint64 pbitpos,
4651 poly_uint64 pbitregion_start,
4652 poly_uint64 pbitregion_end,
4653 machine_mode mode1, rtx str_rtx,
4654 tree to, tree src, bool reverse)
4655 {
4656 /* str_mode is not guaranteed to be a scalar type. */
4657 machine_mode str_mode = GET_MODE (str_rtx);
4658 unsigned int str_bitsize;
4659 tree op0, op1;
4660 rtx value, result;
4661 optab binop;
4662 gimple *srcstmt;
4663 enum tree_code code;
4664
4665 unsigned HOST_WIDE_INT bitsize, bitpos, bitregion_start, bitregion_end;
4666 if (mode1 != VOIDmode
4667 || !pbitsize.is_constant (&bitsize)
4668 || !pbitpos.is_constant (&bitpos)
4669 || !pbitregion_start.is_constant (&bitregion_start)
4670 || !pbitregion_end.is_constant (&bitregion_end)
4671 || bitsize >= BITS_PER_WORD
4672 || !GET_MODE_BITSIZE (str_mode).is_constant (&str_bitsize)
4673 || str_bitsize > BITS_PER_WORD
4674 || TREE_SIDE_EFFECTS (to)
4675 || TREE_THIS_VOLATILE (to))
4676 return false;
4677
4678 STRIP_NOPS (src);
4679 if (TREE_CODE (src) != SSA_NAME)
4680 return false;
4681 if (TREE_CODE (TREE_TYPE (src)) != INTEGER_TYPE)
4682 return false;
4683
4684 srcstmt = get_gimple_for_ssa_name (src);
4685 if (!srcstmt
4686 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt)) != tcc_binary)
4687 return false;
4688
4689 code = gimple_assign_rhs_code (srcstmt);
4690
4691 op0 = gimple_assign_rhs1 (srcstmt);
4692
4693 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4694 to find its initialization. Hopefully the initialization will
4695 be from a bitfield load. */
4696 if (TREE_CODE (op0) == SSA_NAME)
4697 {
4698 gimple *op0stmt = get_gimple_for_ssa_name (op0);
4699
4700 /* We want to eventually have OP0 be the same as TO, which
4701 should be a bitfield. */
4702 if (!op0stmt
4703 || !is_gimple_assign (op0stmt)
4704 || gimple_assign_rhs_code (op0stmt) != TREE_CODE (to))
4705 return false;
4706 op0 = gimple_assign_rhs1 (op0stmt);
4707 }
4708
4709 op1 = gimple_assign_rhs2 (srcstmt);
4710
4711 if (!operand_equal_p (to, op0, 0))
4712 return false;
4713
4714 if (MEM_P (str_rtx))
4715 {
4716 unsigned HOST_WIDE_INT offset1;
4717
4718 if (str_bitsize == 0 || str_bitsize > BITS_PER_WORD)
4719 str_bitsize = BITS_PER_WORD;
4720
4721 scalar_int_mode best_mode;
4722 if (!get_best_mode (bitsize, bitpos, bitregion_start, bitregion_end,
4723 MEM_ALIGN (str_rtx), str_bitsize, false, &best_mode))
4724 return false;
4725 str_mode = best_mode;
4726 str_bitsize = GET_MODE_BITSIZE (best_mode);
4727
4728 offset1 = bitpos;
4729 bitpos %= str_bitsize;
4730 offset1 = (offset1 - bitpos) / BITS_PER_UNIT;
4731 str_rtx = adjust_address (str_rtx, str_mode, offset1);
4732 }
4733 else if (!REG_P (str_rtx) && GET_CODE (str_rtx) != SUBREG)
4734 return false;
4735
4736 /* If the bit field covers the whole REG/MEM, store_field
4737 will likely generate better code. */
4738 if (bitsize >= str_bitsize)
4739 return false;
4740
4741 /* We can't handle fields split across multiple entities. */
4742 if (bitpos + bitsize > str_bitsize)
4743 return false;
4744
4745 if (reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
4746 bitpos = str_bitsize - bitpos - bitsize;
4747
4748 switch (code)
4749 {
4750 case PLUS_EXPR:
4751 case MINUS_EXPR:
4752 /* For now, just optimize the case of the topmost bitfield
4753 where we don't need to do any masking and also
4754 1 bit bitfields where xor can be used.
4755 We might win by one instruction for the other bitfields
4756 too if insv/extv instructions aren't used, so that
4757 can be added later. */
4758 if ((reverse || bitpos + bitsize != str_bitsize)
4759 && (bitsize != 1 || TREE_CODE (op1) != INTEGER_CST))
4760 break;
4761
4762 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4763 value = convert_modes (str_mode,
4764 TYPE_MODE (TREE_TYPE (op1)), value,
4765 TYPE_UNSIGNED (TREE_TYPE (op1)));
4766
4767 /* We may be accessing data outside the field, which means
4768 we can alias adjacent data. */
4769 if (MEM_P (str_rtx))
4770 {
4771 str_rtx = shallow_copy_rtx (str_rtx);
4772 set_mem_alias_set (str_rtx, 0);
4773 set_mem_expr (str_rtx, 0);
4774 }
4775
4776 if (bitsize == 1 && (reverse || bitpos + bitsize != str_bitsize))
4777 {
4778 value = expand_and (str_mode, value, const1_rtx, NULL);
4779 binop = xor_optab;
4780 }
4781 else
4782 binop = code == PLUS_EXPR ? add_optab : sub_optab;
4783
4784 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4785 if (reverse)
4786 value = flip_storage_order (str_mode, value);
4787 result = expand_binop (str_mode, binop, str_rtx,
4788 value, str_rtx, 1, OPTAB_WIDEN);
4789 if (result != str_rtx)
4790 emit_move_insn (str_rtx, result);
4791 return true;
4792
4793 case BIT_IOR_EXPR:
4794 case BIT_XOR_EXPR:
4795 if (TREE_CODE (op1) != INTEGER_CST)
4796 break;
4797 value = expand_expr (op1, NULL_RTX, str_mode, EXPAND_NORMAL);
4798 value = convert_modes (str_mode,
4799 TYPE_MODE (TREE_TYPE (op1)), value,
4800 TYPE_UNSIGNED (TREE_TYPE (op1)));
4801
4802 /* We may be accessing data outside the field, which means
4803 we can alias adjacent data. */
4804 if (MEM_P (str_rtx))
4805 {
4806 str_rtx = shallow_copy_rtx (str_rtx);
4807 set_mem_alias_set (str_rtx, 0);
4808 set_mem_expr (str_rtx, 0);
4809 }
4810
4811 binop = code == BIT_IOR_EXPR ? ior_optab : xor_optab;
4812 if (bitpos + bitsize != str_bitsize)
4813 {
4814 rtx mask = gen_int_mode ((HOST_WIDE_INT_1U << bitsize) - 1,
4815 str_mode);
4816 value = expand_and (str_mode, value, mask, NULL_RTX);
4817 }
4818 value = expand_shift (LSHIFT_EXPR, str_mode, value, bitpos, NULL_RTX, 1);
4819 if (reverse)
4820 value = flip_storage_order (str_mode, value);
4821 result = expand_binop (str_mode, binop, str_rtx,
4822 value, str_rtx, 1, OPTAB_WIDEN);
4823 if (result != str_rtx)
4824 emit_move_insn (str_rtx, result);
4825 return true;
4826
4827 default:
4828 break;
4829 }
4830
4831 return false;
4832 }
4833
4834 /* In the C++ memory model, consecutive bit fields in a structure are
4835 considered one memory location.
4836
4837 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4838 returns the bit range of consecutive bits in which this COMPONENT_REF
4839 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4840 and *OFFSET may be adjusted in the process.
4841
4842 If the access does not need to be restricted, 0 is returned in both
4843 *BITSTART and *BITEND. */
4844
4845 void
get_bit_range(poly_uint64_pod * bitstart,poly_uint64_pod * bitend,tree exp,poly_int64_pod * bitpos,tree * offset)4846 get_bit_range (poly_uint64_pod *bitstart, poly_uint64_pod *bitend, tree exp,
4847 poly_int64_pod *bitpos, tree *offset)
4848 {
4849 poly_int64 bitoffset;
4850 tree field, repr;
4851
4852 gcc_assert (TREE_CODE (exp) == COMPONENT_REF);
4853
4854 field = TREE_OPERAND (exp, 1);
4855 repr = DECL_BIT_FIELD_REPRESENTATIVE (field);
4856 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4857 need to limit the range we can access. */
4858 if (!repr)
4859 {
4860 *bitstart = *bitend = 0;
4861 return;
4862 }
4863
4864 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4865 part of a larger bit field, then the representative does not serve any
4866 useful purpose. This can occur in Ada. */
4867 if (handled_component_p (TREE_OPERAND (exp, 0)))
4868 {
4869 machine_mode rmode;
4870 poly_int64 rbitsize, rbitpos;
4871 tree roffset;
4872 int unsignedp, reversep, volatilep = 0;
4873 get_inner_reference (TREE_OPERAND (exp, 0), &rbitsize, &rbitpos,
4874 &roffset, &rmode, &unsignedp, &reversep,
4875 &volatilep);
4876 if (!multiple_p (rbitpos, BITS_PER_UNIT))
4877 {
4878 *bitstart = *bitend = 0;
4879 return;
4880 }
4881 }
4882
4883 /* Compute the adjustment to bitpos from the offset of the field
4884 relative to the representative. DECL_FIELD_OFFSET of field and
4885 repr are the same by construction if they are not constants,
4886 see finish_bitfield_layout. */
4887 poly_uint64 field_offset, repr_offset;
4888 if (poly_int_tree_p (DECL_FIELD_OFFSET (field), &field_offset)
4889 && poly_int_tree_p (DECL_FIELD_OFFSET (repr), &repr_offset))
4890 bitoffset = (field_offset - repr_offset) * BITS_PER_UNIT;
4891 else
4892 bitoffset = 0;
4893 bitoffset += (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field))
4894 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr)));
4895
4896 /* If the adjustment is larger than bitpos, we would have a negative bit
4897 position for the lower bound and this may wreak havoc later. Adjust
4898 offset and bitpos to make the lower bound non-negative in that case. */
4899 if (maybe_gt (bitoffset, *bitpos))
4900 {
4901 poly_int64 adjust_bits = upper_bound (bitoffset, *bitpos) - *bitpos;
4902 poly_int64 adjust_bytes = exact_div (adjust_bits, BITS_PER_UNIT);
4903
4904 *bitpos += adjust_bits;
4905 if (*offset == NULL_TREE)
4906 *offset = size_int (-adjust_bytes);
4907 else
4908 *offset = size_binop (MINUS_EXPR, *offset, size_int (adjust_bytes));
4909 *bitstart = 0;
4910 }
4911 else
4912 *bitstart = *bitpos - bitoffset;
4913
4914 *bitend = *bitstart + tree_to_uhwi (DECL_SIZE (repr)) - 1;
4915 }
4916
4917 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4918 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4919 DECL_RTL was not set yet, return NORTL. */
4920
4921 static inline bool
addr_expr_of_non_mem_decl_p_1(tree addr,bool nortl)4922 addr_expr_of_non_mem_decl_p_1 (tree addr, bool nortl)
4923 {
4924 if (TREE_CODE (addr) != ADDR_EXPR)
4925 return false;
4926
4927 tree base = TREE_OPERAND (addr, 0);
4928
4929 if (!DECL_P (base)
4930 || TREE_ADDRESSABLE (base)
4931 || DECL_MODE (base) == BLKmode)
4932 return false;
4933
4934 if (!DECL_RTL_SET_P (base))
4935 return nortl;
4936
4937 return (!MEM_P (DECL_RTL (base)));
4938 }
4939
4940 /* Returns true if the MEM_REF REF refers to an object that does not
4941 reside in memory and has non-BLKmode. */
4942
4943 static inline bool
mem_ref_refers_to_non_mem_p(tree ref)4944 mem_ref_refers_to_non_mem_p (tree ref)
4945 {
4946 tree base = TREE_OPERAND (ref, 0);
4947 return addr_expr_of_non_mem_decl_p_1 (base, false);
4948 }
4949
4950 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4951 is true, try generating a nontemporal store. */
4952
4953 void
expand_assignment(tree to,tree from,bool nontemporal)4954 expand_assignment (tree to, tree from, bool nontemporal)
4955 {
4956 rtx to_rtx = 0;
4957 rtx result;
4958 machine_mode mode;
4959 unsigned int align;
4960 enum insn_code icode;
4961
4962 /* Don't crash if the lhs of the assignment was erroneous. */
4963 if (TREE_CODE (to) == ERROR_MARK)
4964 {
4965 expand_normal (from);
4966 return;
4967 }
4968
4969 /* Optimize away no-op moves without side-effects. */
4970 if (operand_equal_p (to, from, 0))
4971 return;
4972
4973 /* Handle misaligned stores. */
4974 mode = TYPE_MODE (TREE_TYPE (to));
4975 if ((TREE_CODE (to) == MEM_REF
4976 || TREE_CODE (to) == TARGET_MEM_REF)
4977 && mode != BLKmode
4978 && !mem_ref_refers_to_non_mem_p (to)
4979 && ((align = get_object_alignment (to))
4980 < GET_MODE_ALIGNMENT (mode))
4981 && (((icode = optab_handler (movmisalign_optab, mode))
4982 != CODE_FOR_nothing)
4983 || targetm.slow_unaligned_access (mode, align)))
4984 {
4985 rtx reg, mem;
4986
4987 reg = expand_expr (from, NULL_RTX, VOIDmode, EXPAND_NORMAL);
4988 reg = force_not_mem (reg);
4989 mem = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
4990 if (TREE_CODE (to) == MEM_REF && REF_REVERSE_STORAGE_ORDER (to))
4991 reg = flip_storage_order (mode, reg);
4992
4993 if (icode != CODE_FOR_nothing)
4994 {
4995 struct expand_operand ops[2];
4996
4997 create_fixed_operand (&ops[0], mem);
4998 create_input_operand (&ops[1], reg, mode);
4999 /* The movmisalign<mode> pattern cannot fail, else the assignment
5000 would silently be omitted. */
5001 expand_insn (icode, 2, ops);
5002 }
5003 else
5004 store_bit_field (mem, GET_MODE_BITSIZE (mode), 0, 0, 0, mode, reg,
5005 false);
5006 return;
5007 }
5008
5009 /* Assignment of a structure component needs special treatment
5010 if the structure component's rtx is not simply a MEM.
5011 Assignment of an array element at a constant index, and assignment of
5012 an array element in an unaligned packed structure field, has the same
5013 problem. Same for (partially) storing into a non-memory object. */
5014 if (handled_component_p (to)
5015 || (TREE_CODE (to) == MEM_REF
5016 && (REF_REVERSE_STORAGE_ORDER (to)
5017 || mem_ref_refers_to_non_mem_p (to)))
5018 || TREE_CODE (TREE_TYPE (to)) == ARRAY_TYPE)
5019 {
5020 machine_mode mode1;
5021 poly_int64 bitsize, bitpos;
5022 poly_uint64 bitregion_start = 0;
5023 poly_uint64 bitregion_end = 0;
5024 tree offset;
5025 int unsignedp, reversep, volatilep = 0;
5026 tree tem;
5027
5028 push_temp_slots ();
5029 tem = get_inner_reference (to, &bitsize, &bitpos, &offset, &mode1,
5030 &unsignedp, &reversep, &volatilep);
5031
5032 /* Make sure bitpos is not negative, it can wreak havoc later. */
5033 if (maybe_lt (bitpos, 0))
5034 {
5035 gcc_assert (offset == NULL_TREE);
5036 offset = size_int (bits_to_bytes_round_down (bitpos));
5037 bitpos = num_trailing_bits (bitpos);
5038 }
5039
5040 if (TREE_CODE (to) == COMPONENT_REF
5041 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to, 1)))
5042 get_bit_range (&bitregion_start, &bitregion_end, to, &bitpos, &offset);
5043 /* The C++ memory model naturally applies to byte-aligned fields.
5044 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5045 BITSIZE are not byte-aligned, there is no need to limit the range
5046 we can access. This can occur with packed structures in Ada. */
5047 else if (maybe_gt (bitsize, 0)
5048 && multiple_p (bitsize, BITS_PER_UNIT)
5049 && multiple_p (bitpos, BITS_PER_UNIT))
5050 {
5051 bitregion_start = bitpos;
5052 bitregion_end = bitpos + bitsize - 1;
5053 }
5054
5055 to_rtx = expand_expr (tem, NULL_RTX, VOIDmode, EXPAND_WRITE);
5056
5057 /* If the field has a mode, we want to access it in the
5058 field's mode, not the computed mode.
5059 If a MEM has VOIDmode (external with incomplete type),
5060 use BLKmode for it instead. */
5061 if (MEM_P (to_rtx))
5062 {
5063 if (mode1 != VOIDmode)
5064 to_rtx = adjust_address (to_rtx, mode1, 0);
5065 else if (GET_MODE (to_rtx) == VOIDmode)
5066 to_rtx = adjust_address (to_rtx, BLKmode, 0);
5067 }
5068
5069 if (offset != 0)
5070 {
5071 machine_mode address_mode;
5072 rtx offset_rtx;
5073
5074 if (!MEM_P (to_rtx))
5075 {
5076 /* We can get constant negative offsets into arrays with broken
5077 user code. Translate this to a trap instead of ICEing. */
5078 gcc_assert (TREE_CODE (offset) == INTEGER_CST);
5079 expand_builtin_trap ();
5080 to_rtx = gen_rtx_MEM (BLKmode, const0_rtx);
5081 }
5082
5083 offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode, EXPAND_SUM);
5084 address_mode = get_address_mode (to_rtx);
5085 if (GET_MODE (offset_rtx) != address_mode)
5086 {
5087 /* We cannot be sure that the RTL in offset_rtx is valid outside
5088 of a memory address context, so force it into a register
5089 before attempting to convert it to the desired mode. */
5090 offset_rtx = force_operand (offset_rtx, NULL_RTX);
5091 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
5092 }
5093
5094 /* If we have an expression in OFFSET_RTX and a non-zero
5095 byte offset in BITPOS, adding the byte offset before the
5096 OFFSET_RTX results in better intermediate code, which makes
5097 later rtl optimization passes perform better.
5098
5099 We prefer intermediate code like this:
5100
5101 r124:DI=r123:DI+0x18
5102 [r124:DI]=r121:DI
5103
5104 ... instead of ...
5105
5106 r124:DI=r123:DI+0x10
5107 [r124:DI+0x8]=r121:DI
5108
5109 This is only done for aligned data values, as these can
5110 be expected to result in single move instructions. */
5111 poly_int64 bytepos;
5112 if (mode1 != VOIDmode
5113 && maybe_ne (bitpos, 0)
5114 && maybe_gt (bitsize, 0)
5115 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
5116 && multiple_p (bitpos, bitsize)
5117 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
5118 && MEM_ALIGN (to_rtx) >= GET_MODE_ALIGNMENT (mode1))
5119 {
5120 to_rtx = adjust_address (to_rtx, mode1, bytepos);
5121 bitregion_start = 0;
5122 if (known_ge (bitregion_end, poly_uint64 (bitpos)))
5123 bitregion_end -= bitpos;
5124 bitpos = 0;
5125 }
5126
5127 to_rtx = offset_address (to_rtx, offset_rtx,
5128 highest_pow2_factor_for_target (to,
5129 offset));
5130 }
5131
5132 /* No action is needed if the target is not a memory and the field
5133 lies completely outside that target. This can occur if the source
5134 code contains an out-of-bounds access to a small array. */
5135 if (!MEM_P (to_rtx)
5136 && GET_MODE (to_rtx) != BLKmode
5137 && known_ge (bitpos, GET_MODE_PRECISION (GET_MODE (to_rtx))))
5138 {
5139 expand_normal (from);
5140 result = NULL;
5141 }
5142 /* Handle expand_expr of a complex value returning a CONCAT. */
5143 else if (GET_CODE (to_rtx) == CONCAT)
5144 {
5145 machine_mode to_mode = GET_MODE (to_rtx);
5146 gcc_checking_assert (COMPLEX_MODE_P (to_mode));
5147 poly_int64 mode_bitsize = GET_MODE_BITSIZE (to_mode);
5148 unsigned short inner_bitsize = GET_MODE_UNIT_BITSIZE (to_mode);
5149 if (TYPE_MODE (TREE_TYPE (from)) == to_mode
5150 && known_eq (bitpos, 0)
5151 && known_eq (bitsize, mode_bitsize))
5152 result = store_expr (from, to_rtx, false, nontemporal, reversep);
5153 else if (TYPE_MODE (TREE_TYPE (from)) == GET_MODE_INNER (to_mode)
5154 && known_eq (bitsize, inner_bitsize)
5155 && (known_eq (bitpos, 0)
5156 || known_eq (bitpos, inner_bitsize)))
5157 result = store_expr (from, XEXP (to_rtx, maybe_ne (bitpos, 0)),
5158 false, nontemporal, reversep);
5159 else if (known_le (bitpos + bitsize, inner_bitsize))
5160 result = store_field (XEXP (to_rtx, 0), bitsize, bitpos,
5161 bitregion_start, bitregion_end,
5162 mode1, from, get_alias_set (to),
5163 nontemporal, reversep);
5164 else if (known_ge (bitpos, inner_bitsize))
5165 result = store_field (XEXP (to_rtx, 1), bitsize,
5166 bitpos - inner_bitsize,
5167 bitregion_start, bitregion_end,
5168 mode1, from, get_alias_set (to),
5169 nontemporal, reversep);
5170 else if (known_eq (bitpos, 0) && known_eq (bitsize, mode_bitsize))
5171 {
5172 result = expand_normal (from);
5173 if (GET_CODE (result) == CONCAT)
5174 {
5175 to_mode = GET_MODE_INNER (to_mode);
5176 machine_mode from_mode = GET_MODE_INNER (GET_MODE (result));
5177 rtx from_real
5178 = simplify_gen_subreg (to_mode, XEXP (result, 0),
5179 from_mode, 0);
5180 rtx from_imag
5181 = simplify_gen_subreg (to_mode, XEXP (result, 1),
5182 from_mode, 0);
5183 if (!from_real || !from_imag)
5184 goto concat_store_slow;
5185 emit_move_insn (XEXP (to_rtx, 0), from_real);
5186 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5187 }
5188 else
5189 {
5190 rtx from_rtx;
5191 if (MEM_P (result))
5192 from_rtx = change_address (result, to_mode, NULL_RTX);
5193 else
5194 from_rtx
5195 = simplify_gen_subreg (to_mode, result,
5196 TYPE_MODE (TREE_TYPE (from)), 0);
5197 if (from_rtx)
5198 {
5199 emit_move_insn (XEXP (to_rtx, 0),
5200 read_complex_part (from_rtx, false));
5201 emit_move_insn (XEXP (to_rtx, 1),
5202 read_complex_part (from_rtx, true));
5203 }
5204 else
5205 {
5206 machine_mode to_mode
5207 = GET_MODE_INNER (GET_MODE (to_rtx));
5208 rtx from_real
5209 = simplify_gen_subreg (to_mode, result,
5210 TYPE_MODE (TREE_TYPE (from)),
5211 0);
5212 rtx from_imag
5213 = simplify_gen_subreg (to_mode, result,
5214 TYPE_MODE (TREE_TYPE (from)),
5215 GET_MODE_SIZE (to_mode));
5216 if (!from_real || !from_imag)
5217 goto concat_store_slow;
5218 emit_move_insn (XEXP (to_rtx, 0), from_real);
5219 emit_move_insn (XEXP (to_rtx, 1), from_imag);
5220 }
5221 }
5222 }
5223 else
5224 {
5225 concat_store_slow:;
5226 rtx temp = assign_stack_temp (to_mode,
5227 GET_MODE_SIZE (GET_MODE (to_rtx)));
5228 write_complex_part (temp, XEXP (to_rtx, 0), false);
5229 write_complex_part (temp, XEXP (to_rtx, 1), true);
5230 result = store_field (temp, bitsize, bitpos,
5231 bitregion_start, bitregion_end,
5232 mode1, from, get_alias_set (to),
5233 nontemporal, reversep);
5234 emit_move_insn (XEXP (to_rtx, 0), read_complex_part (temp, false));
5235 emit_move_insn (XEXP (to_rtx, 1), read_complex_part (temp, true));
5236 }
5237 }
5238 /* For calls to functions returning variable length structures, if TO_RTX
5239 is not a MEM, go through a MEM because we must not create temporaries
5240 of the VLA type. */
5241 else if (!MEM_P (to_rtx)
5242 && TREE_CODE (from) == CALL_EXPR
5243 && COMPLETE_TYPE_P (TREE_TYPE (from))
5244 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) != INTEGER_CST)
5245 {
5246 rtx temp = assign_stack_temp (GET_MODE (to_rtx),
5247 GET_MODE_SIZE (GET_MODE (to_rtx)));
5248 result = store_field (temp, bitsize, bitpos, bitregion_start,
5249 bitregion_end, mode1, from, get_alias_set (to),
5250 nontemporal, reversep);
5251 emit_move_insn (to_rtx, temp);
5252 }
5253 else
5254 {
5255 if (MEM_P (to_rtx))
5256 {
5257 /* If the field is at offset zero, we could have been given the
5258 DECL_RTX of the parent struct. Don't munge it. */
5259 to_rtx = shallow_copy_rtx (to_rtx);
5260 set_mem_attributes_minus_bitpos (to_rtx, to, 0, bitpos);
5261 if (volatilep)
5262 MEM_VOLATILE_P (to_rtx) = 1;
5263 }
5264
5265 gcc_checking_assert (known_ge (bitpos, 0));
5266 if (optimize_bitfield_assignment_op (bitsize, bitpos,
5267 bitregion_start, bitregion_end,
5268 mode1, to_rtx, to, from,
5269 reversep))
5270 result = NULL;
5271 else
5272 result = store_field (to_rtx, bitsize, bitpos,
5273 bitregion_start, bitregion_end,
5274 mode1, from, get_alias_set (to),
5275 nontemporal, reversep);
5276 }
5277
5278 if (result)
5279 preserve_temp_slots (result);
5280 pop_temp_slots ();
5281 return;
5282 }
5283
5284 /* If the rhs is a function call and its value is not an aggregate,
5285 call the function before we start to compute the lhs.
5286 This is needed for correct code for cases such as
5287 val = setjmp (buf) on machines where reference to val
5288 requires loading up part of an address in a separate insn.
5289
5290 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5291 since it might be a promoted variable where the zero- or sign- extension
5292 needs to be done. Handling this in the normal way is safe because no
5293 computation is done before the call. The same is true for SSA names. */
5294 if (TREE_CODE (from) == CALL_EXPR && ! aggregate_value_p (from, from)
5295 && COMPLETE_TYPE_P (TREE_TYPE (from))
5296 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from))) == INTEGER_CST
5297 && ! (((VAR_P (to)
5298 || TREE_CODE (to) == PARM_DECL
5299 || TREE_CODE (to) == RESULT_DECL)
5300 && REG_P (DECL_RTL (to)))
5301 || TREE_CODE (to) == SSA_NAME))
5302 {
5303 rtx value;
5304 rtx bounds;
5305
5306 push_temp_slots ();
5307 value = expand_normal (from);
5308
5309 /* Split value and bounds to store them separately. */
5310 chkp_split_slot (value, &value, &bounds);
5311
5312 if (to_rtx == 0)
5313 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5314
5315 /* Handle calls that return values in multiple non-contiguous locations.
5316 The Irix 6 ABI has examples of this. */
5317 if (GET_CODE (to_rtx) == PARALLEL)
5318 {
5319 if (GET_CODE (value) == PARALLEL)
5320 emit_group_move (to_rtx, value);
5321 else
5322 emit_group_load (to_rtx, value, TREE_TYPE (from),
5323 int_size_in_bytes (TREE_TYPE (from)));
5324 }
5325 else if (GET_CODE (value) == PARALLEL)
5326 emit_group_store (to_rtx, value, TREE_TYPE (from),
5327 int_size_in_bytes (TREE_TYPE (from)));
5328 else if (GET_MODE (to_rtx) == BLKmode)
5329 {
5330 /* Handle calls that return BLKmode values in registers. */
5331 if (REG_P (value))
5332 copy_blkmode_from_reg (to_rtx, value, TREE_TYPE (from));
5333 else
5334 emit_block_move (to_rtx, value, expr_size (from), BLOCK_OP_NORMAL);
5335 }
5336 else
5337 {
5338 if (POINTER_TYPE_P (TREE_TYPE (to)))
5339 value = convert_memory_address_addr_space
5340 (as_a <scalar_int_mode> (GET_MODE (to_rtx)), value,
5341 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to))));
5342
5343 emit_move_insn (to_rtx, value);
5344 }
5345
5346 /* Store bounds if required. */
5347 if (bounds
5348 && (BOUNDED_P (to) || chkp_type_has_pointer (TREE_TYPE (to))))
5349 {
5350 gcc_assert (MEM_P (to_rtx));
5351 chkp_emit_bounds_store (bounds, value, to_rtx);
5352 }
5353
5354 preserve_temp_slots (to_rtx);
5355 pop_temp_slots ();
5356 return;
5357 }
5358
5359 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5360 to_rtx = expand_expr (to, NULL_RTX, VOIDmode, EXPAND_WRITE);
5361
5362 /* Don't move directly into a return register. */
5363 if (TREE_CODE (to) == RESULT_DECL
5364 && (REG_P (to_rtx) || GET_CODE (to_rtx) == PARALLEL))
5365 {
5366 rtx temp;
5367
5368 push_temp_slots ();
5369
5370 /* If the source is itself a return value, it still is in a pseudo at
5371 this point so we can move it back to the return register directly. */
5372 if (REG_P (to_rtx)
5373 && TYPE_MODE (TREE_TYPE (from)) == BLKmode
5374 && TREE_CODE (from) != CALL_EXPR)
5375 temp = copy_blkmode_to_reg (GET_MODE (to_rtx), from);
5376 else
5377 temp = expand_expr (from, NULL_RTX, GET_MODE (to_rtx), EXPAND_NORMAL);
5378
5379 /* Handle calls that return values in multiple non-contiguous locations.
5380 The Irix 6 ABI has examples of this. */
5381 if (GET_CODE (to_rtx) == PARALLEL)
5382 {
5383 if (GET_CODE (temp) == PARALLEL)
5384 emit_group_move (to_rtx, temp);
5385 else
5386 emit_group_load (to_rtx, temp, TREE_TYPE (from),
5387 int_size_in_bytes (TREE_TYPE (from)));
5388 }
5389 else if (temp)
5390 emit_move_insn (to_rtx, temp);
5391
5392 preserve_temp_slots (to_rtx);
5393 pop_temp_slots ();
5394 return;
5395 }
5396
5397 /* In case we are returning the contents of an object which overlaps
5398 the place the value is being stored, use a safe function when copying
5399 a value through a pointer into a structure value return block. */
5400 if (TREE_CODE (to) == RESULT_DECL
5401 && TREE_CODE (from) == INDIRECT_REF
5402 && ADDR_SPACE_GENERIC_P
5403 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from, 0)))))
5404 && refs_may_alias_p (to, from)
5405 && cfun->returns_struct
5406 && !cfun->returns_pcc_struct)
5407 {
5408 rtx from_rtx, size;
5409
5410 push_temp_slots ();
5411 size = expr_size (from);
5412 from_rtx = expand_normal (from);
5413
5414 emit_block_move_via_libcall (XEXP (to_rtx, 0), XEXP (from_rtx, 0), size);
5415
5416 preserve_temp_slots (to_rtx);
5417 pop_temp_slots ();
5418 return;
5419 }
5420
5421 /* Compute FROM and store the value in the rtx we got. */
5422
5423 push_temp_slots ();
5424 result = store_expr_with_bounds (from, to_rtx, 0, nontemporal, false, to);
5425 preserve_temp_slots (result);
5426 pop_temp_slots ();
5427 return;
5428 }
5429
5430 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5431 succeeded, false otherwise. */
5432
5433 bool
emit_storent_insn(rtx to,rtx from)5434 emit_storent_insn (rtx to, rtx from)
5435 {
5436 struct expand_operand ops[2];
5437 machine_mode mode = GET_MODE (to);
5438 enum insn_code code = optab_handler (storent_optab, mode);
5439
5440 if (code == CODE_FOR_nothing)
5441 return false;
5442
5443 create_fixed_operand (&ops[0], to);
5444 create_input_operand (&ops[1], from, mode);
5445 return maybe_expand_insn (code, 2, ops);
5446 }
5447
5448 /* Generate code for computing expression EXP,
5449 and storing the value into TARGET.
5450
5451 If the mode is BLKmode then we may return TARGET itself.
5452 It turns out that in BLKmode it doesn't cause a problem.
5453 because C has no operators that could combine two different
5454 assignments into the same BLKmode object with different values
5455 with no sequence point. Will other languages need this to
5456 be more thorough?
5457
5458 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5459 stack, and block moves may need to be treated specially.
5460
5461 If NONTEMPORAL is true, try using a nontemporal store instruction.
5462
5463 If REVERSE is true, the store is to be done in reverse order.
5464
5465 If BTARGET is not NULL then computed bounds of EXP are
5466 associated with BTARGET. */
5467
5468 rtx
store_expr_with_bounds(tree exp,rtx target,int call_param_p,bool nontemporal,bool reverse,tree btarget)5469 store_expr_with_bounds (tree exp, rtx target, int call_param_p,
5470 bool nontemporal, bool reverse, tree btarget)
5471 {
5472 rtx temp;
5473 rtx alt_rtl = NULL_RTX;
5474 location_t loc = curr_insn_location ();
5475
5476 if (VOID_TYPE_P (TREE_TYPE (exp)))
5477 {
5478 /* C++ can generate ?: expressions with a throw expression in one
5479 branch and an rvalue in the other. Here, we resolve attempts to
5480 store the throw expression's nonexistent result. */
5481 gcc_assert (!call_param_p);
5482 expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
5483 return NULL_RTX;
5484 }
5485 if (TREE_CODE (exp) == COMPOUND_EXPR)
5486 {
5487 /* Perform first part of compound expression, then assign from second
5488 part. */
5489 expand_expr (TREE_OPERAND (exp, 0), const0_rtx, VOIDmode,
5490 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5491 return store_expr_with_bounds (TREE_OPERAND (exp, 1), target,
5492 call_param_p, nontemporal, reverse,
5493 btarget);
5494 }
5495 else if (TREE_CODE (exp) == COND_EXPR && GET_MODE (target) == BLKmode)
5496 {
5497 /* For conditional expression, get safe form of the target. Then
5498 test the condition, doing the appropriate assignment on either
5499 side. This avoids the creation of unnecessary temporaries.
5500 For non-BLKmode, it is more efficient not to do this. */
5501
5502 rtx_code_label *lab1 = gen_label_rtx (), *lab2 = gen_label_rtx ();
5503
5504 do_pending_stack_adjust ();
5505 NO_DEFER_POP;
5506 jumpifnot (TREE_OPERAND (exp, 0), lab1,
5507 profile_probability::uninitialized ());
5508 store_expr_with_bounds (TREE_OPERAND (exp, 1), target, call_param_p,
5509 nontemporal, reverse, btarget);
5510 emit_jump_insn (targetm.gen_jump (lab2));
5511 emit_barrier ();
5512 emit_label (lab1);
5513 store_expr_with_bounds (TREE_OPERAND (exp, 2), target, call_param_p,
5514 nontemporal, reverse, btarget);
5515 emit_label (lab2);
5516 OK_DEFER_POP;
5517
5518 return NULL_RTX;
5519 }
5520 else if (GET_CODE (target) == SUBREG && SUBREG_PROMOTED_VAR_P (target))
5521 /* If this is a scalar in a register that is stored in a wider mode
5522 than the declared mode, compute the result into its declared mode
5523 and then convert to the wider mode. Our value is the computed
5524 expression. */
5525 {
5526 rtx inner_target = 0;
5527 scalar_int_mode outer_mode = subreg_unpromoted_mode (target);
5528 scalar_int_mode inner_mode = subreg_promoted_mode (target);
5529
5530 /* We can do the conversion inside EXP, which will often result
5531 in some optimizations. Do the conversion in two steps: first
5532 change the signedness, if needed, then the extend. But don't
5533 do this if the type of EXP is a subtype of something else
5534 since then the conversion might involve more than just
5535 converting modes. */
5536 if (INTEGRAL_TYPE_P (TREE_TYPE (exp))
5537 && TREE_TYPE (TREE_TYPE (exp)) == 0
5538 && GET_MODE_PRECISION (outer_mode)
5539 == TYPE_PRECISION (TREE_TYPE (exp)))
5540 {
5541 if (!SUBREG_CHECK_PROMOTED_SIGN (target,
5542 TYPE_UNSIGNED (TREE_TYPE (exp))))
5543 {
5544 /* Some types, e.g. Fortran's logical*4, won't have a signed
5545 version, so use the mode instead. */
5546 tree ntype
5547 = (signed_or_unsigned_type_for
5548 (SUBREG_PROMOTED_SIGN (target), TREE_TYPE (exp)));
5549 if (ntype == NULL)
5550 ntype = lang_hooks.types.type_for_mode
5551 (TYPE_MODE (TREE_TYPE (exp)),
5552 SUBREG_PROMOTED_SIGN (target));
5553
5554 exp = fold_convert_loc (loc, ntype, exp);
5555 }
5556
5557 exp = fold_convert_loc (loc, lang_hooks.types.type_for_mode
5558 (inner_mode, SUBREG_PROMOTED_SIGN (target)),
5559 exp);
5560
5561 inner_target = SUBREG_REG (target);
5562 }
5563
5564 temp = expand_expr (exp, inner_target, VOIDmode,
5565 call_param_p ? EXPAND_STACK_PARM : EXPAND_NORMAL);
5566
5567 /* Handle bounds returned by call. */
5568 if (TREE_CODE (exp) == CALL_EXPR)
5569 {
5570 rtx bounds;
5571 chkp_split_slot (temp, &temp, &bounds);
5572 if (bounds && btarget)
5573 {
5574 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5575 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5576 chkp_set_rtl_bounds (btarget, tmp);
5577 }
5578 }
5579
5580 /* If TEMP is a VOIDmode constant, use convert_modes to make
5581 sure that we properly convert it. */
5582 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode)
5583 {
5584 temp = convert_modes (outer_mode, TYPE_MODE (TREE_TYPE (exp)),
5585 temp, SUBREG_PROMOTED_SIGN (target));
5586 temp = convert_modes (inner_mode, outer_mode, temp,
5587 SUBREG_PROMOTED_SIGN (target));
5588 }
5589
5590 convert_move (SUBREG_REG (target), temp,
5591 SUBREG_PROMOTED_SIGN (target));
5592
5593 return NULL_RTX;
5594 }
5595 else if ((TREE_CODE (exp) == STRING_CST
5596 || (TREE_CODE (exp) == MEM_REF
5597 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
5598 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
5599 == STRING_CST
5600 && integer_zerop (TREE_OPERAND (exp, 1))))
5601 && !nontemporal && !call_param_p
5602 && MEM_P (target))
5603 {
5604 /* Optimize initialization of an array with a STRING_CST. */
5605 HOST_WIDE_INT exp_len, str_copy_len;
5606 rtx dest_mem;
5607 tree str = TREE_CODE (exp) == STRING_CST
5608 ? exp : TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
5609
5610 exp_len = int_expr_size (exp);
5611 if (exp_len <= 0)
5612 goto normal_expr;
5613
5614 if (TREE_STRING_LENGTH (str) <= 0)
5615 goto normal_expr;
5616
5617 str_copy_len = strlen (TREE_STRING_POINTER (str));
5618 if (str_copy_len < TREE_STRING_LENGTH (str) - 1)
5619 goto normal_expr;
5620
5621 str_copy_len = TREE_STRING_LENGTH (str);
5622 if ((STORE_MAX_PIECES & (STORE_MAX_PIECES - 1)) == 0
5623 && TREE_STRING_POINTER (str)[TREE_STRING_LENGTH (str) - 1] == '\0')
5624 {
5625 str_copy_len += STORE_MAX_PIECES - 1;
5626 str_copy_len &= ~(STORE_MAX_PIECES - 1);
5627 }
5628 str_copy_len = MIN (str_copy_len, exp_len);
5629 if (!can_store_by_pieces (str_copy_len, builtin_strncpy_read_str,
5630 CONST_CAST (char *, TREE_STRING_POINTER (str)),
5631 MEM_ALIGN (target), false))
5632 goto normal_expr;
5633
5634 dest_mem = target;
5635
5636 dest_mem = store_by_pieces (dest_mem,
5637 str_copy_len, builtin_strncpy_read_str,
5638 CONST_CAST (char *,
5639 TREE_STRING_POINTER (str)),
5640 MEM_ALIGN (target), false,
5641 exp_len > str_copy_len ? 1 : 0);
5642 if (exp_len > str_copy_len)
5643 clear_storage (adjust_address (dest_mem, BLKmode, 0),
5644 GEN_INT (exp_len - str_copy_len),
5645 BLOCK_OP_NORMAL);
5646 return NULL_RTX;
5647 }
5648 else
5649 {
5650 rtx tmp_target;
5651
5652 normal_expr:
5653 /* If we want to use a nontemporal or a reverse order store, force the
5654 value into a register first. */
5655 tmp_target = nontemporal || reverse ? NULL_RTX : target;
5656 temp = expand_expr_real (exp, tmp_target, GET_MODE (target),
5657 (call_param_p
5658 ? EXPAND_STACK_PARM : EXPAND_NORMAL),
5659 &alt_rtl, false);
5660
5661 /* Handle bounds returned by call. */
5662 if (TREE_CODE (exp) == CALL_EXPR)
5663 {
5664 rtx bounds;
5665 chkp_split_slot (temp, &temp, &bounds);
5666 if (bounds && btarget)
5667 {
5668 gcc_assert (TREE_CODE (btarget) == SSA_NAME);
5669 rtx tmp = targetm.calls.load_returned_bounds (bounds);
5670 chkp_set_rtl_bounds (btarget, tmp);
5671 }
5672 }
5673 }
5674
5675 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5676 the same as that of TARGET, adjust the constant. This is needed, for
5677 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5678 only a word-sized value. */
5679 if (CONSTANT_P (temp) && GET_MODE (temp) == VOIDmode
5680 && TREE_CODE (exp) != ERROR_MARK
5681 && GET_MODE (target) != TYPE_MODE (TREE_TYPE (exp)))
5682 {
5683 if (GET_MODE_CLASS (GET_MODE (target))
5684 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp)))
5685 && known_eq (GET_MODE_BITSIZE (GET_MODE (target)),
5686 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp)))))
5687 {
5688 rtx t = simplify_gen_subreg (GET_MODE (target), temp,
5689 TYPE_MODE (TREE_TYPE (exp)), 0);
5690 if (t)
5691 temp = t;
5692 }
5693 if (GET_MODE (temp) == VOIDmode)
5694 temp = convert_modes (GET_MODE (target), TYPE_MODE (TREE_TYPE (exp)),
5695 temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5696 }
5697
5698 /* If value was not generated in the target, store it there.
5699 Convert the value to TARGET's type first if necessary and emit the
5700 pending incrementations that have been queued when expanding EXP.
5701 Note that we cannot emit the whole queue blindly because this will
5702 effectively disable the POST_INC optimization later.
5703
5704 If TEMP and TARGET compare equal according to rtx_equal_p, but
5705 one or both of them are volatile memory refs, we have to distinguish
5706 two cases:
5707 - expand_expr has used TARGET. In this case, we must not generate
5708 another copy. This can be detected by TARGET being equal according
5709 to == .
5710 - expand_expr has not used TARGET - that means that the source just
5711 happens to have the same RTX form. Since temp will have been created
5712 by expand_expr, it will compare unequal according to == .
5713 We must generate a copy in this case, to reach the correct number
5714 of volatile memory references. */
5715
5716 if ((! rtx_equal_p (temp, target)
5717 || (temp != target && (side_effects_p (temp)
5718 || side_effects_p (target))))
5719 && TREE_CODE (exp) != ERROR_MARK
5720 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5721 but TARGET is not valid memory reference, TEMP will differ
5722 from TARGET although it is really the same location. */
5723 && !(alt_rtl
5724 && rtx_equal_p (alt_rtl, target)
5725 && !side_effects_p (alt_rtl)
5726 && !side_effects_p (target))
5727 /* If there's nothing to copy, don't bother. Don't call
5728 expr_size unless necessary, because some front-ends (C++)
5729 expr_size-hook must not be given objects that are not
5730 supposed to be bit-copied or bit-initialized. */
5731 && expr_size (exp) != const0_rtx)
5732 {
5733 if (GET_MODE (temp) != GET_MODE (target) && GET_MODE (temp) != VOIDmode)
5734 {
5735 if (GET_MODE (target) == BLKmode)
5736 {
5737 /* Handle calls that return BLKmode values in registers. */
5738 if (REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
5739 copy_blkmode_from_reg (target, temp, TREE_TYPE (exp));
5740 else
5741 store_bit_field (target,
5742 INTVAL (expr_size (exp)) * BITS_PER_UNIT,
5743 0, 0, 0, GET_MODE (temp), temp, reverse);
5744 }
5745 else
5746 convert_move (target, temp, TYPE_UNSIGNED (TREE_TYPE (exp)));
5747 }
5748
5749 else if (GET_MODE (temp) == BLKmode && TREE_CODE (exp) == STRING_CST)
5750 {
5751 /* Handle copying a string constant into an array. The string
5752 constant may be shorter than the array. So copy just the string's
5753 actual length, and clear the rest. First get the size of the data
5754 type of the string, which is actually the size of the target. */
5755 rtx size = expr_size (exp);
5756
5757 if (CONST_INT_P (size)
5758 && INTVAL (size) < TREE_STRING_LENGTH (exp))
5759 emit_block_move (target, temp, size,
5760 (call_param_p
5761 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5762 else
5763 {
5764 machine_mode pointer_mode
5765 = targetm.addr_space.pointer_mode (MEM_ADDR_SPACE (target));
5766 machine_mode address_mode = get_address_mode (target);
5767
5768 /* Compute the size of the data to copy from the string. */
5769 tree copy_size
5770 = size_binop_loc (loc, MIN_EXPR,
5771 make_tree (sizetype, size),
5772 size_int (TREE_STRING_LENGTH (exp)));
5773 rtx copy_size_rtx
5774 = expand_expr (copy_size, NULL_RTX, VOIDmode,
5775 (call_param_p
5776 ? EXPAND_STACK_PARM : EXPAND_NORMAL));
5777 rtx_code_label *label = 0;
5778
5779 /* Copy that much. */
5780 copy_size_rtx = convert_to_mode (pointer_mode, copy_size_rtx,
5781 TYPE_UNSIGNED (sizetype));
5782 emit_block_move (target, temp, copy_size_rtx,
5783 (call_param_p
5784 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5785
5786 /* Figure out how much is left in TARGET that we have to clear.
5787 Do all calculations in pointer_mode. */
5788 if (CONST_INT_P (copy_size_rtx))
5789 {
5790 size = plus_constant (address_mode, size,
5791 -INTVAL (copy_size_rtx));
5792 target = adjust_address (target, BLKmode,
5793 INTVAL (copy_size_rtx));
5794 }
5795 else
5796 {
5797 size = expand_binop (TYPE_MODE (sizetype), sub_optab, size,
5798 copy_size_rtx, NULL_RTX, 0,
5799 OPTAB_LIB_WIDEN);
5800
5801 if (GET_MODE (copy_size_rtx) != address_mode)
5802 copy_size_rtx = convert_to_mode (address_mode,
5803 copy_size_rtx,
5804 TYPE_UNSIGNED (sizetype));
5805
5806 target = offset_address (target, copy_size_rtx,
5807 highest_pow2_factor (copy_size));
5808 label = gen_label_rtx ();
5809 emit_cmp_and_jump_insns (size, const0_rtx, LT, NULL_RTX,
5810 GET_MODE (size), 0, label);
5811 }
5812
5813 if (size != const0_rtx)
5814 clear_storage (target, size, BLOCK_OP_NORMAL);
5815
5816 if (label)
5817 emit_label (label);
5818 }
5819 }
5820 /* Handle calls that return values in multiple non-contiguous locations.
5821 The Irix 6 ABI has examples of this. */
5822 else if (GET_CODE (target) == PARALLEL)
5823 {
5824 if (GET_CODE (temp) == PARALLEL)
5825 emit_group_move (target, temp);
5826 else
5827 emit_group_load (target, temp, TREE_TYPE (exp),
5828 int_size_in_bytes (TREE_TYPE (exp)));
5829 }
5830 else if (GET_CODE (temp) == PARALLEL)
5831 emit_group_store (target, temp, TREE_TYPE (exp),
5832 int_size_in_bytes (TREE_TYPE (exp)));
5833 else if (GET_MODE (temp) == BLKmode)
5834 emit_block_move (target, temp, expr_size (exp),
5835 (call_param_p
5836 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
5837 /* If we emit a nontemporal store, there is nothing else to do. */
5838 else if (nontemporal && emit_storent_insn (target, temp))
5839 ;
5840 else
5841 {
5842 if (reverse)
5843 temp = flip_storage_order (GET_MODE (target), temp);
5844 temp = force_operand (temp, target);
5845 if (temp != target)
5846 emit_move_insn (target, temp);
5847 }
5848 }
5849
5850 return NULL_RTX;
5851 }
5852
5853 /* Same as store_expr_with_bounds but ignoring bounds of EXP. */
5854 rtx
store_expr(tree exp,rtx target,int call_param_p,bool nontemporal,bool reverse)5855 store_expr (tree exp, rtx target, int call_param_p, bool nontemporal,
5856 bool reverse)
5857 {
5858 return store_expr_with_bounds (exp, target, call_param_p, nontemporal,
5859 reverse, NULL);
5860 }
5861
5862 /* Return true if field F of structure TYPE is a flexible array. */
5863
5864 static bool
flexible_array_member_p(const_tree f,const_tree type)5865 flexible_array_member_p (const_tree f, const_tree type)
5866 {
5867 const_tree tf;
5868
5869 tf = TREE_TYPE (f);
5870 return (DECL_CHAIN (f) == NULL
5871 && TREE_CODE (tf) == ARRAY_TYPE
5872 && TYPE_DOMAIN (tf)
5873 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf))
5874 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf)))
5875 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf))
5876 && int_size_in_bytes (type) >= 0);
5877 }
5878
5879 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5880 must have in order for it to completely initialize a value of type TYPE.
5881 Return -1 if the number isn't known.
5882
5883 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5884
5885 static HOST_WIDE_INT
count_type_elements(const_tree type,bool for_ctor_p)5886 count_type_elements (const_tree type, bool for_ctor_p)
5887 {
5888 switch (TREE_CODE (type))
5889 {
5890 case ARRAY_TYPE:
5891 {
5892 tree nelts;
5893
5894 nelts = array_type_nelts (type);
5895 if (nelts && tree_fits_uhwi_p (nelts))
5896 {
5897 unsigned HOST_WIDE_INT n;
5898
5899 n = tree_to_uhwi (nelts) + 1;
5900 if (n == 0 || for_ctor_p)
5901 return n;
5902 else
5903 return n * count_type_elements (TREE_TYPE (type), false);
5904 }
5905 return for_ctor_p ? -1 : 1;
5906 }
5907
5908 case RECORD_TYPE:
5909 {
5910 unsigned HOST_WIDE_INT n;
5911 tree f;
5912
5913 n = 0;
5914 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5915 if (TREE_CODE (f) == FIELD_DECL)
5916 {
5917 if (!for_ctor_p)
5918 n += count_type_elements (TREE_TYPE (f), false);
5919 else if (!flexible_array_member_p (f, type))
5920 /* Don't count flexible arrays, which are not supposed
5921 to be initialized. */
5922 n += 1;
5923 }
5924
5925 return n;
5926 }
5927
5928 case UNION_TYPE:
5929 case QUAL_UNION_TYPE:
5930 {
5931 tree f;
5932 HOST_WIDE_INT n, m;
5933
5934 gcc_assert (!for_ctor_p);
5935 /* Estimate the number of scalars in each field and pick the
5936 maximum. Other estimates would do instead; the idea is simply
5937 to make sure that the estimate is not sensitive to the ordering
5938 of the fields. */
5939 n = 1;
5940 for (f = TYPE_FIELDS (type); f ; f = DECL_CHAIN (f))
5941 if (TREE_CODE (f) == FIELD_DECL)
5942 {
5943 m = count_type_elements (TREE_TYPE (f), false);
5944 /* If the field doesn't span the whole union, add an extra
5945 scalar for the rest. */
5946 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f)),
5947 TYPE_SIZE (type)) != 1)
5948 m++;
5949 if (n < m)
5950 n = m;
5951 }
5952 return n;
5953 }
5954
5955 case COMPLEX_TYPE:
5956 return 2;
5957
5958 case VECTOR_TYPE:
5959 {
5960 unsigned HOST_WIDE_INT nelts;
5961 if (TYPE_VECTOR_SUBPARTS (type).is_constant (&nelts))
5962 return nelts;
5963 else
5964 return -1;
5965 }
5966
5967 case INTEGER_TYPE:
5968 case REAL_TYPE:
5969 case FIXED_POINT_TYPE:
5970 case ENUMERAL_TYPE:
5971 case BOOLEAN_TYPE:
5972 case POINTER_TYPE:
5973 case OFFSET_TYPE:
5974 case REFERENCE_TYPE:
5975 case NULLPTR_TYPE:
5976 return 1;
5977
5978 case ERROR_MARK:
5979 return 0;
5980
5981 case VOID_TYPE:
5982 case METHOD_TYPE:
5983 case FUNCTION_TYPE:
5984 case LANG_TYPE:
5985 default:
5986 gcc_unreachable ();
5987 }
5988 }
5989
5990 /* Helper for categorize_ctor_elements. Identical interface. */
5991
5992 static bool
categorize_ctor_elements_1(const_tree ctor,HOST_WIDE_INT * p_nz_elts,HOST_WIDE_INT * p_unique_nz_elts,HOST_WIDE_INT * p_init_elts,bool * p_complete)5993 categorize_ctor_elements_1 (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
5994 HOST_WIDE_INT *p_unique_nz_elts,
5995 HOST_WIDE_INT *p_init_elts, bool *p_complete)
5996 {
5997 unsigned HOST_WIDE_INT idx;
5998 HOST_WIDE_INT nz_elts, unique_nz_elts, init_elts, num_fields;
5999 tree value, purpose, elt_type;
6000
6001 /* Whether CTOR is a valid constant initializer, in accordance with what
6002 initializer_constant_valid_p does. If inferred from the constructor
6003 elements, true until proven otherwise. */
6004 bool const_from_elts_p = constructor_static_from_elts_p (ctor);
6005 bool const_p = const_from_elts_p ? true : TREE_STATIC (ctor);
6006
6007 nz_elts = 0;
6008 unique_nz_elts = 0;
6009 init_elts = 0;
6010 num_fields = 0;
6011 elt_type = NULL_TREE;
6012
6013 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor), idx, purpose, value)
6014 {
6015 HOST_WIDE_INT mult = 1;
6016
6017 if (purpose && TREE_CODE (purpose) == RANGE_EXPR)
6018 {
6019 tree lo_index = TREE_OPERAND (purpose, 0);
6020 tree hi_index = TREE_OPERAND (purpose, 1);
6021
6022 if (tree_fits_uhwi_p (lo_index) && tree_fits_uhwi_p (hi_index))
6023 mult = (tree_to_uhwi (hi_index)
6024 - tree_to_uhwi (lo_index) + 1);
6025 }
6026 num_fields += mult;
6027 elt_type = TREE_TYPE (value);
6028
6029 switch (TREE_CODE (value))
6030 {
6031 case CONSTRUCTOR:
6032 {
6033 HOST_WIDE_INT nz = 0, unz = 0, ic = 0;
6034
6035 bool const_elt_p = categorize_ctor_elements_1 (value, &nz, &unz,
6036 &ic, p_complete);
6037
6038 nz_elts += mult * nz;
6039 unique_nz_elts += unz;
6040 init_elts += mult * ic;
6041
6042 if (const_from_elts_p && const_p)
6043 const_p = const_elt_p;
6044 }
6045 break;
6046
6047 case INTEGER_CST:
6048 case REAL_CST:
6049 case FIXED_CST:
6050 if (!initializer_zerop (value))
6051 {
6052 nz_elts += mult;
6053 unique_nz_elts++;
6054 }
6055 init_elts += mult;
6056 break;
6057
6058 case STRING_CST:
6059 nz_elts += mult * TREE_STRING_LENGTH (value);
6060 unique_nz_elts += TREE_STRING_LENGTH (value);
6061 init_elts += mult * TREE_STRING_LENGTH (value);
6062 break;
6063
6064 case COMPLEX_CST:
6065 if (!initializer_zerop (TREE_REALPART (value)))
6066 {
6067 nz_elts += mult;
6068 unique_nz_elts++;
6069 }
6070 if (!initializer_zerop (TREE_IMAGPART (value)))
6071 {
6072 nz_elts += mult;
6073 unique_nz_elts++;
6074 }
6075 init_elts += 2 * mult;
6076 break;
6077
6078 case VECTOR_CST:
6079 {
6080 /* We can only construct constant-length vectors using
6081 CONSTRUCTOR. */
6082 unsigned int nunits = VECTOR_CST_NELTS (value).to_constant ();
6083 for (unsigned int i = 0; i < nunits; ++i)
6084 {
6085 tree v = VECTOR_CST_ELT (value, i);
6086 if (!initializer_zerop (v))
6087 {
6088 nz_elts += mult;
6089 unique_nz_elts++;
6090 }
6091 init_elts += mult;
6092 }
6093 }
6094 break;
6095
6096 default:
6097 {
6098 HOST_WIDE_INT tc = count_type_elements (elt_type, false);
6099 nz_elts += mult * tc;
6100 unique_nz_elts += tc;
6101 init_elts += mult * tc;
6102
6103 if (const_from_elts_p && const_p)
6104 const_p
6105 = initializer_constant_valid_p (value,
6106 elt_type,
6107 TYPE_REVERSE_STORAGE_ORDER
6108 (TREE_TYPE (ctor)))
6109 != NULL_TREE;
6110 }
6111 break;
6112 }
6113 }
6114
6115 if (*p_complete && !complete_ctor_at_level_p (TREE_TYPE (ctor),
6116 num_fields, elt_type))
6117 *p_complete = false;
6118
6119 *p_nz_elts += nz_elts;
6120 *p_unique_nz_elts += unique_nz_elts;
6121 *p_init_elts += init_elts;
6122
6123 return const_p;
6124 }
6125
6126 /* Examine CTOR to discover:
6127 * how many scalar fields are set to nonzero values,
6128 and place it in *P_NZ_ELTS;
6129 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6130 high - low + 1 (this can be useful for callers to determine ctors
6131 that could be cheaply initialized with - perhaps nested - loops
6132 compared to copied from huge read-only data),
6133 and place it in *P_UNIQUE_NZ_ELTS;
6134 * how many scalar fields in total are in CTOR,
6135 and place it in *P_ELT_COUNT.
6136 * whether the constructor is complete -- in the sense that every
6137 meaningful byte is explicitly given a value --
6138 and place it in *P_COMPLETE.
6139
6140 Return whether or not CTOR is a valid static constant initializer, the same
6141 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6142
6143 bool
categorize_ctor_elements(const_tree ctor,HOST_WIDE_INT * p_nz_elts,HOST_WIDE_INT * p_unique_nz_elts,HOST_WIDE_INT * p_init_elts,bool * p_complete)6144 categorize_ctor_elements (const_tree ctor, HOST_WIDE_INT *p_nz_elts,
6145 HOST_WIDE_INT *p_unique_nz_elts,
6146 HOST_WIDE_INT *p_init_elts, bool *p_complete)
6147 {
6148 *p_nz_elts = 0;
6149 *p_unique_nz_elts = 0;
6150 *p_init_elts = 0;
6151 *p_complete = true;
6152
6153 return categorize_ctor_elements_1 (ctor, p_nz_elts, p_unique_nz_elts,
6154 p_init_elts, p_complete);
6155 }
6156
6157 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6158 of which had type LAST_TYPE. Each element was itself a complete
6159 initializer, in the sense that every meaningful byte was explicitly
6160 given a value. Return true if the same is true for the constructor
6161 as a whole. */
6162
6163 bool
complete_ctor_at_level_p(const_tree type,HOST_WIDE_INT num_elts,const_tree last_type)6164 complete_ctor_at_level_p (const_tree type, HOST_WIDE_INT num_elts,
6165 const_tree last_type)
6166 {
6167 if (TREE_CODE (type) == UNION_TYPE
6168 || TREE_CODE (type) == QUAL_UNION_TYPE)
6169 {
6170 if (num_elts == 0)
6171 return false;
6172
6173 gcc_assert (num_elts == 1 && last_type);
6174
6175 /* ??? We could look at each element of the union, and find the
6176 largest element. Which would avoid comparing the size of the
6177 initialized element against any tail padding in the union.
6178 Doesn't seem worth the effort... */
6179 return simple_cst_equal (TYPE_SIZE (type), TYPE_SIZE (last_type)) == 1;
6180 }
6181
6182 return count_type_elements (type, true) == num_elts;
6183 }
6184
6185 /* Return 1 if EXP contains mostly (3/4) zeros. */
6186
6187 static int
mostly_zeros_p(const_tree exp)6188 mostly_zeros_p (const_tree exp)
6189 {
6190 if (TREE_CODE (exp) == CONSTRUCTOR)
6191 {
6192 HOST_WIDE_INT nz_elts, unz_elts, init_elts;
6193 bool complete_p;
6194
6195 categorize_ctor_elements (exp, &nz_elts, &unz_elts, &init_elts,
6196 &complete_p);
6197 return !complete_p || nz_elts < init_elts / 4;
6198 }
6199
6200 return initializer_zerop (exp);
6201 }
6202
6203 /* Return 1 if EXP contains all zeros. */
6204
6205 static int
all_zeros_p(const_tree exp)6206 all_zeros_p (const_tree exp)
6207 {
6208 if (TREE_CODE (exp) == CONSTRUCTOR)
6209 {
6210 HOST_WIDE_INT nz_elts, unz_elts, init_elts;
6211 bool complete_p;
6212
6213 categorize_ctor_elements (exp, &nz_elts, &unz_elts, &init_elts,
6214 &complete_p);
6215 return nz_elts == 0;
6216 }
6217
6218 return initializer_zerop (exp);
6219 }
6220
6221 /* Helper function for store_constructor.
6222 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6223 CLEARED is as for store_constructor.
6224 ALIAS_SET is the alias set to use for any stores.
6225 If REVERSE is true, the store is to be done in reverse order.
6226
6227 This provides a recursive shortcut back to store_constructor when it isn't
6228 necessary to go through store_field. This is so that we can pass through
6229 the cleared field to let store_constructor know that we may not have to
6230 clear a substructure if the outer structure has already been cleared. */
6231
6232 static void
store_constructor_field(rtx target,poly_uint64 bitsize,poly_int64 bitpos,poly_uint64 bitregion_start,poly_uint64 bitregion_end,machine_mode mode,tree exp,int cleared,alias_set_type alias_set,bool reverse)6233 store_constructor_field (rtx target, poly_uint64 bitsize, poly_int64 bitpos,
6234 poly_uint64 bitregion_start,
6235 poly_uint64 bitregion_end,
6236 machine_mode mode,
6237 tree exp, int cleared,
6238 alias_set_type alias_set, bool reverse)
6239 {
6240 poly_int64 bytepos;
6241 poly_uint64 bytesize;
6242 if (TREE_CODE (exp) == CONSTRUCTOR
6243 /* We can only call store_constructor recursively if the size and
6244 bit position are on a byte boundary. */
6245 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
6246 && maybe_ne (bitsize, 0U)
6247 && multiple_p (bitsize, BITS_PER_UNIT, &bytesize)
6248 /* If we have a nonzero bitpos for a register target, then we just
6249 let store_field do the bitfield handling. This is unlikely to
6250 generate unnecessary clear instructions anyways. */
6251 && (known_eq (bitpos, 0) || MEM_P (target)))
6252 {
6253 if (MEM_P (target))
6254 {
6255 machine_mode target_mode = GET_MODE (target);
6256 if (target_mode != BLKmode
6257 && !multiple_p (bitpos, GET_MODE_ALIGNMENT (target_mode)))
6258 target_mode = BLKmode;
6259 target = adjust_address (target, target_mode, bytepos);
6260 }
6261
6262
6263 /* Update the alias set, if required. */
6264 if (MEM_P (target) && ! MEM_KEEP_ALIAS_SET_P (target)
6265 && MEM_ALIAS_SET (target) != 0)
6266 {
6267 target = copy_rtx (target);
6268 set_mem_alias_set (target, alias_set);
6269 }
6270
6271 store_constructor (exp, target, cleared, bytesize, reverse);
6272 }
6273 else
6274 store_field (target, bitsize, bitpos, bitregion_start, bitregion_end, mode,
6275 exp, alias_set, false, reverse);
6276 }
6277
6278
6279 /* Returns the number of FIELD_DECLs in TYPE. */
6280
6281 static int
fields_length(const_tree type)6282 fields_length (const_tree type)
6283 {
6284 tree t = TYPE_FIELDS (type);
6285 int count = 0;
6286
6287 for (; t; t = DECL_CHAIN (t))
6288 if (TREE_CODE (t) == FIELD_DECL)
6289 ++count;
6290
6291 return count;
6292 }
6293
6294
6295 /* Store the value of constructor EXP into the rtx TARGET.
6296 TARGET is either a REG or a MEM; we know it cannot conflict, since
6297 safe_from_p has been called.
6298 CLEARED is true if TARGET is known to have been zero'd.
6299 SIZE is the number of bytes of TARGET we are allowed to modify: this
6300 may not be the same as the size of EXP if we are assigning to a field
6301 which has been packed to exclude padding bits.
6302 If REVERSE is true, the store is to be done in reverse order. */
6303
6304 static void
store_constructor(tree exp,rtx target,int cleared,poly_int64 size,bool reverse)6305 store_constructor (tree exp, rtx target, int cleared, poly_int64 size,
6306 bool reverse)
6307 {
6308 tree type = TREE_TYPE (exp);
6309 HOST_WIDE_INT exp_size = int_size_in_bytes (type);
6310 poly_int64 bitregion_end = known_gt (size, 0) ? size * BITS_PER_UNIT - 1 : 0;
6311
6312 switch (TREE_CODE (type))
6313 {
6314 case RECORD_TYPE:
6315 case UNION_TYPE:
6316 case QUAL_UNION_TYPE:
6317 {
6318 unsigned HOST_WIDE_INT idx;
6319 tree field, value;
6320
6321 /* The storage order is specified for every aggregate type. */
6322 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6323
6324 /* If size is zero or the target is already cleared, do nothing. */
6325 if (known_eq (size, 0) || cleared)
6326 cleared = 1;
6327 /* We either clear the aggregate or indicate the value is dead. */
6328 else if ((TREE_CODE (type) == UNION_TYPE
6329 || TREE_CODE (type) == QUAL_UNION_TYPE)
6330 && ! CONSTRUCTOR_ELTS (exp))
6331 /* If the constructor is empty, clear the union. */
6332 {
6333 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
6334 cleared = 1;
6335 }
6336
6337 /* If we are building a static constructor into a register,
6338 set the initial value as zero so we can fold the value into
6339 a constant. But if more than one register is involved,
6340 this probably loses. */
6341 else if (REG_P (target) && TREE_STATIC (exp)
6342 && known_le (GET_MODE_SIZE (GET_MODE (target)),
6343 REGMODE_NATURAL_SIZE (GET_MODE (target))))
6344 {
6345 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6346 cleared = 1;
6347 }
6348
6349 /* If the constructor has fewer fields than the structure or
6350 if we are initializing the structure to mostly zeros, clear
6351 the whole structure first. Don't do this if TARGET is a
6352 register whose mode size isn't equal to SIZE since
6353 clear_storage can't handle this case. */
6354 else if (known_size_p (size)
6355 && (((int) CONSTRUCTOR_NELTS (exp) != fields_length (type))
6356 || mostly_zeros_p (exp))
6357 && (!REG_P (target)
6358 || known_eq (GET_MODE_SIZE (GET_MODE (target)), size)))
6359 {
6360 clear_storage (target, gen_int_mode (size, Pmode),
6361 BLOCK_OP_NORMAL);
6362 cleared = 1;
6363 }
6364
6365 if (REG_P (target) && !cleared)
6366 emit_clobber (target);
6367
6368 /* Store each element of the constructor into the
6369 corresponding field of TARGET. */
6370 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, field, value)
6371 {
6372 machine_mode mode;
6373 HOST_WIDE_INT bitsize;
6374 HOST_WIDE_INT bitpos = 0;
6375 tree offset;
6376 rtx to_rtx = target;
6377
6378 /* Just ignore missing fields. We cleared the whole
6379 structure, above, if any fields are missing. */
6380 if (field == 0)
6381 continue;
6382
6383 if (cleared && initializer_zerop (value))
6384 continue;
6385
6386 if (tree_fits_uhwi_p (DECL_SIZE (field)))
6387 bitsize = tree_to_uhwi (DECL_SIZE (field));
6388 else
6389 gcc_unreachable ();
6390
6391 mode = DECL_MODE (field);
6392 if (DECL_BIT_FIELD (field))
6393 mode = VOIDmode;
6394
6395 offset = DECL_FIELD_OFFSET (field);
6396 if (tree_fits_shwi_p (offset)
6397 && tree_fits_shwi_p (bit_position (field)))
6398 {
6399 bitpos = int_bit_position (field);
6400 offset = NULL_TREE;
6401 }
6402 else
6403 gcc_unreachable ();
6404
6405 /* If this initializes a field that is smaller than a
6406 word, at the start of a word, try to widen it to a full
6407 word. This special case allows us to output C++ member
6408 function initializations in a form that the optimizers
6409 can understand. */
6410 if (WORD_REGISTER_OPERATIONS
6411 && REG_P (target)
6412 && bitsize < BITS_PER_WORD
6413 && bitpos % BITS_PER_WORD == 0
6414 && GET_MODE_CLASS (mode) == MODE_INT
6415 && TREE_CODE (value) == INTEGER_CST
6416 && exp_size >= 0
6417 && bitpos + BITS_PER_WORD <= exp_size * BITS_PER_UNIT)
6418 {
6419 tree type = TREE_TYPE (value);
6420
6421 if (TYPE_PRECISION (type) < BITS_PER_WORD)
6422 {
6423 type = lang_hooks.types.type_for_mode
6424 (word_mode, TYPE_UNSIGNED (type));
6425 value = fold_convert (type, value);
6426 /* Make sure the bits beyond the original bitsize are zero
6427 so that we can correctly avoid extra zeroing stores in
6428 later constructor elements. */
6429 tree bitsize_mask
6430 = wide_int_to_tree (type, wi::mask (bitsize, false,
6431 BITS_PER_WORD));
6432 value = fold_build2 (BIT_AND_EXPR, type, value, bitsize_mask);
6433 }
6434
6435 if (BYTES_BIG_ENDIAN)
6436 value
6437 = fold_build2 (LSHIFT_EXPR, type, value,
6438 build_int_cst (type,
6439 BITS_PER_WORD - bitsize));
6440 bitsize = BITS_PER_WORD;
6441 mode = word_mode;
6442 }
6443
6444 if (MEM_P (to_rtx) && !MEM_KEEP_ALIAS_SET_P (to_rtx)
6445 && DECL_NONADDRESSABLE_P (field))
6446 {
6447 to_rtx = copy_rtx (to_rtx);
6448 MEM_KEEP_ALIAS_SET_P (to_rtx) = 1;
6449 }
6450
6451 store_constructor_field (to_rtx, bitsize, bitpos,
6452 0, bitregion_end, mode,
6453 value, cleared,
6454 get_alias_set (TREE_TYPE (field)),
6455 reverse);
6456 }
6457 break;
6458 }
6459 case ARRAY_TYPE:
6460 {
6461 tree value, index;
6462 unsigned HOST_WIDE_INT i;
6463 int need_to_clear;
6464 tree domain;
6465 tree elttype = TREE_TYPE (type);
6466 int const_bounds_p;
6467 HOST_WIDE_INT minelt = 0;
6468 HOST_WIDE_INT maxelt = 0;
6469
6470 /* The storage order is specified for every aggregate type. */
6471 reverse = TYPE_REVERSE_STORAGE_ORDER (type);
6472
6473 domain = TYPE_DOMAIN (type);
6474 const_bounds_p = (TYPE_MIN_VALUE (domain)
6475 && TYPE_MAX_VALUE (domain)
6476 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain))
6477 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain)));
6478
6479 /* If we have constant bounds for the range of the type, get them. */
6480 if (const_bounds_p)
6481 {
6482 minelt = tree_to_shwi (TYPE_MIN_VALUE (domain));
6483 maxelt = tree_to_shwi (TYPE_MAX_VALUE (domain));
6484 }
6485
6486 /* If the constructor has fewer elements than the array, clear
6487 the whole array first. Similarly if this is static
6488 constructor of a non-BLKmode object. */
6489 if (cleared)
6490 need_to_clear = 0;
6491 else if (REG_P (target) && TREE_STATIC (exp))
6492 need_to_clear = 1;
6493 else
6494 {
6495 unsigned HOST_WIDE_INT idx;
6496 tree index, value;
6497 HOST_WIDE_INT count = 0, zero_count = 0;
6498 need_to_clear = ! const_bounds_p;
6499
6500 /* This loop is a more accurate version of the loop in
6501 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6502 is also needed to check for missing elements. */
6503 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), idx, index, value)
6504 {
6505 HOST_WIDE_INT this_node_count;
6506
6507 if (need_to_clear)
6508 break;
6509
6510 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6511 {
6512 tree lo_index = TREE_OPERAND (index, 0);
6513 tree hi_index = TREE_OPERAND (index, 1);
6514
6515 if (! tree_fits_uhwi_p (lo_index)
6516 || ! tree_fits_uhwi_p (hi_index))
6517 {
6518 need_to_clear = 1;
6519 break;
6520 }
6521
6522 this_node_count = (tree_to_uhwi (hi_index)
6523 - tree_to_uhwi (lo_index) + 1);
6524 }
6525 else
6526 this_node_count = 1;
6527
6528 count += this_node_count;
6529 if (mostly_zeros_p (value))
6530 zero_count += this_node_count;
6531 }
6532
6533 /* Clear the entire array first if there are any missing
6534 elements, or if the incidence of zero elements is >=
6535 75%. */
6536 if (! need_to_clear
6537 && (count < maxelt - minelt + 1
6538 || 4 * zero_count >= 3 * count))
6539 need_to_clear = 1;
6540 }
6541
6542 if (need_to_clear && maybe_gt (size, 0))
6543 {
6544 if (REG_P (target))
6545 emit_move_insn (target, CONST0_RTX (GET_MODE (target)));
6546 else
6547 clear_storage (target, gen_int_mode (size, Pmode),
6548 BLOCK_OP_NORMAL);
6549 cleared = 1;
6550 }
6551
6552 if (!cleared && REG_P (target))
6553 /* Inform later passes that the old value is dead. */
6554 emit_clobber (target);
6555
6556 /* Store each element of the constructor into the
6557 corresponding element of TARGET, determined by counting the
6558 elements. */
6559 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp), i, index, value)
6560 {
6561 machine_mode mode;
6562 poly_int64 bitsize;
6563 HOST_WIDE_INT bitpos;
6564 rtx xtarget = target;
6565
6566 if (cleared && initializer_zerop (value))
6567 continue;
6568
6569 mode = TYPE_MODE (elttype);
6570 if (mode == BLKmode)
6571 bitsize = (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6572 ? tree_to_uhwi (TYPE_SIZE (elttype))
6573 : -1);
6574 else
6575 bitsize = GET_MODE_BITSIZE (mode);
6576
6577 if (index != NULL_TREE && TREE_CODE (index) == RANGE_EXPR)
6578 {
6579 tree lo_index = TREE_OPERAND (index, 0);
6580 tree hi_index = TREE_OPERAND (index, 1);
6581 rtx index_r, pos_rtx;
6582 HOST_WIDE_INT lo, hi, count;
6583 tree position;
6584
6585 /* If the range is constant and "small", unroll the loop. */
6586 if (const_bounds_p
6587 && tree_fits_shwi_p (lo_index)
6588 && tree_fits_shwi_p (hi_index)
6589 && (lo = tree_to_shwi (lo_index),
6590 hi = tree_to_shwi (hi_index),
6591 count = hi - lo + 1,
6592 (!MEM_P (target)
6593 || count <= 2
6594 || (tree_fits_uhwi_p (TYPE_SIZE (elttype))
6595 && (tree_to_uhwi (TYPE_SIZE (elttype)) * count
6596 <= 40 * 8)))))
6597 {
6598 lo -= minelt; hi -= minelt;
6599 for (; lo <= hi; lo++)
6600 {
6601 bitpos = lo * tree_to_shwi (TYPE_SIZE (elttype));
6602
6603 if (MEM_P (target)
6604 && !MEM_KEEP_ALIAS_SET_P (target)
6605 && TREE_CODE (type) == ARRAY_TYPE
6606 && TYPE_NONALIASED_COMPONENT (type))
6607 {
6608 target = copy_rtx (target);
6609 MEM_KEEP_ALIAS_SET_P (target) = 1;
6610 }
6611
6612 store_constructor_field
6613 (target, bitsize, bitpos, 0, bitregion_end,
6614 mode, value, cleared,
6615 get_alias_set (elttype), reverse);
6616 }
6617 }
6618 else
6619 {
6620 rtx_code_label *loop_start = gen_label_rtx ();
6621 rtx_code_label *loop_end = gen_label_rtx ();
6622 tree exit_cond;
6623
6624 expand_normal (hi_index);
6625
6626 index = build_decl (EXPR_LOCATION (exp),
6627 VAR_DECL, NULL_TREE, domain);
6628 index_r = gen_reg_rtx (promote_decl_mode (index, NULL));
6629 SET_DECL_RTL (index, index_r);
6630 store_expr (lo_index, index_r, 0, false, reverse);
6631
6632 /* Build the head of the loop. */
6633 do_pending_stack_adjust ();
6634 emit_label (loop_start);
6635
6636 /* Assign value to element index. */
6637 position =
6638 fold_convert (ssizetype,
6639 fold_build2 (MINUS_EXPR,
6640 TREE_TYPE (index),
6641 index,
6642 TYPE_MIN_VALUE (domain)));
6643
6644 position =
6645 size_binop (MULT_EXPR, position,
6646 fold_convert (ssizetype,
6647 TYPE_SIZE_UNIT (elttype)));
6648
6649 pos_rtx = expand_normal (position);
6650 xtarget = offset_address (target, pos_rtx,
6651 highest_pow2_factor (position));
6652 xtarget = adjust_address (xtarget, mode, 0);
6653 if (TREE_CODE (value) == CONSTRUCTOR)
6654 store_constructor (value, xtarget, cleared,
6655 exact_div (bitsize, BITS_PER_UNIT),
6656 reverse);
6657 else
6658 store_expr (value, xtarget, 0, false, reverse);
6659
6660 /* Generate a conditional jump to exit the loop. */
6661 exit_cond = build2 (LT_EXPR, integer_type_node,
6662 index, hi_index);
6663 jumpif (exit_cond, loop_end,
6664 profile_probability::uninitialized ());
6665
6666 /* Update the loop counter, and jump to the head of
6667 the loop. */
6668 expand_assignment (index,
6669 build2 (PLUS_EXPR, TREE_TYPE (index),
6670 index, integer_one_node),
6671 false);
6672
6673 emit_jump (loop_start);
6674
6675 /* Build the end of the loop. */
6676 emit_label (loop_end);
6677 }
6678 }
6679 else if ((index != 0 && ! tree_fits_shwi_p (index))
6680 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype)))
6681 {
6682 tree position;
6683
6684 if (index == 0)
6685 index = ssize_int (1);
6686
6687 if (minelt)
6688 index = fold_convert (ssizetype,
6689 fold_build2 (MINUS_EXPR,
6690 TREE_TYPE (index),
6691 index,
6692 TYPE_MIN_VALUE (domain)));
6693
6694 position =
6695 size_binop (MULT_EXPR, index,
6696 fold_convert (ssizetype,
6697 TYPE_SIZE_UNIT (elttype)));
6698 xtarget = offset_address (target,
6699 expand_normal (position),
6700 highest_pow2_factor (position));
6701 xtarget = adjust_address (xtarget, mode, 0);
6702 store_expr (value, xtarget, 0, false, reverse);
6703 }
6704 else
6705 {
6706 if (index != 0)
6707 bitpos = ((tree_to_shwi (index) - minelt)
6708 * tree_to_uhwi (TYPE_SIZE (elttype)));
6709 else
6710 bitpos = (i * tree_to_uhwi (TYPE_SIZE (elttype)));
6711
6712 if (MEM_P (target) && !MEM_KEEP_ALIAS_SET_P (target)
6713 && TREE_CODE (type) == ARRAY_TYPE
6714 && TYPE_NONALIASED_COMPONENT (type))
6715 {
6716 target = copy_rtx (target);
6717 MEM_KEEP_ALIAS_SET_P (target) = 1;
6718 }
6719 store_constructor_field (target, bitsize, bitpos, 0,
6720 bitregion_end, mode, value,
6721 cleared, get_alias_set (elttype),
6722 reverse);
6723 }
6724 }
6725 break;
6726 }
6727
6728 case VECTOR_TYPE:
6729 {
6730 unsigned HOST_WIDE_INT idx;
6731 constructor_elt *ce;
6732 int i;
6733 int need_to_clear;
6734 insn_code icode = CODE_FOR_nothing;
6735 tree elt;
6736 tree elttype = TREE_TYPE (type);
6737 int elt_size = tree_to_uhwi (TYPE_SIZE (elttype));
6738 machine_mode eltmode = TYPE_MODE (elttype);
6739 HOST_WIDE_INT bitsize;
6740 HOST_WIDE_INT bitpos;
6741 rtvec vector = NULL;
6742 poly_uint64 n_elts;
6743 unsigned HOST_WIDE_INT const_n_elts;
6744 alias_set_type alias;
6745 bool vec_vec_init_p = false;
6746 machine_mode mode = GET_MODE (target);
6747
6748 gcc_assert (eltmode != BLKmode);
6749
6750 /* Try using vec_duplicate_optab for uniform vectors. */
6751 if (!TREE_SIDE_EFFECTS (exp)
6752 && VECTOR_MODE_P (mode)
6753 && eltmode == GET_MODE_INNER (mode)
6754 && ((icode = optab_handler (vec_duplicate_optab, mode))
6755 != CODE_FOR_nothing)
6756 && (elt = uniform_vector_p (exp)))
6757 {
6758 struct expand_operand ops[2];
6759 create_output_operand (&ops[0], target, mode);
6760 create_input_operand (&ops[1], expand_normal (elt), eltmode);
6761 expand_insn (icode, 2, ops);
6762 if (!rtx_equal_p (target, ops[0].value))
6763 emit_move_insn (target, ops[0].value);
6764 break;
6765 }
6766
6767 n_elts = TYPE_VECTOR_SUBPARTS (type);
6768 if (REG_P (target)
6769 && VECTOR_MODE_P (mode)
6770 && n_elts.is_constant (&const_n_elts))
6771 {
6772 machine_mode emode = eltmode;
6773
6774 if (CONSTRUCTOR_NELTS (exp)
6775 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value))
6776 == VECTOR_TYPE))
6777 {
6778 tree etype = TREE_TYPE (CONSTRUCTOR_ELT (exp, 0)->value);
6779 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp)
6780 * TYPE_VECTOR_SUBPARTS (etype),
6781 n_elts));
6782 emode = TYPE_MODE (etype);
6783 }
6784 icode = convert_optab_handler (vec_init_optab, mode, emode);
6785 if (icode != CODE_FOR_nothing)
6786 {
6787 unsigned int i, n = const_n_elts;
6788
6789 if (emode != eltmode)
6790 {
6791 n = CONSTRUCTOR_NELTS (exp);
6792 vec_vec_init_p = true;
6793 }
6794 vector = rtvec_alloc (n);
6795 for (i = 0; i < n; i++)
6796 RTVEC_ELT (vector, i) = CONST0_RTX (emode);
6797 }
6798 }
6799
6800 /* If the constructor has fewer elements than the vector,
6801 clear the whole array first. Similarly if this is static
6802 constructor of a non-BLKmode object. */
6803 if (cleared)
6804 need_to_clear = 0;
6805 else if (REG_P (target) && TREE_STATIC (exp))
6806 need_to_clear = 1;
6807 else
6808 {
6809 unsigned HOST_WIDE_INT count = 0, zero_count = 0;
6810 tree value;
6811
6812 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
6813 {
6814 tree sz = TYPE_SIZE (TREE_TYPE (value));
6815 int n_elts_here
6816 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR, sz,
6817 TYPE_SIZE (elttype)));
6818
6819 count += n_elts_here;
6820 if (mostly_zeros_p (value))
6821 zero_count += n_elts_here;
6822 }
6823
6824 /* Clear the entire vector first if there are any missing elements,
6825 or if the incidence of zero elements is >= 75%. */
6826 need_to_clear = (maybe_lt (count, n_elts)
6827 || 4 * zero_count >= 3 * count);
6828 }
6829
6830 if (need_to_clear && maybe_gt (size, 0) && !vector)
6831 {
6832 if (REG_P (target))
6833 emit_move_insn (target, CONST0_RTX (mode));
6834 else
6835 clear_storage (target, gen_int_mode (size, Pmode),
6836 BLOCK_OP_NORMAL);
6837 cleared = 1;
6838 }
6839
6840 /* Inform later passes that the old value is dead. */
6841 if (!cleared && !vector && REG_P (target))
6842 emit_move_insn (target, CONST0_RTX (mode));
6843
6844 if (MEM_P (target))
6845 alias = MEM_ALIAS_SET (target);
6846 else
6847 alias = get_alias_set (elttype);
6848
6849 /* Store each element of the constructor into the corresponding
6850 element of TARGET, determined by counting the elements. */
6851 for (idx = 0, i = 0;
6852 vec_safe_iterate (CONSTRUCTOR_ELTS (exp), idx, &ce);
6853 idx++, i += bitsize / elt_size)
6854 {
6855 HOST_WIDE_INT eltpos;
6856 tree value = ce->value;
6857
6858 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value)));
6859 if (cleared && initializer_zerop (value))
6860 continue;
6861
6862 if (ce->index)
6863 eltpos = tree_to_uhwi (ce->index);
6864 else
6865 eltpos = i;
6866
6867 if (vector)
6868 {
6869 if (vec_vec_init_p)
6870 {
6871 gcc_assert (ce->index == NULL_TREE);
6872 gcc_assert (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE);
6873 eltpos = idx;
6874 }
6875 else
6876 gcc_assert (TREE_CODE (TREE_TYPE (value)) != VECTOR_TYPE);
6877 RTVEC_ELT (vector, eltpos) = expand_normal (value);
6878 }
6879 else
6880 {
6881 machine_mode value_mode
6882 = (TREE_CODE (TREE_TYPE (value)) == VECTOR_TYPE
6883 ? TYPE_MODE (TREE_TYPE (value)) : eltmode);
6884 bitpos = eltpos * elt_size;
6885 store_constructor_field (target, bitsize, bitpos, 0,
6886 bitregion_end, value_mode,
6887 value, cleared, alias, reverse);
6888 }
6889 }
6890
6891 if (vector)
6892 emit_insn (GEN_FCN (icode) (target,
6893 gen_rtx_PARALLEL (mode, vector)));
6894 break;
6895 }
6896
6897 default:
6898 gcc_unreachable ();
6899 }
6900 }
6901
6902 /* Store the value of EXP (an expression tree)
6903 into a subfield of TARGET which has mode MODE and occupies
6904 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6905 If MODE is VOIDmode, it means that we are storing into a bit-field.
6906
6907 BITREGION_START is bitpos of the first bitfield in this region.
6908 BITREGION_END is the bitpos of the ending bitfield in this region.
6909 These two fields are 0, if the C++ memory model does not apply,
6910 or we are not interested in keeping track of bitfield regions.
6911
6912 Always return const0_rtx unless we have something particular to
6913 return.
6914
6915 ALIAS_SET is the alias set for the destination. This value will
6916 (in general) be different from that for TARGET, since TARGET is a
6917 reference to the containing structure.
6918
6919 If NONTEMPORAL is true, try generating a nontemporal store.
6920
6921 If REVERSE is true, the store is to be done in reverse order. */
6922
6923 static rtx
store_field(rtx target,poly_int64 bitsize,poly_int64 bitpos,poly_uint64 bitregion_start,poly_uint64 bitregion_end,machine_mode mode,tree exp,alias_set_type alias_set,bool nontemporal,bool reverse)6924 store_field (rtx target, poly_int64 bitsize, poly_int64 bitpos,
6925 poly_uint64 bitregion_start, poly_uint64 bitregion_end,
6926 machine_mode mode, tree exp,
6927 alias_set_type alias_set, bool nontemporal, bool reverse)
6928 {
6929 if (TREE_CODE (exp) == ERROR_MARK)
6930 return const0_rtx;
6931
6932 /* If we have nothing to store, do nothing unless the expression has
6933 side-effects. Don't do that for zero sized addressable lhs of
6934 calls. */
6935 if (known_eq (bitsize, 0)
6936 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6937 || TREE_CODE (exp) != CALL_EXPR))
6938 return expand_expr (exp, const0_rtx, VOIDmode, EXPAND_NORMAL);
6939
6940 if (GET_CODE (target) == CONCAT)
6941 {
6942 /* We're storing into a struct containing a single __complex. */
6943
6944 gcc_assert (known_eq (bitpos, 0));
6945 return store_expr (exp, target, 0, nontemporal, reverse);
6946 }
6947
6948 /* If the structure is in a register or if the component
6949 is a bit field, we cannot use addressing to access it.
6950 Use bit-field techniques or SUBREG to store in it. */
6951
6952 poly_int64 decl_bitsize;
6953 if (mode == VOIDmode
6954 || (mode != BLKmode && ! direct_store[(int) mode]
6955 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
6956 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT)
6957 || REG_P (target)
6958 || GET_CODE (target) == SUBREG
6959 /* If the field isn't aligned enough to store as an ordinary memref,
6960 store it as a bit field. */
6961 || (mode != BLKmode
6962 && ((((MEM_ALIGN (target) < GET_MODE_ALIGNMENT (mode))
6963 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
6964 && targetm.slow_unaligned_access (mode, MEM_ALIGN (target)))
6965 || !multiple_p (bitpos, BITS_PER_UNIT)))
6966 || (known_size_p (bitsize)
6967 && mode != BLKmode
6968 && maybe_gt (GET_MODE_BITSIZE (mode), bitsize))
6969 /* If the RHS and field are a constant size and the size of the
6970 RHS isn't the same size as the bitfield, we must use bitfield
6971 operations. */
6972 || (known_size_p (bitsize)
6973 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
6974 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
6975 bitsize)
6976 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6977 we will handle specially below. */
6978 && !(TREE_CODE (exp) == CONSTRUCTOR
6979 && multiple_p (bitsize, BITS_PER_UNIT))
6980 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6981 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6982 includes some extra padding. store_expr / expand_expr will in
6983 that case call get_inner_reference that will have the bitsize
6984 we check here and thus the block move will not clobber the
6985 padding that shouldn't be clobbered. In the future we could
6986 replace the TREE_ADDRESSABLE check with a check that
6987 get_base_address needs to live in memory. */
6988 && (!TREE_ADDRESSABLE (TREE_TYPE (exp))
6989 || TREE_CODE (exp) != COMPONENT_REF
6990 || !multiple_p (bitsize, BITS_PER_UNIT)
6991 || !multiple_p (bitpos, BITS_PER_UNIT)
6992 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp, 1)),
6993 &decl_bitsize)
6994 || maybe_ne (decl_bitsize, bitsize)))
6995 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
6996 decl we must use bitfield operations. */
6997 || (known_size_p (bitsize)
6998 && TREE_CODE (exp) == MEM_REF
6999 && TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR
7000 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7001 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0))
7002 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp, 0), 0)) != BLKmode))
7003 {
7004 rtx temp;
7005 gimple *nop_def;
7006
7007 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7008 implies a mask operation. If the precision is the same size as
7009 the field we're storing into, that mask is redundant. This is
7010 particularly common with bit field assignments generated by the
7011 C front end. */
7012 nop_def = get_def_for_expr (exp, NOP_EXPR);
7013 if (nop_def)
7014 {
7015 tree type = TREE_TYPE (exp);
7016 if (INTEGRAL_TYPE_P (type)
7017 && maybe_ne (TYPE_PRECISION (type),
7018 GET_MODE_BITSIZE (TYPE_MODE (type)))
7019 && known_eq (bitsize, TYPE_PRECISION (type)))
7020 {
7021 tree op = gimple_assign_rhs1 (nop_def);
7022 type = TREE_TYPE (op);
7023 if (INTEGRAL_TYPE_P (type)
7024 && known_ge (TYPE_PRECISION (type), bitsize))
7025 exp = op;
7026 }
7027 }
7028
7029 temp = expand_normal (exp);
7030
7031 /* We don't support variable-sized BLKmode bitfields, since our
7032 handling of BLKmode is bound up with the ability to break
7033 things into words. */
7034 gcc_assert (mode != BLKmode || bitsize.is_constant ());
7035
7036 /* Handle calls that return values in multiple non-contiguous locations.
7037 The Irix 6 ABI has examples of this. */
7038 if (GET_CODE (temp) == PARALLEL)
7039 {
7040 HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp));
7041 machine_mode temp_mode = GET_MODE (temp);
7042 if (temp_mode == BLKmode || temp_mode == VOIDmode)
7043 temp_mode = smallest_int_mode_for_size (size * BITS_PER_UNIT);
7044 rtx temp_target = gen_reg_rtx (temp_mode);
7045 emit_group_store (temp_target, temp, TREE_TYPE (exp), size);
7046 temp = temp_target;
7047 }
7048
7049 /* Handle calls that return BLKmode values in registers. */
7050 else if (mode == BLKmode && REG_P (temp) && TREE_CODE (exp) == CALL_EXPR)
7051 {
7052 rtx temp_target = gen_reg_rtx (GET_MODE (temp));
7053 copy_blkmode_from_reg (temp_target, temp, TREE_TYPE (exp));
7054 temp = temp_target;
7055 }
7056
7057 /* If the value has aggregate type and an integral mode then, if BITSIZE
7058 is narrower than this mode and this is for big-endian data, we first
7059 need to put the value into the low-order bits for store_bit_field,
7060 except when MODE is BLKmode and BITSIZE larger than the word size
7061 (see the handling of fields larger than a word in store_bit_field).
7062 Moreover, the field may be not aligned on a byte boundary; in this
7063 case, if it has reverse storage order, it needs to be accessed as a
7064 scalar field with reverse storage order and we must first put the
7065 value into target order. */
7066 scalar_int_mode temp_mode;
7067 if (AGGREGATE_TYPE_P (TREE_TYPE (exp))
7068 && is_int_mode (GET_MODE (temp), &temp_mode))
7069 {
7070 HOST_WIDE_INT size = GET_MODE_BITSIZE (temp_mode);
7071
7072 reverse = TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp));
7073
7074 if (reverse)
7075 temp = flip_storage_order (temp_mode, temp);
7076
7077 gcc_checking_assert (known_le (bitsize, size));
7078 if (maybe_lt (bitsize, size)
7079 && reverse ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN
7080 /* Use of to_constant for BLKmode was checked above. */
7081 && !(mode == BLKmode && bitsize.to_constant () > BITS_PER_WORD))
7082 temp = expand_shift (RSHIFT_EXPR, temp_mode, temp,
7083 size - bitsize, NULL_RTX, 1);
7084 }
7085
7086 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7087 if (mode != VOIDmode && mode != BLKmode
7088 && mode != TYPE_MODE (TREE_TYPE (exp)))
7089 temp = convert_modes (mode, TYPE_MODE (TREE_TYPE (exp)), temp, 1);
7090
7091 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7092 and BITPOS must be aligned on a byte boundary. If so, we simply do
7093 a block copy. Likewise for a BLKmode-like TARGET. */
7094 if (GET_MODE (temp) == BLKmode
7095 && (GET_MODE (target) == BLKmode
7096 || (MEM_P (target)
7097 && GET_MODE_CLASS (GET_MODE (target)) == MODE_INT
7098 && multiple_p (bitpos, BITS_PER_UNIT)
7099 && multiple_p (bitsize, BITS_PER_UNIT))))
7100 {
7101 gcc_assert (MEM_P (target) && MEM_P (temp));
7102 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
7103 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
7104
7105 target = adjust_address (target, VOIDmode, bytepos);
7106 emit_block_move (target, temp,
7107 gen_int_mode (bytesize, Pmode),
7108 BLOCK_OP_NORMAL);
7109
7110 return const0_rtx;
7111 }
7112
7113 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7114 word size, we need to load the value (see again store_bit_field). */
7115 if (GET_MODE (temp) == BLKmode && known_le (bitsize, BITS_PER_WORD))
7116 {
7117 scalar_int_mode temp_mode = smallest_int_mode_for_size (bitsize);
7118 temp = extract_bit_field (temp, bitsize, 0, 1, NULL_RTX, temp_mode,
7119 temp_mode, false, NULL);
7120 }
7121
7122 /* Store the value in the bitfield. */
7123 gcc_assert (known_ge (bitpos, 0));
7124 store_bit_field (target, bitsize, bitpos,
7125 bitregion_start, bitregion_end,
7126 mode, temp, reverse);
7127
7128 return const0_rtx;
7129 }
7130 else
7131 {
7132 /* Now build a reference to just the desired component. */
7133 rtx to_rtx = adjust_address (target, mode,
7134 exact_div (bitpos, BITS_PER_UNIT));
7135
7136 if (to_rtx == target)
7137 to_rtx = copy_rtx (to_rtx);
7138
7139 if (!MEM_KEEP_ALIAS_SET_P (to_rtx) && MEM_ALIAS_SET (to_rtx) != 0)
7140 set_mem_alias_set (to_rtx, alias_set);
7141
7142 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7143 into a target smaller than its type; handle that case now. */
7144 if (TREE_CODE (exp) == CONSTRUCTOR && known_size_p (bitsize))
7145 {
7146 poly_int64 bytesize = exact_div (bitsize, BITS_PER_UNIT);
7147 store_constructor (exp, to_rtx, 0, bytesize, reverse);
7148 return to_rtx;
7149 }
7150
7151 return store_expr (exp, to_rtx, 0, nontemporal, reverse);
7152 }
7153 }
7154
7155 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7156 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7157 codes and find the ultimate containing object, which we return.
7158
7159 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7160 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7161 storage order of the field.
7162 If the position of the field is variable, we store a tree
7163 giving the variable offset (in units) in *POFFSET.
7164 This offset is in addition to the bit position.
7165 If the position is not variable, we store 0 in *POFFSET.
7166
7167 If any of the extraction expressions is volatile,
7168 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7169
7170 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7171 Otherwise, it is a mode that can be used to access the field.
7172
7173 If the field describes a variable-sized object, *PMODE is set to
7174 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7175 this case, but the address of the object can be found. */
7176
7177 tree
get_inner_reference(tree exp,poly_int64_pod * pbitsize,poly_int64_pod * pbitpos,tree * poffset,machine_mode * pmode,int * punsignedp,int * preversep,int * pvolatilep)7178 get_inner_reference (tree exp, poly_int64_pod *pbitsize,
7179 poly_int64_pod *pbitpos, tree *poffset,
7180 machine_mode *pmode, int *punsignedp,
7181 int *preversep, int *pvolatilep)
7182 {
7183 tree size_tree = 0;
7184 machine_mode mode = VOIDmode;
7185 bool blkmode_bitfield = false;
7186 tree offset = size_zero_node;
7187 poly_offset_int bit_offset = 0;
7188
7189 /* First get the mode, signedness, storage order and size. We do this from
7190 just the outermost expression. */
7191 *pbitsize = -1;
7192 if (TREE_CODE (exp) == COMPONENT_REF)
7193 {
7194 tree field = TREE_OPERAND (exp, 1);
7195 size_tree = DECL_SIZE (field);
7196 if (flag_strict_volatile_bitfields > 0
7197 && TREE_THIS_VOLATILE (exp)
7198 && DECL_BIT_FIELD_TYPE (field)
7199 && DECL_MODE (field) != BLKmode)
7200 /* Volatile bitfields should be accessed in the mode of the
7201 field's type, not the mode computed based on the bit
7202 size. */
7203 mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
7204 else if (!DECL_BIT_FIELD (field))
7205 {
7206 mode = DECL_MODE (field);
7207 /* For vector fields re-check the target flags, as DECL_MODE
7208 could have been set with different target flags than
7209 the current function has. */
7210 if (mode == BLKmode
7211 && VECTOR_TYPE_P (TREE_TYPE (field))
7212 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field))))
7213 mode = TYPE_MODE (TREE_TYPE (field));
7214 }
7215 else if (DECL_MODE (field) == BLKmode)
7216 blkmode_bitfield = true;
7217
7218 *punsignedp = DECL_UNSIGNED (field);
7219 }
7220 else if (TREE_CODE (exp) == BIT_FIELD_REF)
7221 {
7222 size_tree = TREE_OPERAND (exp, 1);
7223 *punsignedp = (! INTEGRAL_TYPE_P (TREE_TYPE (exp))
7224 || TYPE_UNSIGNED (TREE_TYPE (exp)));
7225
7226 /* For vector types, with the correct size of access, use the mode of
7227 inner type. */
7228 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp, 0))) == VECTOR_TYPE
7229 && TREE_TYPE (exp) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))
7230 && tree_int_cst_equal (size_tree, TYPE_SIZE (TREE_TYPE (exp))))
7231 mode = TYPE_MODE (TREE_TYPE (exp));
7232 }
7233 else
7234 {
7235 mode = TYPE_MODE (TREE_TYPE (exp));
7236 *punsignedp = TYPE_UNSIGNED (TREE_TYPE (exp));
7237
7238 if (mode == BLKmode)
7239 size_tree = TYPE_SIZE (TREE_TYPE (exp));
7240 else
7241 *pbitsize = GET_MODE_BITSIZE (mode);
7242 }
7243
7244 if (size_tree != 0)
7245 {
7246 if (! tree_fits_uhwi_p (size_tree))
7247 mode = BLKmode, *pbitsize = -1;
7248 else
7249 *pbitsize = tree_to_uhwi (size_tree);
7250 }
7251
7252 *preversep = reverse_storage_order_for_component_p (exp);
7253
7254 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7255 and find the ultimate containing object. */
7256 while (1)
7257 {
7258 switch (TREE_CODE (exp))
7259 {
7260 case BIT_FIELD_REF:
7261 bit_offset += wi::to_poly_offset (TREE_OPERAND (exp, 2));
7262 break;
7263
7264 case COMPONENT_REF:
7265 {
7266 tree field = TREE_OPERAND (exp, 1);
7267 tree this_offset = component_ref_field_offset (exp);
7268
7269 /* If this field hasn't been filled in yet, don't go past it.
7270 This should only happen when folding expressions made during
7271 type construction. */
7272 if (this_offset == 0)
7273 break;
7274
7275 offset = size_binop (PLUS_EXPR, offset, this_offset);
7276 bit_offset += wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field));
7277
7278 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7279 }
7280 break;
7281
7282 case ARRAY_REF:
7283 case ARRAY_RANGE_REF:
7284 {
7285 tree index = TREE_OPERAND (exp, 1);
7286 tree low_bound = array_ref_low_bound (exp);
7287 tree unit_size = array_ref_element_size (exp);
7288
7289 /* We assume all arrays have sizes that are a multiple of a byte.
7290 First subtract the lower bound, if any, in the type of the
7291 index, then convert to sizetype and multiply by the size of
7292 the array element. */
7293 if (! integer_zerop (low_bound))
7294 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
7295 index, low_bound);
7296
7297 offset = size_binop (PLUS_EXPR, offset,
7298 size_binop (MULT_EXPR,
7299 fold_convert (sizetype, index),
7300 unit_size));
7301 }
7302 break;
7303
7304 case REALPART_EXPR:
7305 break;
7306
7307 case IMAGPART_EXPR:
7308 bit_offset += *pbitsize;
7309 break;
7310
7311 case VIEW_CONVERT_EXPR:
7312 break;
7313
7314 case MEM_REF:
7315 /* Hand back the decl for MEM[&decl, off]. */
7316 if (TREE_CODE (TREE_OPERAND (exp, 0)) == ADDR_EXPR)
7317 {
7318 tree off = TREE_OPERAND (exp, 1);
7319 if (!integer_zerop (off))
7320 {
7321 poly_offset_int boff = mem_ref_offset (exp);
7322 boff <<= LOG2_BITS_PER_UNIT;
7323 bit_offset += boff;
7324 }
7325 exp = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
7326 }
7327 goto done;
7328
7329 default:
7330 goto done;
7331 }
7332
7333 /* If any reference in the chain is volatile, the effect is volatile. */
7334 if (TREE_THIS_VOLATILE (exp))
7335 *pvolatilep = 1;
7336
7337 exp = TREE_OPERAND (exp, 0);
7338 }
7339 done:
7340
7341 /* If OFFSET is constant, see if we can return the whole thing as a
7342 constant bit position. Make sure to handle overflow during
7343 this conversion. */
7344 if (poly_int_tree_p (offset))
7345 {
7346 poly_offset_int tem = wi::sext (wi::to_poly_offset (offset),
7347 TYPE_PRECISION (sizetype));
7348 tem <<= LOG2_BITS_PER_UNIT;
7349 tem += bit_offset;
7350 if (tem.to_shwi (pbitpos))
7351 *poffset = offset = NULL_TREE;
7352 }
7353
7354 /* Otherwise, split it up. */
7355 if (offset)
7356 {
7357 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7358 if (!bit_offset.to_shwi (pbitpos) || maybe_lt (*pbitpos, 0))
7359 {
7360 *pbitpos = num_trailing_bits (bit_offset.force_shwi ());
7361 poly_offset_int bytes = bits_to_bytes_round_down (bit_offset);
7362 offset = size_binop (PLUS_EXPR, offset,
7363 build_int_cst (sizetype, bytes.force_shwi ()));
7364 }
7365
7366 *poffset = offset;
7367 }
7368
7369 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7370 if (mode == VOIDmode
7371 && blkmode_bitfield
7372 && multiple_p (*pbitpos, BITS_PER_UNIT)
7373 && multiple_p (*pbitsize, BITS_PER_UNIT))
7374 *pmode = BLKmode;
7375 else
7376 *pmode = mode;
7377
7378 return exp;
7379 }
7380
7381 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7382
7383 static unsigned HOST_WIDE_INT
target_align(const_tree target)7384 target_align (const_tree target)
7385 {
7386 /* We might have a chain of nested references with intermediate misaligning
7387 bitfields components, so need to recurse to find out. */
7388
7389 unsigned HOST_WIDE_INT this_align, outer_align;
7390
7391 switch (TREE_CODE (target))
7392 {
7393 case BIT_FIELD_REF:
7394 return 1;
7395
7396 case COMPONENT_REF:
7397 this_align = DECL_ALIGN (TREE_OPERAND (target, 1));
7398 outer_align = target_align (TREE_OPERAND (target, 0));
7399 return MIN (this_align, outer_align);
7400
7401 case ARRAY_REF:
7402 case ARRAY_RANGE_REF:
7403 this_align = TYPE_ALIGN (TREE_TYPE (target));
7404 outer_align = target_align (TREE_OPERAND (target, 0));
7405 return MIN (this_align, outer_align);
7406
7407 CASE_CONVERT:
7408 case NON_LVALUE_EXPR:
7409 case VIEW_CONVERT_EXPR:
7410 this_align = TYPE_ALIGN (TREE_TYPE (target));
7411 outer_align = target_align (TREE_OPERAND (target, 0));
7412 return MAX (this_align, outer_align);
7413
7414 default:
7415 return TYPE_ALIGN (TREE_TYPE (target));
7416 }
7417 }
7418
7419
7420 /* Given an rtx VALUE that may contain additions and multiplications, return
7421 an equivalent value that just refers to a register, memory, or constant.
7422 This is done by generating instructions to perform the arithmetic and
7423 returning a pseudo-register containing the value.
7424
7425 The returned value may be a REG, SUBREG, MEM or constant. */
7426
7427 rtx
force_operand(rtx value,rtx target)7428 force_operand (rtx value, rtx target)
7429 {
7430 rtx op1, op2;
7431 /* Use subtarget as the target for operand 0 of a binary operation. */
7432 rtx subtarget = get_subtarget (target);
7433 enum rtx_code code = GET_CODE (value);
7434
7435 /* Check for subreg applied to an expression produced by loop optimizer. */
7436 if (code == SUBREG
7437 && !REG_P (SUBREG_REG (value))
7438 && !MEM_P (SUBREG_REG (value)))
7439 {
7440 value
7441 = simplify_gen_subreg (GET_MODE (value),
7442 force_reg (GET_MODE (SUBREG_REG (value)),
7443 force_operand (SUBREG_REG (value),
7444 NULL_RTX)),
7445 GET_MODE (SUBREG_REG (value)),
7446 SUBREG_BYTE (value));
7447 code = GET_CODE (value);
7448 }
7449
7450 /* Check for a PIC address load. */
7451 if ((code == PLUS || code == MINUS)
7452 && XEXP (value, 0) == pic_offset_table_rtx
7453 && (GET_CODE (XEXP (value, 1)) == SYMBOL_REF
7454 || GET_CODE (XEXP (value, 1)) == LABEL_REF
7455 || GET_CODE (XEXP (value, 1)) == CONST))
7456 {
7457 if (!subtarget)
7458 subtarget = gen_reg_rtx (GET_MODE (value));
7459 emit_move_insn (subtarget, value);
7460 return subtarget;
7461 }
7462
7463 if (ARITHMETIC_P (value))
7464 {
7465 op2 = XEXP (value, 1);
7466 if (!CONSTANT_P (op2) && !(REG_P (op2) && op2 != subtarget))
7467 subtarget = 0;
7468 if (code == MINUS && CONST_INT_P (op2))
7469 {
7470 code = PLUS;
7471 op2 = negate_rtx (GET_MODE (value), op2);
7472 }
7473
7474 /* Check for an addition with OP2 a constant integer and our first
7475 operand a PLUS of a virtual register and something else. In that
7476 case, we want to emit the sum of the virtual register and the
7477 constant first and then add the other value. This allows virtual
7478 register instantiation to simply modify the constant rather than
7479 creating another one around this addition. */
7480 if (code == PLUS && CONST_INT_P (op2)
7481 && GET_CODE (XEXP (value, 0)) == PLUS
7482 && REG_P (XEXP (XEXP (value, 0), 0))
7483 && REGNO (XEXP (XEXP (value, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7484 && REGNO (XEXP (XEXP (value, 0), 0)) <= LAST_VIRTUAL_REGISTER)
7485 {
7486 rtx temp = expand_simple_binop (GET_MODE (value), code,
7487 XEXP (XEXP (value, 0), 0), op2,
7488 subtarget, 0, OPTAB_LIB_WIDEN);
7489 return expand_simple_binop (GET_MODE (value), code, temp,
7490 force_operand (XEXP (XEXP (value,
7491 0), 1), 0),
7492 target, 0, OPTAB_LIB_WIDEN);
7493 }
7494
7495 op1 = force_operand (XEXP (value, 0), subtarget);
7496 op2 = force_operand (op2, NULL_RTX);
7497 switch (code)
7498 {
7499 case MULT:
7500 return expand_mult (GET_MODE (value), op1, op2, target, 1);
7501 case DIV:
7502 if (!INTEGRAL_MODE_P (GET_MODE (value)))
7503 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7504 target, 1, OPTAB_LIB_WIDEN);
7505 else
7506 return expand_divmod (0,
7507 FLOAT_MODE_P (GET_MODE (value))
7508 ? RDIV_EXPR : TRUNC_DIV_EXPR,
7509 GET_MODE (value), op1, op2, target, 0);
7510 case MOD:
7511 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7512 target, 0);
7513 case UDIV:
7514 return expand_divmod (0, TRUNC_DIV_EXPR, GET_MODE (value), op1, op2,
7515 target, 1);
7516 case UMOD:
7517 return expand_divmod (1, TRUNC_MOD_EXPR, GET_MODE (value), op1, op2,
7518 target, 1);
7519 case ASHIFTRT:
7520 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7521 target, 0, OPTAB_LIB_WIDEN);
7522 default:
7523 return expand_simple_binop (GET_MODE (value), code, op1, op2,
7524 target, 1, OPTAB_LIB_WIDEN);
7525 }
7526 }
7527 if (UNARY_P (value))
7528 {
7529 if (!target)
7530 target = gen_reg_rtx (GET_MODE (value));
7531 op1 = force_operand (XEXP (value, 0), NULL_RTX);
7532 switch (code)
7533 {
7534 case ZERO_EXTEND:
7535 case SIGN_EXTEND:
7536 case TRUNCATE:
7537 case FLOAT_EXTEND:
7538 case FLOAT_TRUNCATE:
7539 convert_move (target, op1, code == ZERO_EXTEND);
7540 return target;
7541
7542 case FIX:
7543 case UNSIGNED_FIX:
7544 expand_fix (target, op1, code == UNSIGNED_FIX);
7545 return target;
7546
7547 case FLOAT:
7548 case UNSIGNED_FLOAT:
7549 expand_float (target, op1, code == UNSIGNED_FLOAT);
7550 return target;
7551
7552 default:
7553 return expand_simple_unop (GET_MODE (value), code, op1, target, 0);
7554 }
7555 }
7556
7557 #ifdef INSN_SCHEDULING
7558 /* On machines that have insn scheduling, we want all memory reference to be
7559 explicit, so we need to deal with such paradoxical SUBREGs. */
7560 if (paradoxical_subreg_p (value) && MEM_P (SUBREG_REG (value)))
7561 value
7562 = simplify_gen_subreg (GET_MODE (value),
7563 force_reg (GET_MODE (SUBREG_REG (value)),
7564 force_operand (SUBREG_REG (value),
7565 NULL_RTX)),
7566 GET_MODE (SUBREG_REG (value)),
7567 SUBREG_BYTE (value));
7568 #endif
7569
7570 return value;
7571 }
7572
7573 /* Subroutine of expand_expr: return nonzero iff there is no way that
7574 EXP can reference X, which is being modified. TOP_P is nonzero if this
7575 call is going to be used to determine whether we need a temporary
7576 for EXP, as opposed to a recursive call to this function.
7577
7578 It is always safe for this routine to return zero since it merely
7579 searches for optimization opportunities. */
7580
7581 int
safe_from_p(const_rtx x,tree exp,int top_p)7582 safe_from_p (const_rtx x, tree exp, int top_p)
7583 {
7584 rtx exp_rtl = 0;
7585 int i, nops;
7586
7587 if (x == 0
7588 /* If EXP has varying size, we MUST use a target since we currently
7589 have no way of allocating temporaries of variable size
7590 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7591 So we assume here that something at a higher level has prevented a
7592 clash. This is somewhat bogus, but the best we can do. Only
7593 do this when X is BLKmode and when we are at the top level. */
7594 || (top_p && TREE_TYPE (exp) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp))
7595 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp))) != INTEGER_CST
7596 && (TREE_CODE (TREE_TYPE (exp)) != ARRAY_TYPE
7597 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)) == NULL_TREE
7598 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp)))
7599 != INTEGER_CST)
7600 && GET_MODE (x) == BLKmode)
7601 /* If X is in the outgoing argument area, it is always safe. */
7602 || (MEM_P (x)
7603 && (XEXP (x, 0) == virtual_outgoing_args_rtx
7604 || (GET_CODE (XEXP (x, 0)) == PLUS
7605 && XEXP (XEXP (x, 0), 0) == virtual_outgoing_args_rtx))))
7606 return 1;
7607
7608 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7609 find the underlying pseudo. */
7610 if (GET_CODE (x) == SUBREG)
7611 {
7612 x = SUBREG_REG (x);
7613 if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7614 return 0;
7615 }
7616
7617 /* Now look at our tree code and possibly recurse. */
7618 switch (TREE_CODE_CLASS (TREE_CODE (exp)))
7619 {
7620 case tcc_declaration:
7621 exp_rtl = DECL_RTL_IF_SET (exp);
7622 break;
7623
7624 case tcc_constant:
7625 return 1;
7626
7627 case tcc_exceptional:
7628 if (TREE_CODE (exp) == TREE_LIST)
7629 {
7630 while (1)
7631 {
7632 if (TREE_VALUE (exp) && !safe_from_p (x, TREE_VALUE (exp), 0))
7633 return 0;
7634 exp = TREE_CHAIN (exp);
7635 if (!exp)
7636 return 1;
7637 if (TREE_CODE (exp) != TREE_LIST)
7638 return safe_from_p (x, exp, 0);
7639 }
7640 }
7641 else if (TREE_CODE (exp) == CONSTRUCTOR)
7642 {
7643 constructor_elt *ce;
7644 unsigned HOST_WIDE_INT idx;
7645
7646 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp), idx, ce)
7647 if ((ce->index != NULL_TREE && !safe_from_p (x, ce->index, 0))
7648 || !safe_from_p (x, ce->value, 0))
7649 return 0;
7650 return 1;
7651 }
7652 else if (TREE_CODE (exp) == ERROR_MARK)
7653 return 1; /* An already-visited SAVE_EXPR? */
7654 else
7655 return 0;
7656
7657 case tcc_statement:
7658 /* The only case we look at here is the DECL_INITIAL inside a
7659 DECL_EXPR. */
7660 return (TREE_CODE (exp) != DECL_EXPR
7661 || TREE_CODE (DECL_EXPR_DECL (exp)) != VAR_DECL
7662 || !DECL_INITIAL (DECL_EXPR_DECL (exp))
7663 || safe_from_p (x, DECL_INITIAL (DECL_EXPR_DECL (exp)), 0));
7664
7665 case tcc_binary:
7666 case tcc_comparison:
7667 if (!safe_from_p (x, TREE_OPERAND (exp, 1), 0))
7668 return 0;
7669 /* Fall through. */
7670
7671 case tcc_unary:
7672 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7673
7674 case tcc_expression:
7675 case tcc_reference:
7676 case tcc_vl_exp:
7677 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7678 the expression. If it is set, we conflict iff we are that rtx or
7679 both are in memory. Otherwise, we check all operands of the
7680 expression recursively. */
7681
7682 switch (TREE_CODE (exp))
7683 {
7684 case ADDR_EXPR:
7685 /* If the operand is static or we are static, we can't conflict.
7686 Likewise if we don't conflict with the operand at all. */
7687 if (staticp (TREE_OPERAND (exp, 0))
7688 || TREE_STATIC (exp)
7689 || safe_from_p (x, TREE_OPERAND (exp, 0), 0))
7690 return 1;
7691
7692 /* Otherwise, the only way this can conflict is if we are taking
7693 the address of a DECL a that address if part of X, which is
7694 very rare. */
7695 exp = TREE_OPERAND (exp, 0);
7696 if (DECL_P (exp))
7697 {
7698 if (!DECL_RTL_SET_P (exp)
7699 || !MEM_P (DECL_RTL (exp)))
7700 return 0;
7701 else
7702 exp_rtl = XEXP (DECL_RTL (exp), 0);
7703 }
7704 break;
7705
7706 case MEM_REF:
7707 if (MEM_P (x)
7708 && alias_sets_conflict_p (MEM_ALIAS_SET (x),
7709 get_alias_set (exp)))
7710 return 0;
7711 break;
7712
7713 case CALL_EXPR:
7714 /* Assume that the call will clobber all hard registers and
7715 all of memory. */
7716 if ((REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
7717 || MEM_P (x))
7718 return 0;
7719 break;
7720
7721 case WITH_CLEANUP_EXPR:
7722 case CLEANUP_POINT_EXPR:
7723 /* Lowered by gimplify.c. */
7724 gcc_unreachable ();
7725
7726 case SAVE_EXPR:
7727 return safe_from_p (x, TREE_OPERAND (exp, 0), 0);
7728
7729 default:
7730 break;
7731 }
7732
7733 /* If we have an rtx, we do not need to scan our operands. */
7734 if (exp_rtl)
7735 break;
7736
7737 nops = TREE_OPERAND_LENGTH (exp);
7738 for (i = 0; i < nops; i++)
7739 if (TREE_OPERAND (exp, i) != 0
7740 && ! safe_from_p (x, TREE_OPERAND (exp, i), 0))
7741 return 0;
7742
7743 break;
7744
7745 case tcc_type:
7746 /* Should never get a type here. */
7747 gcc_unreachable ();
7748 }
7749
7750 /* If we have an rtl, find any enclosed object. Then see if we conflict
7751 with it. */
7752 if (exp_rtl)
7753 {
7754 if (GET_CODE (exp_rtl) == SUBREG)
7755 {
7756 exp_rtl = SUBREG_REG (exp_rtl);
7757 if (REG_P (exp_rtl)
7758 && REGNO (exp_rtl) < FIRST_PSEUDO_REGISTER)
7759 return 0;
7760 }
7761
7762 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7763 are memory and they conflict. */
7764 return ! (rtx_equal_p (x, exp_rtl)
7765 || (MEM_P (x) && MEM_P (exp_rtl)
7766 && true_dependence (exp_rtl, VOIDmode, x)));
7767 }
7768
7769 /* If we reach here, it is safe. */
7770 return 1;
7771 }
7772
7773
7774 /* Return the highest power of two that EXP is known to be a multiple of.
7775 This is used in updating alignment of MEMs in array references. */
7776
7777 unsigned HOST_WIDE_INT
highest_pow2_factor(const_tree exp)7778 highest_pow2_factor (const_tree exp)
7779 {
7780 unsigned HOST_WIDE_INT ret;
7781 int trailing_zeros = tree_ctz (exp);
7782 if (trailing_zeros >= HOST_BITS_PER_WIDE_INT)
7783 return BIGGEST_ALIGNMENT;
7784 ret = HOST_WIDE_INT_1U << trailing_zeros;
7785 if (ret > BIGGEST_ALIGNMENT)
7786 return BIGGEST_ALIGNMENT;
7787 return ret;
7788 }
7789
7790 /* Similar, except that the alignment requirements of TARGET are
7791 taken into account. Assume it is at least as aligned as its
7792 type, unless it is a COMPONENT_REF in which case the layout of
7793 the structure gives the alignment. */
7794
7795 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target(const_tree target,const_tree exp)7796 highest_pow2_factor_for_target (const_tree target, const_tree exp)
7797 {
7798 unsigned HOST_WIDE_INT talign = target_align (target) / BITS_PER_UNIT;
7799 unsigned HOST_WIDE_INT factor = highest_pow2_factor (exp);
7800
7801 return MAX (factor, talign);
7802 }
7803
7804 /* Convert the tree comparison code TCODE to the rtl one where the
7805 signedness is UNSIGNEDP. */
7806
7807 static enum rtx_code
convert_tree_comp_to_rtx(enum tree_code tcode,int unsignedp)7808 convert_tree_comp_to_rtx (enum tree_code tcode, int unsignedp)
7809 {
7810 enum rtx_code code;
7811 switch (tcode)
7812 {
7813 case EQ_EXPR:
7814 code = EQ;
7815 break;
7816 case NE_EXPR:
7817 code = NE;
7818 break;
7819 case LT_EXPR:
7820 code = unsignedp ? LTU : LT;
7821 break;
7822 case LE_EXPR:
7823 code = unsignedp ? LEU : LE;
7824 break;
7825 case GT_EXPR:
7826 code = unsignedp ? GTU : GT;
7827 break;
7828 case GE_EXPR:
7829 code = unsignedp ? GEU : GE;
7830 break;
7831 case UNORDERED_EXPR:
7832 code = UNORDERED;
7833 break;
7834 case ORDERED_EXPR:
7835 code = ORDERED;
7836 break;
7837 case UNLT_EXPR:
7838 code = UNLT;
7839 break;
7840 case UNLE_EXPR:
7841 code = UNLE;
7842 break;
7843 case UNGT_EXPR:
7844 code = UNGT;
7845 break;
7846 case UNGE_EXPR:
7847 code = UNGE;
7848 break;
7849 case UNEQ_EXPR:
7850 code = UNEQ;
7851 break;
7852 case LTGT_EXPR:
7853 code = LTGT;
7854 break;
7855
7856 default:
7857 gcc_unreachable ();
7858 }
7859 return code;
7860 }
7861
7862 /* Subroutine of expand_expr. Expand the two operands of a binary
7863 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7864 The value may be stored in TARGET if TARGET is nonzero. The
7865 MODIFIER argument is as documented by expand_expr. */
7866
7867 void
expand_operands(tree exp0,tree exp1,rtx target,rtx * op0,rtx * op1,enum expand_modifier modifier)7868 expand_operands (tree exp0, tree exp1, rtx target, rtx *op0, rtx *op1,
7869 enum expand_modifier modifier)
7870 {
7871 if (! safe_from_p (target, exp1, 1))
7872 target = 0;
7873 if (operand_equal_p (exp0, exp1, 0))
7874 {
7875 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7876 *op1 = copy_rtx (*op0);
7877 }
7878 else
7879 {
7880 *op0 = expand_expr (exp0, target, VOIDmode, modifier);
7881 *op1 = expand_expr (exp1, NULL_RTX, VOIDmode, modifier);
7882 }
7883 }
7884
7885
7886 /* Return a MEM that contains constant EXP. DEFER is as for
7887 output_constant_def and MODIFIER is as for expand_expr. */
7888
7889 static rtx
expand_expr_constant(tree exp,int defer,enum expand_modifier modifier)7890 expand_expr_constant (tree exp, int defer, enum expand_modifier modifier)
7891 {
7892 rtx mem;
7893
7894 mem = output_constant_def (exp, defer);
7895 if (modifier != EXPAND_INITIALIZER)
7896 mem = use_anchored_address (mem);
7897 return mem;
7898 }
7899
7900 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7901 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7902
7903 static rtx
expand_expr_addr_expr_1(tree exp,rtx target,scalar_int_mode tmode,enum expand_modifier modifier,addr_space_t as)7904 expand_expr_addr_expr_1 (tree exp, rtx target, scalar_int_mode tmode,
7905 enum expand_modifier modifier, addr_space_t as)
7906 {
7907 rtx result, subtarget;
7908 tree inner, offset;
7909 poly_int64 bitsize, bitpos;
7910 int unsignedp, reversep, volatilep = 0;
7911 machine_mode mode1;
7912
7913 /* If we are taking the address of a constant and are at the top level,
7914 we have to use output_constant_def since we can't call force_const_mem
7915 at top level. */
7916 /* ??? This should be considered a front-end bug. We should not be
7917 generating ADDR_EXPR of something that isn't an LVALUE. The only
7918 exception here is STRING_CST. */
7919 if (CONSTANT_CLASS_P (exp))
7920 {
7921 result = XEXP (expand_expr_constant (exp, 0, modifier), 0);
7922 if (modifier < EXPAND_SUM)
7923 result = force_operand (result, target);
7924 return result;
7925 }
7926
7927 /* Everything must be something allowed by is_gimple_addressable. */
7928 switch (TREE_CODE (exp))
7929 {
7930 case INDIRECT_REF:
7931 /* This case will happen via recursion for &a->b. */
7932 return expand_expr (TREE_OPERAND (exp, 0), target, tmode, modifier);
7933
7934 case MEM_REF:
7935 {
7936 tree tem = TREE_OPERAND (exp, 0);
7937 if (!integer_zerop (TREE_OPERAND (exp, 1)))
7938 tem = fold_build_pointer_plus (tem, TREE_OPERAND (exp, 1));
7939 return expand_expr (tem, target, tmode, modifier);
7940 }
7941
7942 case TARGET_MEM_REF:
7943 return addr_for_mem_ref (exp, as, true);
7944
7945 case CONST_DECL:
7946 /* Expand the initializer like constants above. */
7947 result = XEXP (expand_expr_constant (DECL_INITIAL (exp),
7948 0, modifier), 0);
7949 if (modifier < EXPAND_SUM)
7950 result = force_operand (result, target);
7951 return result;
7952
7953 case REALPART_EXPR:
7954 /* The real part of the complex number is always first, therefore
7955 the address is the same as the address of the parent object. */
7956 offset = 0;
7957 bitpos = 0;
7958 inner = TREE_OPERAND (exp, 0);
7959 break;
7960
7961 case IMAGPART_EXPR:
7962 /* The imaginary part of the complex number is always second.
7963 The expression is therefore always offset by the size of the
7964 scalar type. */
7965 offset = 0;
7966 bitpos = GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp)));
7967 inner = TREE_OPERAND (exp, 0);
7968 break;
7969
7970 case COMPOUND_LITERAL_EXPR:
7971 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7972 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7973 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7974 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7975 the initializers aren't gimplified. */
7976 if (COMPOUND_LITERAL_EXPR_DECL (exp)
7977 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp)))
7978 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp),
7979 target, tmode, modifier, as);
7980 /* FALLTHRU */
7981 default:
7982 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7983 expand_expr, as that can have various side effects; LABEL_DECLs for
7984 example, may not have their DECL_RTL set yet. Expand the rtl of
7985 CONSTRUCTORs too, which should yield a memory reference for the
7986 constructor's contents. Assume language specific tree nodes can
7987 be expanded in some interesting way. */
7988 gcc_assert (TREE_CODE (exp) < LAST_AND_UNUSED_TREE_CODE);
7989 if (DECL_P (exp)
7990 || TREE_CODE (exp) == CONSTRUCTOR
7991 || TREE_CODE (exp) == COMPOUND_LITERAL_EXPR)
7992 {
7993 result = expand_expr (exp, target, tmode,
7994 modifier == EXPAND_INITIALIZER
7995 ? EXPAND_INITIALIZER : EXPAND_CONST_ADDRESS);
7996
7997 /* If the DECL isn't in memory, then the DECL wasn't properly
7998 marked TREE_ADDRESSABLE, which will be either a front-end
7999 or a tree optimizer bug. */
8000
8001 gcc_assert (MEM_P (result));
8002 result = XEXP (result, 0);
8003
8004 /* ??? Is this needed anymore? */
8005 if (DECL_P (exp))
8006 TREE_USED (exp) = 1;
8007
8008 if (modifier != EXPAND_INITIALIZER
8009 && modifier != EXPAND_CONST_ADDRESS
8010 && modifier != EXPAND_SUM)
8011 result = force_operand (result, target);
8012 return result;
8013 }
8014
8015 /* Pass FALSE as the last argument to get_inner_reference although
8016 we are expanding to RTL. The rationale is that we know how to
8017 handle "aligning nodes" here: we can just bypass them because
8018 they won't change the final object whose address will be returned
8019 (they actually exist only for that purpose). */
8020 inner = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
8021 &unsignedp, &reversep, &volatilep);
8022 break;
8023 }
8024
8025 /* We must have made progress. */
8026 gcc_assert (inner != exp);
8027
8028 subtarget = offset || maybe_ne (bitpos, 0) ? NULL_RTX : target;
8029 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8030 inner alignment, force the inner to be sufficiently aligned. */
8031 if (CONSTANT_CLASS_P (inner)
8032 && TYPE_ALIGN (TREE_TYPE (inner)) < TYPE_ALIGN (TREE_TYPE (exp)))
8033 {
8034 inner = copy_node (inner);
8035 TREE_TYPE (inner) = copy_node (TREE_TYPE (inner));
8036 SET_TYPE_ALIGN (TREE_TYPE (inner), TYPE_ALIGN (TREE_TYPE (exp)));
8037 TYPE_USER_ALIGN (TREE_TYPE (inner)) = 1;
8038 }
8039 result = expand_expr_addr_expr_1 (inner, subtarget, tmode, modifier, as);
8040
8041 if (offset)
8042 {
8043 rtx tmp;
8044
8045 if (modifier != EXPAND_NORMAL)
8046 result = force_operand (result, NULL);
8047 tmp = expand_expr (offset, NULL_RTX, tmode,
8048 modifier == EXPAND_INITIALIZER
8049 ? EXPAND_INITIALIZER : EXPAND_NORMAL);
8050
8051 /* expand_expr is allowed to return an object in a mode other
8052 than TMODE. If it did, we need to convert. */
8053 if (GET_MODE (tmp) != VOIDmode && tmode != GET_MODE (tmp))
8054 tmp = convert_modes (tmode, GET_MODE (tmp),
8055 tmp, TYPE_UNSIGNED (TREE_TYPE (offset)));
8056 result = convert_memory_address_addr_space (tmode, result, as);
8057 tmp = convert_memory_address_addr_space (tmode, tmp, as);
8058
8059 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8060 result = simplify_gen_binary (PLUS, tmode, result, tmp);
8061 else
8062 {
8063 subtarget = maybe_ne (bitpos, 0) ? NULL_RTX : target;
8064 result = expand_simple_binop (tmode, PLUS, result, tmp, subtarget,
8065 1, OPTAB_LIB_WIDEN);
8066 }
8067 }
8068
8069 if (maybe_ne (bitpos, 0))
8070 {
8071 /* Someone beforehand should have rejected taking the address
8072 of an object that isn't byte-aligned. */
8073 poly_int64 bytepos = exact_div (bitpos, BITS_PER_UNIT);
8074 result = convert_memory_address_addr_space (tmode, result, as);
8075 result = plus_constant (tmode, result, bytepos);
8076 if (modifier < EXPAND_SUM)
8077 result = force_operand (result, target);
8078 }
8079
8080 return result;
8081 }
8082
8083 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8084 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8085
8086 static rtx
expand_expr_addr_expr(tree exp,rtx target,machine_mode tmode,enum expand_modifier modifier)8087 expand_expr_addr_expr (tree exp, rtx target, machine_mode tmode,
8088 enum expand_modifier modifier)
8089 {
8090 addr_space_t as = ADDR_SPACE_GENERIC;
8091 scalar_int_mode address_mode = Pmode;
8092 scalar_int_mode pointer_mode = ptr_mode;
8093 machine_mode rmode;
8094 rtx result;
8095
8096 /* Target mode of VOIDmode says "whatever's natural". */
8097 if (tmode == VOIDmode)
8098 tmode = TYPE_MODE (TREE_TYPE (exp));
8099
8100 if (POINTER_TYPE_P (TREE_TYPE (exp)))
8101 {
8102 as = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp)));
8103 address_mode = targetm.addr_space.address_mode (as);
8104 pointer_mode = targetm.addr_space.pointer_mode (as);
8105 }
8106
8107 /* We can get called with some Weird Things if the user does silliness
8108 like "(short) &a". In that case, convert_memory_address won't do
8109 the right thing, so ignore the given target mode. */
8110 scalar_int_mode new_tmode = (tmode == pointer_mode
8111 ? pointer_mode
8112 : address_mode);
8113
8114 result = expand_expr_addr_expr_1 (TREE_OPERAND (exp, 0), target,
8115 new_tmode, modifier, as);
8116
8117 /* Despite expand_expr claims concerning ignoring TMODE when not
8118 strictly convenient, stuff breaks if we don't honor it. Note
8119 that combined with the above, we only do this for pointer modes. */
8120 rmode = GET_MODE (result);
8121 if (rmode == VOIDmode)
8122 rmode = new_tmode;
8123 if (rmode != new_tmode)
8124 result = convert_memory_address_addr_space (new_tmode, result, as);
8125
8126 return result;
8127 }
8128
8129 /* Generate code for computing CONSTRUCTOR EXP.
8130 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8131 is TRUE, instead of creating a temporary variable in memory
8132 NULL is returned and the caller needs to handle it differently. */
8133
8134 static rtx
expand_constructor(tree exp,rtx target,enum expand_modifier modifier,bool avoid_temp_mem)8135 expand_constructor (tree exp, rtx target, enum expand_modifier modifier,
8136 bool avoid_temp_mem)
8137 {
8138 tree type = TREE_TYPE (exp);
8139 machine_mode mode = TYPE_MODE (type);
8140
8141 /* Try to avoid creating a temporary at all. This is possible
8142 if all of the initializer is zero.
8143 FIXME: try to handle all [0..255] initializers we can handle
8144 with memset. */
8145 if (TREE_STATIC (exp)
8146 && !TREE_ADDRESSABLE (exp)
8147 && target != 0 && mode == BLKmode
8148 && all_zeros_p (exp))
8149 {
8150 clear_storage (target, expr_size (exp), BLOCK_OP_NORMAL);
8151 return target;
8152 }
8153
8154 /* All elts simple constants => refer to a constant in memory. But
8155 if this is a non-BLKmode mode, let it store a field at a time
8156 since that should make a CONST_INT, CONST_WIDE_INT or
8157 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8158 use, it is best to store directly into the target unless the type
8159 is large enough that memcpy will be used. If we are making an
8160 initializer and all operands are constant, put it in memory as
8161 well.
8162
8163 FIXME: Avoid trying to fill vector constructors piece-meal.
8164 Output them with output_constant_def below unless we're sure
8165 they're zeros. This should go away when vector initializers
8166 are treated like VECTOR_CST instead of arrays. */
8167 if ((TREE_STATIC (exp)
8168 && ((mode == BLKmode
8169 && ! (target != 0 && safe_from_p (target, exp, 1)))
8170 || TREE_ADDRESSABLE (exp)
8171 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type))
8172 && (! can_move_by_pieces
8173 (tree_to_uhwi (TYPE_SIZE_UNIT (type)),
8174 TYPE_ALIGN (type)))
8175 && ! mostly_zeros_p (exp))))
8176 || ((modifier == EXPAND_INITIALIZER || modifier == EXPAND_CONST_ADDRESS)
8177 && TREE_CONSTANT (exp)))
8178 {
8179 rtx constructor;
8180
8181 if (avoid_temp_mem)
8182 return NULL_RTX;
8183
8184 constructor = expand_expr_constant (exp, 1, modifier);
8185
8186 if (modifier != EXPAND_CONST_ADDRESS
8187 && modifier != EXPAND_INITIALIZER
8188 && modifier != EXPAND_SUM)
8189 constructor = validize_mem (constructor);
8190
8191 return constructor;
8192 }
8193
8194 /* Handle calls that pass values in multiple non-contiguous
8195 locations. The Irix 6 ABI has examples of this. */
8196 if (target == 0 || ! safe_from_p (target, exp, 1)
8197 || GET_CODE (target) == PARALLEL || modifier == EXPAND_STACK_PARM)
8198 {
8199 if (avoid_temp_mem)
8200 return NULL_RTX;
8201
8202 target = assign_temp (type, TREE_ADDRESSABLE (exp), 1);
8203 }
8204
8205 store_constructor (exp, target, 0, int_expr_size (exp), false);
8206 return target;
8207 }
8208
8209
8210 /* expand_expr: generate code for computing expression EXP.
8211 An rtx for the computed value is returned. The value is never null.
8212 In the case of a void EXP, const0_rtx is returned.
8213
8214 The value may be stored in TARGET if TARGET is nonzero.
8215 TARGET is just a suggestion; callers must assume that
8216 the rtx returned may not be the same as TARGET.
8217
8218 If TARGET is CONST0_RTX, it means that the value will be ignored.
8219
8220 If TMODE is not VOIDmode, it suggests generating the
8221 result in mode TMODE. But this is done only when convenient.
8222 Otherwise, TMODE is ignored and the value generated in its natural mode.
8223 TMODE is just a suggestion; callers must assume that
8224 the rtx returned may not have mode TMODE.
8225
8226 Note that TARGET may have neither TMODE nor MODE. In that case, it
8227 probably will not be used.
8228
8229 If MODIFIER is EXPAND_SUM then when EXP is an addition
8230 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8231 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8232 products as above, or REG or MEM, or constant.
8233 Ordinarily in such cases we would output mul or add instructions
8234 and then return a pseudo reg containing the sum.
8235
8236 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8237 it also marks a label as absolutely required (it can't be dead).
8238 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8239 This is used for outputting expressions used in initializers.
8240
8241 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8242 with a constant address even if that address is not normally legitimate.
8243 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8244
8245 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8246 a call parameter. Such targets require special care as we haven't yet
8247 marked TARGET so that it's safe from being trashed by libcalls. We
8248 don't want to use TARGET for anything but the final result;
8249 Intermediate values must go elsewhere. Additionally, calls to
8250 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8251
8252 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8253 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8254 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8255 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8256 recursively.
8257
8258 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8259 In this case, we don't adjust a returned MEM rtx that wouldn't be
8260 sufficiently aligned for its mode; instead, it's up to the caller
8261 to deal with it afterwards. This is used to make sure that unaligned
8262 base objects for which out-of-bounds accesses are supported, for
8263 example record types with trailing arrays, aren't realigned behind
8264 the back of the caller.
8265 The normal operating mode is to pass FALSE for this parameter. */
8266
8267 rtx
expand_expr_real(tree exp,rtx target,machine_mode tmode,enum expand_modifier modifier,rtx * alt_rtl,bool inner_reference_p)8268 expand_expr_real (tree exp, rtx target, machine_mode tmode,
8269 enum expand_modifier modifier, rtx *alt_rtl,
8270 bool inner_reference_p)
8271 {
8272 rtx ret;
8273
8274 /* Handle ERROR_MARK before anybody tries to access its type. */
8275 if (TREE_CODE (exp) == ERROR_MARK
8276 || (TREE_CODE (TREE_TYPE (exp)) == ERROR_MARK))
8277 {
8278 ret = CONST0_RTX (tmode);
8279 return ret ? ret : const0_rtx;
8280 }
8281
8282 ret = expand_expr_real_1 (exp, target, tmode, modifier, alt_rtl,
8283 inner_reference_p);
8284 return ret;
8285 }
8286
8287 /* Try to expand the conditional expression which is represented by
8288 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8289 return the rtl reg which represents the result. Otherwise return
8290 NULL_RTX. */
8291
8292 static rtx
expand_cond_expr_using_cmove(tree treeop0 ATTRIBUTE_UNUSED,tree treeop1 ATTRIBUTE_UNUSED,tree treeop2 ATTRIBUTE_UNUSED)8293 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED,
8294 tree treeop1 ATTRIBUTE_UNUSED,
8295 tree treeop2 ATTRIBUTE_UNUSED)
8296 {
8297 rtx insn;
8298 rtx op00, op01, op1, op2;
8299 enum rtx_code comparison_code;
8300 machine_mode comparison_mode;
8301 gimple *srcstmt;
8302 rtx temp;
8303 tree type = TREE_TYPE (treeop1);
8304 int unsignedp = TYPE_UNSIGNED (type);
8305 machine_mode mode = TYPE_MODE (type);
8306 machine_mode orig_mode = mode;
8307 static bool expanding_cond_expr_using_cmove = false;
8308
8309 /* Conditional move expansion can end up TERing two operands which,
8310 when recursively hitting conditional expressions can result in
8311 exponential behavior if the cmove expansion ultimatively fails.
8312 It's hardly profitable to TER a cmove into a cmove so avoid doing
8313 that by failing early if we end up recursing. */
8314 if (expanding_cond_expr_using_cmove)
8315 return NULL_RTX;
8316
8317 /* If we cannot do a conditional move on the mode, try doing it
8318 with the promoted mode. */
8319 if (!can_conditionally_move_p (mode))
8320 {
8321 mode = promote_mode (type, mode, &unsignedp);
8322 if (!can_conditionally_move_p (mode))
8323 return NULL_RTX;
8324 temp = assign_temp (type, 0, 0); /* Use promoted mode for temp. */
8325 }
8326 else
8327 temp = assign_temp (type, 0, 1);
8328
8329 expanding_cond_expr_using_cmove = true;
8330 start_sequence ();
8331 expand_operands (treeop1, treeop2,
8332 temp, &op1, &op2, EXPAND_NORMAL);
8333
8334 if (TREE_CODE (treeop0) == SSA_NAME
8335 && (srcstmt = get_def_for_expr_class (treeop0, tcc_comparison)))
8336 {
8337 tree type = TREE_TYPE (gimple_assign_rhs1 (srcstmt));
8338 enum tree_code cmpcode = gimple_assign_rhs_code (srcstmt);
8339 op00 = expand_normal (gimple_assign_rhs1 (srcstmt));
8340 op01 = expand_normal (gimple_assign_rhs2 (srcstmt));
8341 comparison_mode = TYPE_MODE (type);
8342 unsignedp = TYPE_UNSIGNED (type);
8343 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8344 }
8345 else if (COMPARISON_CLASS_P (treeop0))
8346 {
8347 tree type = TREE_TYPE (TREE_OPERAND (treeop0, 0));
8348 enum tree_code cmpcode = TREE_CODE (treeop0);
8349 op00 = expand_normal (TREE_OPERAND (treeop0, 0));
8350 op01 = expand_normal (TREE_OPERAND (treeop0, 1));
8351 unsignedp = TYPE_UNSIGNED (type);
8352 comparison_mode = TYPE_MODE (type);
8353 comparison_code = convert_tree_comp_to_rtx (cmpcode, unsignedp);
8354 }
8355 else
8356 {
8357 op00 = expand_normal (treeop0);
8358 op01 = const0_rtx;
8359 comparison_code = NE;
8360 comparison_mode = GET_MODE (op00);
8361 if (comparison_mode == VOIDmode)
8362 comparison_mode = TYPE_MODE (TREE_TYPE (treeop0));
8363 }
8364 expanding_cond_expr_using_cmove = false;
8365
8366 if (GET_MODE (op1) != mode)
8367 op1 = gen_lowpart (mode, op1);
8368
8369 if (GET_MODE (op2) != mode)
8370 op2 = gen_lowpart (mode, op2);
8371
8372 /* Try to emit the conditional move. */
8373 insn = emit_conditional_move (temp, comparison_code,
8374 op00, op01, comparison_mode,
8375 op1, op2, mode,
8376 unsignedp);
8377
8378 /* If we could do the conditional move, emit the sequence,
8379 and return. */
8380 if (insn)
8381 {
8382 rtx_insn *seq = get_insns ();
8383 end_sequence ();
8384 emit_insn (seq);
8385 return convert_modes (orig_mode, mode, temp, 0);
8386 }
8387
8388 /* Otherwise discard the sequence and fall back to code with
8389 branches. */
8390 end_sequence ();
8391 return NULL_RTX;
8392 }
8393
8394 rtx
expand_expr_real_2(sepops ops,rtx target,machine_mode tmode,enum expand_modifier modifier)8395 expand_expr_real_2 (sepops ops, rtx target, machine_mode tmode,
8396 enum expand_modifier modifier)
8397 {
8398 rtx op0, op1, op2, temp;
8399 rtx_code_label *lab;
8400 tree type;
8401 int unsignedp;
8402 machine_mode mode;
8403 scalar_int_mode int_mode;
8404 enum tree_code code = ops->code;
8405 optab this_optab;
8406 rtx subtarget, original_target;
8407 int ignore;
8408 bool reduce_bit_field;
8409 location_t loc = ops->location;
8410 tree treeop0, treeop1, treeop2;
8411 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8412 ? reduce_to_bit_field_precision ((expr), \
8413 target, \
8414 type) \
8415 : (expr))
8416
8417 type = ops->type;
8418 mode = TYPE_MODE (type);
8419 unsignedp = TYPE_UNSIGNED (type);
8420
8421 treeop0 = ops->op0;
8422 treeop1 = ops->op1;
8423 treeop2 = ops->op2;
8424
8425 /* We should be called only on simple (binary or unary) expressions,
8426 exactly those that are valid in gimple expressions that aren't
8427 GIMPLE_SINGLE_RHS (or invalid). */
8428 gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
8429 || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
8430 || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
8431
8432 ignore = (target == const0_rtx
8433 || ((CONVERT_EXPR_CODE_P (code)
8434 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
8435 && TREE_CODE (type) == VOID_TYPE));
8436
8437 /* We should be called only if we need the result. */
8438 gcc_assert (!ignore);
8439
8440 /* An operation in what may be a bit-field type needs the
8441 result to be reduced to the precision of the bit-field type,
8442 which is narrower than that of the type's mode. */
8443 reduce_bit_field = (INTEGRAL_TYPE_P (type)
8444 && !type_has_mode_precision_p (type));
8445
8446 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
8447 target = 0;
8448
8449 /* Use subtarget as the target for operand 0 of a binary operation. */
8450 subtarget = get_subtarget (target);
8451 original_target = target;
8452
8453 switch (code)
8454 {
8455 case NON_LVALUE_EXPR:
8456 case PAREN_EXPR:
8457 CASE_CONVERT:
8458 if (treeop0 == error_mark_node)
8459 return const0_rtx;
8460
8461 if (TREE_CODE (type) == UNION_TYPE)
8462 {
8463 tree valtype = TREE_TYPE (treeop0);
8464
8465 /* If both input and output are BLKmode, this conversion isn't doing
8466 anything except possibly changing memory attribute. */
8467 if (mode == BLKmode && TYPE_MODE (valtype) == BLKmode)
8468 {
8469 rtx result = expand_expr (treeop0, target, tmode,
8470 modifier);
8471
8472 result = copy_rtx (result);
8473 set_mem_attributes (result, type, 0);
8474 return result;
8475 }
8476
8477 if (target == 0)
8478 {
8479 if (TYPE_MODE (type) != BLKmode)
8480 target = gen_reg_rtx (TYPE_MODE (type));
8481 else
8482 target = assign_temp (type, 1, 1);
8483 }
8484
8485 if (MEM_P (target))
8486 /* Store data into beginning of memory target. */
8487 store_expr (treeop0,
8488 adjust_address (target, TYPE_MODE (valtype), 0),
8489 modifier == EXPAND_STACK_PARM,
8490 false, TYPE_REVERSE_STORAGE_ORDER (type));
8491
8492 else
8493 {
8494 gcc_assert (REG_P (target)
8495 && !TYPE_REVERSE_STORAGE_ORDER (type));
8496
8497 /* Store this field into a union of the proper type. */
8498 poly_uint64 op0_size
8499 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0)));
8500 poly_uint64 union_size = GET_MODE_BITSIZE (mode);
8501 store_field (target,
8502 /* The conversion must be constructed so that
8503 we know at compile time how many bits
8504 to preserve. */
8505 ordered_min (op0_size, union_size),
8506 0, 0, 0, TYPE_MODE (valtype), treeop0, 0,
8507 false, false);
8508 }
8509
8510 /* Return the entire union. */
8511 return target;
8512 }
8513
8514 if (mode == TYPE_MODE (TREE_TYPE (treeop0)))
8515 {
8516 op0 = expand_expr (treeop0, target, VOIDmode,
8517 modifier);
8518
8519 /* If the signedness of the conversion differs and OP0 is
8520 a promoted SUBREG, clear that indication since we now
8521 have to do the proper extension. */
8522 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)) != unsignedp
8523 && GET_CODE (op0) == SUBREG)
8524 SUBREG_PROMOTED_VAR_P (op0) = 0;
8525
8526 return REDUCE_BIT_FIELD (op0);
8527 }
8528
8529 op0 = expand_expr (treeop0, NULL_RTX, mode,
8530 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier);
8531 if (GET_MODE (op0) == mode)
8532 ;
8533
8534 /* If OP0 is a constant, just convert it into the proper mode. */
8535 else if (CONSTANT_P (op0))
8536 {
8537 tree inner_type = TREE_TYPE (treeop0);
8538 machine_mode inner_mode = GET_MODE (op0);
8539
8540 if (inner_mode == VOIDmode)
8541 inner_mode = TYPE_MODE (inner_type);
8542
8543 if (modifier == EXPAND_INITIALIZER)
8544 op0 = lowpart_subreg (mode, op0, inner_mode);
8545 else
8546 op0= convert_modes (mode, inner_mode, op0,
8547 TYPE_UNSIGNED (inner_type));
8548 }
8549
8550 else if (modifier == EXPAND_INITIALIZER)
8551 op0 = gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8552 ? ZERO_EXTEND : SIGN_EXTEND, mode, op0);
8553
8554 else if (target == 0)
8555 op0 = convert_to_mode (mode, op0,
8556 TYPE_UNSIGNED (TREE_TYPE
8557 (treeop0)));
8558 else
8559 {
8560 convert_move (target, op0,
8561 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
8562 op0 = target;
8563 }
8564
8565 return REDUCE_BIT_FIELD (op0);
8566
8567 case ADDR_SPACE_CONVERT_EXPR:
8568 {
8569 tree treeop0_type = TREE_TYPE (treeop0);
8570
8571 gcc_assert (POINTER_TYPE_P (type));
8572 gcc_assert (POINTER_TYPE_P (treeop0_type));
8573
8574 addr_space_t as_to = TYPE_ADDR_SPACE (TREE_TYPE (type));
8575 addr_space_t as_from = TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type));
8576
8577 /* Conversions between pointers to the same address space should
8578 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8579 gcc_assert (as_to != as_from);
8580
8581 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
8582
8583 /* Ask target code to handle conversion between pointers
8584 to overlapping address spaces. */
8585 if (targetm.addr_space.subset_p (as_to, as_from)
8586 || targetm.addr_space.subset_p (as_from, as_to))
8587 {
8588 op0 = targetm.addr_space.convert (op0, treeop0_type, type);
8589 }
8590 else
8591 {
8592 /* For disjoint address spaces, converting anything but a null
8593 pointer invokes undefined behavior. We truncate or extend the
8594 value as if we'd converted via integers, which handles 0 as
8595 required, and all others as the programmer likely expects. */
8596 #ifndef POINTERS_EXTEND_UNSIGNED
8597 const int POINTERS_EXTEND_UNSIGNED = 1;
8598 #endif
8599 op0 = convert_modes (mode, TYPE_MODE (treeop0_type),
8600 op0, POINTERS_EXTEND_UNSIGNED);
8601 }
8602 gcc_assert (op0);
8603 return op0;
8604 }
8605
8606 case POINTER_PLUS_EXPR:
8607 /* Even though the sizetype mode and the pointer's mode can be different
8608 expand is able to handle this correctly and get the correct result out
8609 of the PLUS_EXPR code. */
8610 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8611 if sizetype precision is smaller than pointer precision. */
8612 if (TYPE_PRECISION (sizetype) < TYPE_PRECISION (type))
8613 treeop1 = fold_convert_loc (loc, type,
8614 fold_convert_loc (loc, ssizetype,
8615 treeop1));
8616 /* If sizetype precision is larger than pointer precision, truncate the
8617 offset to have matching modes. */
8618 else if (TYPE_PRECISION (sizetype) > TYPE_PRECISION (type))
8619 treeop1 = fold_convert_loc (loc, type, treeop1);
8620 /* FALLTHRU */
8621
8622 case PLUS_EXPR:
8623 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8624 something else, make sure we add the register to the constant and
8625 then to the other thing. This case can occur during strength
8626 reduction and doing it this way will produce better code if the
8627 frame pointer or argument pointer is eliminated.
8628
8629 fold-const.c will ensure that the constant is always in the inner
8630 PLUS_EXPR, so the only case we need to do anything about is if
8631 sp, ap, or fp is our second argument, in which case we must swap
8632 the innermost first argument and our second argument. */
8633
8634 if (TREE_CODE (treeop0) == PLUS_EXPR
8635 && TREE_CODE (TREE_OPERAND (treeop0, 1)) == INTEGER_CST
8636 && VAR_P (treeop1)
8637 && (DECL_RTL (treeop1) == frame_pointer_rtx
8638 || DECL_RTL (treeop1) == stack_pointer_rtx
8639 || DECL_RTL (treeop1) == arg_pointer_rtx))
8640 {
8641 gcc_unreachable ();
8642 }
8643
8644 /* If the result is to be ptr_mode and we are adding an integer to
8645 something, we might be forming a constant. So try to use
8646 plus_constant. If it produces a sum and we can't accept it,
8647 use force_operand. This allows P = &ARR[const] to generate
8648 efficient code on machines where a SYMBOL_REF is not a valid
8649 address.
8650
8651 If this is an EXPAND_SUM call, always return the sum. */
8652 if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER
8653 || (mode == ptr_mode && (unsignedp || ! flag_trapv)))
8654 {
8655 if (modifier == EXPAND_STACK_PARM)
8656 target = 0;
8657 if (TREE_CODE (treeop0) == INTEGER_CST
8658 && HWI_COMPUTABLE_MODE_P (mode)
8659 && TREE_CONSTANT (treeop1))
8660 {
8661 rtx constant_part;
8662 HOST_WIDE_INT wc;
8663 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop1));
8664
8665 op1 = expand_expr (treeop1, subtarget, VOIDmode,
8666 EXPAND_SUM);
8667 /* Use wi::shwi to ensure that the constant is
8668 truncated according to the mode of OP1, then sign extended
8669 to a HOST_WIDE_INT. Using the constant directly can result
8670 in non-canonical RTL in a 64x32 cross compile. */
8671 wc = TREE_INT_CST_LOW (treeop0);
8672 constant_part =
8673 immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8674 op1 = plus_constant (mode, op1, INTVAL (constant_part));
8675 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8676 op1 = force_operand (op1, target);
8677 return REDUCE_BIT_FIELD (op1);
8678 }
8679
8680 else if (TREE_CODE (treeop1) == INTEGER_CST
8681 && HWI_COMPUTABLE_MODE_P (mode)
8682 && TREE_CONSTANT (treeop0))
8683 {
8684 rtx constant_part;
8685 HOST_WIDE_INT wc;
8686 machine_mode wmode = TYPE_MODE (TREE_TYPE (treeop0));
8687
8688 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8689 (modifier == EXPAND_INITIALIZER
8690 ? EXPAND_INITIALIZER : EXPAND_SUM));
8691 if (! CONSTANT_P (op0))
8692 {
8693 op1 = expand_expr (treeop1, NULL_RTX,
8694 VOIDmode, modifier);
8695 /* Return a PLUS if modifier says it's OK. */
8696 if (modifier == EXPAND_SUM
8697 || modifier == EXPAND_INITIALIZER)
8698 return simplify_gen_binary (PLUS, mode, op0, op1);
8699 goto binop2;
8700 }
8701 /* Use wi::shwi to ensure that the constant is
8702 truncated according to the mode of OP1, then sign extended
8703 to a HOST_WIDE_INT. Using the constant directly can result
8704 in non-canonical RTL in a 64x32 cross compile. */
8705 wc = TREE_INT_CST_LOW (treeop1);
8706 constant_part
8707 = immed_wide_int_const (wi::shwi (wc, wmode), wmode);
8708 op0 = plus_constant (mode, op0, INTVAL (constant_part));
8709 if (modifier != EXPAND_SUM && modifier != EXPAND_INITIALIZER)
8710 op0 = force_operand (op0, target);
8711 return REDUCE_BIT_FIELD (op0);
8712 }
8713 }
8714
8715 /* Use TER to expand pointer addition of a negated value
8716 as pointer subtraction. */
8717 if ((POINTER_TYPE_P (TREE_TYPE (treeop0))
8718 || (TREE_CODE (TREE_TYPE (treeop0)) == VECTOR_TYPE
8719 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0)))))
8720 && TREE_CODE (treeop1) == SSA_NAME
8721 && TYPE_MODE (TREE_TYPE (treeop0))
8722 == TYPE_MODE (TREE_TYPE (treeop1)))
8723 {
8724 gimple *def = get_def_for_expr (treeop1, NEGATE_EXPR);
8725 if (def)
8726 {
8727 treeop1 = gimple_assign_rhs1 (def);
8728 code = MINUS_EXPR;
8729 goto do_minus;
8730 }
8731 }
8732
8733 /* No sense saving up arithmetic to be done
8734 if it's all in the wrong mode to form part of an address.
8735 And force_operand won't know whether to sign-extend or
8736 zero-extend. */
8737 if (modifier != EXPAND_INITIALIZER
8738 && (modifier != EXPAND_SUM || mode != ptr_mode))
8739 {
8740 expand_operands (treeop0, treeop1,
8741 subtarget, &op0, &op1, modifier);
8742 if (op0 == const0_rtx)
8743 return op1;
8744 if (op1 == const0_rtx)
8745 return op0;
8746 goto binop2;
8747 }
8748
8749 expand_operands (treeop0, treeop1,
8750 subtarget, &op0, &op1, modifier);
8751 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8752
8753 case MINUS_EXPR:
8754 case POINTER_DIFF_EXPR:
8755 do_minus:
8756 /* For initializers, we are allowed to return a MINUS of two
8757 symbolic constants. Here we handle all cases when both operands
8758 are constant. */
8759 /* Handle difference of two symbolic constants,
8760 for the sake of an initializer. */
8761 if ((modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
8762 && really_constant_p (treeop0)
8763 && really_constant_p (treeop1))
8764 {
8765 expand_operands (treeop0, treeop1,
8766 NULL_RTX, &op0, &op1, modifier);
8767 return simplify_gen_binary (MINUS, mode, op0, op1);
8768 }
8769
8770 /* No sense saving up arithmetic to be done
8771 if it's all in the wrong mode to form part of an address.
8772 And force_operand won't know whether to sign-extend or
8773 zero-extend. */
8774 if (modifier != EXPAND_INITIALIZER
8775 && (modifier != EXPAND_SUM || mode != ptr_mode))
8776 goto binop;
8777
8778 expand_operands (treeop0, treeop1,
8779 subtarget, &op0, &op1, modifier);
8780
8781 /* Convert A - const to A + (-const). */
8782 if (CONST_INT_P (op1))
8783 {
8784 op1 = negate_rtx (mode, op1);
8785 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
8786 }
8787
8788 goto binop2;
8789
8790 case WIDEN_MULT_PLUS_EXPR:
8791 case WIDEN_MULT_MINUS_EXPR:
8792 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
8793 op2 = expand_normal (treeop2);
8794 target = expand_widen_pattern_expr (ops, op0, op1, op2,
8795 target, unsignedp);
8796 return target;
8797
8798 case WIDEN_MULT_EXPR:
8799 /* If first operand is constant, swap them.
8800 Thus the following special case checks need only
8801 check the second operand. */
8802 if (TREE_CODE (treeop0) == INTEGER_CST)
8803 std::swap (treeop0, treeop1);
8804
8805 /* First, check if we have a multiplication of one signed and one
8806 unsigned operand. */
8807 if (TREE_CODE (treeop1) != INTEGER_CST
8808 && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
8809 != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
8810 {
8811 machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
8812 this_optab = usmul_widen_optab;
8813 if (find_widening_optab_handler (this_optab, mode, innermode)
8814 != CODE_FOR_nothing)
8815 {
8816 if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
8817 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8818 EXPAND_NORMAL);
8819 else
8820 expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
8821 EXPAND_NORMAL);
8822 /* op0 and op1 might still be constant, despite the above
8823 != INTEGER_CST check. Handle it. */
8824 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8825 {
8826 op0 = convert_modes (mode, innermode, op0, true);
8827 op1 = convert_modes (mode, innermode, op1, false);
8828 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8829 target, unsignedp));
8830 }
8831 goto binop3;
8832 }
8833 }
8834 /* Check for a multiplication with matching signedness. */
8835 else if ((TREE_CODE (treeop1) == INTEGER_CST
8836 && int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
8837 || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
8838 == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
8839 {
8840 tree op0type = TREE_TYPE (treeop0);
8841 machine_mode innermode = TYPE_MODE (op0type);
8842 bool zextend_p = TYPE_UNSIGNED (op0type);
8843 optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
8844 this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
8845
8846 if (TREE_CODE (treeop0) != INTEGER_CST)
8847 {
8848 if (find_widening_optab_handler (this_optab, mode, innermode)
8849 != CODE_FOR_nothing)
8850 {
8851 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
8852 EXPAND_NORMAL);
8853 /* op0 and op1 might still be constant, despite the above
8854 != INTEGER_CST check. Handle it. */
8855 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8856 {
8857 widen_mult_const:
8858 op0 = convert_modes (mode, innermode, op0, zextend_p);
8859 op1
8860 = convert_modes (mode, innermode, op1,
8861 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8862 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1,
8863 target,
8864 unsignedp));
8865 }
8866 temp = expand_widening_mult (mode, op0, op1, target,
8867 unsignedp, this_optab);
8868 return REDUCE_BIT_FIELD (temp);
8869 }
8870 if (find_widening_optab_handler (other_optab, mode, innermode)
8871 != CODE_FOR_nothing
8872 && innermode == word_mode)
8873 {
8874 rtx htem, hipart;
8875 op0 = expand_normal (treeop0);
8876 op1 = expand_normal (treeop1);
8877 /* op0 and op1 might be constants, despite the above
8878 != INTEGER_CST check. Handle it. */
8879 if (GET_MODE (op0) == VOIDmode && GET_MODE (op1) == VOIDmode)
8880 goto widen_mult_const;
8881 if (TREE_CODE (treeop1) == INTEGER_CST)
8882 op1 = convert_modes (mode, word_mode, op1,
8883 TYPE_UNSIGNED (TREE_TYPE (treeop1)));
8884 temp = expand_binop (mode, other_optab, op0, op1, target,
8885 unsignedp, OPTAB_LIB_WIDEN);
8886 hipart = gen_highpart (word_mode, temp);
8887 htem = expand_mult_highpart_adjust (word_mode, hipart,
8888 op0, op1, hipart,
8889 zextend_p);
8890 if (htem != hipart)
8891 emit_move_insn (hipart, htem);
8892 return REDUCE_BIT_FIELD (temp);
8893 }
8894 }
8895 }
8896 treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
8897 treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
8898 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
8899 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
8900
8901 case FMA_EXPR:
8902 {
8903 optab opt = fma_optab;
8904 gimple *def0, *def2;
8905
8906 /* If there is no insn for FMA, emit it as __builtin_fma{,f,l}
8907 call. */
8908 if (optab_handler (fma_optab, mode) == CODE_FOR_nothing)
8909 {
8910 tree fn = mathfn_built_in (TREE_TYPE (treeop0), BUILT_IN_FMA);
8911 tree call_expr;
8912
8913 gcc_assert (fn != NULL_TREE);
8914 call_expr = build_call_expr (fn, 3, treeop0, treeop1, treeop2);
8915 return expand_builtin (call_expr, target, subtarget, mode, false);
8916 }
8917
8918 def0 = get_def_for_expr (treeop0, NEGATE_EXPR);
8919 /* The multiplication is commutative - look at its 2nd operand
8920 if the first isn't fed by a negate. */
8921 if (!def0)
8922 {
8923 def0 = get_def_for_expr (treeop1, NEGATE_EXPR);
8924 /* Swap operands if the 2nd operand is fed by a negate. */
8925 if (def0)
8926 std::swap (treeop0, treeop1);
8927 }
8928 def2 = get_def_for_expr (treeop2, NEGATE_EXPR);
8929
8930 op0 = op2 = NULL;
8931
8932 if (def0 && def2
8933 && optab_handler (fnms_optab, mode) != CODE_FOR_nothing)
8934 {
8935 opt = fnms_optab;
8936 op0 = expand_normal (gimple_assign_rhs1 (def0));
8937 op2 = expand_normal (gimple_assign_rhs1 (def2));
8938 }
8939 else if (def0
8940 && optab_handler (fnma_optab, mode) != CODE_FOR_nothing)
8941 {
8942 opt = fnma_optab;
8943 op0 = expand_normal (gimple_assign_rhs1 (def0));
8944 }
8945 else if (def2
8946 && optab_handler (fms_optab, mode) != CODE_FOR_nothing)
8947 {
8948 opt = fms_optab;
8949 op2 = expand_normal (gimple_assign_rhs1 (def2));
8950 }
8951
8952 if (op0 == NULL)
8953 op0 = expand_expr (treeop0, subtarget, VOIDmode, EXPAND_NORMAL);
8954 if (op2 == NULL)
8955 op2 = expand_normal (treeop2);
8956 op1 = expand_normal (treeop1);
8957
8958 return expand_ternary_op (TYPE_MODE (type), opt,
8959 op0, op1, op2, target, 0);
8960 }
8961
8962 case MULT_EXPR:
8963 /* If this is a fixed-point operation, then we cannot use the code
8964 below because "expand_mult" doesn't support sat/no-sat fixed-point
8965 multiplications. */
8966 if (ALL_FIXED_POINT_MODE_P (mode))
8967 goto binop;
8968
8969 /* If first operand is constant, swap them.
8970 Thus the following special case checks need only
8971 check the second operand. */
8972 if (TREE_CODE (treeop0) == INTEGER_CST)
8973 std::swap (treeop0, treeop1);
8974
8975 /* Attempt to return something suitable for generating an
8976 indexed address, for machines that support that. */
8977
8978 if (modifier == EXPAND_SUM && mode == ptr_mode
8979 && tree_fits_shwi_p (treeop1))
8980 {
8981 tree exp1 = treeop1;
8982
8983 op0 = expand_expr (treeop0, subtarget, VOIDmode,
8984 EXPAND_SUM);
8985
8986 if (!REG_P (op0))
8987 op0 = force_operand (op0, NULL_RTX);
8988 if (!REG_P (op0))
8989 op0 = copy_to_mode_reg (mode, op0);
8990
8991 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
8992 gen_int_mode (tree_to_shwi (exp1),
8993 TYPE_MODE (TREE_TYPE (exp1)))));
8994 }
8995
8996 if (modifier == EXPAND_STACK_PARM)
8997 target = 0;
8998
8999 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
9000 return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
9001
9002 case TRUNC_MOD_EXPR:
9003 case FLOOR_MOD_EXPR:
9004 case CEIL_MOD_EXPR:
9005 case ROUND_MOD_EXPR:
9006
9007 case TRUNC_DIV_EXPR:
9008 case FLOOR_DIV_EXPR:
9009 case CEIL_DIV_EXPR:
9010 case ROUND_DIV_EXPR:
9011 case EXACT_DIV_EXPR:
9012 {
9013 /* If this is a fixed-point operation, then we cannot use the code
9014 below because "expand_divmod" doesn't support sat/no-sat fixed-point
9015 divisions. */
9016 if (ALL_FIXED_POINT_MODE_P (mode))
9017 goto binop;
9018
9019 if (modifier == EXPAND_STACK_PARM)
9020 target = 0;
9021 /* Possible optimization: compute the dividend with EXPAND_SUM
9022 then if the divisor is constant can optimize the case
9023 where some terms of the dividend have coeffs divisible by it. */
9024 expand_operands (treeop0, treeop1,
9025 subtarget, &op0, &op1, EXPAND_NORMAL);
9026 bool mod_p = code == TRUNC_MOD_EXPR || code == FLOOR_MOD_EXPR
9027 || code == CEIL_MOD_EXPR || code == ROUND_MOD_EXPR;
9028 if (SCALAR_INT_MODE_P (mode)
9029 && optimize >= 2
9030 && get_range_pos_neg (treeop0) == 1
9031 && get_range_pos_neg (treeop1) == 1)
9032 {
9033 /* If both arguments are known to be positive when interpreted
9034 as signed, we can expand it as both signed and unsigned
9035 division or modulo. Choose the cheaper sequence in that case. */
9036 bool speed_p = optimize_insn_for_speed_p ();
9037 do_pending_stack_adjust ();
9038 start_sequence ();
9039 rtx uns_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 1);
9040 rtx_insn *uns_insns = get_insns ();
9041 end_sequence ();
9042 start_sequence ();
9043 rtx sgn_ret = expand_divmod (mod_p, code, mode, op0, op1, target, 0);
9044 rtx_insn *sgn_insns = get_insns ();
9045 end_sequence ();
9046 unsigned uns_cost = seq_cost (uns_insns, speed_p);
9047 unsigned sgn_cost = seq_cost (sgn_insns, speed_p);
9048
9049 /* If costs are the same then use as tie breaker the other
9050 other factor. */
9051 if (uns_cost == sgn_cost)
9052 {
9053 uns_cost = seq_cost (uns_insns, !speed_p);
9054 sgn_cost = seq_cost (sgn_insns, !speed_p);
9055 }
9056
9057 if (uns_cost < sgn_cost || (uns_cost == sgn_cost && unsignedp))
9058 {
9059 emit_insn (uns_insns);
9060 return uns_ret;
9061 }
9062 emit_insn (sgn_insns);
9063 return sgn_ret;
9064 }
9065 return expand_divmod (mod_p, code, mode, op0, op1, target, unsignedp);
9066 }
9067 case RDIV_EXPR:
9068 goto binop;
9069
9070 case MULT_HIGHPART_EXPR:
9071 expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
9072 temp = expand_mult_highpart (mode, op0, op1, target, unsignedp);
9073 gcc_assert (temp);
9074 return temp;
9075
9076 case FIXED_CONVERT_EXPR:
9077 op0 = expand_normal (treeop0);
9078 if (target == 0 || modifier == EXPAND_STACK_PARM)
9079 target = gen_reg_rtx (mode);
9080
9081 if ((TREE_CODE (TREE_TYPE (treeop0)) == INTEGER_TYPE
9082 && TYPE_UNSIGNED (TREE_TYPE (treeop0)))
9083 || (TREE_CODE (type) == INTEGER_TYPE && TYPE_UNSIGNED (type)))
9084 expand_fixed_convert (target, op0, 1, TYPE_SATURATING (type));
9085 else
9086 expand_fixed_convert (target, op0, 0, TYPE_SATURATING (type));
9087 return target;
9088
9089 case FIX_TRUNC_EXPR:
9090 op0 = expand_normal (treeop0);
9091 if (target == 0 || modifier == EXPAND_STACK_PARM)
9092 target = gen_reg_rtx (mode);
9093 expand_fix (target, op0, unsignedp);
9094 return target;
9095
9096 case FLOAT_EXPR:
9097 op0 = expand_normal (treeop0);
9098 if (target == 0 || modifier == EXPAND_STACK_PARM)
9099 target = gen_reg_rtx (mode);
9100 /* expand_float can't figure out what to do if FROM has VOIDmode.
9101 So give it the correct mode. With -O, cse will optimize this. */
9102 if (GET_MODE (op0) == VOIDmode)
9103 op0 = copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0)),
9104 op0);
9105 expand_float (target, op0,
9106 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9107 return target;
9108
9109 case NEGATE_EXPR:
9110 op0 = expand_expr (treeop0, subtarget,
9111 VOIDmode, EXPAND_NORMAL);
9112 if (modifier == EXPAND_STACK_PARM)
9113 target = 0;
9114 temp = expand_unop (mode,
9115 optab_for_tree_code (NEGATE_EXPR, type,
9116 optab_default),
9117 op0, target, 0);
9118 gcc_assert (temp);
9119 return REDUCE_BIT_FIELD (temp);
9120
9121 case ABS_EXPR:
9122 op0 = expand_expr (treeop0, subtarget,
9123 VOIDmode, EXPAND_NORMAL);
9124 if (modifier == EXPAND_STACK_PARM)
9125 target = 0;
9126
9127 /* ABS_EXPR is not valid for complex arguments. */
9128 gcc_assert (GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
9129 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT);
9130
9131 /* Unsigned abs is simply the operand. Testing here means we don't
9132 risk generating incorrect code below. */
9133 if (TYPE_UNSIGNED (type))
9134 return op0;
9135
9136 return expand_abs (mode, op0, target, unsignedp,
9137 safe_from_p (target, treeop0, 1));
9138
9139 case MAX_EXPR:
9140 case MIN_EXPR:
9141 target = original_target;
9142 if (target == 0
9143 || modifier == EXPAND_STACK_PARM
9144 || (MEM_P (target) && MEM_VOLATILE_P (target))
9145 || GET_MODE (target) != mode
9146 || (REG_P (target)
9147 && REGNO (target) < FIRST_PSEUDO_REGISTER))
9148 target = gen_reg_rtx (mode);
9149 expand_operands (treeop0, treeop1,
9150 target, &op0, &op1, EXPAND_NORMAL);
9151
9152 /* First try to do it with a special MIN or MAX instruction.
9153 If that does not win, use a conditional jump to select the proper
9154 value. */
9155 this_optab = optab_for_tree_code (code, type, optab_default);
9156 temp = expand_binop (mode, this_optab, op0, op1, target, unsignedp,
9157 OPTAB_WIDEN);
9158 if (temp != 0)
9159 return temp;
9160
9161 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9162 and similarly for MAX <x, y>. */
9163 if (VECTOR_TYPE_P (type))
9164 {
9165 tree t0 = make_tree (type, op0);
9166 tree t1 = make_tree (type, op1);
9167 tree comparison = build2 (code == MIN_EXPR ? LE_EXPR : GE_EXPR,
9168 type, t0, t1);
9169 return expand_vec_cond_expr (type, comparison, t0, t1,
9170 original_target);
9171 }
9172
9173 /* At this point, a MEM target is no longer useful; we will get better
9174 code without it. */
9175
9176 if (! REG_P (target))
9177 target = gen_reg_rtx (mode);
9178
9179 /* If op1 was placed in target, swap op0 and op1. */
9180 if (target != op0 && target == op1)
9181 std::swap (op0, op1);
9182
9183 /* We generate better code and avoid problems with op1 mentioning
9184 target by forcing op1 into a pseudo if it isn't a constant. */
9185 if (! CONSTANT_P (op1))
9186 op1 = force_reg (mode, op1);
9187
9188 {
9189 enum rtx_code comparison_code;
9190 rtx cmpop1 = op1;
9191
9192 if (code == MAX_EXPR)
9193 comparison_code = unsignedp ? GEU : GE;
9194 else
9195 comparison_code = unsignedp ? LEU : LE;
9196
9197 /* Canonicalize to comparisons against 0. */
9198 if (op1 == const1_rtx)
9199 {
9200 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9201 or (a != 0 ? a : 1) for unsigned.
9202 For MIN we are safe converting (a <= 1 ? a : 1)
9203 into (a <= 0 ? a : 1) */
9204 cmpop1 = const0_rtx;
9205 if (code == MAX_EXPR)
9206 comparison_code = unsignedp ? NE : GT;
9207 }
9208 if (op1 == constm1_rtx && !unsignedp)
9209 {
9210 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9211 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9212 cmpop1 = const0_rtx;
9213 if (code == MIN_EXPR)
9214 comparison_code = LT;
9215 }
9216
9217 /* Use a conditional move if possible. */
9218 if (can_conditionally_move_p (mode))
9219 {
9220 rtx insn;
9221
9222 start_sequence ();
9223
9224 /* Try to emit the conditional move. */
9225 insn = emit_conditional_move (target, comparison_code,
9226 op0, cmpop1, mode,
9227 op0, op1, mode,
9228 unsignedp);
9229
9230 /* If we could do the conditional move, emit the sequence,
9231 and return. */
9232 if (insn)
9233 {
9234 rtx_insn *seq = get_insns ();
9235 end_sequence ();
9236 emit_insn (seq);
9237 return target;
9238 }
9239
9240 /* Otherwise discard the sequence and fall back to code with
9241 branches. */
9242 end_sequence ();
9243 }
9244
9245 if (target != op0)
9246 emit_move_insn (target, op0);
9247
9248 lab = gen_label_rtx ();
9249 do_compare_rtx_and_jump (target, cmpop1, comparison_code,
9250 unsignedp, mode, NULL_RTX, NULL, lab,
9251 profile_probability::uninitialized ());
9252 }
9253 emit_move_insn (target, op1);
9254 emit_label (lab);
9255 return target;
9256
9257 case BIT_NOT_EXPR:
9258 op0 = expand_expr (treeop0, subtarget,
9259 VOIDmode, EXPAND_NORMAL);
9260 if (modifier == EXPAND_STACK_PARM)
9261 target = 0;
9262 /* In case we have to reduce the result to bitfield precision
9263 for unsigned bitfield expand this as XOR with a proper constant
9264 instead. */
9265 if (reduce_bit_field && TYPE_UNSIGNED (type))
9266 {
9267 int_mode = SCALAR_INT_TYPE_MODE (type);
9268 wide_int mask = wi::mask (TYPE_PRECISION (type),
9269 false, GET_MODE_PRECISION (int_mode));
9270
9271 temp = expand_binop (int_mode, xor_optab, op0,
9272 immed_wide_int_const (mask, int_mode),
9273 target, 1, OPTAB_LIB_WIDEN);
9274 }
9275 else
9276 temp = expand_unop (mode, one_cmpl_optab, op0, target, 1);
9277 gcc_assert (temp);
9278 return temp;
9279
9280 /* ??? Can optimize bitwise operations with one arg constant.
9281 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9282 and (a bitwise1 b) bitwise2 b (etc)
9283 but that is probably not worth while. */
9284
9285 case BIT_AND_EXPR:
9286 case BIT_IOR_EXPR:
9287 case BIT_XOR_EXPR:
9288 goto binop;
9289
9290 case LROTATE_EXPR:
9291 case RROTATE_EXPR:
9292 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type))
9293 || type_has_mode_precision_p (type));
9294 /* fall through */
9295
9296 case LSHIFT_EXPR:
9297 case RSHIFT_EXPR:
9298 {
9299 /* If this is a fixed-point operation, then we cannot use the code
9300 below because "expand_shift" doesn't support sat/no-sat fixed-point
9301 shifts. */
9302 if (ALL_FIXED_POINT_MODE_P (mode))
9303 goto binop;
9304
9305 if (! safe_from_p (subtarget, treeop1, 1))
9306 subtarget = 0;
9307 if (modifier == EXPAND_STACK_PARM)
9308 target = 0;
9309 op0 = expand_expr (treeop0, subtarget,
9310 VOIDmode, EXPAND_NORMAL);
9311
9312 /* Left shift optimization when shifting across word_size boundary.
9313
9314 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9315 there isn't native instruction to support this wide mode
9316 left shift. Given below scenario:
9317
9318 Type A = (Type) B << C
9319
9320 |< T >|
9321 | dest_high | dest_low |
9322
9323 | word_size |
9324
9325 If the shift amount C caused we shift B to across the word
9326 size boundary, i.e part of B shifted into high half of
9327 destination register, and part of B remains in the low
9328 half, then GCC will use the following left shift expand
9329 logic:
9330
9331 1. Initialize dest_low to B.
9332 2. Initialize every bit of dest_high to the sign bit of B.
9333 3. Logic left shift dest_low by C bit to finalize dest_low.
9334 The value of dest_low before this shift is kept in a temp D.
9335 4. Logic left shift dest_high by C.
9336 5. Logic right shift D by (word_size - C).
9337 6. Or the result of 4 and 5 to finalize dest_high.
9338
9339 While, by checking gimple statements, if operand B is
9340 coming from signed extension, then we can simplify above
9341 expand logic into:
9342
9343 1. dest_high = src_low >> (word_size - C).
9344 2. dest_low = src_low << C.
9345
9346 We can use one arithmetic right shift to finish all the
9347 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9348 needed from 6 into 2.
9349
9350 The case is similar for zero extension, except that we
9351 initialize dest_high to zero rather than copies of the sign
9352 bit from B. Furthermore, we need to use a logical right shift
9353 in this case.
9354
9355 The choice of sign-extension versus zero-extension is
9356 determined entirely by whether or not B is signed and is
9357 independent of the current setting of unsignedp. */
9358
9359 temp = NULL_RTX;
9360 if (code == LSHIFT_EXPR
9361 && target
9362 && REG_P (target)
9363 && GET_MODE_2XWIDER_MODE (word_mode).exists (&int_mode)
9364 && mode == int_mode
9365 && TREE_CONSTANT (treeop1)
9366 && TREE_CODE (treeop0) == SSA_NAME)
9367 {
9368 gimple *def = SSA_NAME_DEF_STMT (treeop0);
9369 if (is_gimple_assign (def)
9370 && gimple_assign_rhs_code (def) == NOP_EXPR)
9371 {
9372 scalar_int_mode rmode = SCALAR_INT_TYPE_MODE
9373 (TREE_TYPE (gimple_assign_rhs1 (def)));
9374
9375 if (GET_MODE_SIZE (rmode) < GET_MODE_SIZE (int_mode)
9376 && TREE_INT_CST_LOW (treeop1) < GET_MODE_BITSIZE (word_mode)
9377 && ((TREE_INT_CST_LOW (treeop1) + GET_MODE_BITSIZE (rmode))
9378 >= GET_MODE_BITSIZE (word_mode)))
9379 {
9380 rtx_insn *seq, *seq_old;
9381 poly_uint64 high_off = subreg_highpart_offset (word_mode,
9382 int_mode);
9383 bool extend_unsigned
9384 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def)));
9385 rtx low = lowpart_subreg (word_mode, op0, int_mode);
9386 rtx dest_low = lowpart_subreg (word_mode, target, int_mode);
9387 rtx dest_high = simplify_gen_subreg (word_mode, target,
9388 int_mode, high_off);
9389 HOST_WIDE_INT ramount = (BITS_PER_WORD
9390 - TREE_INT_CST_LOW (treeop1));
9391 tree rshift = build_int_cst (TREE_TYPE (treeop1), ramount);
9392
9393 start_sequence ();
9394 /* dest_high = src_low >> (word_size - C). */
9395 temp = expand_variable_shift (RSHIFT_EXPR, word_mode, low,
9396 rshift, dest_high,
9397 extend_unsigned);
9398 if (temp != dest_high)
9399 emit_move_insn (dest_high, temp);
9400
9401 /* dest_low = src_low << C. */
9402 temp = expand_variable_shift (LSHIFT_EXPR, word_mode, low,
9403 treeop1, dest_low, unsignedp);
9404 if (temp != dest_low)
9405 emit_move_insn (dest_low, temp);
9406
9407 seq = get_insns ();
9408 end_sequence ();
9409 temp = target ;
9410
9411 if (have_insn_for (ASHIFT, int_mode))
9412 {
9413 bool speed_p = optimize_insn_for_speed_p ();
9414 start_sequence ();
9415 rtx ret_old = expand_variable_shift (code, int_mode,
9416 op0, treeop1,
9417 target,
9418 unsignedp);
9419
9420 seq_old = get_insns ();
9421 end_sequence ();
9422 if (seq_cost (seq, speed_p)
9423 >= seq_cost (seq_old, speed_p))
9424 {
9425 seq = seq_old;
9426 temp = ret_old;
9427 }
9428 }
9429 emit_insn (seq);
9430 }
9431 }
9432 }
9433
9434 if (temp == NULL_RTX)
9435 temp = expand_variable_shift (code, mode, op0, treeop1, target,
9436 unsignedp);
9437 if (code == LSHIFT_EXPR)
9438 temp = REDUCE_BIT_FIELD (temp);
9439 return temp;
9440 }
9441
9442 /* Could determine the answer when only additive constants differ. Also,
9443 the addition of one can be handled by changing the condition. */
9444 case LT_EXPR:
9445 case LE_EXPR:
9446 case GT_EXPR:
9447 case GE_EXPR:
9448 case EQ_EXPR:
9449 case NE_EXPR:
9450 case UNORDERED_EXPR:
9451 case ORDERED_EXPR:
9452 case UNLT_EXPR:
9453 case UNLE_EXPR:
9454 case UNGT_EXPR:
9455 case UNGE_EXPR:
9456 case UNEQ_EXPR:
9457 case LTGT_EXPR:
9458 {
9459 temp = do_store_flag (ops,
9460 modifier != EXPAND_STACK_PARM ? target : NULL_RTX,
9461 tmode != VOIDmode ? tmode : mode);
9462 if (temp)
9463 return temp;
9464
9465 /* Use a compare and a jump for BLKmode comparisons, or for function
9466 type comparisons is have_canonicalize_funcptr_for_compare. */
9467
9468 if ((target == 0
9469 || modifier == EXPAND_STACK_PARM
9470 || ! safe_from_p (target, treeop0, 1)
9471 || ! safe_from_p (target, treeop1, 1)
9472 /* Make sure we don't have a hard reg (such as function's return
9473 value) live across basic blocks, if not optimizing. */
9474 || (!optimize && REG_P (target)
9475 && REGNO (target) < FIRST_PSEUDO_REGISTER)))
9476 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
9477
9478 emit_move_insn (target, const0_rtx);
9479
9480 rtx_code_label *lab1 = gen_label_rtx ();
9481 jumpifnot_1 (code, treeop0, treeop1, lab1,
9482 profile_probability::uninitialized ());
9483
9484 if (TYPE_PRECISION (type) == 1 && !TYPE_UNSIGNED (type))
9485 emit_move_insn (target, constm1_rtx);
9486 else
9487 emit_move_insn (target, const1_rtx);
9488
9489 emit_label (lab1);
9490 return target;
9491 }
9492 case COMPLEX_EXPR:
9493 /* Get the rtx code of the operands. */
9494 op0 = expand_normal (treeop0);
9495 op1 = expand_normal (treeop1);
9496
9497 if (!target)
9498 target = gen_reg_rtx (TYPE_MODE (type));
9499 else
9500 /* If target overlaps with op1, then either we need to force
9501 op1 into a pseudo (if target also overlaps with op0),
9502 or write the complex parts in reverse order. */
9503 switch (GET_CODE (target))
9504 {
9505 case CONCAT:
9506 if (reg_overlap_mentioned_p (XEXP (target, 0), op1))
9507 {
9508 if (reg_overlap_mentioned_p (XEXP (target, 1), op0))
9509 {
9510 complex_expr_force_op1:
9511 temp = gen_reg_rtx (GET_MODE_INNER (GET_MODE (target)));
9512 emit_move_insn (temp, op1);
9513 op1 = temp;
9514 break;
9515 }
9516 complex_expr_swap_order:
9517 /* Move the imaginary (op1) and real (op0) parts to their
9518 location. */
9519 write_complex_part (target, op1, true);
9520 write_complex_part (target, op0, false);
9521
9522 return target;
9523 }
9524 break;
9525 case MEM:
9526 temp = adjust_address_nv (target,
9527 GET_MODE_INNER (GET_MODE (target)), 0);
9528 if (reg_overlap_mentioned_p (temp, op1))
9529 {
9530 scalar_mode imode = GET_MODE_INNER (GET_MODE (target));
9531 temp = adjust_address_nv (target, imode,
9532 GET_MODE_SIZE (imode));
9533 if (reg_overlap_mentioned_p (temp, op0))
9534 goto complex_expr_force_op1;
9535 goto complex_expr_swap_order;
9536 }
9537 break;
9538 default:
9539 if (reg_overlap_mentioned_p (target, op1))
9540 {
9541 if (reg_overlap_mentioned_p (target, op0))
9542 goto complex_expr_force_op1;
9543 goto complex_expr_swap_order;
9544 }
9545 break;
9546 }
9547
9548 /* Move the real (op0) and imaginary (op1) parts to their location. */
9549 write_complex_part (target, op0, false);
9550 write_complex_part (target, op1, true);
9551
9552 return target;
9553
9554 case WIDEN_SUM_EXPR:
9555 {
9556 tree oprnd0 = treeop0;
9557 tree oprnd1 = treeop1;
9558
9559 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9560 target = expand_widen_pattern_expr (ops, op0, NULL_RTX, op1,
9561 target, unsignedp);
9562 return target;
9563 }
9564
9565 case VEC_UNPACK_HI_EXPR:
9566 case VEC_UNPACK_LO_EXPR:
9567 {
9568 op0 = expand_normal (treeop0);
9569 temp = expand_widen_pattern_expr (ops, op0, NULL_RTX, NULL_RTX,
9570 target, unsignedp);
9571 gcc_assert (temp);
9572 return temp;
9573 }
9574
9575 case VEC_UNPACK_FLOAT_HI_EXPR:
9576 case VEC_UNPACK_FLOAT_LO_EXPR:
9577 {
9578 op0 = expand_normal (treeop0);
9579 /* The signedness is determined from input operand. */
9580 temp = expand_widen_pattern_expr
9581 (ops, op0, NULL_RTX, NULL_RTX,
9582 target, TYPE_UNSIGNED (TREE_TYPE (treeop0)));
9583
9584 gcc_assert (temp);
9585 return temp;
9586 }
9587
9588 case VEC_WIDEN_MULT_HI_EXPR:
9589 case VEC_WIDEN_MULT_LO_EXPR:
9590 case VEC_WIDEN_MULT_EVEN_EXPR:
9591 case VEC_WIDEN_MULT_ODD_EXPR:
9592 case VEC_WIDEN_LSHIFT_HI_EXPR:
9593 case VEC_WIDEN_LSHIFT_LO_EXPR:
9594 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9595 target = expand_widen_pattern_expr (ops, op0, op1, NULL_RTX,
9596 target, unsignedp);
9597 gcc_assert (target);
9598 return target;
9599
9600 case VEC_PACK_TRUNC_EXPR:
9601 case VEC_PACK_SAT_EXPR:
9602 case VEC_PACK_FIX_TRUNC_EXPR:
9603 mode = TYPE_MODE (TREE_TYPE (treeop0));
9604 goto binop;
9605
9606 case VEC_PERM_EXPR:
9607 {
9608 expand_operands (treeop0, treeop1, target, &op0, &op1, EXPAND_NORMAL);
9609 vec_perm_builder sel;
9610 if (TREE_CODE (treeop2) == VECTOR_CST
9611 && tree_to_vec_perm_builder (&sel, treeop2))
9612 {
9613 machine_mode sel_mode = TYPE_MODE (TREE_TYPE (treeop2));
9614 temp = expand_vec_perm_const (mode, op0, op1, sel,
9615 sel_mode, target);
9616 }
9617 else
9618 {
9619 op2 = expand_normal (treeop2);
9620 temp = expand_vec_perm_var (mode, op0, op1, op2, target);
9621 }
9622 gcc_assert (temp);
9623 return temp;
9624 }
9625
9626 case DOT_PROD_EXPR:
9627 {
9628 tree oprnd0 = treeop0;
9629 tree oprnd1 = treeop1;
9630 tree oprnd2 = treeop2;
9631 rtx op2;
9632
9633 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9634 op2 = expand_normal (oprnd2);
9635 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9636 target, unsignedp);
9637 return target;
9638 }
9639
9640 case SAD_EXPR:
9641 {
9642 tree oprnd0 = treeop0;
9643 tree oprnd1 = treeop1;
9644 tree oprnd2 = treeop2;
9645 rtx op2;
9646
9647 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9648 op2 = expand_normal (oprnd2);
9649 target = expand_widen_pattern_expr (ops, op0, op1, op2,
9650 target, unsignedp);
9651 return target;
9652 }
9653
9654 case REALIGN_LOAD_EXPR:
9655 {
9656 tree oprnd0 = treeop0;
9657 tree oprnd1 = treeop1;
9658 tree oprnd2 = treeop2;
9659 rtx op2;
9660
9661 this_optab = optab_for_tree_code (code, type, optab_default);
9662 expand_operands (oprnd0, oprnd1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
9663 op2 = expand_normal (oprnd2);
9664 temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
9665 target, unsignedp);
9666 gcc_assert (temp);
9667 return temp;
9668 }
9669
9670 case COND_EXPR:
9671 {
9672 /* A COND_EXPR with its type being VOID_TYPE represents a
9673 conditional jump and is handled in
9674 expand_gimple_cond_expr. */
9675 gcc_assert (!VOID_TYPE_P (type));
9676
9677 /* Note that COND_EXPRs whose type is a structure or union
9678 are required to be constructed to contain assignments of
9679 a temporary variable, so that we can evaluate them here
9680 for side effect only. If type is void, we must do likewise. */
9681
9682 gcc_assert (!TREE_ADDRESSABLE (type)
9683 && !ignore
9684 && TREE_TYPE (treeop1) != void_type_node
9685 && TREE_TYPE (treeop2) != void_type_node);
9686
9687 temp = expand_cond_expr_using_cmove (treeop0, treeop1, treeop2);
9688 if (temp)
9689 return temp;
9690
9691 /* If we are not to produce a result, we have no target. Otherwise,
9692 if a target was specified use it; it will not be used as an
9693 intermediate target unless it is safe. If no target, use a
9694 temporary. */
9695
9696 if (modifier != EXPAND_STACK_PARM
9697 && original_target
9698 && safe_from_p (original_target, treeop0, 1)
9699 && GET_MODE (original_target) == mode
9700 && !MEM_P (original_target))
9701 temp = original_target;
9702 else
9703 temp = assign_temp (type, 0, 1);
9704
9705 do_pending_stack_adjust ();
9706 NO_DEFER_POP;
9707 rtx_code_label *lab0 = gen_label_rtx ();
9708 rtx_code_label *lab1 = gen_label_rtx ();
9709 jumpifnot (treeop0, lab0,
9710 profile_probability::uninitialized ());
9711 store_expr (treeop1, temp,
9712 modifier == EXPAND_STACK_PARM,
9713 false, false);
9714
9715 emit_jump_insn (targetm.gen_jump (lab1));
9716 emit_barrier ();
9717 emit_label (lab0);
9718 store_expr (treeop2, temp,
9719 modifier == EXPAND_STACK_PARM,
9720 false, false);
9721
9722 emit_label (lab1);
9723 OK_DEFER_POP;
9724 return temp;
9725 }
9726
9727 case VEC_COND_EXPR:
9728 target = expand_vec_cond_expr (type, treeop0, treeop1, treeop2, target);
9729 return target;
9730
9731 case VEC_DUPLICATE_EXPR:
9732 op0 = expand_expr (treeop0, NULL_RTX, VOIDmode, modifier);
9733 target = expand_vector_broadcast (mode, op0);
9734 gcc_assert (target);
9735 return target;
9736
9737 case VEC_SERIES_EXPR:
9738 expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, modifier);
9739 return expand_vec_series_expr (mode, op0, op1, target);
9740
9741 case BIT_INSERT_EXPR:
9742 {
9743 unsigned bitpos = tree_to_uhwi (treeop2);
9744 unsigned bitsize;
9745 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1)))
9746 bitsize = TYPE_PRECISION (TREE_TYPE (treeop1));
9747 else
9748 bitsize = tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1)));
9749 rtx op0 = expand_normal (treeop0);
9750 rtx op1 = expand_normal (treeop1);
9751 rtx dst = gen_reg_rtx (mode);
9752 emit_move_insn (dst, op0);
9753 store_bit_field (dst, bitsize, bitpos, 0, 0,
9754 TYPE_MODE (TREE_TYPE (treeop1)), op1, false);
9755 return dst;
9756 }
9757
9758 default:
9759 gcc_unreachable ();
9760 }
9761
9762 /* Here to do an ordinary binary operator. */
9763 binop:
9764 expand_operands (treeop0, treeop1,
9765 subtarget, &op0, &op1, EXPAND_NORMAL);
9766 binop2:
9767 this_optab = optab_for_tree_code (code, type, optab_default);
9768 binop3:
9769 if (modifier == EXPAND_STACK_PARM)
9770 target = 0;
9771 temp = expand_binop (mode, this_optab, op0, op1, target,
9772 unsignedp, OPTAB_LIB_WIDEN);
9773 gcc_assert (temp);
9774 /* Bitwise operations do not need bitfield reduction as we expect their
9775 operands being properly truncated. */
9776 if (code == BIT_XOR_EXPR
9777 || code == BIT_AND_EXPR
9778 || code == BIT_IOR_EXPR)
9779 return temp;
9780 return REDUCE_BIT_FIELD (temp);
9781 }
9782 #undef REDUCE_BIT_FIELD
9783
9784
9785 /* Return TRUE if expression STMT is suitable for replacement.
9786 Never consider memory loads as replaceable, because those don't ever lead
9787 into constant expressions. */
9788
9789 static bool
stmt_is_replaceable_p(gimple * stmt)9790 stmt_is_replaceable_p (gimple *stmt)
9791 {
9792 if (ssa_is_replaceable_p (stmt))
9793 {
9794 /* Don't move around loads. */
9795 if (!gimple_assign_single_p (stmt)
9796 || is_gimple_val (gimple_assign_rhs1 (stmt)))
9797 return true;
9798 }
9799 return false;
9800 }
9801
9802 rtx
expand_expr_real_1(tree exp,rtx target,machine_mode tmode,enum expand_modifier modifier,rtx * alt_rtl,bool inner_reference_p)9803 expand_expr_real_1 (tree exp, rtx target, machine_mode tmode,
9804 enum expand_modifier modifier, rtx *alt_rtl,
9805 bool inner_reference_p)
9806 {
9807 rtx op0, op1, temp, decl_rtl;
9808 tree type;
9809 int unsignedp;
9810 machine_mode mode, dmode;
9811 enum tree_code code = TREE_CODE (exp);
9812 rtx subtarget, original_target;
9813 int ignore;
9814 tree context;
9815 bool reduce_bit_field;
9816 location_t loc = EXPR_LOCATION (exp);
9817 struct separate_ops ops;
9818 tree treeop0, treeop1, treeop2;
9819 tree ssa_name = NULL_TREE;
9820 gimple *g;
9821
9822 type = TREE_TYPE (exp);
9823 mode = TYPE_MODE (type);
9824 unsignedp = TYPE_UNSIGNED (type);
9825
9826 treeop0 = treeop1 = treeop2 = NULL_TREE;
9827 if (!VL_EXP_CLASS_P (exp))
9828 switch (TREE_CODE_LENGTH (code))
9829 {
9830 default:
9831 case 3: treeop2 = TREE_OPERAND (exp, 2); /* FALLTHRU */
9832 case 2: treeop1 = TREE_OPERAND (exp, 1); /* FALLTHRU */
9833 case 1: treeop0 = TREE_OPERAND (exp, 0); /* FALLTHRU */
9834 case 0: break;
9835 }
9836 ops.code = code;
9837 ops.type = type;
9838 ops.op0 = treeop0;
9839 ops.op1 = treeop1;
9840 ops.op2 = treeop2;
9841 ops.location = loc;
9842
9843 ignore = (target == const0_rtx
9844 || ((CONVERT_EXPR_CODE_P (code)
9845 || code == COND_EXPR || code == VIEW_CONVERT_EXPR)
9846 && TREE_CODE (type) == VOID_TYPE));
9847
9848 /* An operation in what may be a bit-field type needs the
9849 result to be reduced to the precision of the bit-field type,
9850 which is narrower than that of the type's mode. */
9851 reduce_bit_field = (!ignore
9852 && INTEGRAL_TYPE_P (type)
9853 && !type_has_mode_precision_p (type));
9854
9855 /* If we are going to ignore this result, we need only do something
9856 if there is a side-effect somewhere in the expression. If there
9857 is, short-circuit the most common cases here. Note that we must
9858 not call expand_expr with anything but const0_rtx in case this
9859 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9860
9861 if (ignore)
9862 {
9863 if (! TREE_SIDE_EFFECTS (exp))
9864 return const0_rtx;
9865
9866 /* Ensure we reference a volatile object even if value is ignored, but
9867 don't do this if all we are doing is taking its address. */
9868 if (TREE_THIS_VOLATILE (exp)
9869 && TREE_CODE (exp) != FUNCTION_DECL
9870 && mode != VOIDmode && mode != BLKmode
9871 && modifier != EXPAND_CONST_ADDRESS)
9872 {
9873 temp = expand_expr (exp, NULL_RTX, VOIDmode, modifier);
9874 if (MEM_P (temp))
9875 copy_to_reg (temp);
9876 return const0_rtx;
9877 }
9878
9879 if (TREE_CODE_CLASS (code) == tcc_unary
9880 || code == BIT_FIELD_REF
9881 || code == COMPONENT_REF
9882 || code == INDIRECT_REF)
9883 return expand_expr (treeop0, const0_rtx, VOIDmode,
9884 modifier);
9885
9886 else if (TREE_CODE_CLASS (code) == tcc_binary
9887 || TREE_CODE_CLASS (code) == tcc_comparison
9888 || code == ARRAY_REF || code == ARRAY_RANGE_REF)
9889 {
9890 expand_expr (treeop0, const0_rtx, VOIDmode, modifier);
9891 expand_expr (treeop1, const0_rtx, VOIDmode, modifier);
9892 return const0_rtx;
9893 }
9894
9895 target = 0;
9896 }
9897
9898 if (reduce_bit_field && modifier == EXPAND_STACK_PARM)
9899 target = 0;
9900
9901 /* Use subtarget as the target for operand 0 of a binary operation. */
9902 subtarget = get_subtarget (target);
9903 original_target = target;
9904
9905 switch (code)
9906 {
9907 case LABEL_DECL:
9908 {
9909 tree function = decl_function_context (exp);
9910
9911 temp = label_rtx (exp);
9912 temp = gen_rtx_LABEL_REF (Pmode, temp);
9913
9914 if (function != current_function_decl
9915 && function != 0)
9916 LABEL_REF_NONLOCAL_P (temp) = 1;
9917
9918 temp = gen_rtx_MEM (FUNCTION_MODE, temp);
9919 return temp;
9920 }
9921
9922 case SSA_NAME:
9923 /* ??? ivopts calls expander, without any preparation from
9924 out-of-ssa. So fake instructions as if this was an access to the
9925 base variable. This unnecessarily allocates a pseudo, see how we can
9926 reuse it, if partition base vars have it set already. */
9927 if (!currently_expanding_to_rtl)
9928 {
9929 tree var = SSA_NAME_VAR (exp);
9930 if (var && DECL_RTL_SET_P (var))
9931 return DECL_RTL (var);
9932 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp)),
9933 LAST_VIRTUAL_REGISTER + 1);
9934 }
9935
9936 g = get_gimple_for_ssa_name (exp);
9937 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9938 if (g == NULL
9939 && modifier == EXPAND_INITIALIZER
9940 && !SSA_NAME_IS_DEFAULT_DEF (exp)
9941 && (optimize || !SSA_NAME_VAR (exp)
9942 || DECL_IGNORED_P (SSA_NAME_VAR (exp)))
9943 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp)))
9944 g = SSA_NAME_DEF_STMT (exp);
9945 if (g)
9946 {
9947 rtx r;
9948 location_t saved_loc = curr_insn_location ();
9949 location_t loc = gimple_location (g);
9950 if (loc != UNKNOWN_LOCATION)
9951 set_curr_insn_location (loc);
9952 ops.code = gimple_assign_rhs_code (g);
9953 switch (get_gimple_rhs_class (ops.code))
9954 {
9955 case GIMPLE_TERNARY_RHS:
9956 ops.op2 = gimple_assign_rhs3 (g);
9957 /* Fallthru */
9958 case GIMPLE_BINARY_RHS:
9959 ops.op1 = gimple_assign_rhs2 (g);
9960
9961 /* Try to expand conditonal compare. */
9962 if (targetm.gen_ccmp_first)
9963 {
9964 gcc_checking_assert (targetm.gen_ccmp_next != NULL);
9965 r = expand_ccmp_expr (g, mode);
9966 if (r)
9967 break;
9968 }
9969 /* Fallthru */
9970 case GIMPLE_UNARY_RHS:
9971 ops.op0 = gimple_assign_rhs1 (g);
9972 ops.type = TREE_TYPE (gimple_assign_lhs (g));
9973 ops.location = loc;
9974 r = expand_expr_real_2 (&ops, target, tmode, modifier);
9975 break;
9976 case GIMPLE_SINGLE_RHS:
9977 {
9978 r = expand_expr_real (gimple_assign_rhs1 (g), target,
9979 tmode, modifier, alt_rtl,
9980 inner_reference_p);
9981 break;
9982 }
9983 default:
9984 gcc_unreachable ();
9985 }
9986 set_curr_insn_location (saved_loc);
9987 if (REG_P (r) && !REG_EXPR (r))
9988 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp), r);
9989 return r;
9990 }
9991
9992 ssa_name = exp;
9993 decl_rtl = get_rtx_for_ssa_name (ssa_name);
9994 exp = SSA_NAME_VAR (ssa_name);
9995 goto expand_decl_rtl;
9996
9997 case PARM_DECL:
9998 case VAR_DECL:
9999 /* If a static var's type was incomplete when the decl was written,
10000 but the type is complete now, lay out the decl now. */
10001 if (DECL_SIZE (exp) == 0
10002 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp))
10003 && (TREE_STATIC (exp) || DECL_EXTERNAL (exp)))
10004 layout_decl (exp, 0);
10005
10006 /* fall through */
10007
10008 case FUNCTION_DECL:
10009 case RESULT_DECL:
10010 decl_rtl = DECL_RTL (exp);
10011 expand_decl_rtl:
10012 gcc_assert (decl_rtl);
10013
10014 /* DECL_MODE might change when TYPE_MODE depends on attribute target
10015 settings for VECTOR_TYPE_P that might switch for the function. */
10016 if (currently_expanding_to_rtl
10017 && code == VAR_DECL && MEM_P (decl_rtl)
10018 && VECTOR_TYPE_P (type) && exp && DECL_MODE (exp) != mode)
10019 decl_rtl = change_address (decl_rtl, TYPE_MODE (type), 0);
10020 else
10021 decl_rtl = copy_rtx (decl_rtl);
10022
10023 /* Record writes to register variables. */
10024 if (modifier == EXPAND_WRITE
10025 && REG_P (decl_rtl)
10026 && HARD_REGISTER_P (decl_rtl))
10027 add_to_hard_reg_set (&crtl->asm_clobbers,
10028 GET_MODE (decl_rtl), REGNO (decl_rtl));
10029
10030 /* Ensure variable marked as used even if it doesn't go through
10031 a parser. If it hasn't be used yet, write out an external
10032 definition. */
10033 if (exp)
10034 TREE_USED (exp) = 1;
10035
10036 /* Show we haven't gotten RTL for this yet. */
10037 temp = 0;
10038
10039 /* Variables inherited from containing functions should have
10040 been lowered by this point. */
10041 if (exp)
10042 context = decl_function_context (exp);
10043 gcc_assert (!exp
10044 || SCOPE_FILE_SCOPE_P (context)
10045 || context == current_function_decl
10046 || TREE_STATIC (exp)
10047 || DECL_EXTERNAL (exp)
10048 /* ??? C++ creates functions that are not TREE_STATIC. */
10049 || TREE_CODE (exp) == FUNCTION_DECL);
10050
10051 /* This is the case of an array whose size is to be determined
10052 from its initializer, while the initializer is still being parsed.
10053 ??? We aren't parsing while expanding anymore. */
10054
10055 if (MEM_P (decl_rtl) && REG_P (XEXP (decl_rtl, 0)))
10056 temp = validize_mem (decl_rtl);
10057
10058 /* If DECL_RTL is memory, we are in the normal case and the
10059 address is not valid, get the address into a register. */
10060
10061 else if (MEM_P (decl_rtl) && modifier != EXPAND_INITIALIZER)
10062 {
10063 if (alt_rtl)
10064 *alt_rtl = decl_rtl;
10065 decl_rtl = use_anchored_address (decl_rtl);
10066 if (modifier != EXPAND_CONST_ADDRESS
10067 && modifier != EXPAND_SUM
10068 && !memory_address_addr_space_p (exp ? DECL_MODE (exp)
10069 : GET_MODE (decl_rtl),
10070 XEXP (decl_rtl, 0),
10071 MEM_ADDR_SPACE (decl_rtl)))
10072 temp = replace_equiv_address (decl_rtl,
10073 copy_rtx (XEXP (decl_rtl, 0)));
10074 }
10075
10076 /* If we got something, return it. But first, set the alignment
10077 if the address is a register. */
10078 if (temp != 0)
10079 {
10080 if (exp && MEM_P (temp) && REG_P (XEXP (temp, 0)))
10081 mark_reg_pointer (XEXP (temp, 0), DECL_ALIGN (exp));
10082
10083 return temp;
10084 }
10085
10086 if (exp)
10087 dmode = DECL_MODE (exp);
10088 else
10089 dmode = TYPE_MODE (TREE_TYPE (ssa_name));
10090
10091 /* If the mode of DECL_RTL does not match that of the decl,
10092 there are two cases: we are dealing with a BLKmode value
10093 that is returned in a register, or we are dealing with
10094 a promoted value. In the latter case, return a SUBREG
10095 of the wanted mode, but mark it so that we know that it
10096 was already extended. */
10097 if (REG_P (decl_rtl)
10098 && dmode != BLKmode
10099 && GET_MODE (decl_rtl) != dmode)
10100 {
10101 machine_mode pmode;
10102
10103 /* Get the signedness to be used for this variable. Ensure we get
10104 the same mode we got when the variable was declared. */
10105 if (code != SSA_NAME)
10106 pmode = promote_decl_mode (exp, &unsignedp);
10107 else if ((g = SSA_NAME_DEF_STMT (ssa_name))
10108 && gimple_code (g) == GIMPLE_CALL
10109 && !gimple_call_internal_p (g))
10110 pmode = promote_function_mode (type, mode, &unsignedp,
10111 gimple_call_fntype (g),
10112 2);
10113 else
10114 pmode = promote_ssa_mode (ssa_name, &unsignedp);
10115 gcc_assert (GET_MODE (decl_rtl) == pmode);
10116
10117 temp = gen_lowpart_SUBREG (mode, decl_rtl);
10118 SUBREG_PROMOTED_VAR_P (temp) = 1;
10119 SUBREG_PROMOTED_SET (temp, unsignedp);
10120 return temp;
10121 }
10122
10123 return decl_rtl;
10124
10125 case INTEGER_CST:
10126 {
10127 /* Given that TYPE_PRECISION (type) is not always equal to
10128 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10129 the former to the latter according to the signedness of the
10130 type. */
10131 scalar_int_mode mode = SCALAR_INT_TYPE_MODE (type);
10132 temp = immed_wide_int_const
10133 (wi::to_wide (exp, GET_MODE_PRECISION (mode)), mode);
10134 return temp;
10135 }
10136
10137 case VECTOR_CST:
10138 {
10139 tree tmp = NULL_TREE;
10140 if (VECTOR_MODE_P (mode))
10141 return const_vector_from_tree (exp);
10142 scalar_int_mode int_mode;
10143 if (is_int_mode (mode, &int_mode))
10144 {
10145 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
10146 return const_scalar_mask_from_tree (int_mode, exp);
10147 else
10148 {
10149 tree type_for_mode
10150 = lang_hooks.types.type_for_mode (int_mode, 1);
10151 if (type_for_mode)
10152 tmp = fold_unary_loc (loc, VIEW_CONVERT_EXPR,
10153 type_for_mode, exp);
10154 }
10155 }
10156 if (!tmp)
10157 {
10158 vec<constructor_elt, va_gc> *v;
10159 /* Constructors need to be fixed-length. FIXME. */
10160 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
10161 vec_alloc (v, nunits);
10162 for (unsigned int i = 0; i < nunits; ++i)
10163 CONSTRUCTOR_APPEND_ELT (v, NULL_TREE, VECTOR_CST_ELT (exp, i));
10164 tmp = build_constructor (type, v);
10165 }
10166 return expand_expr (tmp, ignore ? const0_rtx : target,
10167 tmode, modifier);
10168 }
10169
10170 case CONST_DECL:
10171 if (modifier == EXPAND_WRITE)
10172 {
10173 /* Writing into CONST_DECL is always invalid, but handle it
10174 gracefully. */
10175 addr_space_t as = TYPE_ADDR_SPACE (TREE_TYPE (exp));
10176 scalar_int_mode address_mode = targetm.addr_space.address_mode (as);
10177 op0 = expand_expr_addr_expr_1 (exp, NULL_RTX, address_mode,
10178 EXPAND_NORMAL, as);
10179 op0 = memory_address_addr_space (mode, op0, as);
10180 temp = gen_rtx_MEM (mode, op0);
10181 set_mem_addr_space (temp, as);
10182 return temp;
10183 }
10184 return expand_expr (DECL_INITIAL (exp), target, VOIDmode, modifier);
10185
10186 case REAL_CST:
10187 /* If optimized, generate immediate CONST_DOUBLE
10188 which will be turned into memory by reload if necessary.
10189
10190 We used to force a register so that loop.c could see it. But
10191 this does not allow gen_* patterns to perform optimizations with
10192 the constants. It also produces two insns in cases like "x = 1.0;".
10193 On most machines, floating-point constants are not permitted in
10194 many insns, so we'd end up copying it to a register in any case.
10195
10196 Now, we do the copying in expand_binop, if appropriate. */
10197 return const_double_from_real_value (TREE_REAL_CST (exp),
10198 TYPE_MODE (TREE_TYPE (exp)));
10199
10200 case FIXED_CST:
10201 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp),
10202 TYPE_MODE (TREE_TYPE (exp)));
10203
10204 case COMPLEX_CST:
10205 /* Handle evaluating a complex constant in a CONCAT target. */
10206 if (original_target && GET_CODE (original_target) == CONCAT)
10207 {
10208 machine_mode mode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp)));
10209 rtx rtarg, itarg;
10210
10211 rtarg = XEXP (original_target, 0);
10212 itarg = XEXP (original_target, 1);
10213
10214 /* Move the real and imaginary parts separately. */
10215 op0 = expand_expr (TREE_REALPART (exp), rtarg, mode, EXPAND_NORMAL);
10216 op1 = expand_expr (TREE_IMAGPART (exp), itarg, mode, EXPAND_NORMAL);
10217
10218 if (op0 != rtarg)
10219 emit_move_insn (rtarg, op0);
10220 if (op1 != itarg)
10221 emit_move_insn (itarg, op1);
10222
10223 return original_target;
10224 }
10225
10226 /* fall through */
10227
10228 case STRING_CST:
10229 temp = expand_expr_constant (exp, 1, modifier);
10230
10231 /* temp contains a constant address.
10232 On RISC machines where a constant address isn't valid,
10233 make some insns to get that address into a register. */
10234 if (modifier != EXPAND_CONST_ADDRESS
10235 && modifier != EXPAND_INITIALIZER
10236 && modifier != EXPAND_SUM
10237 && ! memory_address_addr_space_p (mode, XEXP (temp, 0),
10238 MEM_ADDR_SPACE (temp)))
10239 return replace_equiv_address (temp,
10240 copy_rtx (XEXP (temp, 0)));
10241 return temp;
10242
10243 case POLY_INT_CST:
10244 return immed_wide_int_const (poly_int_cst_value (exp), mode);
10245
10246 case SAVE_EXPR:
10247 {
10248 tree val = treeop0;
10249 rtx ret = expand_expr_real_1 (val, target, tmode, modifier, alt_rtl,
10250 inner_reference_p);
10251
10252 if (!SAVE_EXPR_RESOLVED_P (exp))
10253 {
10254 /* We can indeed still hit this case, typically via builtin
10255 expanders calling save_expr immediately before expanding
10256 something. Assume this means that we only have to deal
10257 with non-BLKmode values. */
10258 gcc_assert (GET_MODE (ret) != BLKmode);
10259
10260 val = build_decl (curr_insn_location (),
10261 VAR_DECL, NULL, TREE_TYPE (exp));
10262 DECL_ARTIFICIAL (val) = 1;
10263 DECL_IGNORED_P (val) = 1;
10264 treeop0 = val;
10265 TREE_OPERAND (exp, 0) = treeop0;
10266 SAVE_EXPR_RESOLVED_P (exp) = 1;
10267
10268 if (!CONSTANT_P (ret))
10269 ret = copy_to_reg (ret);
10270 SET_DECL_RTL (val, ret);
10271 }
10272
10273 return ret;
10274 }
10275
10276
10277 case CONSTRUCTOR:
10278 /* If we don't need the result, just ensure we evaluate any
10279 subexpressions. */
10280 if (ignore)
10281 {
10282 unsigned HOST_WIDE_INT idx;
10283 tree value;
10284
10285 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp), idx, value)
10286 expand_expr (value, const0_rtx, VOIDmode, EXPAND_NORMAL);
10287
10288 return const0_rtx;
10289 }
10290
10291 return expand_constructor (exp, target, modifier, false);
10292
10293 case TARGET_MEM_REF:
10294 {
10295 addr_space_t as
10296 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10297 enum insn_code icode;
10298 unsigned int align;
10299
10300 op0 = addr_for_mem_ref (exp, as, true);
10301 op0 = memory_address_addr_space (mode, op0, as);
10302 temp = gen_rtx_MEM (mode, op0);
10303 set_mem_attributes (temp, exp, 0);
10304 set_mem_addr_space (temp, as);
10305 align = get_object_alignment (exp);
10306 if (modifier != EXPAND_WRITE
10307 && modifier != EXPAND_MEMORY
10308 && mode != BLKmode
10309 && align < GET_MODE_ALIGNMENT (mode)
10310 /* If the target does not have special handling for unaligned
10311 loads of mode then it can use regular moves for them. */
10312 && ((icode = optab_handler (movmisalign_optab, mode))
10313 != CODE_FOR_nothing))
10314 {
10315 struct expand_operand ops[2];
10316
10317 /* We've already validated the memory, and we're creating a
10318 new pseudo destination. The predicates really can't fail,
10319 nor can the generator. */
10320 create_output_operand (&ops[0], NULL_RTX, mode);
10321 create_fixed_operand (&ops[1], temp);
10322 expand_insn (icode, 2, ops);
10323 temp = ops[0].value;
10324 }
10325 return temp;
10326 }
10327
10328 case MEM_REF:
10329 {
10330 const bool reverse = REF_REVERSE_STORAGE_ORDER (exp);
10331 addr_space_t as
10332 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0))));
10333 machine_mode address_mode;
10334 tree base = TREE_OPERAND (exp, 0);
10335 gimple *def_stmt;
10336 enum insn_code icode;
10337 unsigned align;
10338 /* Handle expansion of non-aliased memory with non-BLKmode. That
10339 might end up in a register. */
10340 if (mem_ref_refers_to_non_mem_p (exp))
10341 {
10342 poly_int64 offset = mem_ref_offset (exp).force_shwi ();
10343 base = TREE_OPERAND (base, 0);
10344 if (known_eq (offset, 0)
10345 && !reverse
10346 && tree_fits_uhwi_p (TYPE_SIZE (type))
10347 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base)),
10348 tree_to_uhwi (TYPE_SIZE (type))))
10349 return expand_expr (build1 (VIEW_CONVERT_EXPR, type, base),
10350 target, tmode, modifier);
10351 if (TYPE_MODE (type) == BLKmode)
10352 {
10353 temp = assign_stack_temp (DECL_MODE (base),
10354 GET_MODE_SIZE (DECL_MODE (base)));
10355 store_expr (base, temp, 0, false, false);
10356 temp = adjust_address (temp, BLKmode, offset);
10357 set_mem_size (temp, int_size_in_bytes (type));
10358 return temp;
10359 }
10360 exp = build3 (BIT_FIELD_REF, type, base, TYPE_SIZE (type),
10361 bitsize_int (offset * BITS_PER_UNIT));
10362 REF_REVERSE_STORAGE_ORDER (exp) = reverse;
10363 return expand_expr (exp, target, tmode, modifier);
10364 }
10365 address_mode = targetm.addr_space.address_mode (as);
10366 base = TREE_OPERAND (exp, 0);
10367 if ((def_stmt = get_def_for_expr (base, BIT_AND_EXPR)))
10368 {
10369 tree mask = gimple_assign_rhs2 (def_stmt);
10370 base = build2 (BIT_AND_EXPR, TREE_TYPE (base),
10371 gimple_assign_rhs1 (def_stmt), mask);
10372 TREE_OPERAND (exp, 0) = base;
10373 }
10374 align = get_object_alignment (exp);
10375 op0 = expand_expr (base, NULL_RTX, VOIDmode, EXPAND_SUM);
10376 op0 = memory_address_addr_space (mode, op0, as);
10377 if (!integer_zerop (TREE_OPERAND (exp, 1)))
10378 {
10379 rtx off = immed_wide_int_const (mem_ref_offset (exp), address_mode);
10380 op0 = simplify_gen_binary (PLUS, address_mode, op0, off);
10381 op0 = memory_address_addr_space (mode, op0, as);
10382 }
10383 temp = gen_rtx_MEM (mode, op0);
10384 set_mem_attributes (temp, exp, 0);
10385 set_mem_addr_space (temp, as);
10386 if (TREE_THIS_VOLATILE (exp))
10387 MEM_VOLATILE_P (temp) = 1;
10388 if (modifier != EXPAND_WRITE
10389 && modifier != EXPAND_MEMORY
10390 && !inner_reference_p
10391 && mode != BLKmode
10392 && align < GET_MODE_ALIGNMENT (mode))
10393 {
10394 if ((icode = optab_handler (movmisalign_optab, mode))
10395 != CODE_FOR_nothing)
10396 {
10397 struct expand_operand ops[2];
10398
10399 /* We've already validated the memory, and we're creating a
10400 new pseudo destination. The predicates really can't fail,
10401 nor can the generator. */
10402 create_output_operand (&ops[0], NULL_RTX, mode);
10403 create_fixed_operand (&ops[1], temp);
10404 expand_insn (icode, 2, ops);
10405 temp = ops[0].value;
10406 }
10407 else if (targetm.slow_unaligned_access (mode, align))
10408 temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
10409 0, TYPE_UNSIGNED (TREE_TYPE (exp)),
10410 (modifier == EXPAND_STACK_PARM
10411 ? NULL_RTX : target),
10412 mode, mode, false, alt_rtl);
10413 }
10414 if (reverse
10415 && modifier != EXPAND_MEMORY
10416 && modifier != EXPAND_WRITE)
10417 temp = flip_storage_order (mode, temp);
10418 return temp;
10419 }
10420
10421 case ARRAY_REF:
10422
10423 {
10424 tree array = treeop0;
10425 tree index = treeop1;
10426 tree init;
10427
10428 /* Fold an expression like: "foo"[2].
10429 This is not done in fold so it won't happen inside &.
10430 Don't fold if this is for wide characters since it's too
10431 difficult to do correctly and this is a very rare case. */
10432
10433 if (modifier != EXPAND_CONST_ADDRESS
10434 && modifier != EXPAND_INITIALIZER
10435 && modifier != EXPAND_MEMORY)
10436 {
10437 tree t = fold_read_from_constant_string (exp);
10438
10439 if (t)
10440 return expand_expr (t, target, tmode, modifier);
10441 }
10442
10443 /* If this is a constant index into a constant array,
10444 just get the value from the array. Handle both the cases when
10445 we have an explicit constructor and when our operand is a variable
10446 that was declared const. */
10447
10448 if (modifier != EXPAND_CONST_ADDRESS
10449 && modifier != EXPAND_INITIALIZER
10450 && modifier != EXPAND_MEMORY
10451 && TREE_CODE (array) == CONSTRUCTOR
10452 && ! TREE_SIDE_EFFECTS (array)
10453 && TREE_CODE (index) == INTEGER_CST)
10454 {
10455 unsigned HOST_WIDE_INT ix;
10456 tree field, value;
10457
10458 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array), ix,
10459 field, value)
10460 if (tree_int_cst_equal (field, index))
10461 {
10462 if (!TREE_SIDE_EFFECTS (value))
10463 return expand_expr (fold (value), target, tmode, modifier);
10464 break;
10465 }
10466 }
10467
10468 else if (optimize >= 1
10469 && modifier != EXPAND_CONST_ADDRESS
10470 && modifier != EXPAND_INITIALIZER
10471 && modifier != EXPAND_MEMORY
10472 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array)
10473 && TREE_CODE (index) == INTEGER_CST
10474 && (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
10475 && (init = ctor_for_folding (array)) != error_mark_node)
10476 {
10477 if (init == NULL_TREE)
10478 {
10479 tree value = build_zero_cst (type);
10480 if (TREE_CODE (value) == CONSTRUCTOR)
10481 {
10482 /* If VALUE is a CONSTRUCTOR, this optimization is only
10483 useful if this doesn't store the CONSTRUCTOR into
10484 memory. If it does, it is more efficient to just
10485 load the data from the array directly. */
10486 rtx ret = expand_constructor (value, target,
10487 modifier, true);
10488 if (ret == NULL_RTX)
10489 value = NULL_TREE;
10490 }
10491
10492 if (value)
10493 return expand_expr (value, target, tmode, modifier);
10494 }
10495 else if (TREE_CODE (init) == CONSTRUCTOR)
10496 {
10497 unsigned HOST_WIDE_INT ix;
10498 tree field, value;
10499
10500 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), ix,
10501 field, value)
10502 if (tree_int_cst_equal (field, index))
10503 {
10504 if (TREE_SIDE_EFFECTS (value))
10505 break;
10506
10507 if (TREE_CODE (value) == CONSTRUCTOR)
10508 {
10509 /* If VALUE is a CONSTRUCTOR, this
10510 optimization is only useful if
10511 this doesn't store the CONSTRUCTOR
10512 into memory. If it does, it is more
10513 efficient to just load the data from
10514 the array directly. */
10515 rtx ret = expand_constructor (value, target,
10516 modifier, true);
10517 if (ret == NULL_RTX)
10518 break;
10519 }
10520
10521 return
10522 expand_expr (fold (value), target, tmode, modifier);
10523 }
10524 }
10525 else if (TREE_CODE (init) == STRING_CST)
10526 {
10527 tree low_bound = array_ref_low_bound (exp);
10528 tree index1 = fold_convert_loc (loc, sizetype, treeop1);
10529
10530 /* Optimize the special case of a zero lower bound.
10531
10532 We convert the lower bound to sizetype to avoid problems
10533 with constant folding. E.g. suppose the lower bound is
10534 1 and its mode is QI. Without the conversion
10535 (ARRAY + (INDEX - (unsigned char)1))
10536 becomes
10537 (ARRAY + (-(unsigned char)1) + INDEX)
10538 which becomes
10539 (ARRAY + 255 + INDEX). Oops! */
10540 if (!integer_zerop (low_bound))
10541 index1 = size_diffop_loc (loc, index1,
10542 fold_convert_loc (loc, sizetype,
10543 low_bound));
10544
10545 if (tree_fits_uhwi_p (index1)
10546 && compare_tree_int (index1, TREE_STRING_LENGTH (init)) < 0)
10547 {
10548 tree type = TREE_TYPE (TREE_TYPE (init));
10549 scalar_int_mode mode;
10550
10551 if (is_int_mode (TYPE_MODE (type), &mode)
10552 && GET_MODE_SIZE (mode) == 1)
10553 return gen_int_mode (TREE_STRING_POINTER (init)
10554 [TREE_INT_CST_LOW (index1)],
10555 mode);
10556 }
10557 }
10558 }
10559 }
10560 goto normal_inner_ref;
10561
10562 case COMPONENT_REF:
10563 /* If the operand is a CONSTRUCTOR, we can just extract the
10564 appropriate field if it is present. */
10565 if (TREE_CODE (treeop0) == CONSTRUCTOR)
10566 {
10567 unsigned HOST_WIDE_INT idx;
10568 tree field, value;
10569 scalar_int_mode field_mode;
10570
10571 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0),
10572 idx, field, value)
10573 if (field == treeop1
10574 /* We can normally use the value of the field in the
10575 CONSTRUCTOR. However, if this is a bitfield in
10576 an integral mode that we can fit in a HOST_WIDE_INT,
10577 we must mask only the number of bits in the bitfield,
10578 since this is done implicitly by the constructor. If
10579 the bitfield does not meet either of those conditions,
10580 we can't do this optimization. */
10581 && (! DECL_BIT_FIELD (field)
10582 || (is_int_mode (DECL_MODE (field), &field_mode)
10583 && (GET_MODE_PRECISION (field_mode)
10584 <= HOST_BITS_PER_WIDE_INT))))
10585 {
10586 if (DECL_BIT_FIELD (field)
10587 && modifier == EXPAND_STACK_PARM)
10588 target = 0;
10589 op0 = expand_expr (value, target, tmode, modifier);
10590 if (DECL_BIT_FIELD (field))
10591 {
10592 HOST_WIDE_INT bitsize = TREE_INT_CST_LOW (DECL_SIZE (field));
10593 scalar_int_mode imode
10594 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field));
10595
10596 if (TYPE_UNSIGNED (TREE_TYPE (field)))
10597 {
10598 op1 = gen_int_mode ((HOST_WIDE_INT_1 << bitsize) - 1,
10599 imode);
10600 op0 = expand_and (imode, op0, op1, target);
10601 }
10602 else
10603 {
10604 int count = GET_MODE_PRECISION (imode) - bitsize;
10605
10606 op0 = expand_shift (LSHIFT_EXPR, imode, op0, count,
10607 target, 0);
10608 op0 = expand_shift (RSHIFT_EXPR, imode, op0, count,
10609 target, 0);
10610 }
10611 }
10612
10613 return op0;
10614 }
10615 }
10616 goto normal_inner_ref;
10617
10618 case BIT_FIELD_REF:
10619 case ARRAY_RANGE_REF:
10620 normal_inner_ref:
10621 {
10622 machine_mode mode1, mode2;
10623 poly_int64 bitsize, bitpos, bytepos;
10624 tree offset;
10625 int reversep, volatilep = 0, must_force_mem;
10626 tree tem
10627 = get_inner_reference (exp, &bitsize, &bitpos, &offset, &mode1,
10628 &unsignedp, &reversep, &volatilep);
10629 rtx orig_op0, memloc;
10630 bool clear_mem_expr = false;
10631
10632 /* If we got back the original object, something is wrong. Perhaps
10633 we are evaluating an expression too early. In any event, don't
10634 infinitely recurse. */
10635 gcc_assert (tem != exp);
10636
10637 /* If TEM's type is a union of variable size, pass TARGET to the inner
10638 computation, since it will need a temporary and TARGET is known
10639 to have to do. This occurs in unchecked conversion in Ada. */
10640 orig_op0 = op0
10641 = expand_expr_real (tem,
10642 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
10643 && COMPLETE_TYPE_P (TREE_TYPE (tem))
10644 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
10645 != INTEGER_CST)
10646 && modifier != EXPAND_STACK_PARM
10647 ? target : NULL_RTX),
10648 VOIDmode,
10649 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
10650 NULL, true);
10651
10652 /* If the field has a mode, we want to access it in the
10653 field's mode, not the computed mode.
10654 If a MEM has VOIDmode (external with incomplete type),
10655 use BLKmode for it instead. */
10656 if (MEM_P (op0))
10657 {
10658 if (mode1 != VOIDmode)
10659 op0 = adjust_address (op0, mode1, 0);
10660 else if (GET_MODE (op0) == VOIDmode)
10661 op0 = adjust_address (op0, BLKmode, 0);
10662 }
10663
10664 mode2
10665 = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
10666
10667 /* Make sure bitpos is not negative, it can wreak havoc later. */
10668 if (maybe_lt (bitpos, 0))
10669 {
10670 gcc_checking_assert (offset == NULL_TREE);
10671 offset = size_int (bits_to_bytes_round_down (bitpos));
10672 bitpos = num_trailing_bits (bitpos);
10673 }
10674
10675 /* If we have either an offset, a BLKmode result, or a reference
10676 outside the underlying object, we must force it to memory.
10677 Such a case can occur in Ada if we have unchecked conversion
10678 of an expression from a scalar type to an aggregate type or
10679 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10680 passed a partially uninitialized object or a view-conversion
10681 to a larger size. */
10682 must_force_mem = (offset
10683 || mode1 == BLKmode
10684 || maybe_gt (bitpos + bitsize,
10685 GET_MODE_BITSIZE (mode2)));
10686
10687 /* Handle CONCAT first. */
10688 if (GET_CODE (op0) == CONCAT && !must_force_mem)
10689 {
10690 if (known_eq (bitpos, 0)
10691 && known_eq (bitsize, GET_MODE_BITSIZE (GET_MODE (op0)))
10692 && COMPLEX_MODE_P (mode1)
10693 && COMPLEX_MODE_P (GET_MODE (op0))
10694 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1))
10695 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0)))))
10696 {
10697 if (reversep)
10698 op0 = flip_storage_order (GET_MODE (op0), op0);
10699 if (mode1 != GET_MODE (op0))
10700 {
10701 rtx parts[2];
10702 for (int i = 0; i < 2; i++)
10703 {
10704 rtx op = read_complex_part (op0, i != 0);
10705 if (GET_CODE (op) == SUBREG)
10706 op = force_reg (GET_MODE (op), op);
10707 rtx temp = gen_lowpart_common (GET_MODE_INNER (mode1),
10708 op);
10709 if (temp)
10710 op = temp;
10711 else
10712 {
10713 if (!REG_P (op) && !MEM_P (op))
10714 op = force_reg (GET_MODE (op), op);
10715 op = gen_lowpart (GET_MODE_INNER (mode1), op);
10716 }
10717 parts[i] = op;
10718 }
10719 op0 = gen_rtx_CONCAT (mode1, parts[0], parts[1]);
10720 }
10721 return op0;
10722 }
10723 if (known_eq (bitpos, 0)
10724 && known_eq (bitsize,
10725 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10726 && maybe_ne (bitsize, 0))
10727 {
10728 op0 = XEXP (op0, 0);
10729 mode2 = GET_MODE (op0);
10730 }
10731 else if (known_eq (bitpos,
10732 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 0))))
10733 && known_eq (bitsize,
10734 GET_MODE_BITSIZE (GET_MODE (XEXP (op0, 1))))
10735 && maybe_ne (bitpos, 0)
10736 && maybe_ne (bitsize, 0))
10737 {
10738 op0 = XEXP (op0, 1);
10739 bitpos = 0;
10740 mode2 = GET_MODE (op0);
10741 }
10742 else
10743 /* Otherwise force into memory. */
10744 must_force_mem = 1;
10745 }
10746
10747 /* If this is a constant, put it in a register if it is a legitimate
10748 constant and we don't need a memory reference. */
10749 if (CONSTANT_P (op0)
10750 && mode2 != BLKmode
10751 && targetm.legitimate_constant_p (mode2, op0)
10752 && !must_force_mem)
10753 op0 = force_reg (mode2, op0);
10754
10755 /* Otherwise, if this is a constant, try to force it to the constant
10756 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10757 is a legitimate constant. */
10758 else if (CONSTANT_P (op0) && (memloc = force_const_mem (mode2, op0)))
10759 op0 = validize_mem (memloc);
10760
10761 /* Otherwise, if this is a constant or the object is not in memory
10762 and need be, put it there. */
10763 else if (CONSTANT_P (op0) || (!MEM_P (op0) && must_force_mem))
10764 {
10765 memloc = assign_temp (TREE_TYPE (tem), 1, 1);
10766 emit_move_insn (memloc, op0);
10767 op0 = memloc;
10768 clear_mem_expr = true;
10769 }
10770
10771 if (offset)
10772 {
10773 machine_mode address_mode;
10774 rtx offset_rtx = expand_expr (offset, NULL_RTX, VOIDmode,
10775 EXPAND_SUM);
10776
10777 gcc_assert (MEM_P (op0));
10778
10779 address_mode = get_address_mode (op0);
10780 if (GET_MODE (offset_rtx) != address_mode)
10781 {
10782 /* We cannot be sure that the RTL in offset_rtx is valid outside
10783 of a memory address context, so force it into a register
10784 before attempting to convert it to the desired mode. */
10785 offset_rtx = force_operand (offset_rtx, NULL_RTX);
10786 offset_rtx = convert_to_mode (address_mode, offset_rtx, 0);
10787 }
10788
10789 /* See the comment in expand_assignment for the rationale. */
10790 if (mode1 != VOIDmode
10791 && maybe_ne (bitpos, 0)
10792 && maybe_gt (bitsize, 0)
10793 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
10794 && multiple_p (bitpos, bitsize)
10795 && multiple_p (bitsize, GET_MODE_ALIGNMENT (mode1))
10796 && MEM_ALIGN (op0) >= GET_MODE_ALIGNMENT (mode1))
10797 {
10798 op0 = adjust_address (op0, mode1, bytepos);
10799 bitpos = 0;
10800 }
10801
10802 op0 = offset_address (op0, offset_rtx,
10803 highest_pow2_factor (offset));
10804 }
10805
10806 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10807 record its alignment as BIGGEST_ALIGNMENT. */
10808 if (MEM_P (op0)
10809 && known_eq (bitpos, 0)
10810 && offset != 0
10811 && is_aligning_offset (offset, tem))
10812 set_mem_align (op0, BIGGEST_ALIGNMENT);
10813
10814 /* Don't forget about volatility even if this is a bitfield. */
10815 if (MEM_P (op0) && volatilep && ! MEM_VOLATILE_P (op0))
10816 {
10817 if (op0 == orig_op0)
10818 op0 = copy_rtx (op0);
10819
10820 MEM_VOLATILE_P (op0) = 1;
10821 }
10822
10823 /* In cases where an aligned union has an unaligned object
10824 as a field, we might be extracting a BLKmode value from
10825 an integer-mode (e.g., SImode) object. Handle this case
10826 by doing the extract into an object as wide as the field
10827 (which we know to be the width of a basic mode), then
10828 storing into memory, and changing the mode to BLKmode. */
10829 if (mode1 == VOIDmode
10830 || REG_P (op0) || GET_CODE (op0) == SUBREG
10831 || (mode1 != BLKmode && ! direct_load[(int) mode1]
10832 && GET_MODE_CLASS (mode) != MODE_COMPLEX_INT
10833 && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
10834 && modifier != EXPAND_CONST_ADDRESS
10835 && modifier != EXPAND_INITIALIZER
10836 && modifier != EXPAND_MEMORY)
10837 /* If the bitfield is volatile and the bitsize
10838 is narrower than the access size of the bitfield,
10839 we need to extract bitfields from the access. */
10840 || (volatilep && TREE_CODE (exp) == COMPONENT_REF
10841 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp, 1))
10842 && mode1 != BLKmode
10843 && maybe_lt (bitsize, GET_MODE_SIZE (mode1) * BITS_PER_UNIT))
10844 /* If the field isn't aligned enough to fetch as a memref,
10845 fetch it as a bit field. */
10846 || (mode1 != BLKmode
10847 && (((MEM_P (op0)
10848 ? MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode1)
10849 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode1))
10850 : TYPE_ALIGN (TREE_TYPE (tem)) < GET_MODE_ALIGNMENT (mode)
10851 || !multiple_p (bitpos, GET_MODE_ALIGNMENT (mode)))
10852 && modifier != EXPAND_MEMORY
10853 && ((modifier == EXPAND_CONST_ADDRESS
10854 || modifier == EXPAND_INITIALIZER)
10855 ? STRICT_ALIGNMENT
10856 : targetm.slow_unaligned_access (mode1,
10857 MEM_ALIGN (op0))))
10858 || !multiple_p (bitpos, BITS_PER_UNIT)))
10859 /* If the type and the field are a constant size and the
10860 size of the type isn't the same size as the bitfield,
10861 we must use bitfield operations. */
10862 || (known_size_p (bitsize)
10863 && TYPE_SIZE (TREE_TYPE (exp))
10864 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp)))
10865 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp))),
10866 bitsize)))
10867 {
10868 machine_mode ext_mode = mode;
10869
10870 if (ext_mode == BLKmode
10871 && ! (target != 0 && MEM_P (op0)
10872 && MEM_P (target)
10873 && multiple_p (bitpos, BITS_PER_UNIT)))
10874 ext_mode = int_mode_for_size (bitsize, 1).else_blk ();
10875
10876 if (ext_mode == BLKmode)
10877 {
10878 if (target == 0)
10879 target = assign_temp (type, 1, 1);
10880
10881 /* ??? Unlike the similar test a few lines below, this one is
10882 very likely obsolete. */
10883 if (known_eq (bitsize, 0))
10884 return target;
10885
10886 /* In this case, BITPOS must start at a byte boundary and
10887 TARGET, if specified, must be a MEM. */
10888 gcc_assert (MEM_P (op0)
10889 && (!target || MEM_P (target)));
10890
10891 bytepos = exact_div (bitpos, BITS_PER_UNIT);
10892 poly_int64 bytesize = bits_to_bytes_round_up (bitsize);
10893 emit_block_move (target,
10894 adjust_address (op0, VOIDmode, bytepos),
10895 gen_int_mode (bytesize, Pmode),
10896 (modifier == EXPAND_STACK_PARM
10897 ? BLOCK_OP_CALL_PARM : BLOCK_OP_NORMAL));
10898
10899 return target;
10900 }
10901
10902 /* If we have nothing to extract, the result will be 0 for targets
10903 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10904 return 0 for the sake of consistency, as reading a zero-sized
10905 bitfield is valid in Ada and the value is fully specified. */
10906 if (known_eq (bitsize, 0))
10907 return const0_rtx;
10908
10909 op0 = validize_mem (op0);
10910
10911 if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
10912 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10913
10914 /* If the result has a record type and the extraction is done in
10915 an integral mode, then the field may be not aligned on a byte
10916 boundary; in this case, if it has reverse storage order, it
10917 needs to be extracted as a scalar field with reverse storage
10918 order and put back into memory order afterwards. */
10919 if (TREE_CODE (type) == RECORD_TYPE
10920 && GET_MODE_CLASS (ext_mode) == MODE_INT)
10921 reversep = TYPE_REVERSE_STORAGE_ORDER (type);
10922
10923 gcc_checking_assert (known_ge (bitpos, 0));
10924 op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
10925 (modifier == EXPAND_STACK_PARM
10926 ? NULL_RTX : target),
10927 ext_mode, ext_mode, reversep, alt_rtl);
10928
10929 /* If the result has a record type and the mode of OP0 is an
10930 integral mode then, if BITSIZE is narrower than this mode
10931 and this is for big-endian data, we must put the field
10932 into the high-order bits. And we must also put it back
10933 into memory order if it has been previously reversed. */
10934 scalar_int_mode op0_mode;
10935 if (TREE_CODE (type) == RECORD_TYPE
10936 && is_int_mode (GET_MODE (op0), &op0_mode))
10937 {
10938 HOST_WIDE_INT size = GET_MODE_BITSIZE (op0_mode);
10939
10940 gcc_checking_assert (known_le (bitsize, size));
10941 if (maybe_lt (bitsize, size)
10942 && reversep ? !BYTES_BIG_ENDIAN : BYTES_BIG_ENDIAN)
10943 op0 = expand_shift (LSHIFT_EXPR, op0_mode, op0,
10944 size - bitsize, op0, 1);
10945
10946 if (reversep)
10947 op0 = flip_storage_order (op0_mode, op0);
10948 }
10949
10950 /* If the result type is BLKmode, store the data into a temporary
10951 of the appropriate type, but with the mode corresponding to the
10952 mode for the data we have (op0's mode). */
10953 if (mode == BLKmode)
10954 {
10955 rtx new_rtx
10956 = assign_stack_temp_for_type (ext_mode,
10957 GET_MODE_BITSIZE (ext_mode),
10958 type);
10959 emit_move_insn (new_rtx, op0);
10960 op0 = copy_rtx (new_rtx);
10961 PUT_MODE (op0, BLKmode);
10962 }
10963
10964 return op0;
10965 }
10966
10967 /* If the result is BLKmode, use that to access the object
10968 now as well. */
10969 if (mode == BLKmode)
10970 mode1 = BLKmode;
10971
10972 /* Get a reference to just this component. */
10973 bytepos = bits_to_bytes_round_down (bitpos);
10974 if (modifier == EXPAND_CONST_ADDRESS
10975 || modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER)
10976 op0 = adjust_address_nv (op0, mode1, bytepos);
10977 else
10978 op0 = adjust_address (op0, mode1, bytepos);
10979
10980 if (op0 == orig_op0)
10981 op0 = copy_rtx (op0);
10982
10983 /* Don't set memory attributes if the base expression is
10984 SSA_NAME that got expanded as a MEM. In that case, we should
10985 just honor its original memory attributes. */
10986 if (TREE_CODE (tem) != SSA_NAME || !MEM_P (orig_op0))
10987 set_mem_attributes (op0, exp, 0);
10988
10989 if (REG_P (XEXP (op0, 0)))
10990 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
10991
10992 /* If op0 is a temporary because the original expressions was forced
10993 to memory, clear MEM_EXPR so that the original expression cannot
10994 be marked as addressable through MEM_EXPR of the temporary. */
10995 if (clear_mem_expr)
10996 set_mem_expr (op0, NULL_TREE);
10997
10998 MEM_VOLATILE_P (op0) |= volatilep;
10999
11000 if (reversep
11001 && modifier != EXPAND_MEMORY
11002 && modifier != EXPAND_WRITE)
11003 op0 = flip_storage_order (mode1, op0);
11004
11005 if (mode == mode1 || mode1 == BLKmode || mode1 == tmode
11006 || modifier == EXPAND_CONST_ADDRESS
11007 || modifier == EXPAND_INITIALIZER)
11008 return op0;
11009
11010 if (target == 0)
11011 target = gen_reg_rtx (tmode != VOIDmode ? tmode : mode);
11012
11013 convert_move (target, op0, unsignedp);
11014 return target;
11015 }
11016
11017 case OBJ_TYPE_REF:
11018 return expand_expr (OBJ_TYPE_REF_EXPR (exp), target, tmode, modifier);
11019
11020 case CALL_EXPR:
11021 /* All valid uses of __builtin_va_arg_pack () are removed during
11022 inlining. */
11023 if (CALL_EXPR_VA_ARG_PACK (exp))
11024 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp);
11025 {
11026 tree fndecl = get_callee_fndecl (exp), attr;
11027
11028 if (fndecl
11029 /* Don't diagnose the error attribute in thunks, those are
11030 artificially created. */
11031 && !CALL_FROM_THUNK_P (exp)
11032 && (attr = lookup_attribute ("error",
11033 DECL_ATTRIBUTES (fndecl))) != NULL)
11034 {
11035 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
11036 error ("%Kcall to %qs declared with attribute error: %s", exp,
11037 identifier_to_locale (ident),
11038 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
11039 }
11040 if (fndecl
11041 /* Don't diagnose the warning attribute in thunks, those are
11042 artificially created. */
11043 && !CALL_FROM_THUNK_P (exp)
11044 && (attr = lookup_attribute ("warning",
11045 DECL_ATTRIBUTES (fndecl))) != NULL)
11046 {
11047 const char *ident = lang_hooks.decl_printable_name (fndecl, 1);
11048 warning_at (tree_nonartificial_location (exp), 0,
11049 "%Kcall to %qs declared with attribute warning: %s",
11050 exp, identifier_to_locale (ident),
11051 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr))));
11052 }
11053
11054 /* Check for a built-in function. */
11055 if (fndecl && DECL_BUILT_IN (fndecl))
11056 {
11057 gcc_assert (DECL_BUILT_IN_CLASS (fndecl) != BUILT_IN_FRONTEND);
11058 if (CALL_WITH_BOUNDS_P (exp))
11059 return expand_builtin_with_bounds (exp, target, subtarget,
11060 tmode, ignore);
11061 else
11062 return expand_builtin (exp, target, subtarget, tmode, ignore);
11063 }
11064 }
11065 return expand_call (exp, target, ignore);
11066
11067 case VIEW_CONVERT_EXPR:
11068 op0 = NULL_RTX;
11069
11070 /* If we are converting to BLKmode, try to avoid an intermediate
11071 temporary by fetching an inner memory reference. */
11072 if (mode == BLKmode
11073 && poly_int_tree_p (TYPE_SIZE (type))
11074 && TYPE_MODE (TREE_TYPE (treeop0)) != BLKmode
11075 && handled_component_p (treeop0))
11076 {
11077 machine_mode mode1;
11078 poly_int64 bitsize, bitpos, bytepos;
11079 tree offset;
11080 int unsignedp, reversep, volatilep = 0;
11081 tree tem
11082 = get_inner_reference (treeop0, &bitsize, &bitpos, &offset, &mode1,
11083 &unsignedp, &reversep, &volatilep);
11084 rtx orig_op0;
11085
11086 /* ??? We should work harder and deal with non-zero offsets. */
11087 if (!offset
11088 && multiple_p (bitpos, BITS_PER_UNIT, &bytepos)
11089 && !reversep
11090 && known_size_p (bitsize)
11091 && known_eq (wi::to_poly_offset (TYPE_SIZE (type)), bitsize))
11092 {
11093 /* See the normal_inner_ref case for the rationale. */
11094 orig_op0
11095 = expand_expr_real (tem,
11096 (TREE_CODE (TREE_TYPE (tem)) == UNION_TYPE
11097 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem)))
11098 != INTEGER_CST)
11099 && modifier != EXPAND_STACK_PARM
11100 ? target : NULL_RTX),
11101 VOIDmode,
11102 modifier == EXPAND_SUM ? EXPAND_NORMAL : modifier,
11103 NULL, true);
11104
11105 if (MEM_P (orig_op0))
11106 {
11107 op0 = orig_op0;
11108
11109 /* Get a reference to just this component. */
11110 if (modifier == EXPAND_CONST_ADDRESS
11111 || modifier == EXPAND_SUM
11112 || modifier == EXPAND_INITIALIZER)
11113 op0 = adjust_address_nv (op0, mode, bytepos);
11114 else
11115 op0 = adjust_address (op0, mode, bytepos);
11116
11117 if (op0 == orig_op0)
11118 op0 = copy_rtx (op0);
11119
11120 set_mem_attributes (op0, treeop0, 0);
11121 if (REG_P (XEXP (op0, 0)))
11122 mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
11123
11124 MEM_VOLATILE_P (op0) |= volatilep;
11125 }
11126 }
11127 }
11128
11129 if (!op0)
11130 op0 = expand_expr_real (treeop0, NULL_RTX, VOIDmode, modifier,
11131 NULL, inner_reference_p);
11132
11133 /* If the input and output modes are both the same, we are done. */
11134 if (mode == GET_MODE (op0))
11135 ;
11136 /* If neither mode is BLKmode, and both modes are the same size
11137 then we can use gen_lowpart. */
11138 else if (mode != BLKmode
11139 && GET_MODE (op0) != BLKmode
11140 && known_eq (GET_MODE_PRECISION (mode),
11141 GET_MODE_PRECISION (GET_MODE (op0)))
11142 && !COMPLEX_MODE_P (GET_MODE (op0)))
11143 {
11144 if (GET_CODE (op0) == SUBREG)
11145 op0 = force_reg (GET_MODE (op0), op0);
11146 temp = gen_lowpart_common (mode, op0);
11147 if (temp)
11148 op0 = temp;
11149 else
11150 {
11151 if (!REG_P (op0) && !MEM_P (op0))
11152 op0 = force_reg (GET_MODE (op0), op0);
11153 op0 = gen_lowpart (mode, op0);
11154 }
11155 }
11156 /* If both types are integral, convert from one mode to the other. */
11157 else if (INTEGRAL_TYPE_P (type) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0)))
11158 op0 = convert_modes (mode, GET_MODE (op0), op0,
11159 TYPE_UNSIGNED (TREE_TYPE (treeop0)));
11160 /* If the output type is a bit-field type, do an extraction. */
11161 else if (reduce_bit_field)
11162 return extract_bit_field (op0, TYPE_PRECISION (type), 0,
11163 TYPE_UNSIGNED (type), NULL_RTX,
11164 mode, mode, false, NULL);
11165 /* As a last resort, spill op0 to memory, and reload it in a
11166 different mode. */
11167 else if (!MEM_P (op0))
11168 {
11169 /* If the operand is not a MEM, force it into memory. Since we
11170 are going to be changing the mode of the MEM, don't call
11171 force_const_mem for constants because we don't allow pool
11172 constants to change mode. */
11173 tree inner_type = TREE_TYPE (treeop0);
11174
11175 gcc_assert (!TREE_ADDRESSABLE (exp));
11176
11177 if (target == 0 || GET_MODE (target) != TYPE_MODE (inner_type))
11178 target
11179 = assign_stack_temp_for_type
11180 (TYPE_MODE (inner_type),
11181 GET_MODE_SIZE (TYPE_MODE (inner_type)), inner_type);
11182
11183 emit_move_insn (target, op0);
11184 op0 = target;
11185 }
11186
11187 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11188 output type is such that the operand is known to be aligned, indicate
11189 that it is. Otherwise, we need only be concerned about alignment for
11190 non-BLKmode results. */
11191 if (MEM_P (op0))
11192 {
11193 enum insn_code icode;
11194
11195 if (modifier != EXPAND_WRITE
11196 && modifier != EXPAND_MEMORY
11197 && !inner_reference_p
11198 && mode != BLKmode
11199 && MEM_ALIGN (op0) < GET_MODE_ALIGNMENT (mode))
11200 {
11201 /* If the target does have special handling for unaligned
11202 loads of mode then use them. */
11203 if ((icode = optab_handler (movmisalign_optab, mode))
11204 != CODE_FOR_nothing)
11205 {
11206 rtx reg;
11207
11208 op0 = adjust_address (op0, mode, 0);
11209 /* We've already validated the memory, and we're creating a
11210 new pseudo destination. The predicates really can't
11211 fail. */
11212 reg = gen_reg_rtx (mode);
11213
11214 /* Nor can the insn generator. */
11215 rtx_insn *insn = GEN_FCN (icode) (reg, op0);
11216 emit_insn (insn);
11217 return reg;
11218 }
11219 else if (STRICT_ALIGNMENT)
11220 {
11221 poly_uint64 mode_size = GET_MODE_SIZE (mode);
11222 poly_uint64 temp_size = mode_size;
11223 if (GET_MODE (op0) != BLKmode)
11224 temp_size = upper_bound (temp_size,
11225 GET_MODE_SIZE (GET_MODE (op0)));
11226 rtx new_rtx
11227 = assign_stack_temp_for_type (mode, temp_size, type);
11228 rtx new_with_op0_mode
11229 = adjust_address (new_rtx, GET_MODE (op0), 0);
11230
11231 gcc_assert (!TREE_ADDRESSABLE (exp));
11232
11233 if (GET_MODE (op0) == BLKmode)
11234 {
11235 rtx size_rtx = gen_int_mode (mode_size, Pmode);
11236 emit_block_move (new_with_op0_mode, op0, size_rtx,
11237 (modifier == EXPAND_STACK_PARM
11238 ? BLOCK_OP_CALL_PARM
11239 : BLOCK_OP_NORMAL));
11240 }
11241 else
11242 emit_move_insn (new_with_op0_mode, op0);
11243
11244 op0 = new_rtx;
11245 }
11246 }
11247
11248 op0 = adjust_address (op0, mode, 0);
11249 }
11250
11251 return op0;
11252
11253 case MODIFY_EXPR:
11254 {
11255 tree lhs = treeop0;
11256 tree rhs = treeop1;
11257 gcc_assert (ignore);
11258
11259 /* Check for |= or &= of a bitfield of size one into another bitfield
11260 of size 1. In this case, (unless we need the result of the
11261 assignment) we can do this more efficiently with a
11262 test followed by an assignment, if necessary.
11263
11264 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11265 things change so we do, this code should be enhanced to
11266 support it. */
11267 if (TREE_CODE (lhs) == COMPONENT_REF
11268 && (TREE_CODE (rhs) == BIT_IOR_EXPR
11269 || TREE_CODE (rhs) == BIT_AND_EXPR)
11270 && TREE_OPERAND (rhs, 0) == lhs
11271 && TREE_CODE (TREE_OPERAND (rhs, 1)) == COMPONENT_REF
11272 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs, 1)))
11273 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs, 1), 1))))
11274 {
11275 rtx_code_label *label = gen_label_rtx ();
11276 int value = TREE_CODE (rhs) == BIT_IOR_EXPR;
11277 do_jump (TREE_OPERAND (rhs, 1),
11278 value ? label : 0,
11279 value ? 0 : label,
11280 profile_probability::uninitialized ());
11281 expand_assignment (lhs, build_int_cst (TREE_TYPE (rhs), value),
11282 false);
11283 do_pending_stack_adjust ();
11284 emit_label (label);
11285 return const0_rtx;
11286 }
11287
11288 expand_assignment (lhs, rhs, false);
11289 return const0_rtx;
11290 }
11291
11292 case ADDR_EXPR:
11293 return expand_expr_addr_expr (exp, target, tmode, modifier);
11294
11295 case REALPART_EXPR:
11296 op0 = expand_normal (treeop0);
11297 return read_complex_part (op0, false);
11298
11299 case IMAGPART_EXPR:
11300 op0 = expand_normal (treeop0);
11301 return read_complex_part (op0, true);
11302
11303 case RETURN_EXPR:
11304 case LABEL_EXPR:
11305 case GOTO_EXPR:
11306 case SWITCH_EXPR:
11307 case ASM_EXPR:
11308 /* Expanded in cfgexpand.c. */
11309 gcc_unreachable ();
11310
11311 case TRY_CATCH_EXPR:
11312 case CATCH_EXPR:
11313 case EH_FILTER_EXPR:
11314 case TRY_FINALLY_EXPR:
11315 /* Lowered by tree-eh.c. */
11316 gcc_unreachable ();
11317
11318 case WITH_CLEANUP_EXPR:
11319 case CLEANUP_POINT_EXPR:
11320 case TARGET_EXPR:
11321 case CASE_LABEL_EXPR:
11322 case VA_ARG_EXPR:
11323 case BIND_EXPR:
11324 case INIT_EXPR:
11325 case CONJ_EXPR:
11326 case COMPOUND_EXPR:
11327 case PREINCREMENT_EXPR:
11328 case PREDECREMENT_EXPR:
11329 case POSTINCREMENT_EXPR:
11330 case POSTDECREMENT_EXPR:
11331 case LOOP_EXPR:
11332 case EXIT_EXPR:
11333 case COMPOUND_LITERAL_EXPR:
11334 /* Lowered by gimplify.c. */
11335 gcc_unreachable ();
11336
11337 case FDESC_EXPR:
11338 /* Function descriptors are not valid except for as
11339 initialization constants, and should not be expanded. */
11340 gcc_unreachable ();
11341
11342 case WITH_SIZE_EXPR:
11343 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11344 have pulled out the size to use in whatever context it needed. */
11345 return expand_expr_real (treeop0, original_target, tmode,
11346 modifier, alt_rtl, inner_reference_p);
11347
11348 default:
11349 return expand_expr_real_2 (&ops, target, tmode, modifier);
11350 }
11351 }
11352
11353 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11354 signedness of TYPE), possibly returning the result in TARGET.
11355 TYPE is known to be a partial integer type. */
11356 static rtx
reduce_to_bit_field_precision(rtx exp,rtx target,tree type)11357 reduce_to_bit_field_precision (rtx exp, rtx target, tree type)
11358 {
11359 HOST_WIDE_INT prec = TYPE_PRECISION (type);
11360 if (target && GET_MODE (target) != GET_MODE (exp))
11361 target = 0;
11362 /* For constant values, reduce using build_int_cst_type. */
11363 if (CONST_INT_P (exp))
11364 {
11365 HOST_WIDE_INT value = INTVAL (exp);
11366 tree t = build_int_cst_type (type, value);
11367 return expand_expr (t, target, VOIDmode, EXPAND_NORMAL);
11368 }
11369 else if (TYPE_UNSIGNED (type))
11370 {
11371 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11372 rtx mask = immed_wide_int_const
11373 (wi::mask (prec, false, GET_MODE_PRECISION (mode)), mode);
11374 return expand_and (mode, exp, mask, target);
11375 }
11376 else
11377 {
11378 scalar_int_mode mode = as_a <scalar_int_mode> (GET_MODE (exp));
11379 int count = GET_MODE_PRECISION (mode) - prec;
11380 exp = expand_shift (LSHIFT_EXPR, mode, exp, count, target, 0);
11381 return expand_shift (RSHIFT_EXPR, mode, exp, count, target, 0);
11382 }
11383 }
11384
11385 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11386 when applied to the address of EXP produces an address known to be
11387 aligned more than BIGGEST_ALIGNMENT. */
11388
11389 static int
is_aligning_offset(const_tree offset,const_tree exp)11390 is_aligning_offset (const_tree offset, const_tree exp)
11391 {
11392 /* Strip off any conversions. */
11393 while (CONVERT_EXPR_P (offset))
11394 offset = TREE_OPERAND (offset, 0);
11395
11396 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11397 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11398 if (TREE_CODE (offset) != BIT_AND_EXPR
11399 || !tree_fits_uhwi_p (TREE_OPERAND (offset, 1))
11400 || compare_tree_int (TREE_OPERAND (offset, 1),
11401 BIGGEST_ALIGNMENT / BITS_PER_UNIT) <= 0
11402 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset, 1)) + 1))
11403 return 0;
11404
11405 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11406 It must be NEGATE_EXPR. Then strip any more conversions. */
11407 offset = TREE_OPERAND (offset, 0);
11408 while (CONVERT_EXPR_P (offset))
11409 offset = TREE_OPERAND (offset, 0);
11410
11411 if (TREE_CODE (offset) != NEGATE_EXPR)
11412 return 0;
11413
11414 offset = TREE_OPERAND (offset, 0);
11415 while (CONVERT_EXPR_P (offset))
11416 offset = TREE_OPERAND (offset, 0);
11417
11418 /* This must now be the address of EXP. */
11419 return TREE_CODE (offset) == ADDR_EXPR && TREE_OPERAND (offset, 0) == exp;
11420 }
11421
11422 /* Return the tree node if an ARG corresponds to a string constant or zero
11423 if it doesn't. If we return nonzero, set *PTR_OFFSET to the offset
11424 in bytes within the string that ARG is accessing. The type of the
11425 offset will be `sizetype'. */
11426
11427 tree
string_constant(tree arg,tree * ptr_offset)11428 string_constant (tree arg, tree *ptr_offset)
11429 {
11430 tree array, offset, lower_bound;
11431 STRIP_NOPS (arg);
11432
11433 if (TREE_CODE (arg) == ADDR_EXPR)
11434 {
11435 if (TREE_CODE (TREE_OPERAND (arg, 0)) == STRING_CST)
11436 {
11437 *ptr_offset = size_zero_node;
11438 return TREE_OPERAND (arg, 0);
11439 }
11440 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == VAR_DECL)
11441 {
11442 array = TREE_OPERAND (arg, 0);
11443 offset = size_zero_node;
11444 }
11445 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == ARRAY_REF)
11446 {
11447 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11448 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11449 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11450 return 0;
11451
11452 /* Check if the array has a nonzero lower bound. */
11453 lower_bound = array_ref_low_bound (TREE_OPERAND (arg, 0));
11454 if (!integer_zerop (lower_bound))
11455 {
11456 /* If the offset and base aren't both constants, return 0. */
11457 if (TREE_CODE (lower_bound) != INTEGER_CST)
11458 return 0;
11459 if (TREE_CODE (offset) != INTEGER_CST)
11460 return 0;
11461 /* Adjust offset by the lower bound. */
11462 offset = size_diffop (fold_convert (sizetype, offset),
11463 fold_convert (sizetype, lower_bound));
11464 }
11465 }
11466 else if (TREE_CODE (TREE_OPERAND (arg, 0)) == MEM_REF)
11467 {
11468 array = TREE_OPERAND (TREE_OPERAND (arg, 0), 0);
11469 offset = TREE_OPERAND (TREE_OPERAND (arg, 0), 1);
11470 if (TREE_CODE (array) != ADDR_EXPR)
11471 return 0;
11472 array = TREE_OPERAND (array, 0);
11473 if (TREE_CODE (array) != STRING_CST && !VAR_P (array))
11474 return 0;
11475 }
11476 else
11477 return 0;
11478 }
11479 else if (TREE_CODE (arg) == PLUS_EXPR || TREE_CODE (arg) == POINTER_PLUS_EXPR)
11480 {
11481 tree arg0 = TREE_OPERAND (arg, 0);
11482 tree arg1 = TREE_OPERAND (arg, 1);
11483
11484 STRIP_NOPS (arg0);
11485 STRIP_NOPS (arg1);
11486
11487 if (TREE_CODE (arg0) == ADDR_EXPR
11488 && (TREE_CODE (TREE_OPERAND (arg0, 0)) == STRING_CST
11489 || TREE_CODE (TREE_OPERAND (arg0, 0)) == VAR_DECL))
11490 {
11491 array = TREE_OPERAND (arg0, 0);
11492 offset = arg1;
11493 }
11494 else if (TREE_CODE (arg1) == ADDR_EXPR
11495 && (TREE_CODE (TREE_OPERAND (arg1, 0)) == STRING_CST
11496 || TREE_CODE (TREE_OPERAND (arg1, 0)) == VAR_DECL))
11497 {
11498 array = TREE_OPERAND (arg1, 0);
11499 offset = arg0;
11500 }
11501 else
11502 return 0;
11503 }
11504 else
11505 return 0;
11506
11507 if (TREE_CODE (array) == STRING_CST)
11508 {
11509 *ptr_offset = fold_convert (sizetype, offset);
11510 return array;
11511 }
11512 else if (VAR_P (array) || TREE_CODE (array) == CONST_DECL)
11513 {
11514 int length;
11515 tree init = ctor_for_folding (array);
11516
11517 /* Variables initialized to string literals can be handled too. */
11518 if (init == error_mark_node
11519 || !init
11520 || TREE_CODE (init) != STRING_CST)
11521 return 0;
11522
11523 /* Avoid const char foo[4] = "abcde"; */
11524 if (DECL_SIZE_UNIT (array) == NULL_TREE
11525 || TREE_CODE (DECL_SIZE_UNIT (array)) != INTEGER_CST
11526 || (length = TREE_STRING_LENGTH (init)) <= 0
11527 || compare_tree_int (DECL_SIZE_UNIT (array), length) < 0)
11528 return 0;
11529
11530 /* If variable is bigger than the string literal, OFFSET must be constant
11531 and inside of the bounds of the string literal. */
11532 offset = fold_convert (sizetype, offset);
11533 if (compare_tree_int (DECL_SIZE_UNIT (array), length) > 0
11534 && (! tree_fits_uhwi_p (offset)
11535 || compare_tree_int (offset, length) >= 0))
11536 return 0;
11537
11538 *ptr_offset = offset;
11539 return init;
11540 }
11541
11542 return 0;
11543 }
11544
11545 /* Generate code to calculate OPS, and exploded expression
11546 using a store-flag instruction and return an rtx for the result.
11547 OPS reflects a comparison.
11548
11549 If TARGET is nonzero, store the result there if convenient.
11550
11551 Return zero if there is no suitable set-flag instruction
11552 available on this machine.
11553
11554 Once expand_expr has been called on the arguments of the comparison,
11555 we are committed to doing the store flag, since it is not safe to
11556 re-evaluate the expression. We emit the store-flag insn by calling
11557 emit_store_flag, but only expand the arguments if we have a reason
11558 to believe that emit_store_flag will be successful. If we think that
11559 it will, but it isn't, we have to simulate the store-flag with a
11560 set/jump/set sequence. */
11561
11562 static rtx
do_store_flag(sepops ops,rtx target,machine_mode mode)11563 do_store_flag (sepops ops, rtx target, machine_mode mode)
11564 {
11565 enum rtx_code code;
11566 tree arg0, arg1, type;
11567 machine_mode operand_mode;
11568 int unsignedp;
11569 rtx op0, op1;
11570 rtx subtarget = target;
11571 location_t loc = ops->location;
11572
11573 arg0 = ops->op0;
11574 arg1 = ops->op1;
11575
11576 /* Don't crash if the comparison was erroneous. */
11577 if (arg0 == error_mark_node || arg1 == error_mark_node)
11578 return const0_rtx;
11579
11580 type = TREE_TYPE (arg0);
11581 operand_mode = TYPE_MODE (type);
11582 unsignedp = TYPE_UNSIGNED (type);
11583
11584 /* We won't bother with BLKmode store-flag operations because it would mean
11585 passing a lot of information to emit_store_flag. */
11586 if (operand_mode == BLKmode)
11587 return 0;
11588
11589 /* We won't bother with store-flag operations involving function pointers
11590 when function pointers must be canonicalized before comparisons. */
11591 if (targetm.have_canonicalize_funcptr_for_compare ()
11592 && ((POINTER_TYPE_P (TREE_TYPE (arg0))
11593 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0))))
11594 || (POINTER_TYPE_P (TREE_TYPE (arg1))
11595 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1))))))
11596 return 0;
11597
11598 STRIP_NOPS (arg0);
11599 STRIP_NOPS (arg1);
11600
11601 /* For vector typed comparisons emit code to generate the desired
11602 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
11603 expander for this. */
11604 if (TREE_CODE (ops->type) == VECTOR_TYPE)
11605 {
11606 tree ifexp = build2 (ops->code, ops->type, arg0, arg1);
11607 if (VECTOR_BOOLEAN_TYPE_P (ops->type)
11608 && expand_vec_cmp_expr_p (TREE_TYPE (arg0), ops->type, ops->code))
11609 return expand_vec_cmp_expr (ops->type, ifexp, target);
11610 else
11611 {
11612 tree if_true = constant_boolean_node (true, ops->type);
11613 tree if_false = constant_boolean_node (false, ops->type);
11614 return expand_vec_cond_expr (ops->type, ifexp, if_true,
11615 if_false, target);
11616 }
11617 }
11618
11619 /* Get the rtx comparison code to use. We know that EXP is a comparison
11620 operation of some type. Some comparisons against 1 and -1 can be
11621 converted to comparisons with zero. Do so here so that the tests
11622 below will be aware that we have a comparison with zero. These
11623 tests will not catch constants in the first operand, but constants
11624 are rarely passed as the first operand. */
11625
11626 switch (ops->code)
11627 {
11628 case EQ_EXPR:
11629 code = EQ;
11630 break;
11631 case NE_EXPR:
11632 code = NE;
11633 break;
11634 case LT_EXPR:
11635 if (integer_onep (arg1))
11636 arg1 = integer_zero_node, code = unsignedp ? LEU : LE;
11637 else
11638 code = unsignedp ? LTU : LT;
11639 break;
11640 case LE_EXPR:
11641 if (! unsignedp && integer_all_onesp (arg1))
11642 arg1 = integer_zero_node, code = LT;
11643 else
11644 code = unsignedp ? LEU : LE;
11645 break;
11646 case GT_EXPR:
11647 if (! unsignedp && integer_all_onesp (arg1))
11648 arg1 = integer_zero_node, code = GE;
11649 else
11650 code = unsignedp ? GTU : GT;
11651 break;
11652 case GE_EXPR:
11653 if (integer_onep (arg1))
11654 arg1 = integer_zero_node, code = unsignedp ? GTU : GT;
11655 else
11656 code = unsignedp ? GEU : GE;
11657 break;
11658
11659 case UNORDERED_EXPR:
11660 code = UNORDERED;
11661 break;
11662 case ORDERED_EXPR:
11663 code = ORDERED;
11664 break;
11665 case UNLT_EXPR:
11666 code = UNLT;
11667 break;
11668 case UNLE_EXPR:
11669 code = UNLE;
11670 break;
11671 case UNGT_EXPR:
11672 code = UNGT;
11673 break;
11674 case UNGE_EXPR:
11675 code = UNGE;
11676 break;
11677 case UNEQ_EXPR:
11678 code = UNEQ;
11679 break;
11680 case LTGT_EXPR:
11681 code = LTGT;
11682 break;
11683
11684 default:
11685 gcc_unreachable ();
11686 }
11687
11688 /* Put a constant second. */
11689 if (TREE_CODE (arg0) == REAL_CST || TREE_CODE (arg0) == INTEGER_CST
11690 || TREE_CODE (arg0) == FIXED_CST)
11691 {
11692 std::swap (arg0, arg1);
11693 code = swap_condition (code);
11694 }
11695
11696 /* If this is an equality or inequality test of a single bit, we can
11697 do this by shifting the bit being tested to the low-order bit and
11698 masking the result with the constant 1. If the condition was EQ,
11699 we xor it with 1. This does not require an scc insn and is faster
11700 than an scc insn even if we have it.
11701
11702 The code to make this transformation was moved into fold_single_bit_test,
11703 so we just call into the folder and expand its result. */
11704
11705 if ((code == NE || code == EQ)
11706 && integer_zerop (arg1)
11707 && (TYPE_PRECISION (ops->type) != 1 || TYPE_UNSIGNED (ops->type)))
11708 {
11709 gimple *srcstmt = get_def_for_expr (arg0, BIT_AND_EXPR);
11710 if (srcstmt
11711 && integer_pow2p (gimple_assign_rhs2 (srcstmt)))
11712 {
11713 enum tree_code tcode = code == NE ? NE_EXPR : EQ_EXPR;
11714 tree type = lang_hooks.types.type_for_mode (mode, unsignedp);
11715 tree temp = fold_build2_loc (loc, BIT_AND_EXPR, TREE_TYPE (arg1),
11716 gimple_assign_rhs1 (srcstmt),
11717 gimple_assign_rhs2 (srcstmt));
11718 temp = fold_single_bit_test (loc, tcode, temp, arg1, type);
11719 if (temp)
11720 return expand_expr (temp, target, VOIDmode, EXPAND_NORMAL);
11721 }
11722 }
11723
11724 if (! get_subtarget (target)
11725 || GET_MODE (subtarget) != operand_mode)
11726 subtarget = 0;
11727
11728 expand_operands (arg0, arg1, subtarget, &op0, &op1, EXPAND_NORMAL);
11729
11730 if (target == 0)
11731 target = gen_reg_rtx (mode);
11732
11733 /* Try a cstore if possible. */
11734 return emit_store_flag_force (target, code, op0, op1,
11735 operand_mode, unsignedp,
11736 (TYPE_PRECISION (ops->type) == 1
11737 && !TYPE_UNSIGNED (ops->type)) ? -1 : 1);
11738 }
11739
11740 /* Attempt to generate a casesi instruction. Returns 1 if successful,
11741 0 otherwise (i.e. if there is no casesi instruction).
11742
11743 DEFAULT_PROBABILITY is the probability of jumping to the default
11744 label. */
11745 int
try_casesi(tree index_type,tree index_expr,tree minval,tree range,rtx table_label,rtx default_label,rtx fallback_label,profile_probability default_probability)11746 try_casesi (tree index_type, tree index_expr, tree minval, tree range,
11747 rtx table_label, rtx default_label, rtx fallback_label,
11748 profile_probability default_probability)
11749 {
11750 struct expand_operand ops[5];
11751 scalar_int_mode index_mode = SImode;
11752 rtx op1, op2, index;
11753
11754 if (! targetm.have_casesi ())
11755 return 0;
11756
11757 /* The index must be some form of integer. Convert it to SImode. */
11758 scalar_int_mode omode = SCALAR_INT_TYPE_MODE (index_type);
11759 if (GET_MODE_BITSIZE (omode) > GET_MODE_BITSIZE (index_mode))
11760 {
11761 rtx rangertx = expand_normal (range);
11762
11763 /* We must handle the endpoints in the original mode. */
11764 index_expr = build2 (MINUS_EXPR, index_type,
11765 index_expr, minval);
11766 minval = integer_zero_node;
11767 index = expand_normal (index_expr);
11768 if (default_label)
11769 emit_cmp_and_jump_insns (rangertx, index, LTU, NULL_RTX,
11770 omode, 1, default_label,
11771 default_probability);
11772 /* Now we can safely truncate. */
11773 index = convert_to_mode (index_mode, index, 0);
11774 }
11775 else
11776 {
11777 if (omode != index_mode)
11778 {
11779 index_type = lang_hooks.types.type_for_mode (index_mode, 0);
11780 index_expr = fold_convert (index_type, index_expr);
11781 }
11782
11783 index = expand_normal (index_expr);
11784 }
11785
11786 do_pending_stack_adjust ();
11787
11788 op1 = expand_normal (minval);
11789 op2 = expand_normal (range);
11790
11791 create_input_operand (&ops[0], index, index_mode);
11792 create_convert_operand_from_type (&ops[1], op1, TREE_TYPE (minval));
11793 create_convert_operand_from_type (&ops[2], op2, TREE_TYPE (range));
11794 create_fixed_operand (&ops[3], table_label);
11795 create_fixed_operand (&ops[4], (default_label
11796 ? default_label
11797 : fallback_label));
11798 expand_jump_insn (targetm.code_for_casesi, 5, ops);
11799 return 1;
11800 }
11801
11802 /* Attempt to generate a tablejump instruction; same concept. */
11803 /* Subroutine of the next function.
11804
11805 INDEX is the value being switched on, with the lowest value
11806 in the table already subtracted.
11807 MODE is its expected mode (needed if INDEX is constant).
11808 RANGE is the length of the jump table.
11809 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
11810
11811 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
11812 index value is out of range.
11813 DEFAULT_PROBABILITY is the probability of jumping to
11814 the default label. */
11815
11816 static void
do_tablejump(rtx index,machine_mode mode,rtx range,rtx table_label,rtx default_label,profile_probability default_probability)11817 do_tablejump (rtx index, machine_mode mode, rtx range, rtx table_label,
11818 rtx default_label, profile_probability default_probability)
11819 {
11820 rtx temp, vector;
11821
11822 if (INTVAL (range) > cfun->cfg->max_jumptable_ents)
11823 cfun->cfg->max_jumptable_ents = INTVAL (range);
11824
11825 /* Do an unsigned comparison (in the proper mode) between the index
11826 expression and the value which represents the length of the range.
11827 Since we just finished subtracting the lower bound of the range
11828 from the index expression, this comparison allows us to simultaneously
11829 check that the original index expression value is both greater than
11830 or equal to the minimum value of the range and less than or equal to
11831 the maximum value of the range. */
11832
11833 if (default_label)
11834 emit_cmp_and_jump_insns (index, range, GTU, NULL_RTX, mode, 1,
11835 default_label, default_probability);
11836
11837
11838 /* If index is in range, it must fit in Pmode.
11839 Convert to Pmode so we can index with it. */
11840 if (mode != Pmode)
11841 index = convert_to_mode (Pmode, index, 1);
11842
11843 /* Don't let a MEM slip through, because then INDEX that comes
11844 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
11845 and break_out_memory_refs will go to work on it and mess it up. */
11846 #ifdef PIC_CASE_VECTOR_ADDRESS
11847 if (flag_pic && !REG_P (index))
11848 index = copy_to_mode_reg (Pmode, index);
11849 #endif
11850
11851 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
11852 GET_MODE_SIZE, because this indicates how large insns are. The other
11853 uses should all be Pmode, because they are addresses. This code
11854 could fail if addresses and insns are not the same size. */
11855 index = simplify_gen_binary (MULT, Pmode, index,
11856 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE),
11857 Pmode));
11858 index = simplify_gen_binary (PLUS, Pmode, index,
11859 gen_rtx_LABEL_REF (Pmode, table_label));
11860
11861 #ifdef PIC_CASE_VECTOR_ADDRESS
11862 if (flag_pic)
11863 index = PIC_CASE_VECTOR_ADDRESS (index);
11864 else
11865 #endif
11866 index = memory_address (CASE_VECTOR_MODE, index);
11867 temp = gen_reg_rtx (CASE_VECTOR_MODE);
11868 vector = gen_const_mem (CASE_VECTOR_MODE, index);
11869 convert_move (temp, vector, 0);
11870
11871 emit_jump_insn (targetm.gen_tablejump (temp, table_label));
11872
11873 /* If we are generating PIC code or if the table is PC-relative, the
11874 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
11875 if (! CASE_VECTOR_PC_RELATIVE && ! flag_pic)
11876 emit_barrier ();
11877 }
11878
11879 int
try_tablejump(tree index_type,tree index_expr,tree minval,tree range,rtx table_label,rtx default_label,profile_probability default_probability)11880 try_tablejump (tree index_type, tree index_expr, tree minval, tree range,
11881 rtx table_label, rtx default_label,
11882 profile_probability default_probability)
11883 {
11884 rtx index;
11885
11886 if (! targetm.have_tablejump ())
11887 return 0;
11888
11889 index_expr = fold_build2 (MINUS_EXPR, index_type,
11890 fold_convert (index_type, index_expr),
11891 fold_convert (index_type, minval));
11892 index = expand_normal (index_expr);
11893 do_pending_stack_adjust ();
11894
11895 do_tablejump (index, TYPE_MODE (index_type),
11896 convert_modes (TYPE_MODE (index_type),
11897 TYPE_MODE (TREE_TYPE (range)),
11898 expand_normal (range),
11899 TYPE_UNSIGNED (TREE_TYPE (range))),
11900 table_label, default_label, default_probability);
11901 return 1;
11902 }
11903
11904 /* Return a CONST_VECTOR rtx representing vector mask for
11905 a VECTOR_CST of booleans. */
11906 static rtx
const_vector_mask_from_tree(tree exp)11907 const_vector_mask_from_tree (tree exp)
11908 {
11909 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
11910 machine_mode inner = GET_MODE_INNER (mode);
11911
11912 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
11913 VECTOR_CST_NELTS_PER_PATTERN (exp));
11914 unsigned int count = builder.encoded_nelts ();
11915 for (unsigned int i = 0; i < count; ++i)
11916 {
11917 tree elt = VECTOR_CST_ELT (exp, i);
11918 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11919 if (integer_zerop (elt))
11920 builder.quick_push (CONST0_RTX (inner));
11921 else if (integer_onep (elt)
11922 || integer_minus_onep (elt))
11923 builder.quick_push (CONSTM1_RTX (inner));
11924 else
11925 gcc_unreachable ();
11926 }
11927 return builder.build ();
11928 }
11929
11930 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
11931 Return a constant scalar rtx of mode MODE in which bit X is set if element
11932 X of EXP is nonzero. */
11933 static rtx
const_scalar_mask_from_tree(scalar_int_mode mode,tree exp)11934 const_scalar_mask_from_tree (scalar_int_mode mode, tree exp)
11935 {
11936 wide_int res = wi::zero (GET_MODE_PRECISION (mode));
11937 tree elt;
11938
11939 /* The result has a fixed number of bits so the input must too. */
11940 unsigned int nunits = VECTOR_CST_NELTS (exp).to_constant ();
11941 for (unsigned int i = 0; i < nunits; ++i)
11942 {
11943 elt = VECTOR_CST_ELT (exp, i);
11944 gcc_assert (TREE_CODE (elt) == INTEGER_CST);
11945 if (integer_all_onesp (elt))
11946 res = wi::set_bit (res, i);
11947 else
11948 gcc_assert (integer_zerop (elt));
11949 }
11950
11951 return immed_wide_int_const (res, mode);
11952 }
11953
11954 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
11955 static rtx
const_vector_from_tree(tree exp)11956 const_vector_from_tree (tree exp)
11957 {
11958 machine_mode mode = TYPE_MODE (TREE_TYPE (exp));
11959
11960 if (initializer_zerop (exp))
11961 return CONST0_RTX (mode);
11962
11963 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp)))
11964 return const_vector_mask_from_tree (exp);
11965
11966 machine_mode inner = GET_MODE_INNER (mode);
11967
11968 rtx_vector_builder builder (mode, VECTOR_CST_NPATTERNS (exp),
11969 VECTOR_CST_NELTS_PER_PATTERN (exp));
11970 unsigned int count = builder.encoded_nelts ();
11971 for (unsigned int i = 0; i < count; ++i)
11972 {
11973 tree elt = VECTOR_CST_ELT (exp, i);
11974 if (TREE_CODE (elt) == REAL_CST)
11975 builder.quick_push (const_double_from_real_value (TREE_REAL_CST (elt),
11976 inner));
11977 else if (TREE_CODE (elt) == FIXED_CST)
11978 builder.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt),
11979 inner));
11980 else
11981 builder.quick_push (immed_wide_int_const (wi::to_poly_wide (elt),
11982 inner));
11983 }
11984 return builder.build ();
11985 }
11986
11987 /* Build a decl for a personality function given a language prefix. */
11988
11989 tree
build_personality_function(const char * lang)11990 build_personality_function (const char *lang)
11991 {
11992 const char *unwind_and_version;
11993 tree decl, type;
11994 char *name;
11995
11996 switch (targetm_common.except_unwind_info (&global_options))
11997 {
11998 case UI_NONE:
11999 return NULL;
12000 case UI_SJLJ:
12001 unwind_and_version = "_sj0";
12002 break;
12003 case UI_DWARF2:
12004 case UI_TARGET:
12005 unwind_and_version = "_v0";
12006 break;
12007 case UI_SEH:
12008 unwind_and_version = "_seh0";
12009 break;
12010 default:
12011 gcc_unreachable ();
12012 }
12013
12014 name = ACONCAT (("__", lang, "_personality", unwind_and_version, NULL));
12015
12016 type = build_function_type_list (integer_type_node, integer_type_node,
12017 long_long_unsigned_type_node,
12018 ptr_type_node, ptr_type_node, NULL_TREE);
12019 decl = build_decl (UNKNOWN_LOCATION, FUNCTION_DECL,
12020 get_identifier (name), type);
12021 DECL_ARTIFICIAL (decl) = 1;
12022 DECL_EXTERNAL (decl) = 1;
12023 TREE_PUBLIC (decl) = 1;
12024
12025 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12026 are the flags assigned by targetm.encode_section_info. */
12027 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl), 0), NULL);
12028
12029 return decl;
12030 }
12031
12032 /* Extracts the personality function of DECL and returns the corresponding
12033 libfunc. */
12034
12035 rtx
get_personality_function(tree decl)12036 get_personality_function (tree decl)
12037 {
12038 tree personality = DECL_FUNCTION_PERSONALITY (decl);
12039 enum eh_personality_kind pk;
12040
12041 pk = function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl));
12042 if (pk == eh_personality_none)
12043 return NULL;
12044
12045 if (!personality
12046 && pk == eh_personality_any)
12047 personality = lang_hooks.eh_personality ();
12048
12049 if (pk == eh_personality_lang)
12050 gcc_assert (personality != NULL_TREE);
12051
12052 return XEXP (DECL_RTL (personality), 0);
12053 }
12054
12055 /* Returns a tree for the size of EXP in bytes. */
12056
12057 static tree
tree_expr_size(const_tree exp)12058 tree_expr_size (const_tree exp)
12059 {
12060 if (DECL_P (exp)
12061 && DECL_SIZE_UNIT (exp) != 0)
12062 return DECL_SIZE_UNIT (exp);
12063 else
12064 return size_in_bytes (TREE_TYPE (exp));
12065 }
12066
12067 /* Return an rtx for the size in bytes of the value of EXP. */
12068
12069 rtx
expr_size(tree exp)12070 expr_size (tree exp)
12071 {
12072 tree size;
12073
12074 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
12075 size = TREE_OPERAND (exp, 1);
12076 else
12077 {
12078 size = tree_expr_size (exp);
12079 gcc_assert (size);
12080 gcc_assert (size == SUBSTITUTE_PLACEHOLDER_IN_EXPR (size, exp));
12081 }
12082
12083 return expand_expr (size, NULL_RTX, TYPE_MODE (sizetype), EXPAND_NORMAL);
12084 }
12085
12086 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12087 if the size can vary or is larger than an integer. */
12088
12089 static HOST_WIDE_INT
int_expr_size(tree exp)12090 int_expr_size (tree exp)
12091 {
12092 tree size;
12093
12094 if (TREE_CODE (exp) == WITH_SIZE_EXPR)
12095 size = TREE_OPERAND (exp, 1);
12096 else
12097 {
12098 size = tree_expr_size (exp);
12099 gcc_assert (size);
12100 }
12101
12102 if (size == 0 || !tree_fits_shwi_p (size))
12103 return -1;
12104
12105 return tree_to_shwi (size);
12106 }
12107