1;; Cavium ThunderX 2 CN99xx pipeline description 2;; Copyright (C) 2016-2018 Free Software Foundation, Inc. 3;; 4;; Contributed by Cavium, Broadcom and Mentor Embedded. 5 6;; This file is part of GCC. 7 8;; GCC is free software; you can redistribute it and/or modify 9;; it under the terms of the GNU General Public License as published by 10;; the Free Software Foundation; either version 3, or (at your option) 11;; any later version. 12 13;; GCC is distributed in the hope that it will be useful, 14;; but WITHOUT ANY WARRANTY; without even the implied warranty of 15;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16;; GNU General Public License for more details. 17 18;; You should have received a copy of the GNU General Public License 19;; along with GCC; see the file COPYING3. If not see 20;; <http://www.gnu.org/licenses/>. 21 22(define_automaton "thunderx2t99, thunderx2t99_advsimd, thunderx2t99_ldst") 23(define_automaton "thunderx2t99_mult") 24 25(define_cpu_unit "thunderx2t99_i0" "thunderx2t99") 26(define_cpu_unit "thunderx2t99_i1" "thunderx2t99") 27(define_cpu_unit "thunderx2t99_i2" "thunderx2t99") 28 29(define_cpu_unit "thunderx2t99_ls0" "thunderx2t99_ldst") 30(define_cpu_unit "thunderx2t99_ls1" "thunderx2t99_ldst") 31(define_cpu_unit "thunderx2t99_sd" "thunderx2t99_ldst") 32 33; Pseudo-units for multiply pipeline. 34 35(define_cpu_unit "thunderx2t99_i1m1" "thunderx2t99_mult") 36(define_cpu_unit "thunderx2t99_i1m2" "thunderx2t99_mult") 37(define_cpu_unit "thunderx2t99_i1m3" "thunderx2t99_mult") 38 39; Pseudo-units for load delay (assuming dcache hit). 40 41(define_cpu_unit "thunderx2t99_ls0d1" "thunderx2t99_ldst") 42(define_cpu_unit "thunderx2t99_ls0d2" "thunderx2t99_ldst") 43(define_cpu_unit "thunderx2t99_ls0d3" "thunderx2t99_ldst") 44 45(define_cpu_unit "thunderx2t99_ls1d1" "thunderx2t99_ldst") 46(define_cpu_unit "thunderx2t99_ls1d2" "thunderx2t99_ldst") 47(define_cpu_unit "thunderx2t99_ls1d3" "thunderx2t99_ldst") 48 49; Make some aliases for f0/f1. 50(define_cpu_unit "thunderx2t99_f0" "thunderx2t99_advsimd") 51(define_cpu_unit "thunderx2t99_f1" "thunderx2t99_advsimd") 52 53(define_reservation "thunderx2t99_i012" "thunderx2t99_i0|thunderx2t99_i1|thunderx2t99_i2") 54(define_reservation "thunderx2t99_ls01" "thunderx2t99_ls0|thunderx2t99_ls1") 55(define_reservation "thunderx2t99_f01" "thunderx2t99_f0|thunderx2t99_f1") 56 57(define_reservation "thunderx2t99_ls_both" "thunderx2t99_ls0+thunderx2t99_ls1") 58 59; A load with delay in the ls0/ls1 pipes. 60(define_reservation "thunderx2t99_l0delay" "thunderx2t99_ls0,\ 61 thunderx2t99_ls0d1,thunderx2t99_ls0d2,\ 62 thunderx2t99_ls0d3") 63(define_reservation "thunderx2t99_l1delay" "thunderx2t99_ls1,\ 64 thunderx2t99_ls1d1,thunderx2t99_ls1d2,\ 65 thunderx2t99_ls1d3") 66(define_reservation "thunderx2t99_l01delay" "thunderx2t99_l0delay|thunderx2t99_l1delay") 67 68;; Branch and call instructions. 69 70(define_insn_reservation "thunderx2t99_branch" 1 71 (and (eq_attr "tune" "thunderx2t99") 72 (eq_attr "type" "call,branch,trap")) 73 "thunderx2t99_i2") 74 75;; Misc instructions. 76 77(define_insn_reservation "thunderx2t99_nothing" 0 78 (and (eq_attr "tune" "thunderx2t99") 79 (eq_attr "type" "no_insn,block")) 80 "nothing") 81 82(define_insn_reservation "thunderx2t99_mrs" 0 83 (and (eq_attr "tune" "thunderx2t99") 84 (eq_attr "type" "mrs")) 85 "thunderx2t99_i2") 86 87(define_insn_reservation "thunderx2t99_multiple" 1 88 (and (eq_attr "tune" "thunderx2t99") 89 (eq_attr "type" "multiple")) 90 "thunderx2t99_i0+thunderx2t99_i1+thunderx2t99_i2+thunderx2t99_ls0+\ 91 thunderx2t99_ls1+thunderx2t99_sd+thunderx2t99_i1m1+thunderx2t99_i1m2+\ 92 thunderx2t99_i1m3+thunderx2t99_ls0d1+thunderx2t99_ls0d2+thunderx2t99_ls0d3+\ 93 thunderx2t99_ls1d1+thunderx2t99_ls1d2+thunderx2t99_ls1d3+thunderx2t99_f0+\ 94 thunderx2t99_f1") 95 96;; Integer arithmetic/logic instructions. 97 98; Plain register moves are handled by renaming, and don't create any uops. 99 100(define_insn_reservation "thunderx2t99_regmove" 0 101 (and (eq_attr "tune" "thunderx2t99") 102 (eq_attr "type" "mov_reg")) 103 "nothing") 104 105(define_insn_reservation "thunderx2t99_alu_basic" 1 106 (and (eq_attr "tune" "thunderx2t99") 107 (eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,\ 108 adc_reg,adc_imm,adcs_reg,adcs_imm,\ 109 logic_reg,logic_imm,logics_reg,logics_imm,\ 110 csel,adr,mov_imm,shift_reg,shift_imm,bfm,\ 111 bfx,rbit,rev,extend,rotate_imm")) 112 "thunderx2t99_i012") 113 114(define_insn_reservation "thunderx2t99_alu_shift" 2 115 (and (eq_attr "tune" "thunderx2t99") 116 (eq_attr "type" "alu_shift_imm,alu_ext,alu_shift_reg,\ 117 alus_shift_imm,alus_ext,alus_shift_reg,\ 118 logic_shift_imm,logics_shift_reg")) 119 "thunderx2t99_i012,thunderx2t99_i012") 120 121(define_insn_reservation "thunderx2t99_div" 13 122 (and (eq_attr "tune" "thunderx2t99") 123 (eq_attr "type" "sdiv,udiv")) 124 "thunderx2t99_i1*3") 125 126(define_insn_reservation "thunderx2t99_madd" 5 127 (and (eq_attr "tune" "thunderx2t99") 128 (eq_attr "type" "mla,smlal,umlal")) 129 "thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3,\ 130 thunderx2t99_i012") 131 132; NOTE: smull, umull are used for "high part" multiplies too. 133(define_insn_reservation "thunderx2t99_mul" 4 134 (and (eq_attr "tune" "thunderx2t99") 135 (eq_attr "type" "mul,smull,umull")) 136 "thunderx2t99_i1,thunderx2t99_i1m1,thunderx2t99_i1m2,thunderx2t99_i1m3") 137 138(define_insn_reservation "thunderx2t99_countbits" 3 139 (and (eq_attr "tune" "thunderx2t99") 140 (eq_attr "type" "clz")) 141 "thunderx2t99_i1") 142 143;; Integer loads and stores. 144 145(define_insn_reservation "thunderx2t99_load_basic" 4 146 (and (eq_attr "tune" "thunderx2t99") 147 (eq_attr "type" "load_4")) 148 "thunderx2t99_ls01") 149 150(define_insn_reservation "thunderx2t99_loadpair" 5 151 (and (eq_attr "tune" "thunderx2t99") 152 (eq_attr "type" "load_8,load_16")) 153 "thunderx2t99_i012,thunderx2t99_ls01") 154 155(define_insn_reservation "thunderx2t99_store_basic" 1 156 (and (eq_attr "tune" "thunderx2t99") 157 (eq_attr "type" "store_4")) 158 "thunderx2t99_ls01,thunderx2t99_sd") 159 160(define_insn_reservation "thunderx2t99_storepair_basic" 1 161 (and (eq_attr "tune" "thunderx2t99") 162 (eq_attr "type" "store_8,store_16")) 163 "thunderx2t99_ls01,thunderx2t99_sd") 164 165;; FP data processing instructions. 166 167(define_insn_reservation "thunderx2t99_fp_simple" 5 168 (and (eq_attr "tune" "thunderx2t99") 169 (eq_attr "type" "ffariths,ffarithd,f_minmaxs,f_minmaxd")) 170 "thunderx2t99_f01") 171 172(define_insn_reservation "thunderx2t99_fp_addsub" 6 173 (and (eq_attr "tune" "thunderx2t99") 174 (eq_attr "type" "fadds,faddd")) 175 "thunderx2t99_f01") 176 177(define_insn_reservation "thunderx2t99_fp_cmp" 5 178 (and (eq_attr "tune" "thunderx2t99") 179 (eq_attr "type" "fcmps,fcmpd,fccmps,fccmpd")) 180 "thunderx2t99_f01") 181 182(define_insn_reservation "thunderx2t99_fp_divsqrt_s" 16 183 (and (eq_attr "tune" "thunderx2t99") 184 (eq_attr "type" "fdivs,fsqrts")) 185 "thunderx2t99_f0*3|thunderx2t99_f1*3") 186 187(define_insn_reservation "thunderx2t99_fp_divsqrt_d" 23 188 (and (eq_attr "tune" "thunderx2t99") 189 (eq_attr "type" "fdivd,fsqrtd")) 190 "thunderx2t99_f0*5|thunderx2t99_f1*5") 191 192(define_insn_reservation "thunderx2t99_fp_mul_mac" 6 193 (and (eq_attr "tune" "thunderx2t99") 194 (eq_attr "type" "fmuls,fmuld,fmacs,fmacd")) 195 "thunderx2t99_f01") 196 197(define_insn_reservation "thunderx2t99_frint" 7 198 (and (eq_attr "tune" "thunderx2t99") 199 (eq_attr "type" "f_rints,f_rintd")) 200 "thunderx2t99_f01") 201 202(define_insn_reservation "thunderx2t99_fcsel" 4 203 (and (eq_attr "tune" "thunderx2t99") 204 (eq_attr "type" "fcsel")) 205 "thunderx2t99_f01") 206 207;; FP miscellaneous instructions. 208 209(define_insn_reservation "thunderx2t99_fp_cvt" 7 210 (and (eq_attr "tune" "thunderx2t99") 211 (eq_attr "type" "f_cvtf2i,f_cvt,f_cvti2f")) 212 "thunderx2t99_f01") 213 214(define_insn_reservation "thunderx2t99_fp_mov" 4 215 (and (eq_attr "tune" "thunderx2t99") 216 (eq_attr "type" "fconsts,fconstd,fmov,f_mrc")) 217 "thunderx2t99_f01") 218 219(define_insn_reservation "thunderx2t99_fp_mov_to_gen" 5 220 (and (eq_attr "tune" "thunderx2t99") 221 (eq_attr "type" "f_mcr")) 222 "thunderx2t99_f01") 223 224;; FP loads and stores. 225 226(define_insn_reservation "thunderx2t99_fp_load_basic" 4 227 (and (eq_attr "tune" "thunderx2t99") 228 (eq_attr "type" "f_loads,f_loadd")) 229 "thunderx2t99_ls01") 230 231(define_insn_reservation "thunderx2t99_fp_loadpair_basic" 4 232 (and (eq_attr "tune" "thunderx2t99") 233 (eq_attr "type" "neon_load1_2reg")) 234 "thunderx2t99_ls01*2") 235 236(define_insn_reservation "thunderx2t99_fp_store_basic" 1 237 (and (eq_attr "tune" "thunderx2t99") 238 (eq_attr "type" "f_stores,f_stored")) 239 "thunderx2t99_ls01,thunderx2t99_sd") 240 241(define_insn_reservation "thunderx2t99_fp_storepair_basic" 1 242 (and (eq_attr "tune" "thunderx2t99") 243 (eq_attr "type" "neon_store1_2reg")) 244 "thunderx2t99_ls01,(thunderx2t99_ls01+thunderx2t99_sd),thunderx2t99_sd") 245 246;; ASIMD integer instructions. 247 248(define_insn_reservation "thunderx2t99_asimd_int" 7 249 (and (eq_attr "tune" "thunderx2t99") 250 (eq_attr "type" "neon_abd,neon_abd_q,\ 251 neon_arith_acc,neon_arith_acc_q,\ 252 neon_abs,neon_abs_q,\ 253 neon_add,neon_add_q,\ 254 neon_neg,neon_neg_q,\ 255 neon_add_long,neon_add_widen,\ 256 neon_add_halve,neon_add_halve_q,\ 257 neon_sub_long,neon_sub_widen,\ 258 neon_sub_halve,neon_sub_halve_q,\ 259 neon_add_halve_narrow_q,neon_sub_halve_narrow_q,\ 260 neon_qabs,neon_qabs_q,\ 261 neon_qadd,neon_qadd_q,\ 262 neon_qneg,neon_qneg_q,\ 263 neon_qsub,neon_qsub_q,\ 264 neon_minmax,neon_minmax_q,\ 265 neon_reduc_minmax,neon_reduc_minmax_q,\ 266 neon_mul_b,neon_mul_h,neon_mul_s,\ 267 neon_mul_b_q,neon_mul_h_q,neon_mul_s_q,\ 268 neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s,\ 269 neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\ 270 neon_mla_b,neon_mla_h,neon_mla_s,\ 271 neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\ 272 neon_mul_b_long,neon_mul_h_long,\ 273 neon_mul_s_long,neon_mul_d_long,\ 274 neon_sat_mul_b_long,neon_sat_mul_h_long,\ 275 neon_sat_mul_s_long,\ 276 neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\ 277 neon_sat_mla_b_long,neon_sat_mla_h_long,\ 278 neon_sat_mla_s_long,\ 279 neon_shift_acc,neon_shift_acc_q,\ 280 neon_shift_imm,neon_shift_imm_q,\ 281 neon_shift_reg,neon_shift_reg_q,\ 282 neon_shift_imm_long,neon_shift_imm_narrow_q,\ 283 neon_sat_shift_imm,neon_sat_shift_imm_q,\ 284 neon_sat_shift_reg,neon_sat_shift_reg_q,\ 285 neon_sat_shift_imm_narrow_q")) 286 "thunderx2t99_f01") 287 288(define_insn_reservation "thunderx2t99_asimd_reduc_add" 5 289 (and (eq_attr "tune" "thunderx2t99") 290 (eq_attr "type" "neon_reduc_add,neon_reduc_add_q")) 291 "thunderx2t99_f01") 292 293(define_insn_reservation "thunderx2t99_asimd_cmp" 7 294 (and (eq_attr "tune" "thunderx2t99") 295 (eq_attr "type" "neon_compare,neon_compare_q,neon_compare_zero,\ 296 neon_tst,neon_tst_q")) 297 "thunderx2t99_f01") 298 299(define_insn_reservation "thunderx2t99_asimd_logic" 5 300 (and (eq_attr "tune" "thunderx2t99") 301 (eq_attr "type" "neon_logic,neon_logic_q")) 302 "thunderx2t99_f01") 303 304(define_insn_reservation "thunderx2t99_asimd_polynomial" 5 305 (and (eq_attr "tune" "thunderx2t99") 306 (eq_attr "type" "neon_mul_d_long")) 307 "thunderx2t99_f01") 308 309;; ASIMD floating-point instructions. 310 311(define_insn_reservation "thunderx2t99_asimd_fp_simple" 5 312 (and (eq_attr "tune" "thunderx2t99") 313 (eq_attr "type" "neon_fp_abs_s,neon_fp_abs_d,\ 314 neon_fp_abs_s_q,neon_fp_abs_d_q,\ 315 neon_fp_compare_s,neon_fp_compare_d,\ 316 neon_fp_compare_s_q,neon_fp_compare_d_q,\ 317 neon_fp_minmax_s,neon_fp_minmax_d,\ 318 neon_fp_minmax_s_q,neon_fp_minmax_d_q,\ 319 neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d,\ 320 neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q,\ 321 neon_fp_neg_s,neon_fp_neg_d,\ 322 neon_fp_neg_s_q,neon_fp_neg_d_q")) 323 "thunderx2t99_f01") 324 325(define_insn_reservation "thunderx2t99_asimd_fp_arith" 6 326 (and (eq_attr "tune" "thunderx2t99") 327 (eq_attr "type" "neon_fp_abd_s,neon_fp_abd_d,\ 328 neon_fp_abd_s_q,neon_fp_abd_d_q,\ 329 neon_fp_addsub_s,neon_fp_addsub_d,\ 330 neon_fp_addsub_s_q,neon_fp_addsub_d_q,\ 331 neon_fp_reduc_add_s,neon_fp_reduc_add_d,\ 332 neon_fp_reduc_add_s_q,neon_fp_reduc_add_d_q,\ 333 neon_fp_mul_s,neon_fp_mul_d,\ 334 neon_fp_mul_s_q,neon_fp_mul_d_q,\ 335 neon_fp_mla_s,neon_fp_mla_d,\ 336 neon_fp_mla_s_q,neon_fp_mla_d_q")) 337 "thunderx2t99_f01") 338 339(define_insn_reservation "thunderx2t99_asimd_fp_conv" 7 340 (and (eq_attr "tune" "thunderx2t99") 341 (eq_attr "type" "neon_fp_cvt_widen_s,neon_fp_cvt_narrow_d_q,\ 342 neon_fp_to_int_s,neon_fp_to_int_d,\ 343 neon_fp_to_int_s_q,neon_fp_to_int_d_q,\ 344 neon_fp_round_s,neon_fp_round_d,\ 345 neon_fp_round_s_q,neon_fp_round_d_q")) 346 "thunderx2t99_f01") 347 348(define_insn_reservation "thunderx2t99_asimd_fp_div_s" 16 349 (and (eq_attr "tune" "thunderx2t99") 350 (eq_attr "type" "neon_fp_div_s,neon_fp_div_s_q")) 351 "thunderx2t99_f01") 352 353(define_insn_reservation "thunderx2t99_asimd_fp_div_d" 23 354 (and (eq_attr "tune" "thunderx2t99") 355 (eq_attr "type" "neon_fp_div_d,neon_fp_div_d_q")) 356 "thunderx2t99_f01") 357 358;; ASIMD miscellaneous instructions. 359 360(define_insn_reservation "thunderx2t99_asimd_misc" 5 361 (and (eq_attr "tune" "thunderx2t99") 362 (eq_attr "type" "neon_rbit,\ 363 neon_bsl,neon_bsl_q,\ 364 neon_cls,neon_cls_q,\ 365 neon_cnt,neon_cnt_q,\ 366 neon_from_gp,neon_from_gp_q,\ 367 neon_dup,neon_dup_q,\ 368 neon_ext,neon_ext_q,\ 369 neon_ins,neon_ins_q,\ 370 neon_move,neon_move_q,\ 371 neon_fp_recpe_s,neon_fp_recpe_d,\ 372 neon_fp_recpe_s_q,neon_fp_recpe_d_q,\ 373 neon_fp_recpx_s,neon_fp_recpx_d,\ 374 neon_fp_recpx_s_q,neon_fp_recpx_d_q,\ 375 neon_rev,neon_rev_q,\ 376 neon_dup,neon_dup_q,\ 377 neon_permute,neon_permute_q")) 378 "thunderx2t99_f01") 379 380(define_insn_reservation "thunderx2t99_asimd_recip_step" 6 381 (and (eq_attr "tune" "thunderx2t99") 382 (eq_attr "type" "neon_fp_recps_s,neon_fp_recps_s_q,\ 383 neon_fp_recps_d,neon_fp_recps_d_q,\ 384 neon_fp_rsqrts_s, neon_fp_rsqrts_s_q,\ 385 neon_fp_rsqrts_d, neon_fp_rsqrts_d_q")) 386 "thunderx2t99_f01") 387 388(define_insn_reservation "thunderx2t99_asimd_lut" 8 389 (and (eq_attr "tune" "thunderx2t99") 390 (eq_attr "type" "neon_tbl1,neon_tbl1_q,neon_tbl2_q")) 391 "thunderx2t99_f01") 392 393(define_insn_reservation "thunderx2t99_asimd_elt_to_gr" 6 394 (and (eq_attr "tune" "thunderx2t99") 395 (eq_attr "type" "neon_to_gp,neon_to_gp_q")) 396 "thunderx2t99_f01") 397 398(define_insn_reservation "thunderx2t99_asimd_ext" 7 399 (and (eq_attr "tune" "thunderx2t99") 400 (eq_attr "type" "neon_shift_imm_narrow_q,neon_sat_shift_imm_narrow_q")) 401 "thunderx2t99_f01") 402 403;; ASIMD load instructions. 404 405; NOTE: These reservations attempt to model latency and throughput correctly, 406; but the cycle timing of unit allocation is not necessarily accurate (because 407; insns are split into uops, and those may be issued out-of-order). 408 409(define_insn_reservation "thunderx2t99_asimd_load1_1_mult" 4 410 (and (eq_attr "tune" "thunderx2t99") 411 (eq_attr "type" "neon_load1_1reg,neon_load1_1reg_q")) 412 "thunderx2t99_ls01") 413 414(define_insn_reservation "thunderx2t99_asimd_load1_2_mult" 4 415 (and (eq_attr "tune" "thunderx2t99") 416 (eq_attr "type" "neon_load1_2reg,neon_load1_2reg_q")) 417 "thunderx2t99_ls_both") 418 419(define_insn_reservation "thunderx2t99_asimd_load1_onelane" 5 420 (and (eq_attr "tune" "thunderx2t99") 421 (eq_attr "type" "neon_load1_one_lane,neon_load1_one_lane_q")) 422 "thunderx2t99_l01delay,thunderx2t99_f01") 423 424(define_insn_reservation "thunderx2t99_asimd_load1_all" 5 425 (and (eq_attr "tune" "thunderx2t99") 426 (eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q")) 427 "thunderx2t99_l01delay,thunderx2t99_f01") 428 429(define_insn_reservation "thunderx2t99_asimd_load2" 5 430 (and (eq_attr "tune" "thunderx2t99") 431 (eq_attr "type" "neon_load2_2reg,neon_load2_2reg_q,\ 432 neon_load2_one_lane,neon_load2_one_lane_q,\ 433 neon_load2_all_lanes,neon_load2_all_lanes_q")) 434 "(thunderx2t99_l0delay,thunderx2t99_f01)|(thunderx2t99_l1delay,\ 435 thunderx2t99_f01)") 436 437;; ASIMD store instructions. 438 439; Same note applies as for ASIMD load instructions. 440 441(define_insn_reservation "thunderx2t99_asimd_store1_1_mult" 1 442 (and (eq_attr "tune" "thunderx2t99") 443 (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q")) 444 "thunderx2t99_ls01") 445 446(define_insn_reservation "thunderx2t99_asimd_store1_2_mult" 1 447 (and (eq_attr "tune" "thunderx2t99") 448 (eq_attr "type" "neon_store1_2reg,neon_store1_2reg_q")) 449 "thunderx2t99_ls_both") 450 451(define_insn_reservation "thunderx2t99_asimd_store1_onelane" 1 452 (and (eq_attr "tune" "thunderx2t99") 453 (eq_attr "type" "neon_store1_one_lane,neon_store1_one_lane_q")) 454 "thunderx2t99_ls01,thunderx2t99_f01") 455 456(define_insn_reservation "thunderx2t99_asimd_store2_mult" 1 457 (and (eq_attr "tune" "thunderx2t99") 458 (eq_attr "type" "neon_store2_2reg,neon_store2_2reg_q")) 459 "thunderx2t99_ls_both,thunderx2t99_f01") 460 461(define_insn_reservation "thunderx2t99_asimd_store2_onelane" 1 462 (and (eq_attr "tune" "thunderx2t99") 463 (eq_attr "type" "neon_store2_one_lane,neon_store2_one_lane_q")) 464 "thunderx2t99_ls01,thunderx2t99_f01") 465 466;; Crypto extensions. 467 468(define_insn_reservation "thunderx2t99_aes" 5 469 (and (eq_attr "tune" "thunderx2t99") 470 (eq_attr "type" "crypto_aese,crypto_aesmc")) 471 "thunderx2t99_f1") 472 473(define_insn_reservation "thunderx2t99_sha" 7 474 (and (eq_attr "tune" "thunderx2t99") 475 (eq_attr "type" "crypto_sha1_fast,crypto_sha1_xor,crypto_sha1_slow,\ 476 crypto_sha256_fast,crypto_sha256_slow")) 477 "thunderx2t99_f1") 478 479;; CRC extension. 480 481(define_insn_reservation "thunderx2t99_crc" 4 482 (and (eq_attr "tune" "thunderx2t99") 483 (eq_attr "type" "crc")) 484 "thunderx2t99_i1") 485 486;; PMULL extension. 487 488(define_insn_reservation "thunderx2t99_pmull" 5 489 (and (eq_attr "tune" "thunderx2t99") 490 (eq_attr "type" "crypto_pmull")) 491 "thunderx2t99_f1") 492