1 /* { dg-do compile } */ 2 /* { dg-options "-fno-tree-sra" } */ 3 typedef struct { 4 unsigned int en : 1; 5 unsigned int bit_order : 1; 6 unsigned int scl_io : 1; 7 unsigned int scl_inv : 1; 8 unsigned int sda0_io : 1; 9 unsigned int sda0_idle : 1; 10 unsigned int sda1_io : 1; 11 unsigned int sda1_idle : 1; 12 unsigned int sda2_io : 1; 13 unsigned int sda2_idle : 1; 14 unsigned int sda3_io : 1; 15 unsigned int sda3_idle : 1; 16 unsigned int sda_sel : 2; 17 unsigned int sen_idle : 1; 18 unsigned int sen_inv : 1; 19 unsigned int sen_sel : 2; 20 unsigned int dummy1 : 14; 21 } reg_gio_rw_i2c1_cfg; 22 23 typedef struct { 24 unsigned int data0 : 8; 25 unsigned int data1 : 8; 26 unsigned int data2 : 8; 27 unsigned int data3 : 8; 28 } reg_gio_rw_i2c1_data; 29 30 typedef struct { 31 unsigned int trf_bits : 6; 32 unsigned int switch_dir : 6; 33 unsigned int extra_start : 3; 34 unsigned int early_end : 1; 35 unsigned int start_stop : 1; 36 unsigned int ack_dir0 : 1; 37 unsigned int ack_dir1 : 1; 38 unsigned int ack_dir2 : 1; 39 unsigned int ack_dir3 : 1; 40 unsigned int ack_dir4 : 1; 41 unsigned int ack_dir5 : 1; 42 unsigned int ack_bit : 1; 43 unsigned int start_bit : 1; 44 unsigned int freq : 2; 45 unsigned int dummy1 : 5; 46 } reg_gio_rw_i2c1_ctrl; 47 48 extern reg_gio_rw_i2c1_cfg reg_gio; 49 extern reg_gio_rw_i2c1_data reg_data; 50 extern int reg_start; 51 extern reg_gio_rw_i2c1_ctrl reg_ctrl; 52 53 extern void foobar(void); 54 extern void foo(int); 55 extern void frob(unsigned int); 56 extern void bar(int); 57 extern void baz(void); 58 f(int * devspec,unsigned int addr)59unsigned int f(int *devspec, unsigned int addr) 60 { 61 reg_gio_rw_i2c1_ctrl ctrl = {0}; 62 reg_gio_rw_i2c1_data data = {0}; 63 64 foobar(); 65 66 static int first = 1; 67 68 if (first) { 69 reg_gio_rw_i2c1_cfg cfg = {0}; 70 first = 0; 71 72 foo(1); 73 cfg.sda0_idle = 1; 74 cfg.sda0_io = 0; 75 cfg.scl_inv = 0; 76 cfg.scl_io = 0; 77 cfg.bit_order = 1; 78 cfg.sda_sel = 0; 79 cfg.sen_sel = 0; 80 cfg.en = 1; 81 reg_gio = cfg; 82 } 83 84 ctrl.freq = 1; 85 ctrl.start_bit = 0; 86 ctrl.ack_bit = 1; 87 ctrl.ack_dir0 = 0; 88 ctrl.ack_dir1 = 0; 89 ctrl.ack_dir2 = 0; 90 ctrl.ack_dir3 = 1; 91 ctrl.ack_dir4 = 0; 92 ctrl.ack_dir5 = 0; 93 ctrl.start_stop = 1; 94 ctrl.early_end = 0; 95 ctrl.extra_start = 2; 96 ctrl.switch_dir = 8*3; 97 ctrl.trf_bits = 8*4; 98 reg_ctrl = ctrl; 99 frob(0xac); 100 data.data0 = devspec[1] & 192; 101 data.data1 = addr; 102 data.data2 = devspec[1] | 0x01; 103 reg_data = data; 104 reg_start = 1; 105 bar(100); 106 data = reg_data; 107 baz(); 108 109 return data.data3; 110 } 111