1# Flash Loader Documentation 2 3Code is situated in section `.text` 4 5Shall add a compile directive at the head: `.syntax unified` 6 7**Calling convention**: 8 9All parameters would be passed over registers 10 11`r0`: the base address of the copy source 12`r1`: the base address of the copy destination 13`r2`: the count of byte to be copied 14`r3`: flash register offset (used to support two banks) 15 16**What the program is expected to do**: 17 18Copy data from source to destination, after which trigger a breakpint to exit. Before exit, `r2` must be less or equal to zero to indicate that the copy is done. 19 20**Limitation**: No stack operations are permitted. Registers ranging from `r3` to `r12` are free to use. Note that `r13` is `sp`(stack pointer), `r14` is `lr`(commonly used to store jump address), `r15` is `pc`(program counter). 21 22**Requirement**: After every single copy, wait until the flash finishes. The detailed single copy length and the way to check can be found below. Address of `flash_base` shall be two-bytes aligned. 23 24## stm32f0.s 25 26`flash_base`: 0x40022000 27 28`FLASH_CR`: offset from `flash_base` is 16 29 30`FLASH_SR`: offset from `flash_base` is 12 31 32**Reference**: [https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f0.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f0.h) 33[https://www.st.com/resource/en/reference_manual/dm00031936-stm32f0x1stm32f0x2stm32f0x8-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00031936-stm32f0x1stm32f0x2stm32f0x8-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 34 35**Special requirements**: 36 37Before every copy, read a word from FLASH_CR, set the PG bit to 1 and write back. Copy one half word each time. 38 39How to wait for the write process: read a word from FLASH_SR, loop until the busy bit is reset. After that, FLASH_SR is check. The process is interrupted if the error bit (0x04) is set. 40 41Exit: after the copying process and before triggering the breakpoint, clear the PG bit in FLASH_CR. 42 43## stm32f4.s 44 45`flash_base`: 0x40023c00 46 47`FLASH_SR`: offset from `flash_base` is 0xe (14) 48 49**Reference**: [https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h) 50[https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf](https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf) 51 52 53**Special requirements**: 54 55Copy one word each time. 56 57How to wait for the write process: read a word from FLASH_SR, loop until the busy bit is reset. 58 59## stm32f4lv.s 60 61`flash_base`: 0x40023c00 62 63`FLASH_SR`: offset from `flash_base` is 0xe (14) 64 65**Reference**: [https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h) 66[https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf](https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf) 67 68**Special Requirements**: 69 70Copy one byte each time. 71 72How to wait from the write process: read a half word from FLASH_SR, loop until the busy bit is reset. 73 74## stm32f7.s 75 76**Reference**: [https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h) 77[https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 78 79Mostly same with `stm32f4.s`. Require establishing a memory barrier after every copy and before checking for finished writing by `dsb sy` 80 81## stm32f7lv.s 82 83**Reference**: [https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h) 84[https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 85 86**Special Requirements**: 87 88Mostly same with `stm32f7.s`. Copy one byte each time. 89 90## stm32lx.s 91 92**Special Requirements**: 93 94Copy one word each time. No wait for write. 95 96## stm32l4.s 97 98`flash_base`: 0x40022000 99`FLASH_BSY`: offset from `flash_base` is 0x12 100 101**Reference**: [https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32l4.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32l4.h) 102[https://www.st.com/resource/en/reference_manual/dm00310109-stm32l4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00310109-stm32l4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 103 104**Special Requirements**: 105 106Copy one double word each time (More than one registers are allowed). 107 108How to wait for the write process: read a half word from `FLASH_BSY`, loop until the busy bit is reset. 109 110 111# 净室工程文档-原始中文版 (out of date) 112 113代码位于的section：`.text` 114编译制导添加`.syntax unified` 115 116传入参数约定： 117 118参数全部通过寄存器传递 119 120`r0`: 拷贝源点起始地址 121`r1`: 拷贝终点起始地址 122`r2`: 拷贝word（4字节）数(存在例外) 123 124程序功能：将数据从源点拷贝到终点，在拷贝完毕后触发断点以结束执行，结束时`r2`值需清零表明传输完毕。 125 126限制：不可使用栈，可自由使用的临时寄存器为`R3`到`R12`。`R13`为`sp`（stack pointer），`R14`为lr（一般用于储存跳转地址），`R15`为`pc`（program counter）。 127 128要求：每完成一次拷贝，需等待flash完成写入，单次拷贝宽度、检查写入完成的方式见每个文件的具体要求。 129 130特殊地址`flash_base`存放地址需2字节对齐。 131 132## stm32f0.s 133 134特殊地址定义：`flash_base`:定义为0x40022000 135 136`FLASH_CR`: 相对`flash_base`的offset为16 137 138`FLASH_SR`: 相对`flash_base`的offset为12 139 140参考：[https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f0.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f0.h) 141[https://www.st.com/resource/en/reference_manual/dm00031936-stm32f0x1stm32f0x2stm32f0x8-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00031936-stm32f0x1stm32f0x2stm32f0x8-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 142 143特殊要求： 144每次拷贝开始前需要读出FLASH_CR处的4字节内容，将其最低bit设置为1，写回FLASH_CR。 145 146每次写入数据宽度为2字节（半字）。 147 148每完成一次写入，需等待flash完成写入，检查方式为读取FLASH_SR处4字节内容，若取值为1，则说明写入尚未完成，需继续轮询等待；否则需要检查FLASH_SR处值是否为4，若非4，则应直接准备退出。 149 150退出：全部拷贝执行完毕后触发断点前，将FLASH_CR处4字节内容最低bit清为0，写回FLASH_CR。 151 152 153 154## stm32f4.s 155 156特殊地址定义： `flash_base`：定义为0x40023c00 157 158`FLASH_SR`:相对flash_base的offset为0xe（14） 159 160参考：[https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h) 161[https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf](https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf) 162 163特殊要求： 164 165每次写入的数据宽度为4字节（字）。 166 167每完成一次写入，需等待flash完成写入，检查方式为读取FLASH_SR处2字节内容，若取值为1，则说明写入尚未完成，需继续轮询等待。 168 169## stm32f4lv.s 170 171特殊地址定义：`flash_base`：定义为0x40023c00 172 173`FLASH_SR`:相对`flash_base`的offset为0xe (14) 174 175参考：[https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f4.h) 176[https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf](https://www.st.com/content/ccc/resource/technical/document/reference_manual/3d/6d/5a/66/b4/99/40/d4/DM00031020.pdf/files/DM00031020.pdf/jcr:content/translations/en.DM00031020.pdf) 177 178特殊要求： 179 180每次写入的数据宽度为1字节（1/4字）。 181 182每完成一次写入，需等待flash完成写入，检查方式为读取FLASH_SR处2字节内容，若取值为1，则说明写入尚未完成，需继续轮询等待。 183 184## stm32f7.s 185 186参考：[https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h) 187[https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 188 189要求同stm32f4.s，额外要求在每次拷贝执行完毕、flash写入成功检测前，执行`dsb sy`指令以建立内存屏障。 190 191 192## stm32f7lv.s 193 194参考：[https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32f7.h) 195[https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00124865-stm32f75xxx-and-stm32f74xxx-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 196要求基本同stm32f7.s，差异要求为每次写入的数据宽度为1字节（1/4字）。 197 198## stm32l0x.s 199 200特殊要求： 201 202每次写入的数据宽度为4字节（字） 203 204无需实现检查flash写入完成功能 205 206## stm32l4.s 207 208例外：`r2`： 拷贝双字（8字节）数 209 210特殊地址定义：`flash_base`: 0x40022000 211 212`FLASH_BSY`：相对flash_base的offset为0x12 213 214参考：[https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32l4.h](https://chromium.googlesource.com/chromiumos/platform/ec/+/master/chip/stm32/registers-stm32l4.h) 215[https://www.st.com/resource/en/reference_manual/dm00310109-stm32l4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf](https://www.st.com/resource/en/reference_manual/dm00310109-stm32l4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) 216 217拷贝方式：一次性拷贝连续的8个字节（使用两个连续寄存器作中转）并写入 218 219每完成一次写入，需等待flash完成写入，检查方式为读取FLASH_BSY处半字（2字节），若其最低位非1，可继续拷贝。 220 221## stm32lx.s 222 223要求与stm32l0x.s相同 224