1 /*****************************************************************************
2 
3   Licensed to Accellera Systems Initiative Inc. (Accellera) under one or
4   more contributor license agreements.  See the NOTICE file distributed
5   with this work for additional information regarding copyright ownership.
6   Accellera licenses this file to you under the Apache License, Version 2.0
7   (the "License"); you may not use this file except in compliance with the
8   License.  You may obtain a copy of the License at
9 
10     http://www.apache.org/licenses/LICENSE-2.0
11 
12   Unless required by applicable law or agreed to in writing, software
13   distributed under the License is distributed on an "AS IS" BASIS,
14   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
15   implied.  See the License for the specific language governing
16   permissions and limitations under the License.
17 
18  *****************************************************************************/
19 
20 /*****************************************************************************
21 
22   pic.cpp -- Programmable Interrupt Unit.
23 
24   Original Author: Martin Wang, Synopsys, Inc.
25 
26  *****************************************************************************/
27 
28 /*****************************************************************************
29 
30   MODIFICATION LOG - modifiers, enter your name, affiliation, date and
31   changes you are making here.
32 
33       Name, Affiliation, Date:
34   Description of Modification:
35 
36  *****************************************************************************/
37 
38 
39 #include "systemc.h"
40 #include "pic.h"
41 
entry()42 void pic::entry(){
43 
44 	if (ireq0.read() == true) {
45 		intreq.write(true);
46 		vectno.write(0);
47 	} else if (ireq1.read() == true) {
48 			intreq.write(true);
49 			vectno.write(1);
50 		} else if (ireq2.read() == true) {
51 				intreq.write(true);
52 				vectno.write(2);
53 			} else if (ireq3.read() == true) {
54 						intreq.write(true);
55 						vectno.write(2);
56 				} else {
57 				}
58 	if ((intack_cpu.read() == true) && (cs.read() == true)) {
59 			intreq.write(false);
60 	}
61   }
62 
63 // EOF
64 
65