1 //===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #if defined(__arm64__) || defined(__aarch64__) 10 11 #ifndef lldb_NativeRegisterContextLinux_arm64_h 12 #define lldb_NativeRegisterContextLinux_arm64_h 13 14 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h" 15 #include "Plugins/Process/Utility/lldb-arm64-register-enums.h" 16 17 namespace lldb_private { 18 namespace process_linux { 19 20 class NativeProcessLinux; 21 22 class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux { 23 public: 24 NativeRegisterContextLinux_arm64(const ArchSpec &target_arch, 25 NativeThreadProtocol &native_thread); 26 27 uint32_t GetRegisterSetCount() const override; 28 29 uint32_t GetUserRegisterCount() const override; 30 31 const RegisterSet *GetRegisterSet(uint32_t set_index) const override; 32 33 Status ReadRegister(const RegisterInfo *reg_info, 34 RegisterValue ®_value) override; 35 36 Status WriteRegister(const RegisterInfo *reg_info, 37 const RegisterValue ®_value) override; 38 39 Status ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override; 40 41 Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override; 42 43 void InvalidateAllRegisters() override; 44 45 // Hardware breakpoints/watchpoint management functions 46 47 uint32_t NumSupportedHardwareBreakpoints() override; 48 49 uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override; 50 51 bool ClearHardwareBreakpoint(uint32_t hw_idx) override; 52 53 Status ClearAllHardwareBreakpoints() override; 54 55 Status GetHardwareBreakHitIndex(uint32_t &bp_index, 56 lldb::addr_t trap_addr) override; 57 58 uint32_t NumSupportedHardwareWatchpoints() override; 59 60 uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, 61 uint32_t watch_flags) override; 62 63 bool ClearHardwareWatchpoint(uint32_t hw_index) override; 64 65 Status ClearAllHardwareWatchpoints() override; 66 67 Status GetWatchpointHitIndex(uint32_t &wp_index, 68 lldb::addr_t trap_addr) override; 69 70 lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override; 71 72 lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override; 73 74 uint32_t GetWatchpointSize(uint32_t wp_index); 75 76 bool WatchpointIsEnabled(uint32_t wp_index); 77 78 // Debug register type select 79 enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK }; 80 81 protected: 82 83 Status ReadGPR() override; 84 85 Status WriteGPR() override; 86 87 Status ReadFPR() override; 88 89 Status WriteFPR() override; 90 GetGPRBuffer()91 void *GetGPRBuffer() override { return &m_gpr_arm64; } 92 GetFPRBuffer()93 void *GetFPRBuffer() override { return &m_fpr; } 94 GetFPRSize()95 size_t GetFPRSize() override { return sizeof(m_fpr); } 96 97 private: 98 struct RegInfo { 99 uint32_t num_registers; 100 uint32_t num_gpr_registers; 101 uint32_t num_fpr_registers; 102 103 uint32_t last_gpr; 104 uint32_t first_fpr; 105 uint32_t last_fpr; 106 107 uint32_t first_fpr_v; 108 uint32_t last_fpr_v; 109 110 uint32_t gpr_flags; 111 }; 112 113 // based on RegisterContextDarwin_arm64.h 114 struct VReg { 115 uint8_t bytes[16]; 116 }; 117 118 // based on RegisterContextDarwin_arm64.h 119 struct FPU { 120 VReg v[32]; 121 uint32_t fpsr; 122 uint32_t fpcr; 123 }; 124 125 struct GPR { 126 uint64_t x[31]; 127 uint64_t sp; 128 uint64_t pc; 129 uint64_t pstate; 130 }; 131 132 bool m_gpr_is_valid; 133 bool m_fpu_is_valid; 134 135 GPR m_gpr_arm64; // 64-bit general purpose registers. 136 RegInfo m_reg_info; 137 FPU m_fpr; // floating-point registers including extended register sets. 138 139 // Debug register info for hardware breakpoints and watchpoints management. 140 struct DREG { 141 lldb::addr_t address; // Breakpoint/watchpoint address value. 142 lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception 143 // occurred. 144 lldb::addr_t real_addr; // Address value that should cause target to stop. 145 uint32_t control; // Breakpoint/watchpoint control value. 146 uint32_t refcount; // Serves as enable/disable and reference counter. 147 }; 148 149 struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints 150 struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints 151 152 uint32_t m_max_hwp_supported; 153 uint32_t m_max_hbp_supported; 154 bool m_refresh_hwdebug_info; 155 156 bool IsGPR(unsigned reg) const; 157 158 bool IsFPR(unsigned reg) const; 159 160 Status ReadHardwareDebugInfo(); 161 162 Status WriteHardwareDebugRegs(int hwbType); 163 164 uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const; 165 }; 166 167 } // namespace process_linux 168 } // namespace lldb_private 169 170 #endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h 171 172 #endif // defined (__arm64__) || defined (__aarch64__) 173