1; RUN: opt -analyze -scalar-evolution < %s | FileCheck %s
2
3target triple = "x86_64-unknown-linux-gnu"
4
5; CHECK-LABEL: Printing analysis 'Scalar Evolution Analysis' for function 'f0':
6; CHECK-NEXT: Classifying expressions for: @f0
7; CHECK-NEXT:   %v0 = phi i16 [ 2, %b0 ], [ %v2, %b1 ]
8; CHECK-NEXT:   -->  {2,+,1}<nuw><nsw><%b1> U: [2,4) S: [2,4)         Exits: 3                LoopDispositions: { %b1: Computable }
9; CHECK-NEXT:   %v1 = phi i16 [ 1, %b0 ], [ %v3, %b1 ]
10; CHECK-NEXT:   -->  {1,+,2,+,1}<%b1> U: full-set S: full-set         Exits: 3                LoopDispositions: { %b1: Computable }
11; CHECK-NEXT:   %v2 = add nsw i16 %v0, 1
12; CHECK-NEXT:   -->  {3,+,1}<nuw><nsw><%b1> U: [3,5) S: [3,5)         Exits: 4                LoopDispositions: { %b1: Computable }
13; CHECK-NEXT:   %v3 = add nsw i16 %v1, %v0
14; CHECK-NEXT:   -->  {3,+,3,+,1}<%b1> U: full-set S: full-set         Exits: 6                LoopDispositions: { %b1: Computable }
15; CHECK-NEXT:   %v4 = and i16 %v3, 1
16; CHECK-NEXT:   -->  (zext i1 {true,+,true,+,true}<%b1> to i16) U: [0,2) S: [0,2)             Exits: 0                LoopDispositions: { %b1: Computable }
17; CHECK-NEXT: Determining loop execution counts for: @f0
18; CHECK-NEXT: Loop %b1: backedge-taken count is 1
19; CHECK-NEXT: Loop %b1: max backedge-taken count is 1
20; CHECK-NEXT: Loop %b1: Predicated backedge-taken count is 1
21; CHECK-NEXT:  Predicates:
22; CHECK-EMPTY:
23; CHECK-NEXT: Loop %b1: Trip multiple is 2
24define void @f0() {
25b0:
26  br label %b1
27
28b1:                                               ; preds = %b1, %b0
29  %v0 = phi i16 [ 2, %b0 ], [ %v2, %b1 ]
30  %v1 = phi i16 [ 1, %b0 ], [ %v3, %b1 ]
31  %v2 = add nsw i16 %v0, 1
32  %v3 = add nsw i16 %v1, %v0
33  %v4 = and i16 %v3, 1
34  %v5 = icmp ne i16 %v4, 0
35  br i1 %v5, label %b1, label %b2
36
37b2:                                               ; preds = %b1
38  ret void
39}
40
41@g0 = common dso_local global i16 0, align 2
42@g1 = common dso_local global i32 0, align 4
43@g2 = common dso_local global i32* null, align 8
44
45; CHECK-LABEL: Printing analysis 'Scalar Evolution Analysis' for function 'f1':
46; CHECK-NEXT: Classifying expressions for: @f1
47; CHECK-NEXT:   %v0 = phi i16 [ 0, %b0 ], [ %v3, %b1 ]
48; CHECK-NEXT:   -->  {0,+,3,+,1}<%b1> U: full-set S: full-set         Exits: 7                LoopDispositions: { %b1: Computable }
49; CHECK-NEXT:   %v1 = phi i32 [ 3, %b0 ], [ %v6, %b1 ]
50; CHECK-NEXT:   -->  {3,+,1}<nuw><nsw><%b1> U: [3,6) S: [3,6)         Exits: 5                LoopDispositions: { %b1: Computable }
51; CHECK-NEXT:   %v2 = trunc i32 %v1 to i16
52; CHECK-NEXT:   -->  {3,+,1}<%b1> U: [3,6) S: [3,6)           Exits: 5                LoopDispositions: { %b1: Computable }
53; CHECK-NEXT:   %v3 = add i16 %v0, %v2
54; CHECK-NEXT:   -->  {3,+,4,+,1}<%b1> U: full-set S: full-set         Exits: 12               LoopDispositions: { %b1: Computable }
55; CHECK-NEXT:   %v4 = and i16 %v3, 1
56; CHECK-NEXT:   -->  (zext i1 {true,+,false,+,true}<%b1> to i16) U: [0,2) S: [0,2)            Exits: 0                LoopDispositions: { %b1: Computable }
57; CHECK-NEXT:   %v6 = add nuw nsw i32 %v1, 1
58; CHECK-NEXT:   -->  {4,+,1}<nuw><nsw><%b1> U: [4,7) S: [4,7)         Exits: 6                LoopDispositions: { %b1: Computable }
59; CHECK-NEXT:   %v7 = phi i32 [ %v1, %b1 ]
60; CHECK-NEXT:   -->  %v7 U: [3,6) S: [3,6)
61; CHECK-NEXT:   %v8 = phi i16 [ %v3, %b1 ]
62; CHECK-NEXT:   -->  %v8 U: full-set S: full-set
63; CHECK-NEXT: Determining loop execution counts for: @f1
64; CHECK-NEXT: Loop %b3: <multiple exits> Unpredictable backedge-taken count.
65; CHECK-NEXT: Loop %b3: Unpredictable max backedge-taken count.
66; CHECK-NEXT: Loop %b3: Unpredictable predicated backedge-taken count.
67; CHECK-NEXT: Loop %b1: backedge-taken count is 2
68; CHECK-NEXT: Loop %b1: max backedge-taken count is 2
69; CHECK-NEXT: Loop %b1: Predicated backedge-taken count is 2
70; CHECK-NEXT:  Predicates:
71; CHECK-EMPTY:
72; CHECK-NEXT: Loop %b1: Trip multiple is 3
73define void @f1() #0 {
74b0:
75  store i16 0, i16* @g0, align 2
76  store i32* @g1, i32** @g2, align 8
77  br label %b1
78
79b1:                                               ; preds = %b1, %b0
80  %v0 = phi i16 [ 0, %b0 ], [ %v3, %b1 ]
81  %v1 = phi i32 [ 3, %b0 ], [ %v6, %b1 ]
82  %v2 = trunc i32 %v1 to i16
83  %v3 = add i16 %v0, %v2
84  %v4 = and i16 %v3, 1
85  %v5 = icmp eq i16 %v4, 0
86  %v6 = add nuw nsw i32 %v1, 1
87  br i1 %v5, label %b2, label %b1
88
89b2:                                               ; preds = %b1
90  %v7 = phi i32 [ %v1, %b1 ]
91  %v8 = phi i16 [ %v3, %b1 ]
92  store i32 %v7, i32* @g1, align 4
93  store i16 %v8, i16* @g0, align 2
94  br label %b3
95
96b3:                                               ; preds = %b3, %b2
97  br label %b3
98}
99
100attributes #0 = { nounwind uwtable "target-cpu"="x86-64" }
101