1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s -check-prefix=PPC64LE 3 4define i8 @test0(i8* %ptr) { 5; PPC64LE-LABEL: test0: 6; PPC64LE: # %bb.0: 7; PPC64LE-NEXT: lbz 3, 0(3) 8; PPC64LE-NEXT: blr 9 %val = load atomic i8, i8* %ptr unordered, align 1 10 ret i8 %val 11} 12 13define i8 @test1(i8* %ptr) { 14; PPC64LE-LABEL: test1: 15; PPC64LE: # %bb.0: 16; PPC64LE-NEXT: lbz 3, 0(3) 17; PPC64LE-NEXT: blr 18 %val = load atomic i8, i8* %ptr monotonic, align 1 19 ret i8 %val 20} 21 22define i8 @test2(i8* %ptr) { 23; PPC64LE-LABEL: test2: 24; PPC64LE: # %bb.0: 25; PPC64LE-NEXT: lbz 3, 0(3) 26; PPC64LE-NEXT: cmpd 7, 3, 3 27; PPC64LE-NEXT: bne- 7, .+4 28; PPC64LE-NEXT: isync 29; PPC64LE-NEXT: blr 30 %val = load atomic i8, i8* %ptr acquire, align 1 31 ret i8 %val 32} 33 34define i8 @test3(i8* %ptr) { 35; PPC64LE-LABEL: test3: 36; PPC64LE: # %bb.0: 37; PPC64LE-NEXT: sync 38; PPC64LE-NEXT: lbz 3, 0(3) 39; PPC64LE-NEXT: cmpd 7, 3, 3 40; PPC64LE-NEXT: bne- 7, .+4 41; PPC64LE-NEXT: isync 42; PPC64LE-NEXT: blr 43 %val = load atomic i8, i8* %ptr seq_cst, align 1 44 ret i8 %val 45} 46 47define i16 @test4(i16* %ptr) { 48; PPC64LE-LABEL: test4: 49; PPC64LE: # %bb.0: 50; PPC64LE-NEXT: lhz 3, 0(3) 51; PPC64LE-NEXT: blr 52 %val = load atomic i16, i16* %ptr unordered, align 2 53 ret i16 %val 54} 55 56define i16 @test5(i16* %ptr) { 57; PPC64LE-LABEL: test5: 58; PPC64LE: # %bb.0: 59; PPC64LE-NEXT: lhz 3, 0(3) 60; PPC64LE-NEXT: blr 61 %val = load atomic i16, i16* %ptr monotonic, align 2 62 ret i16 %val 63} 64 65define i16 @test6(i16* %ptr) { 66; PPC64LE-LABEL: test6: 67; PPC64LE: # %bb.0: 68; PPC64LE-NEXT: lhz 3, 0(3) 69; PPC64LE-NEXT: cmpd 7, 3, 3 70; PPC64LE-NEXT: bne- 7, .+4 71; PPC64LE-NEXT: isync 72; PPC64LE-NEXT: blr 73 %val = load atomic i16, i16* %ptr acquire, align 2 74 ret i16 %val 75} 76 77define i16 @test7(i16* %ptr) { 78; PPC64LE-LABEL: test7: 79; PPC64LE: # %bb.0: 80; PPC64LE-NEXT: sync 81; PPC64LE-NEXT: lhz 3, 0(3) 82; PPC64LE-NEXT: cmpd 7, 3, 3 83; PPC64LE-NEXT: bne- 7, .+4 84; PPC64LE-NEXT: isync 85; PPC64LE-NEXT: blr 86 %val = load atomic i16, i16* %ptr seq_cst, align 2 87 ret i16 %val 88} 89 90define i32 @test8(i32* %ptr) { 91; PPC64LE-LABEL: test8: 92; PPC64LE: # %bb.0: 93; PPC64LE-NEXT: lwz 3, 0(3) 94; PPC64LE-NEXT: blr 95 %val = load atomic i32, i32* %ptr unordered, align 4 96 ret i32 %val 97} 98 99define i32 @test9(i32* %ptr) { 100; PPC64LE-LABEL: test9: 101; PPC64LE: # %bb.0: 102; PPC64LE-NEXT: lwz 3, 0(3) 103; PPC64LE-NEXT: blr 104 %val = load atomic i32, i32* %ptr monotonic, align 4 105 ret i32 %val 106} 107 108define i32 @test10(i32* %ptr) { 109; PPC64LE-LABEL: test10: 110; PPC64LE: # %bb.0: 111; PPC64LE-NEXT: lwz 3, 0(3) 112; PPC64LE-NEXT: cmpd 7, 3, 3 113; PPC64LE-NEXT: bne- 7, .+4 114; PPC64LE-NEXT: isync 115; PPC64LE-NEXT: blr 116 %val = load atomic i32, i32* %ptr acquire, align 4 117 ret i32 %val 118} 119 120define i32 @test11(i32* %ptr) { 121; PPC64LE-LABEL: test11: 122; PPC64LE: # %bb.0: 123; PPC64LE-NEXT: sync 124; PPC64LE-NEXT: lwz 3, 0(3) 125; PPC64LE-NEXT: cmpd 7, 3, 3 126; PPC64LE-NEXT: bne- 7, .+4 127; PPC64LE-NEXT: isync 128; PPC64LE-NEXT: blr 129 %val = load atomic i32, i32* %ptr seq_cst, align 4 130 ret i32 %val 131} 132 133define i64 @test12(i64* %ptr) { 134; PPC64LE-LABEL: test12: 135; PPC64LE: # %bb.0: 136; PPC64LE-NEXT: ld 3, 0(3) 137; PPC64LE-NEXT: blr 138 %val = load atomic i64, i64* %ptr unordered, align 8 139 ret i64 %val 140} 141 142define i64 @test13(i64* %ptr) { 143; PPC64LE-LABEL: test13: 144; PPC64LE: # %bb.0: 145; PPC64LE-NEXT: ld 3, 0(3) 146; PPC64LE-NEXT: blr 147 %val = load atomic i64, i64* %ptr monotonic, align 8 148 ret i64 %val 149} 150 151define i64 @test14(i64* %ptr) { 152; PPC64LE-LABEL: test14: 153; PPC64LE: # %bb.0: 154; PPC64LE-NEXT: ld 3, 0(3) 155; PPC64LE-NEXT: cmpd 7, 3, 3 156; PPC64LE-NEXT: bne- 7, .+4 157; PPC64LE-NEXT: isync 158; PPC64LE-NEXT: blr 159 %val = load atomic i64, i64* %ptr acquire, align 8 160 ret i64 %val 161} 162 163define i64 @test15(i64* %ptr) { 164; PPC64LE-LABEL: test15: 165; PPC64LE: # %bb.0: 166; PPC64LE-NEXT: sync 167; PPC64LE-NEXT: ld 3, 0(3) 168; PPC64LE-NEXT: cmpd 7, 3, 3 169; PPC64LE-NEXT: bne- 7, .+4 170; PPC64LE-NEXT: isync 171; PPC64LE-NEXT: blr 172 %val = load atomic i64, i64* %ptr seq_cst, align 8 173 ret i64 %val 174} 175 176define void @test16(i8* %ptr, i8 %val) { 177; PPC64LE-LABEL: test16: 178; PPC64LE: # %bb.0: 179; PPC64LE-NEXT: stb 4, 0(3) 180; PPC64LE-NEXT: blr 181 store atomic i8 %val, i8* %ptr unordered, align 1 182 ret void 183} 184 185define void @test17(i8* %ptr, i8 %val) { 186; PPC64LE-LABEL: test17: 187; PPC64LE: # %bb.0: 188; PPC64LE-NEXT: stb 4, 0(3) 189; PPC64LE-NEXT: blr 190 store atomic i8 %val, i8* %ptr monotonic, align 1 191 ret void 192} 193 194define void @test18(i8* %ptr, i8 %val) { 195; PPC64LE-LABEL: test18: 196; PPC64LE: # %bb.0: 197; PPC64LE-NEXT: lwsync 198; PPC64LE-NEXT: stb 4, 0(3) 199; PPC64LE-NEXT: blr 200 store atomic i8 %val, i8* %ptr release, align 1 201 ret void 202} 203 204define void @test19(i8* %ptr, i8 %val) { 205; PPC64LE-LABEL: test19: 206; PPC64LE: # %bb.0: 207; PPC64LE-NEXT: sync 208; PPC64LE-NEXT: stb 4, 0(3) 209; PPC64LE-NEXT: blr 210 store atomic i8 %val, i8* %ptr seq_cst, align 1 211 ret void 212} 213 214define void @test20(i16* %ptr, i16 %val) { 215; PPC64LE-LABEL: test20: 216; PPC64LE: # %bb.0: 217; PPC64LE-NEXT: sth 4, 0(3) 218; PPC64LE-NEXT: blr 219 store atomic i16 %val, i16* %ptr unordered, align 2 220 ret void 221} 222 223define void @test21(i16* %ptr, i16 %val) { 224; PPC64LE-LABEL: test21: 225; PPC64LE: # %bb.0: 226; PPC64LE-NEXT: sth 4, 0(3) 227; PPC64LE-NEXT: blr 228 store atomic i16 %val, i16* %ptr monotonic, align 2 229 ret void 230} 231 232define void @test22(i16* %ptr, i16 %val) { 233; PPC64LE-LABEL: test22: 234; PPC64LE: # %bb.0: 235; PPC64LE-NEXT: lwsync 236; PPC64LE-NEXT: sth 4, 0(3) 237; PPC64LE-NEXT: blr 238 store atomic i16 %val, i16* %ptr release, align 2 239 ret void 240} 241 242define void @test23(i16* %ptr, i16 %val) { 243; PPC64LE-LABEL: test23: 244; PPC64LE: # %bb.0: 245; PPC64LE-NEXT: sync 246; PPC64LE-NEXT: sth 4, 0(3) 247; PPC64LE-NEXT: blr 248 store atomic i16 %val, i16* %ptr seq_cst, align 2 249 ret void 250} 251 252define void @test24(i32* %ptr, i32 %val) { 253; PPC64LE-LABEL: test24: 254; PPC64LE: # %bb.0: 255; PPC64LE-NEXT: stw 4, 0(3) 256; PPC64LE-NEXT: blr 257 store atomic i32 %val, i32* %ptr unordered, align 4 258 ret void 259} 260 261define void @test25(i32* %ptr, i32 %val) { 262; PPC64LE-LABEL: test25: 263; PPC64LE: # %bb.0: 264; PPC64LE-NEXT: stw 4, 0(3) 265; PPC64LE-NEXT: blr 266 store atomic i32 %val, i32* %ptr monotonic, align 4 267 ret void 268} 269 270define void @test26(i32* %ptr, i32 %val) { 271; PPC64LE-LABEL: test26: 272; PPC64LE: # %bb.0: 273; PPC64LE-NEXT: lwsync 274; PPC64LE-NEXT: stw 4, 0(3) 275; PPC64LE-NEXT: blr 276 store atomic i32 %val, i32* %ptr release, align 4 277 ret void 278} 279 280define void @test27(i32* %ptr, i32 %val) { 281; PPC64LE-LABEL: test27: 282; PPC64LE: # %bb.0: 283; PPC64LE-NEXT: sync 284; PPC64LE-NEXT: stw 4, 0(3) 285; PPC64LE-NEXT: blr 286 store atomic i32 %val, i32* %ptr seq_cst, align 4 287 ret void 288} 289 290define void @test28(i64* %ptr, i64 %val) { 291; PPC64LE-LABEL: test28: 292; PPC64LE: # %bb.0: 293; PPC64LE-NEXT: std 4, 0(3) 294; PPC64LE-NEXT: blr 295 store atomic i64 %val, i64* %ptr unordered, align 8 296 ret void 297} 298 299define void @test29(i64* %ptr, i64 %val) { 300; PPC64LE-LABEL: test29: 301; PPC64LE: # %bb.0: 302; PPC64LE-NEXT: std 4, 0(3) 303; PPC64LE-NEXT: blr 304 store atomic i64 %val, i64* %ptr monotonic, align 8 305 ret void 306} 307 308define void @test30(i64* %ptr, i64 %val) { 309; PPC64LE-LABEL: test30: 310; PPC64LE: # %bb.0: 311; PPC64LE-NEXT: lwsync 312; PPC64LE-NEXT: std 4, 0(3) 313; PPC64LE-NEXT: blr 314 store atomic i64 %val, i64* %ptr release, align 8 315 ret void 316} 317 318define void @test31(i64* %ptr, i64 %val) { 319; PPC64LE-LABEL: test31: 320; PPC64LE: # %bb.0: 321; PPC64LE-NEXT: sync 322; PPC64LE-NEXT: std 4, 0(3) 323; PPC64LE-NEXT: blr 324 store atomic i64 %val, i64* %ptr seq_cst, align 8 325 ret void 326} 327 328define void @test32() { 329; PPC64LE-LABEL: test32: 330; PPC64LE: # %bb.0: 331; PPC64LE-NEXT: lwsync 332; PPC64LE-NEXT: blr 333 fence acquire 334 ret void 335} 336 337define void @test33() { 338; PPC64LE-LABEL: test33: 339; PPC64LE: # %bb.0: 340; PPC64LE-NEXT: lwsync 341; PPC64LE-NEXT: blr 342 fence release 343 ret void 344} 345 346define void @test34() { 347; PPC64LE-LABEL: test34: 348; PPC64LE: # %bb.0: 349; PPC64LE-NEXT: lwsync 350; PPC64LE-NEXT: blr 351 fence acq_rel 352 ret void 353} 354 355define void @test35() { 356; PPC64LE-LABEL: test35: 357; PPC64LE: # %bb.0: 358; PPC64LE-NEXT: sync 359; PPC64LE-NEXT: blr 360 fence seq_cst 361 ret void 362} 363 364define void @test36() { 365; PPC64LE-LABEL: test36: 366; PPC64LE: # %bb.0: 367; PPC64LE-NEXT: lwsync 368; PPC64LE-NEXT: blr 369 fence syncscope("singlethread") acquire 370 ret void 371} 372 373define void @test37() { 374; PPC64LE-LABEL: test37: 375; PPC64LE: # %bb.0: 376; PPC64LE-NEXT: lwsync 377; PPC64LE-NEXT: blr 378 fence syncscope("singlethread") release 379 ret void 380} 381 382define void @test38() { 383; PPC64LE-LABEL: test38: 384; PPC64LE: # %bb.0: 385; PPC64LE-NEXT: lwsync 386; PPC64LE-NEXT: blr 387 fence syncscope("singlethread") acq_rel 388 ret void 389} 390 391define void @test39() { 392; PPC64LE-LABEL: test39: 393; PPC64LE: # %bb.0: 394; PPC64LE-NEXT: sync 395; PPC64LE-NEXT: blr 396 fence syncscope("singlethread") seq_cst 397 ret void 398} 399 400define void @test40(i8* %ptr, i8 %cmp, i8 %val) { 401; PPC64LE-LABEL: test40: 402; PPC64LE: # %bb.0: 403; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 404; PPC64LE-NEXT: .LBB40_1: 405; PPC64LE-NEXT: lbarx 6, 0, 3 406; PPC64LE-NEXT: cmpw 4, 6 407; PPC64LE-NEXT: bne 0, .LBB40_3 408; PPC64LE-NEXT: # %bb.2: 409; PPC64LE-NEXT: stbcx. 5, 0, 3 410; PPC64LE-NEXT: beqlr 0 411; PPC64LE-NEXT: b .LBB40_1 412; PPC64LE-NEXT: .LBB40_3: 413; PPC64LE-NEXT: stbcx. 6, 0, 3 414; PPC64LE-NEXT: blr 415 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val monotonic monotonic 416 ret void 417} 418 419define void @test41(i8* %ptr, i8 %cmp, i8 %val) { 420; PPC64LE-LABEL: test41: 421; PPC64LE: # %bb.0: 422; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 423; PPC64LE-NEXT: .LBB41_1: 424; PPC64LE-NEXT: lbarx 6, 0, 3 425; PPC64LE-NEXT: cmpw 4, 6 426; PPC64LE-NEXT: bne 0, .LBB41_4 427; PPC64LE-NEXT: # %bb.2: 428; PPC64LE-NEXT: stbcx. 5, 0, 3 429; PPC64LE-NEXT: bne 0, .LBB41_1 430; PPC64LE-NEXT: # %bb.3: 431; PPC64LE-NEXT: lwsync 432; PPC64LE-NEXT: blr 433; PPC64LE-NEXT: .LBB41_4: 434; PPC64LE-NEXT: stbcx. 6, 0, 3 435; PPC64LE-NEXT: lwsync 436; PPC64LE-NEXT: blr 437 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire monotonic 438 ret void 439} 440 441define void @test42(i8* %ptr, i8 %cmp, i8 %val) { 442; PPC64LE-LABEL: test42: 443; PPC64LE: # %bb.0: 444; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 445; PPC64LE-NEXT: .LBB42_1: 446; PPC64LE-NEXT: lbarx 6, 0, 3 447; PPC64LE-NEXT: cmpw 4, 6 448; PPC64LE-NEXT: bne 0, .LBB42_4 449; PPC64LE-NEXT: # %bb.2: 450; PPC64LE-NEXT: stbcx. 5, 0, 3 451; PPC64LE-NEXT: bne 0, .LBB42_1 452; PPC64LE-NEXT: # %bb.3: 453; PPC64LE-NEXT: lwsync 454; PPC64LE-NEXT: blr 455; PPC64LE-NEXT: .LBB42_4: 456; PPC64LE-NEXT: stbcx. 6, 0, 3 457; PPC64LE-NEXT: lwsync 458; PPC64LE-NEXT: blr 459 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire acquire 460 ret void 461} 462 463define void @test43(i8* %ptr, i8 %cmp, i8 %val) { 464; PPC64LE-LABEL: test43: 465; PPC64LE: # %bb.0: 466; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 467; PPC64LE-NEXT: lwsync 468; PPC64LE-NEXT: .LBB43_1: 469; PPC64LE-NEXT: lbarx 6, 0, 3 470; PPC64LE-NEXT: cmpw 4, 6 471; PPC64LE-NEXT: bne 0, .LBB43_3 472; PPC64LE-NEXT: # %bb.2: 473; PPC64LE-NEXT: stbcx. 5, 0, 3 474; PPC64LE-NEXT: beqlr 0 475; PPC64LE-NEXT: b .LBB43_1 476; PPC64LE-NEXT: .LBB43_3: 477; PPC64LE-NEXT: stbcx. 6, 0, 3 478; PPC64LE-NEXT: blr 479 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release monotonic 480 ret void 481} 482 483define void @test44(i8* %ptr, i8 %cmp, i8 %val) { 484; PPC64LE-LABEL: test44: 485; PPC64LE: # %bb.0: 486; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 487; PPC64LE-NEXT: lwsync 488; PPC64LE-NEXT: .LBB44_1: 489; PPC64LE-NEXT: lbarx 6, 0, 3 490; PPC64LE-NEXT: cmpw 4, 6 491; PPC64LE-NEXT: bne 0, .LBB44_3 492; PPC64LE-NEXT: # %bb.2: 493; PPC64LE-NEXT: stbcx. 5, 0, 3 494; PPC64LE-NEXT: beqlr 0 495; PPC64LE-NEXT: b .LBB44_1 496; PPC64LE-NEXT: .LBB44_3: 497; PPC64LE-NEXT: stbcx. 6, 0, 3 498; PPC64LE-NEXT: blr 499 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release acquire 500 ret void 501} 502 503define void @test45(i8* %ptr, i8 %cmp, i8 %val) { 504; PPC64LE-LABEL: test45: 505; PPC64LE: # %bb.0: 506; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 507; PPC64LE-NEXT: lwsync 508; PPC64LE-NEXT: .LBB45_1: 509; PPC64LE-NEXT: lbarx 6, 0, 3 510; PPC64LE-NEXT: cmpw 4, 6 511; PPC64LE-NEXT: bne 0, .LBB45_4 512; PPC64LE-NEXT: # %bb.2: 513; PPC64LE-NEXT: stbcx. 5, 0, 3 514; PPC64LE-NEXT: bne 0, .LBB45_1 515; PPC64LE-NEXT: # %bb.3: 516; PPC64LE-NEXT: lwsync 517; PPC64LE-NEXT: blr 518; PPC64LE-NEXT: .LBB45_4: 519; PPC64LE-NEXT: stbcx. 6, 0, 3 520; PPC64LE-NEXT: lwsync 521; PPC64LE-NEXT: blr 522 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel monotonic 523 ret void 524} 525 526define void @test46(i8* %ptr, i8 %cmp, i8 %val) { 527; PPC64LE-LABEL: test46: 528; PPC64LE: # %bb.0: 529; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 530; PPC64LE-NEXT: lwsync 531; PPC64LE-NEXT: .LBB46_1: 532; PPC64LE-NEXT: lbarx 6, 0, 3 533; PPC64LE-NEXT: cmpw 4, 6 534; PPC64LE-NEXT: bne 0, .LBB46_4 535; PPC64LE-NEXT: # %bb.2: 536; PPC64LE-NEXT: stbcx. 5, 0, 3 537; PPC64LE-NEXT: bne 0, .LBB46_1 538; PPC64LE-NEXT: # %bb.3: 539; PPC64LE-NEXT: lwsync 540; PPC64LE-NEXT: blr 541; PPC64LE-NEXT: .LBB46_4: 542; PPC64LE-NEXT: stbcx. 6, 0, 3 543; PPC64LE-NEXT: lwsync 544; PPC64LE-NEXT: blr 545 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel acquire 546 ret void 547} 548 549define void @test47(i8* %ptr, i8 %cmp, i8 %val) { 550; PPC64LE-LABEL: test47: 551; PPC64LE: # %bb.0: 552; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 553; PPC64LE-NEXT: sync 554; PPC64LE-NEXT: .LBB47_1: 555; PPC64LE-NEXT: lbarx 6, 0, 3 556; PPC64LE-NEXT: cmpw 4, 6 557; PPC64LE-NEXT: bne 0, .LBB47_4 558; PPC64LE-NEXT: # %bb.2: 559; PPC64LE-NEXT: stbcx. 5, 0, 3 560; PPC64LE-NEXT: bne 0, .LBB47_1 561; PPC64LE-NEXT: # %bb.3: 562; PPC64LE-NEXT: lwsync 563; PPC64LE-NEXT: blr 564; PPC64LE-NEXT: .LBB47_4: 565; PPC64LE-NEXT: stbcx. 6, 0, 3 566; PPC64LE-NEXT: lwsync 567; PPC64LE-NEXT: blr 568 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst monotonic 569 ret void 570} 571 572define void @test48(i8* %ptr, i8 %cmp, i8 %val) { 573; PPC64LE-LABEL: test48: 574; PPC64LE: # %bb.0: 575; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 576; PPC64LE-NEXT: sync 577; PPC64LE-NEXT: .LBB48_1: 578; PPC64LE-NEXT: lbarx 6, 0, 3 579; PPC64LE-NEXT: cmpw 4, 6 580; PPC64LE-NEXT: bne 0, .LBB48_4 581; PPC64LE-NEXT: # %bb.2: 582; PPC64LE-NEXT: stbcx. 5, 0, 3 583; PPC64LE-NEXT: bne 0, .LBB48_1 584; PPC64LE-NEXT: # %bb.3: 585; PPC64LE-NEXT: lwsync 586; PPC64LE-NEXT: blr 587; PPC64LE-NEXT: .LBB48_4: 588; PPC64LE-NEXT: stbcx. 6, 0, 3 589; PPC64LE-NEXT: lwsync 590; PPC64LE-NEXT: blr 591 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst acquire 592 ret void 593} 594 595define void @test49(i8* %ptr, i8 %cmp, i8 %val) { 596; PPC64LE-LABEL: test49: 597; PPC64LE: # %bb.0: 598; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 599; PPC64LE-NEXT: sync 600; PPC64LE-NEXT: .LBB49_1: 601; PPC64LE-NEXT: lbarx 6, 0, 3 602; PPC64LE-NEXT: cmpw 4, 6 603; PPC64LE-NEXT: bne 0, .LBB49_4 604; PPC64LE-NEXT: # %bb.2: 605; PPC64LE-NEXT: stbcx. 5, 0, 3 606; PPC64LE-NEXT: bne 0, .LBB49_1 607; PPC64LE-NEXT: # %bb.3: 608; PPC64LE-NEXT: lwsync 609; PPC64LE-NEXT: blr 610; PPC64LE-NEXT: .LBB49_4: 611; PPC64LE-NEXT: stbcx. 6, 0, 3 612; PPC64LE-NEXT: lwsync 613; PPC64LE-NEXT: blr 614 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst seq_cst 615 ret void 616} 617 618define void @test50(i16* %ptr, i16 %cmp, i16 %val) { 619; PPC64LE-LABEL: test50: 620; PPC64LE: # %bb.0: 621; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 622; PPC64LE-NEXT: .LBB50_1: 623; PPC64LE-NEXT: lharx 6, 0, 3 624; PPC64LE-NEXT: cmpw 4, 6 625; PPC64LE-NEXT: bne 0, .LBB50_3 626; PPC64LE-NEXT: # %bb.2: 627; PPC64LE-NEXT: sthcx. 5, 0, 3 628; PPC64LE-NEXT: beqlr 0 629; PPC64LE-NEXT: b .LBB50_1 630; PPC64LE-NEXT: .LBB50_3: 631; PPC64LE-NEXT: sthcx. 6, 0, 3 632; PPC64LE-NEXT: blr 633 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val monotonic monotonic 634 ret void 635} 636 637define void @test51(i16* %ptr, i16 %cmp, i16 %val) { 638; PPC64LE-LABEL: test51: 639; PPC64LE: # %bb.0: 640; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 641; PPC64LE-NEXT: .LBB51_1: 642; PPC64LE-NEXT: lharx 6, 0, 3 643; PPC64LE-NEXT: cmpw 4, 6 644; PPC64LE-NEXT: bne 0, .LBB51_4 645; PPC64LE-NEXT: # %bb.2: 646; PPC64LE-NEXT: sthcx. 5, 0, 3 647; PPC64LE-NEXT: bne 0, .LBB51_1 648; PPC64LE-NEXT: # %bb.3: 649; PPC64LE-NEXT: lwsync 650; PPC64LE-NEXT: blr 651; PPC64LE-NEXT: .LBB51_4: 652; PPC64LE-NEXT: sthcx. 6, 0, 3 653; PPC64LE-NEXT: lwsync 654; PPC64LE-NEXT: blr 655 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire monotonic 656 ret void 657} 658 659define void @test52(i16* %ptr, i16 %cmp, i16 %val) { 660; PPC64LE-LABEL: test52: 661; PPC64LE: # %bb.0: 662; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 663; PPC64LE-NEXT: .LBB52_1: 664; PPC64LE-NEXT: lharx 6, 0, 3 665; PPC64LE-NEXT: cmpw 4, 6 666; PPC64LE-NEXT: bne 0, .LBB52_4 667; PPC64LE-NEXT: # %bb.2: 668; PPC64LE-NEXT: sthcx. 5, 0, 3 669; PPC64LE-NEXT: bne 0, .LBB52_1 670; PPC64LE-NEXT: # %bb.3: 671; PPC64LE-NEXT: lwsync 672; PPC64LE-NEXT: blr 673; PPC64LE-NEXT: .LBB52_4: 674; PPC64LE-NEXT: sthcx. 6, 0, 3 675; PPC64LE-NEXT: lwsync 676; PPC64LE-NEXT: blr 677 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire acquire 678 ret void 679} 680 681define void @test53(i16* %ptr, i16 %cmp, i16 %val) { 682; PPC64LE-LABEL: test53: 683; PPC64LE: # %bb.0: 684; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 685; PPC64LE-NEXT: lwsync 686; PPC64LE-NEXT: .LBB53_1: 687; PPC64LE-NEXT: lharx 6, 0, 3 688; PPC64LE-NEXT: cmpw 4, 6 689; PPC64LE-NEXT: bne 0, .LBB53_3 690; PPC64LE-NEXT: # %bb.2: 691; PPC64LE-NEXT: sthcx. 5, 0, 3 692; PPC64LE-NEXT: beqlr 0 693; PPC64LE-NEXT: b .LBB53_1 694; PPC64LE-NEXT: .LBB53_3: 695; PPC64LE-NEXT: sthcx. 6, 0, 3 696; PPC64LE-NEXT: blr 697 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release monotonic 698 ret void 699} 700 701define void @test54(i16* %ptr, i16 %cmp, i16 %val) { 702; PPC64LE-LABEL: test54: 703; PPC64LE: # %bb.0: 704; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 705; PPC64LE-NEXT: lwsync 706; PPC64LE-NEXT: .LBB54_1: 707; PPC64LE-NEXT: lharx 6, 0, 3 708; PPC64LE-NEXT: cmpw 4, 6 709; PPC64LE-NEXT: bne 0, .LBB54_3 710; PPC64LE-NEXT: # %bb.2: 711; PPC64LE-NEXT: sthcx. 5, 0, 3 712; PPC64LE-NEXT: beqlr 0 713; PPC64LE-NEXT: b .LBB54_1 714; PPC64LE-NEXT: .LBB54_3: 715; PPC64LE-NEXT: sthcx. 6, 0, 3 716; PPC64LE-NEXT: blr 717 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release acquire 718 ret void 719} 720 721define void @test55(i16* %ptr, i16 %cmp, i16 %val) { 722; PPC64LE-LABEL: test55: 723; PPC64LE: # %bb.0: 724; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 725; PPC64LE-NEXT: lwsync 726; PPC64LE-NEXT: .LBB55_1: 727; PPC64LE-NEXT: lharx 6, 0, 3 728; PPC64LE-NEXT: cmpw 4, 6 729; PPC64LE-NEXT: bne 0, .LBB55_4 730; PPC64LE-NEXT: # %bb.2: 731; PPC64LE-NEXT: sthcx. 5, 0, 3 732; PPC64LE-NEXT: bne 0, .LBB55_1 733; PPC64LE-NEXT: # %bb.3: 734; PPC64LE-NEXT: lwsync 735; PPC64LE-NEXT: blr 736; PPC64LE-NEXT: .LBB55_4: 737; PPC64LE-NEXT: sthcx. 6, 0, 3 738; PPC64LE-NEXT: lwsync 739; PPC64LE-NEXT: blr 740 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel monotonic 741 ret void 742} 743 744define void @test56(i16* %ptr, i16 %cmp, i16 %val) { 745; PPC64LE-LABEL: test56: 746; PPC64LE: # %bb.0: 747; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 748; PPC64LE-NEXT: lwsync 749; PPC64LE-NEXT: .LBB56_1: 750; PPC64LE-NEXT: lharx 6, 0, 3 751; PPC64LE-NEXT: cmpw 4, 6 752; PPC64LE-NEXT: bne 0, .LBB56_4 753; PPC64LE-NEXT: # %bb.2: 754; PPC64LE-NEXT: sthcx. 5, 0, 3 755; PPC64LE-NEXT: bne 0, .LBB56_1 756; PPC64LE-NEXT: # %bb.3: 757; PPC64LE-NEXT: lwsync 758; PPC64LE-NEXT: blr 759; PPC64LE-NEXT: .LBB56_4: 760; PPC64LE-NEXT: sthcx. 6, 0, 3 761; PPC64LE-NEXT: lwsync 762; PPC64LE-NEXT: blr 763 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel acquire 764 ret void 765} 766 767define void @test57(i16* %ptr, i16 %cmp, i16 %val) { 768; PPC64LE-LABEL: test57: 769; PPC64LE: # %bb.0: 770; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 771; PPC64LE-NEXT: sync 772; PPC64LE-NEXT: .LBB57_1: 773; PPC64LE-NEXT: lharx 6, 0, 3 774; PPC64LE-NEXT: cmpw 4, 6 775; PPC64LE-NEXT: bne 0, .LBB57_4 776; PPC64LE-NEXT: # %bb.2: 777; PPC64LE-NEXT: sthcx. 5, 0, 3 778; PPC64LE-NEXT: bne 0, .LBB57_1 779; PPC64LE-NEXT: # %bb.3: 780; PPC64LE-NEXT: lwsync 781; PPC64LE-NEXT: blr 782; PPC64LE-NEXT: .LBB57_4: 783; PPC64LE-NEXT: sthcx. 6, 0, 3 784; PPC64LE-NEXT: lwsync 785; PPC64LE-NEXT: blr 786 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst monotonic 787 ret void 788} 789 790define void @test58(i16* %ptr, i16 %cmp, i16 %val) { 791; PPC64LE-LABEL: test58: 792; PPC64LE: # %bb.0: 793; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 794; PPC64LE-NEXT: sync 795; PPC64LE-NEXT: .LBB58_1: 796; PPC64LE-NEXT: lharx 6, 0, 3 797; PPC64LE-NEXT: cmpw 4, 6 798; PPC64LE-NEXT: bne 0, .LBB58_4 799; PPC64LE-NEXT: # %bb.2: 800; PPC64LE-NEXT: sthcx. 5, 0, 3 801; PPC64LE-NEXT: bne 0, .LBB58_1 802; PPC64LE-NEXT: # %bb.3: 803; PPC64LE-NEXT: lwsync 804; PPC64LE-NEXT: blr 805; PPC64LE-NEXT: .LBB58_4: 806; PPC64LE-NEXT: sthcx. 6, 0, 3 807; PPC64LE-NEXT: lwsync 808; PPC64LE-NEXT: blr 809 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst acquire 810 ret void 811} 812 813define void @test59(i16* %ptr, i16 %cmp, i16 %val) { 814; PPC64LE-LABEL: test59: 815; PPC64LE: # %bb.0: 816; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 817; PPC64LE-NEXT: sync 818; PPC64LE-NEXT: .LBB59_1: 819; PPC64LE-NEXT: lharx 6, 0, 3 820; PPC64LE-NEXT: cmpw 4, 6 821; PPC64LE-NEXT: bne 0, .LBB59_4 822; PPC64LE-NEXT: # %bb.2: 823; PPC64LE-NEXT: sthcx. 5, 0, 3 824; PPC64LE-NEXT: bne 0, .LBB59_1 825; PPC64LE-NEXT: # %bb.3: 826; PPC64LE-NEXT: lwsync 827; PPC64LE-NEXT: blr 828; PPC64LE-NEXT: .LBB59_4: 829; PPC64LE-NEXT: sthcx. 6, 0, 3 830; PPC64LE-NEXT: lwsync 831; PPC64LE-NEXT: blr 832 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst seq_cst 833 ret void 834} 835 836define void @test60(i32* %ptr, i32 %cmp, i32 %val) { 837; PPC64LE-LABEL: test60: 838; PPC64LE: # %bb.0: 839; PPC64LE-NEXT: .LBB60_1: 840; PPC64LE-NEXT: lwarx 6, 0, 3 841; PPC64LE-NEXT: cmpw 4, 6 842; PPC64LE-NEXT: bne 0, .LBB60_3 843; PPC64LE-NEXT: # %bb.2: 844; PPC64LE-NEXT: stwcx. 5, 0, 3 845; PPC64LE-NEXT: beqlr 0 846; PPC64LE-NEXT: b .LBB60_1 847; PPC64LE-NEXT: .LBB60_3: 848; PPC64LE-NEXT: stwcx. 6, 0, 3 849; PPC64LE-NEXT: blr 850 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val monotonic monotonic 851 ret void 852} 853 854define void @test61(i32* %ptr, i32 %cmp, i32 %val) { 855; PPC64LE-LABEL: test61: 856; PPC64LE: # %bb.0: 857; PPC64LE-NEXT: .LBB61_1: 858; PPC64LE-NEXT: lwarx 6, 0, 3 859; PPC64LE-NEXT: cmpw 4, 6 860; PPC64LE-NEXT: bne 0, .LBB61_4 861; PPC64LE-NEXT: # %bb.2: 862; PPC64LE-NEXT: stwcx. 5, 0, 3 863; PPC64LE-NEXT: bne 0, .LBB61_1 864; PPC64LE-NEXT: # %bb.3: 865; PPC64LE-NEXT: lwsync 866; PPC64LE-NEXT: blr 867; PPC64LE-NEXT: .LBB61_4: 868; PPC64LE-NEXT: stwcx. 6, 0, 3 869; PPC64LE-NEXT: lwsync 870; PPC64LE-NEXT: blr 871 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire monotonic 872 ret void 873} 874 875define void @test62(i32* %ptr, i32 %cmp, i32 %val) { 876; PPC64LE-LABEL: test62: 877; PPC64LE: # %bb.0: 878; PPC64LE-NEXT: .LBB62_1: 879; PPC64LE-NEXT: lwarx 6, 0, 3 880; PPC64LE-NEXT: cmpw 4, 6 881; PPC64LE-NEXT: bne 0, .LBB62_4 882; PPC64LE-NEXT: # %bb.2: 883; PPC64LE-NEXT: stwcx. 5, 0, 3 884; PPC64LE-NEXT: bne 0, .LBB62_1 885; PPC64LE-NEXT: # %bb.3: 886; PPC64LE-NEXT: lwsync 887; PPC64LE-NEXT: blr 888; PPC64LE-NEXT: .LBB62_4: 889; PPC64LE-NEXT: stwcx. 6, 0, 3 890; PPC64LE-NEXT: lwsync 891; PPC64LE-NEXT: blr 892 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire acquire 893 ret void 894} 895 896define void @test63(i32* %ptr, i32 %cmp, i32 %val) { 897; PPC64LE-LABEL: test63: 898; PPC64LE: # %bb.0: 899; PPC64LE-NEXT: lwsync 900; PPC64LE-NEXT: .LBB63_1: 901; PPC64LE-NEXT: lwarx 6, 0, 3 902; PPC64LE-NEXT: cmpw 4, 6 903; PPC64LE-NEXT: bne 0, .LBB63_3 904; PPC64LE-NEXT: # %bb.2: 905; PPC64LE-NEXT: stwcx. 5, 0, 3 906; PPC64LE-NEXT: beqlr 0 907; PPC64LE-NEXT: b .LBB63_1 908; PPC64LE-NEXT: .LBB63_3: 909; PPC64LE-NEXT: stwcx. 6, 0, 3 910; PPC64LE-NEXT: blr 911 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release monotonic 912 ret void 913} 914 915define void @test64(i32* %ptr, i32 %cmp, i32 %val) { 916; PPC64LE-LABEL: test64: 917; PPC64LE: # %bb.0: 918; PPC64LE-NEXT: lwsync 919; PPC64LE-NEXT: .LBB64_1: 920; PPC64LE-NEXT: lwarx 6, 0, 3 921; PPC64LE-NEXT: cmpw 4, 6 922; PPC64LE-NEXT: bne 0, .LBB64_3 923; PPC64LE-NEXT: # %bb.2: 924; PPC64LE-NEXT: stwcx. 5, 0, 3 925; PPC64LE-NEXT: beqlr 0 926; PPC64LE-NEXT: b .LBB64_1 927; PPC64LE-NEXT: .LBB64_3: 928; PPC64LE-NEXT: stwcx. 6, 0, 3 929; PPC64LE-NEXT: blr 930 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release acquire 931 ret void 932} 933 934define void @test65(i32* %ptr, i32 %cmp, i32 %val) { 935; PPC64LE-LABEL: test65: 936; PPC64LE: # %bb.0: 937; PPC64LE-NEXT: lwsync 938; PPC64LE-NEXT: .LBB65_1: 939; PPC64LE-NEXT: lwarx 6, 0, 3 940; PPC64LE-NEXT: cmpw 4, 6 941; PPC64LE-NEXT: bne 0, .LBB65_4 942; PPC64LE-NEXT: # %bb.2: 943; PPC64LE-NEXT: stwcx. 5, 0, 3 944; PPC64LE-NEXT: bne 0, .LBB65_1 945; PPC64LE-NEXT: # %bb.3: 946; PPC64LE-NEXT: lwsync 947; PPC64LE-NEXT: blr 948; PPC64LE-NEXT: .LBB65_4: 949; PPC64LE-NEXT: stwcx. 6, 0, 3 950; PPC64LE-NEXT: lwsync 951; PPC64LE-NEXT: blr 952 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel monotonic 953 ret void 954} 955 956define void @test66(i32* %ptr, i32 %cmp, i32 %val) { 957; PPC64LE-LABEL: test66: 958; PPC64LE: # %bb.0: 959; PPC64LE-NEXT: lwsync 960; PPC64LE-NEXT: .LBB66_1: 961; PPC64LE-NEXT: lwarx 6, 0, 3 962; PPC64LE-NEXT: cmpw 4, 6 963; PPC64LE-NEXT: bne 0, .LBB66_4 964; PPC64LE-NEXT: # %bb.2: 965; PPC64LE-NEXT: stwcx. 5, 0, 3 966; PPC64LE-NEXT: bne 0, .LBB66_1 967; PPC64LE-NEXT: # %bb.3: 968; PPC64LE-NEXT: lwsync 969; PPC64LE-NEXT: blr 970; PPC64LE-NEXT: .LBB66_4: 971; PPC64LE-NEXT: stwcx. 6, 0, 3 972; PPC64LE-NEXT: lwsync 973; PPC64LE-NEXT: blr 974 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel acquire 975 ret void 976} 977 978define void @test67(i32* %ptr, i32 %cmp, i32 %val) { 979; PPC64LE-LABEL: test67: 980; PPC64LE: # %bb.0: 981; PPC64LE-NEXT: sync 982; PPC64LE-NEXT: .LBB67_1: 983; PPC64LE-NEXT: lwarx 6, 0, 3 984; PPC64LE-NEXT: cmpw 4, 6 985; PPC64LE-NEXT: bne 0, .LBB67_4 986; PPC64LE-NEXT: # %bb.2: 987; PPC64LE-NEXT: stwcx. 5, 0, 3 988; PPC64LE-NEXT: bne 0, .LBB67_1 989; PPC64LE-NEXT: # %bb.3: 990; PPC64LE-NEXT: lwsync 991; PPC64LE-NEXT: blr 992; PPC64LE-NEXT: .LBB67_4: 993; PPC64LE-NEXT: stwcx. 6, 0, 3 994; PPC64LE-NEXT: lwsync 995; PPC64LE-NEXT: blr 996 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst monotonic 997 ret void 998} 999 1000define void @test68(i32* %ptr, i32 %cmp, i32 %val) { 1001; PPC64LE-LABEL: test68: 1002; PPC64LE: # %bb.0: 1003; PPC64LE-NEXT: sync 1004; PPC64LE-NEXT: .LBB68_1: 1005; PPC64LE-NEXT: lwarx 6, 0, 3 1006; PPC64LE-NEXT: cmpw 4, 6 1007; PPC64LE-NEXT: bne 0, .LBB68_4 1008; PPC64LE-NEXT: # %bb.2: 1009; PPC64LE-NEXT: stwcx. 5, 0, 3 1010; PPC64LE-NEXT: bne 0, .LBB68_1 1011; PPC64LE-NEXT: # %bb.3: 1012; PPC64LE-NEXT: lwsync 1013; PPC64LE-NEXT: blr 1014; PPC64LE-NEXT: .LBB68_4: 1015; PPC64LE-NEXT: stwcx. 6, 0, 3 1016; PPC64LE-NEXT: lwsync 1017; PPC64LE-NEXT: blr 1018 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst acquire 1019 ret void 1020} 1021 1022define void @test69(i32* %ptr, i32 %cmp, i32 %val) { 1023; PPC64LE-LABEL: test69: 1024; PPC64LE: # %bb.0: 1025; PPC64LE-NEXT: sync 1026; PPC64LE-NEXT: .LBB69_1: 1027; PPC64LE-NEXT: lwarx 6, 0, 3 1028; PPC64LE-NEXT: cmpw 4, 6 1029; PPC64LE-NEXT: bne 0, .LBB69_4 1030; PPC64LE-NEXT: # %bb.2: 1031; PPC64LE-NEXT: stwcx. 5, 0, 3 1032; PPC64LE-NEXT: bne 0, .LBB69_1 1033; PPC64LE-NEXT: # %bb.3: 1034; PPC64LE-NEXT: lwsync 1035; PPC64LE-NEXT: blr 1036; PPC64LE-NEXT: .LBB69_4: 1037; PPC64LE-NEXT: stwcx. 6, 0, 3 1038; PPC64LE-NEXT: lwsync 1039; PPC64LE-NEXT: blr 1040 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst seq_cst 1041 ret void 1042} 1043 1044define void @test70(i64* %ptr, i64 %cmp, i64 %val) { 1045; PPC64LE-LABEL: test70: 1046; PPC64LE: # %bb.0: 1047; PPC64LE-NEXT: .LBB70_1: 1048; PPC64LE-NEXT: ldarx 6, 0, 3 1049; PPC64LE-NEXT: cmpd 4, 6 1050; PPC64LE-NEXT: bne 0, .LBB70_3 1051; PPC64LE-NEXT: # %bb.2: 1052; PPC64LE-NEXT: stdcx. 5, 0, 3 1053; PPC64LE-NEXT: beqlr 0 1054; PPC64LE-NEXT: b .LBB70_1 1055; PPC64LE-NEXT: .LBB70_3: 1056; PPC64LE-NEXT: stdcx. 6, 0, 3 1057; PPC64LE-NEXT: blr 1058 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val monotonic monotonic 1059 ret void 1060} 1061 1062define void @test71(i64* %ptr, i64 %cmp, i64 %val) { 1063; PPC64LE-LABEL: test71: 1064; PPC64LE: # %bb.0: 1065; PPC64LE-NEXT: .LBB71_1: 1066; PPC64LE-NEXT: ldarx 6, 0, 3 1067; PPC64LE-NEXT: cmpd 4, 6 1068; PPC64LE-NEXT: bne 0, .LBB71_4 1069; PPC64LE-NEXT: # %bb.2: 1070; PPC64LE-NEXT: stdcx. 5, 0, 3 1071; PPC64LE-NEXT: bne 0, .LBB71_1 1072; PPC64LE-NEXT: # %bb.3: 1073; PPC64LE-NEXT: lwsync 1074; PPC64LE-NEXT: blr 1075; PPC64LE-NEXT: .LBB71_4: 1076; PPC64LE-NEXT: stdcx. 6, 0, 3 1077; PPC64LE-NEXT: lwsync 1078; PPC64LE-NEXT: blr 1079 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire monotonic 1080 ret void 1081} 1082 1083define void @test72(i64* %ptr, i64 %cmp, i64 %val) { 1084; PPC64LE-LABEL: test72: 1085; PPC64LE: # %bb.0: 1086; PPC64LE-NEXT: .LBB72_1: 1087; PPC64LE-NEXT: ldarx 6, 0, 3 1088; PPC64LE-NEXT: cmpd 4, 6 1089; PPC64LE-NEXT: bne 0, .LBB72_4 1090; PPC64LE-NEXT: # %bb.2: 1091; PPC64LE-NEXT: stdcx. 5, 0, 3 1092; PPC64LE-NEXT: bne 0, .LBB72_1 1093; PPC64LE-NEXT: # %bb.3: 1094; PPC64LE-NEXT: lwsync 1095; PPC64LE-NEXT: blr 1096; PPC64LE-NEXT: .LBB72_4: 1097; PPC64LE-NEXT: stdcx. 6, 0, 3 1098; PPC64LE-NEXT: lwsync 1099; PPC64LE-NEXT: blr 1100 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire acquire 1101 ret void 1102} 1103 1104define void @test73(i64* %ptr, i64 %cmp, i64 %val) { 1105; PPC64LE-LABEL: test73: 1106; PPC64LE: # %bb.0: 1107; PPC64LE-NEXT: lwsync 1108; PPC64LE-NEXT: .LBB73_1: 1109; PPC64LE-NEXT: ldarx 6, 0, 3 1110; PPC64LE-NEXT: cmpd 4, 6 1111; PPC64LE-NEXT: bne 0, .LBB73_3 1112; PPC64LE-NEXT: # %bb.2: 1113; PPC64LE-NEXT: stdcx. 5, 0, 3 1114; PPC64LE-NEXT: beqlr 0 1115; PPC64LE-NEXT: b .LBB73_1 1116; PPC64LE-NEXT: .LBB73_3: 1117; PPC64LE-NEXT: stdcx. 6, 0, 3 1118; PPC64LE-NEXT: blr 1119 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release monotonic 1120 ret void 1121} 1122 1123define void @test74(i64* %ptr, i64 %cmp, i64 %val) { 1124; PPC64LE-LABEL: test74: 1125; PPC64LE: # %bb.0: 1126; PPC64LE-NEXT: lwsync 1127; PPC64LE-NEXT: .LBB74_1: 1128; PPC64LE-NEXT: ldarx 6, 0, 3 1129; PPC64LE-NEXT: cmpd 4, 6 1130; PPC64LE-NEXT: bne 0, .LBB74_3 1131; PPC64LE-NEXT: # %bb.2: 1132; PPC64LE-NEXT: stdcx. 5, 0, 3 1133; PPC64LE-NEXT: beqlr 0 1134; PPC64LE-NEXT: b .LBB74_1 1135; PPC64LE-NEXT: .LBB74_3: 1136; PPC64LE-NEXT: stdcx. 6, 0, 3 1137; PPC64LE-NEXT: blr 1138 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release acquire 1139 ret void 1140} 1141 1142define void @test75(i64* %ptr, i64 %cmp, i64 %val) { 1143; PPC64LE-LABEL: test75: 1144; PPC64LE: # %bb.0: 1145; PPC64LE-NEXT: lwsync 1146; PPC64LE-NEXT: .LBB75_1: 1147; PPC64LE-NEXT: ldarx 6, 0, 3 1148; PPC64LE-NEXT: cmpd 4, 6 1149; PPC64LE-NEXT: bne 0, .LBB75_4 1150; PPC64LE-NEXT: # %bb.2: 1151; PPC64LE-NEXT: stdcx. 5, 0, 3 1152; PPC64LE-NEXT: bne 0, .LBB75_1 1153; PPC64LE-NEXT: # %bb.3: 1154; PPC64LE-NEXT: lwsync 1155; PPC64LE-NEXT: blr 1156; PPC64LE-NEXT: .LBB75_4: 1157; PPC64LE-NEXT: stdcx. 6, 0, 3 1158; PPC64LE-NEXT: lwsync 1159; PPC64LE-NEXT: blr 1160 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel monotonic 1161 ret void 1162} 1163 1164define void @test76(i64* %ptr, i64 %cmp, i64 %val) { 1165; PPC64LE-LABEL: test76: 1166; PPC64LE: # %bb.0: 1167; PPC64LE-NEXT: lwsync 1168; PPC64LE-NEXT: .LBB76_1: 1169; PPC64LE-NEXT: ldarx 6, 0, 3 1170; PPC64LE-NEXT: cmpd 4, 6 1171; PPC64LE-NEXT: bne 0, .LBB76_4 1172; PPC64LE-NEXT: # %bb.2: 1173; PPC64LE-NEXT: stdcx. 5, 0, 3 1174; PPC64LE-NEXT: bne 0, .LBB76_1 1175; PPC64LE-NEXT: # %bb.3: 1176; PPC64LE-NEXT: lwsync 1177; PPC64LE-NEXT: blr 1178; PPC64LE-NEXT: .LBB76_4: 1179; PPC64LE-NEXT: stdcx. 6, 0, 3 1180; PPC64LE-NEXT: lwsync 1181; PPC64LE-NEXT: blr 1182 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel acquire 1183 ret void 1184} 1185 1186define void @test77(i64* %ptr, i64 %cmp, i64 %val) { 1187; PPC64LE-LABEL: test77: 1188; PPC64LE: # %bb.0: 1189; PPC64LE-NEXT: sync 1190; PPC64LE-NEXT: .LBB77_1: 1191; PPC64LE-NEXT: ldarx 6, 0, 3 1192; PPC64LE-NEXT: cmpd 4, 6 1193; PPC64LE-NEXT: bne 0, .LBB77_4 1194; PPC64LE-NEXT: # %bb.2: 1195; PPC64LE-NEXT: stdcx. 5, 0, 3 1196; PPC64LE-NEXT: bne 0, .LBB77_1 1197; PPC64LE-NEXT: # %bb.3: 1198; PPC64LE-NEXT: lwsync 1199; PPC64LE-NEXT: blr 1200; PPC64LE-NEXT: .LBB77_4: 1201; PPC64LE-NEXT: stdcx. 6, 0, 3 1202; PPC64LE-NEXT: lwsync 1203; PPC64LE-NEXT: blr 1204 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst monotonic 1205 ret void 1206} 1207 1208define void @test78(i64* %ptr, i64 %cmp, i64 %val) { 1209; PPC64LE-LABEL: test78: 1210; PPC64LE: # %bb.0: 1211; PPC64LE-NEXT: sync 1212; PPC64LE-NEXT: .LBB78_1: 1213; PPC64LE-NEXT: ldarx 6, 0, 3 1214; PPC64LE-NEXT: cmpd 4, 6 1215; PPC64LE-NEXT: bne 0, .LBB78_4 1216; PPC64LE-NEXT: # %bb.2: 1217; PPC64LE-NEXT: stdcx. 5, 0, 3 1218; PPC64LE-NEXT: bne 0, .LBB78_1 1219; PPC64LE-NEXT: # %bb.3: 1220; PPC64LE-NEXT: lwsync 1221; PPC64LE-NEXT: blr 1222; PPC64LE-NEXT: .LBB78_4: 1223; PPC64LE-NEXT: stdcx. 6, 0, 3 1224; PPC64LE-NEXT: lwsync 1225; PPC64LE-NEXT: blr 1226 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst acquire 1227 ret void 1228} 1229 1230define void @test79(i64* %ptr, i64 %cmp, i64 %val) { 1231; PPC64LE-LABEL: test79: 1232; PPC64LE: # %bb.0: 1233; PPC64LE-NEXT: sync 1234; PPC64LE-NEXT: .LBB79_1: 1235; PPC64LE-NEXT: ldarx 6, 0, 3 1236; PPC64LE-NEXT: cmpd 4, 6 1237; PPC64LE-NEXT: bne 0, .LBB79_4 1238; PPC64LE-NEXT: # %bb.2: 1239; PPC64LE-NEXT: stdcx. 5, 0, 3 1240; PPC64LE-NEXT: bne 0, .LBB79_1 1241; PPC64LE-NEXT: # %bb.3: 1242; PPC64LE-NEXT: lwsync 1243; PPC64LE-NEXT: blr 1244; PPC64LE-NEXT: .LBB79_4: 1245; PPC64LE-NEXT: stdcx. 6, 0, 3 1246; PPC64LE-NEXT: lwsync 1247; PPC64LE-NEXT: blr 1248 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst seq_cst 1249 ret void 1250} 1251 1252define void @test80(i8* %ptr, i8 %cmp, i8 %val) { 1253; PPC64LE-LABEL: test80: 1254; PPC64LE: # %bb.0: 1255; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1256; PPC64LE-NEXT: .LBB80_1: 1257; PPC64LE-NEXT: lbarx 6, 0, 3 1258; PPC64LE-NEXT: cmpw 4, 6 1259; PPC64LE-NEXT: bne 0, .LBB80_3 1260; PPC64LE-NEXT: # %bb.2: 1261; PPC64LE-NEXT: stbcx. 5, 0, 3 1262; PPC64LE-NEXT: beqlr 0 1263; PPC64LE-NEXT: b .LBB80_1 1264; PPC64LE-NEXT: .LBB80_3: 1265; PPC64LE-NEXT: stbcx. 6, 0, 3 1266; PPC64LE-NEXT: blr 1267 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") monotonic monotonic 1268 ret void 1269} 1270 1271define void @test81(i8* %ptr, i8 %cmp, i8 %val) { 1272; PPC64LE-LABEL: test81: 1273; PPC64LE: # %bb.0: 1274; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1275; PPC64LE-NEXT: .LBB81_1: 1276; PPC64LE-NEXT: lbarx 6, 0, 3 1277; PPC64LE-NEXT: cmpw 4, 6 1278; PPC64LE-NEXT: bne 0, .LBB81_4 1279; PPC64LE-NEXT: # %bb.2: 1280; PPC64LE-NEXT: stbcx. 5, 0, 3 1281; PPC64LE-NEXT: bne 0, .LBB81_1 1282; PPC64LE-NEXT: # %bb.3: 1283; PPC64LE-NEXT: lwsync 1284; PPC64LE-NEXT: blr 1285; PPC64LE-NEXT: .LBB81_4: 1286; PPC64LE-NEXT: stbcx. 6, 0, 3 1287; PPC64LE-NEXT: lwsync 1288; PPC64LE-NEXT: blr 1289 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire monotonic 1290 ret void 1291} 1292 1293define void @test82(i8* %ptr, i8 %cmp, i8 %val) { 1294; PPC64LE-LABEL: test82: 1295; PPC64LE: # %bb.0: 1296; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1297; PPC64LE-NEXT: .LBB82_1: 1298; PPC64LE-NEXT: lbarx 6, 0, 3 1299; PPC64LE-NEXT: cmpw 4, 6 1300; PPC64LE-NEXT: bne 0, .LBB82_4 1301; PPC64LE-NEXT: # %bb.2: 1302; PPC64LE-NEXT: stbcx. 5, 0, 3 1303; PPC64LE-NEXT: bne 0, .LBB82_1 1304; PPC64LE-NEXT: # %bb.3: 1305; PPC64LE-NEXT: lwsync 1306; PPC64LE-NEXT: blr 1307; PPC64LE-NEXT: .LBB82_4: 1308; PPC64LE-NEXT: stbcx. 6, 0, 3 1309; PPC64LE-NEXT: lwsync 1310; PPC64LE-NEXT: blr 1311 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire acquire 1312 ret void 1313} 1314 1315define void @test83(i8* %ptr, i8 %cmp, i8 %val) { 1316; PPC64LE-LABEL: test83: 1317; PPC64LE: # %bb.0: 1318; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1319; PPC64LE-NEXT: lwsync 1320; PPC64LE-NEXT: .LBB83_1: 1321; PPC64LE-NEXT: lbarx 6, 0, 3 1322; PPC64LE-NEXT: cmpw 4, 6 1323; PPC64LE-NEXT: bne 0, .LBB83_3 1324; PPC64LE-NEXT: # %bb.2: 1325; PPC64LE-NEXT: stbcx. 5, 0, 3 1326; PPC64LE-NEXT: beqlr 0 1327; PPC64LE-NEXT: b .LBB83_1 1328; PPC64LE-NEXT: .LBB83_3: 1329; PPC64LE-NEXT: stbcx. 6, 0, 3 1330; PPC64LE-NEXT: blr 1331 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") release monotonic 1332 ret void 1333} 1334 1335define void @test84(i8* %ptr, i8 %cmp, i8 %val) { 1336; PPC64LE-LABEL: test84: 1337; PPC64LE: # %bb.0: 1338; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1339; PPC64LE-NEXT: lwsync 1340; PPC64LE-NEXT: .LBB84_1: 1341; PPC64LE-NEXT: lbarx 6, 0, 3 1342; PPC64LE-NEXT: cmpw 4, 6 1343; PPC64LE-NEXT: bne 0, .LBB84_3 1344; PPC64LE-NEXT: # %bb.2: 1345; PPC64LE-NEXT: stbcx. 5, 0, 3 1346; PPC64LE-NEXT: beqlr 0 1347; PPC64LE-NEXT: b .LBB84_1 1348; PPC64LE-NEXT: .LBB84_3: 1349; PPC64LE-NEXT: stbcx. 6, 0, 3 1350; PPC64LE-NEXT: blr 1351 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") release acquire 1352 ret void 1353} 1354 1355define void @test85(i8* %ptr, i8 %cmp, i8 %val) { 1356; PPC64LE-LABEL: test85: 1357; PPC64LE: # %bb.0: 1358; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1359; PPC64LE-NEXT: lwsync 1360; PPC64LE-NEXT: .LBB85_1: 1361; PPC64LE-NEXT: lbarx 6, 0, 3 1362; PPC64LE-NEXT: cmpw 4, 6 1363; PPC64LE-NEXT: bne 0, .LBB85_4 1364; PPC64LE-NEXT: # %bb.2: 1365; PPC64LE-NEXT: stbcx. 5, 0, 3 1366; PPC64LE-NEXT: bne 0, .LBB85_1 1367; PPC64LE-NEXT: # %bb.3: 1368; PPC64LE-NEXT: lwsync 1369; PPC64LE-NEXT: blr 1370; PPC64LE-NEXT: .LBB85_4: 1371; PPC64LE-NEXT: stbcx. 6, 0, 3 1372; PPC64LE-NEXT: lwsync 1373; PPC64LE-NEXT: blr 1374 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel monotonic 1375 ret void 1376} 1377 1378define void @test86(i8* %ptr, i8 %cmp, i8 %val) { 1379; PPC64LE-LABEL: test86: 1380; PPC64LE: # %bb.0: 1381; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1382; PPC64LE-NEXT: lwsync 1383; PPC64LE-NEXT: .LBB86_1: 1384; PPC64LE-NEXT: lbarx 6, 0, 3 1385; PPC64LE-NEXT: cmpw 4, 6 1386; PPC64LE-NEXT: bne 0, .LBB86_4 1387; PPC64LE-NEXT: # %bb.2: 1388; PPC64LE-NEXT: stbcx. 5, 0, 3 1389; PPC64LE-NEXT: bne 0, .LBB86_1 1390; PPC64LE-NEXT: # %bb.3: 1391; PPC64LE-NEXT: lwsync 1392; PPC64LE-NEXT: blr 1393; PPC64LE-NEXT: .LBB86_4: 1394; PPC64LE-NEXT: stbcx. 6, 0, 3 1395; PPC64LE-NEXT: lwsync 1396; PPC64LE-NEXT: blr 1397 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel acquire 1398 ret void 1399} 1400 1401define void @test87(i8* %ptr, i8 %cmp, i8 %val) { 1402; PPC64LE-LABEL: test87: 1403; PPC64LE: # %bb.0: 1404; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1405; PPC64LE-NEXT: sync 1406; PPC64LE-NEXT: .LBB87_1: 1407; PPC64LE-NEXT: lbarx 6, 0, 3 1408; PPC64LE-NEXT: cmpw 4, 6 1409; PPC64LE-NEXT: bne 0, .LBB87_4 1410; PPC64LE-NEXT: # %bb.2: 1411; PPC64LE-NEXT: stbcx. 5, 0, 3 1412; PPC64LE-NEXT: bne 0, .LBB87_1 1413; PPC64LE-NEXT: # %bb.3: 1414; PPC64LE-NEXT: lwsync 1415; PPC64LE-NEXT: blr 1416; PPC64LE-NEXT: .LBB87_4: 1417; PPC64LE-NEXT: stbcx. 6, 0, 3 1418; PPC64LE-NEXT: lwsync 1419; PPC64LE-NEXT: blr 1420 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst monotonic 1421 ret void 1422} 1423 1424define void @test88(i8* %ptr, i8 %cmp, i8 %val) { 1425; PPC64LE-LABEL: test88: 1426; PPC64LE: # %bb.0: 1427; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1428; PPC64LE-NEXT: sync 1429; PPC64LE-NEXT: .LBB88_1: 1430; PPC64LE-NEXT: lbarx 6, 0, 3 1431; PPC64LE-NEXT: cmpw 4, 6 1432; PPC64LE-NEXT: bne 0, .LBB88_4 1433; PPC64LE-NEXT: # %bb.2: 1434; PPC64LE-NEXT: stbcx. 5, 0, 3 1435; PPC64LE-NEXT: bne 0, .LBB88_1 1436; PPC64LE-NEXT: # %bb.3: 1437; PPC64LE-NEXT: lwsync 1438; PPC64LE-NEXT: blr 1439; PPC64LE-NEXT: .LBB88_4: 1440; PPC64LE-NEXT: stbcx. 6, 0, 3 1441; PPC64LE-NEXT: lwsync 1442; PPC64LE-NEXT: blr 1443 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst acquire 1444 ret void 1445} 1446 1447define void @test89(i8* %ptr, i8 %cmp, i8 %val) { 1448; PPC64LE-LABEL: test89: 1449; PPC64LE: # %bb.0: 1450; PPC64LE-NEXT: rlwinm 4, 4, 0, 24, 31 1451; PPC64LE-NEXT: sync 1452; PPC64LE-NEXT: .LBB89_1: 1453; PPC64LE-NEXT: lbarx 6, 0, 3 1454; PPC64LE-NEXT: cmpw 4, 6 1455; PPC64LE-NEXT: bne 0, .LBB89_4 1456; PPC64LE-NEXT: # %bb.2: 1457; PPC64LE-NEXT: stbcx. 5, 0, 3 1458; PPC64LE-NEXT: bne 0, .LBB89_1 1459; PPC64LE-NEXT: # %bb.3: 1460; PPC64LE-NEXT: lwsync 1461; PPC64LE-NEXT: blr 1462; PPC64LE-NEXT: .LBB89_4: 1463; PPC64LE-NEXT: stbcx. 6, 0, 3 1464; PPC64LE-NEXT: lwsync 1465; PPC64LE-NEXT: blr 1466 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst seq_cst 1467 ret void 1468} 1469 1470define void @test90(i16* %ptr, i16 %cmp, i16 %val) { 1471; PPC64LE-LABEL: test90: 1472; PPC64LE: # %bb.0: 1473; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1474; PPC64LE-NEXT: .LBB90_1: 1475; PPC64LE-NEXT: lharx 6, 0, 3 1476; PPC64LE-NEXT: cmpw 4, 6 1477; PPC64LE-NEXT: bne 0, .LBB90_3 1478; PPC64LE-NEXT: # %bb.2: 1479; PPC64LE-NEXT: sthcx. 5, 0, 3 1480; PPC64LE-NEXT: beqlr 0 1481; PPC64LE-NEXT: b 1482; PPC64LE-NEXT: .LBB90_3: 1483; PPC64LE-NEXT: sthcx. 6, 0, 3 1484; PPC64LE-NEXT: blr 1485 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") monotonic monotonic 1486 ret void 1487} 1488 1489define void @test91(i16* %ptr, i16 %cmp, i16 %val) { 1490; PPC64LE-LABEL: test91: 1491; PPC64LE: # %bb.0: 1492; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1493; PPC64LE-NEXT: .LBB91_1: 1494; PPC64LE-NEXT: lharx 6, 0, 3 1495; PPC64LE-NEXT: cmpw 4, 6 1496; PPC64LE-NEXT: bne 0, .LBB91_4 1497; PPC64LE-NEXT: # %bb.2: 1498; PPC64LE-NEXT: sthcx. 5, 0, 3 1499; PPC64LE-NEXT: bne 0, .LBB91_1 1500; PPC64LE-NEXT: # %bb.3: 1501; PPC64LE-NEXT: lwsync 1502; PPC64LE-NEXT: blr 1503; PPC64LE-NEXT: .LBB91_4: 1504; PPC64LE-NEXT: sthcx. 6, 0, 3 1505; PPC64LE-NEXT: lwsync 1506; PPC64LE-NEXT: blr 1507 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire monotonic 1508 ret void 1509} 1510 1511define void @test92(i16* %ptr, i16 %cmp, i16 %val) { 1512; PPC64LE-LABEL: test92: 1513; PPC64LE: # %bb.0: 1514; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1515; PPC64LE-NEXT: .LBB92_1: 1516; PPC64LE-NEXT: lharx 6, 0, 3 1517; PPC64LE-NEXT: cmpw 4, 6 1518; PPC64LE-NEXT: bne 0, .LBB92_4 1519; PPC64LE-NEXT: # %bb.2: 1520; PPC64LE-NEXT: sthcx. 5, 0, 3 1521; PPC64LE-NEXT: bne 0, .LBB92_1 1522; PPC64LE-NEXT: # %bb.3: 1523; PPC64LE-NEXT: lwsync 1524; PPC64LE-NEXT: blr 1525; PPC64LE-NEXT: .LBB92_4: 1526; PPC64LE-NEXT: sthcx. 6, 0, 3 1527; PPC64LE-NEXT: lwsync 1528; PPC64LE-NEXT: blr 1529 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire acquire 1530 ret void 1531} 1532 1533define void @test93(i16* %ptr, i16 %cmp, i16 %val) { 1534; PPC64LE-LABEL: test93: 1535; PPC64LE: # %bb.0: 1536; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1537; PPC64LE-NEXT: lwsync 1538; PPC64LE-NEXT: .LBB93_1: 1539; PPC64LE-NEXT: lharx 6, 0, 3 1540; PPC64LE-NEXT: cmpw 4, 6 1541; PPC64LE-NEXT: bne 0, .LBB93_3 1542; PPC64LE-NEXT: # %bb.2: 1543; PPC64LE-NEXT: sthcx. 5, 0, 3 1544; PPC64LE-NEXT: beqlr 0 1545; PPC64LE-NEXT: b .LBB93_1 1546; PPC64LE-NEXT: .LBB93_3: 1547; PPC64LE-NEXT: sthcx. 6, 0, 3 1548; PPC64LE-NEXT: blr 1549 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") release monotonic 1550 ret void 1551} 1552 1553define void @test94(i16* %ptr, i16 %cmp, i16 %val) { 1554; PPC64LE-LABEL: test94: 1555; PPC64LE: # %bb.0: 1556; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1557; PPC64LE-NEXT: lwsync 1558; PPC64LE-NEXT: .LBB94_1: 1559; PPC64LE-NEXT: lharx 6, 0, 3 1560; PPC64LE-NEXT: cmpw 4, 6 1561; PPC64LE-NEXT: bne 0, .LBB94_3 1562; PPC64LE-NEXT: # %bb.2: 1563; PPC64LE-NEXT: sthcx. 5, 0, 3 1564; PPC64LE-NEXT: beqlr 0 1565; PPC64LE-NEXT: b .LBB94_1 1566; PPC64LE-NEXT: .LBB94_3: 1567; PPC64LE-NEXT: sthcx. 6, 0, 3 1568; PPC64LE-NEXT: blr 1569 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") release acquire 1570 ret void 1571} 1572 1573define void @test95(i16* %ptr, i16 %cmp, i16 %val) { 1574; PPC64LE-LABEL: test95: 1575; PPC64LE: # %bb.0: 1576; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1577; PPC64LE-NEXT: lwsync 1578; PPC64LE-NEXT: .LBB95_1: 1579; PPC64LE-NEXT: lharx 6, 0, 3 1580; PPC64LE-NEXT: cmpw 4, 6 1581; PPC64LE-NEXT: bne 0, .LBB95_4 1582; PPC64LE-NEXT: # %bb.2: 1583; PPC64LE-NEXT: sthcx. 5, 0, 3 1584; PPC64LE-NEXT: bne 0, .LBB95_1 1585; PPC64LE-NEXT: # %bb.3: 1586; PPC64LE-NEXT: lwsync 1587; PPC64LE-NEXT: blr 1588; PPC64LE-NEXT: .LBB95_4: 1589; PPC64LE-NEXT: sthcx. 6, 0, 3 1590; PPC64LE-NEXT: lwsync 1591; PPC64LE-NEXT: blr 1592 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel monotonic 1593 ret void 1594} 1595 1596define void @test96(i16* %ptr, i16 %cmp, i16 %val) { 1597; PPC64LE-LABEL: test96: 1598; PPC64LE: # %bb.0: 1599; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1600; PPC64LE-NEXT: lwsync 1601; PPC64LE-NEXT: .LBB96_1: 1602; PPC64LE-NEXT: lharx 6, 0, 3 1603; PPC64LE-NEXT: cmpw 4, 6 1604; PPC64LE-NEXT: bne 0, .LBB96_4 1605; PPC64LE-NEXT: # %bb.2: 1606; PPC64LE-NEXT: sthcx. 5, 0, 3 1607; PPC64LE-NEXT: bne 0, .LBB96_1 1608; PPC64LE-NEXT: # %bb.3: 1609; PPC64LE-NEXT: lwsync 1610; PPC64LE-NEXT: blr 1611; PPC64LE-NEXT: .LBB96_4: 1612; PPC64LE-NEXT: sthcx. 6, 0, 3 1613; PPC64LE-NEXT: lwsync 1614; PPC64LE-NEXT: blr 1615 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel acquire 1616 ret void 1617} 1618 1619define void @test97(i16* %ptr, i16 %cmp, i16 %val) { 1620; PPC64LE-LABEL: test97: 1621; PPC64LE: # %bb.0: 1622; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1623; PPC64LE-NEXT: sync 1624; PPC64LE-NEXT: .LBB97_1: 1625; PPC64LE-NEXT: lharx 6, 0, 3 1626; PPC64LE-NEXT: cmpw 4, 6 1627; PPC64LE-NEXT: bne 0, .LBB97_4 1628; PPC64LE-NEXT: # %bb.2: 1629; PPC64LE-NEXT: sthcx. 5, 0, 3 1630; PPC64LE-NEXT: bne 0, .LBB97_1 1631; PPC64LE-NEXT: # %bb.3: 1632; PPC64LE-NEXT: lwsync 1633; PPC64LE-NEXT: blr 1634; PPC64LE-NEXT: .LBB97_4: 1635; PPC64LE-NEXT: sthcx. 6, 0, 3 1636; PPC64LE-NEXT: lwsync 1637; PPC64LE-NEXT: blr 1638 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst monotonic 1639 ret void 1640} 1641 1642define void @test98(i16* %ptr, i16 %cmp, i16 %val) { 1643; PPC64LE-LABEL: test98: 1644; PPC64LE: # %bb.0: 1645; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1646; PPC64LE-NEXT: sync 1647; PPC64LE-NEXT: .LBB98_1: 1648; PPC64LE-NEXT: lharx 6, 0, 3 1649; PPC64LE-NEXT: cmpw 4, 6 1650; PPC64LE-NEXT: bne 0, .LBB98_4 1651; PPC64LE-NEXT: # %bb.2: 1652; PPC64LE-NEXT: sthcx. 5, 0, 3 1653; PPC64LE-NEXT: bne 0, .LBB98_1 1654; PPC64LE-NEXT: # %bb.3: 1655; PPC64LE-NEXT: lwsync 1656; PPC64LE-NEXT: blr 1657; PPC64LE-NEXT: .LBB98_4: 1658; PPC64LE-NEXT: sthcx. 6, 0, 3 1659; PPC64LE-NEXT: lwsync 1660; PPC64LE-NEXT: blr 1661 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst acquire 1662 ret void 1663} 1664 1665define void @test99(i16* %ptr, i16 %cmp, i16 %val) { 1666; PPC64LE-LABEL: test99: 1667; PPC64LE: # %bb.0: 1668; PPC64LE-NEXT: rlwinm 4, 4, 0, 16, 31 1669; PPC64LE-NEXT: sync 1670; PPC64LE-NEXT: .LBB99_1: 1671; PPC64LE-NEXT: lharx 6, 0, 3 1672; PPC64LE-NEXT: cmpw 4, 6 1673; PPC64LE-NEXT: bne 0, .LBB99_4 1674; PPC64LE-NEXT: # %bb.2: 1675; PPC64LE-NEXT: sthcx. 5, 0, 3 1676; PPC64LE-NEXT: bne 0, .LBB99_1 1677; PPC64LE-NEXT: # %bb.3: 1678; PPC64LE-NEXT: lwsync 1679; PPC64LE-NEXT: blr 1680; PPC64LE-NEXT: .LBB99_4: 1681; PPC64LE-NEXT: sthcx. 6, 0, 3 1682; PPC64LE-NEXT: lwsync 1683; PPC64LE-NEXT: blr 1684 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst seq_cst 1685 ret void 1686} 1687 1688define void @test100(i32* %ptr, i32 %cmp, i32 %val) { 1689; PPC64LE-LABEL: test100: 1690; PPC64LE: # %bb.0: 1691; PPC64LE-NEXT: .LBB100_1: 1692; PPC64LE-NEXT: lwarx 6, 0, 3 1693; PPC64LE-NEXT: cmpw 4, 6 1694; PPC64LE-NEXT: bne 0, .LBB100_3 1695; PPC64LE-NEXT: # %bb.2: 1696; PPC64LE-NEXT: stwcx. 5, 0, 3 1697; PPC64LE-NEXT: beqlr 0 1698; PPC64LE-NEXT: b .LBB100_1 1699; PPC64LE-NEXT: .LBB100_3: 1700; PPC64LE-NEXT: stwcx. 6, 0, 3 1701; PPC64LE-NEXT: blr 1702 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") monotonic monotonic 1703 ret void 1704} 1705 1706define void @test101(i32* %ptr, i32 %cmp, i32 %val) { 1707; PPC64LE-LABEL: test101: 1708; PPC64LE: # %bb.0: 1709; PPC64LE-NEXT: .LBB101_1: 1710; PPC64LE-NEXT: lwarx 6, 0, 3 1711; PPC64LE-NEXT: cmpw 4, 6 1712; PPC64LE-NEXT: bne 0, .LBB101_4 1713; PPC64LE-NEXT: # %bb.2: 1714; PPC64LE-NEXT: stwcx. 5, 0, 3 1715; PPC64LE-NEXT: bne 0, .LBB101_1 1716; PPC64LE-NEXT: # %bb.3: 1717; PPC64LE-NEXT: lwsync 1718; PPC64LE-NEXT: blr 1719; PPC64LE-NEXT: .LBB101_4: 1720; PPC64LE-NEXT: stwcx. 6, 0, 3 1721; PPC64LE-NEXT: lwsync 1722; PPC64LE-NEXT: blr 1723 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire monotonic 1724 ret void 1725} 1726 1727define void @test102(i32* %ptr, i32 %cmp, i32 %val) { 1728; PPC64LE-LABEL: test102: 1729; PPC64LE: # %bb.0: 1730; PPC64LE-NEXT: .LBB102_1: 1731; PPC64LE-NEXT: lwarx 6, 0, 3 1732; PPC64LE-NEXT: cmpw 4, 6 1733; PPC64LE-NEXT: bne 0, .LBB102_4 1734; PPC64LE-NEXT: # %bb.2: 1735; PPC64LE-NEXT: stwcx. 5, 0, 3 1736; PPC64LE-NEXT: bne 0, .LBB102_1 1737; PPC64LE-NEXT: # %bb.3: 1738; PPC64LE-NEXT: lwsync 1739; PPC64LE-NEXT: blr 1740; PPC64LE-NEXT: .LBB102_4: 1741; PPC64LE-NEXT: stwcx. 6, 0, 3 1742; PPC64LE-NEXT: lwsync 1743; PPC64LE-NEXT: blr 1744 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire acquire 1745 ret void 1746} 1747 1748define void @test103(i32* %ptr, i32 %cmp, i32 %val) { 1749; PPC64LE-LABEL: test103: 1750; PPC64LE: # %bb.0: 1751; PPC64LE-NEXT: lwsync 1752; PPC64LE-NEXT: .LBB103_1: 1753; PPC64LE-NEXT: lwarx 6, 0, 3 1754; PPC64LE-NEXT: cmpw 4, 6 1755; PPC64LE-NEXT: bne 0, .LBB103_3 1756; PPC64LE-NEXT: # %bb.2: 1757; PPC64LE-NEXT: stwcx. 5, 0, 3 1758; PPC64LE-NEXT: beqlr 0 1759; PPC64LE-NEXT: b .LBB103_1 1760; PPC64LE-NEXT: .LBB103_3: 1761; PPC64LE-NEXT: stwcx. 6, 0, 3 1762; PPC64LE-NEXT: blr 1763 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") release monotonic 1764 ret void 1765} 1766 1767define void @test104(i32* %ptr, i32 %cmp, i32 %val) { 1768; PPC64LE-LABEL: test104: 1769; PPC64LE: # %bb.0: 1770; PPC64LE-NEXT: lwsync 1771; PPC64LE-NEXT: .LBB104_1: 1772; PPC64LE-NEXT: lwarx 6, 0, 3 1773; PPC64LE-NEXT: cmpw 4, 6 1774; PPC64LE-NEXT: bne 0, .LBB104_3 1775; PPC64LE-NEXT: # %bb.2: 1776; PPC64LE-NEXT: stwcx. 5, 0, 3 1777; PPC64LE-NEXT: beqlr 0 1778; PPC64LE-NEXT: b .LBB104_1 1779; PPC64LE-NEXT: .LBB104_3: 1780; PPC64LE-NEXT: stwcx. 6, 0, 3 1781; PPC64LE-NEXT: blr 1782 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") release acquire 1783 ret void 1784} 1785 1786define void @test105(i32* %ptr, i32 %cmp, i32 %val) { 1787; PPC64LE-LABEL: test105: 1788; PPC64LE: # %bb.0: 1789; PPC64LE-NEXT: lwsync 1790; PPC64LE-NEXT: .LBB105_1: 1791; PPC64LE-NEXT: lwarx 6, 0, 3 1792; PPC64LE-NEXT: cmpw 4, 6 1793; PPC64LE-NEXT: bne 0, .LBB105_4 1794; PPC64LE-NEXT: # %bb.2: 1795; PPC64LE-NEXT: stwcx. 5, 0, 3 1796; PPC64LE-NEXT: bne 0, .LBB105_1 1797; PPC64LE-NEXT: # %bb.3: 1798; PPC64LE-NEXT: lwsync 1799; PPC64LE-NEXT: blr 1800; PPC64LE-NEXT: .LBB105_4: 1801; PPC64LE-NEXT: stwcx. 6, 0, 3 1802; PPC64LE-NEXT: lwsync 1803; PPC64LE-NEXT: blr 1804 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel monotonic 1805 ret void 1806} 1807 1808define void @test106(i32* %ptr, i32 %cmp, i32 %val) { 1809; PPC64LE-LABEL: test106: 1810; PPC64LE: # %bb.0: 1811; PPC64LE-NEXT: lwsync 1812; PPC64LE-NEXT: .LBB106_1: 1813; PPC64LE-NEXT: lwarx 6, 0, 3 1814; PPC64LE-NEXT: cmpw 4, 6 1815; PPC64LE-NEXT: bne 0, .LBB106_4 1816; PPC64LE-NEXT: # %bb.2: 1817; PPC64LE-NEXT: stwcx. 5, 0, 3 1818; PPC64LE-NEXT: bne 0, .LBB106_1 1819; PPC64LE-NEXT: # %bb.3: 1820; PPC64LE-NEXT: lwsync 1821; PPC64LE-NEXT: blr 1822; PPC64LE-NEXT: .LBB106_4: 1823; PPC64LE-NEXT: stwcx. 6, 0, 3 1824; PPC64LE-NEXT: lwsync 1825; PPC64LE-NEXT: blr 1826 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel acquire 1827 ret void 1828} 1829 1830define void @test107(i32* %ptr, i32 %cmp, i32 %val) { 1831; PPC64LE-LABEL: test107: 1832; PPC64LE: # %bb.0: 1833; PPC64LE-NEXT: sync 1834; PPC64LE-NEXT: .LBB107_1: 1835; PPC64LE-NEXT: lwarx 6, 0, 3 1836; PPC64LE-NEXT: cmpw 4, 6 1837; PPC64LE-NEXT: bne 0, .LBB107_4 1838; PPC64LE-NEXT: # %bb.2: 1839; PPC64LE-NEXT: stwcx. 5, 0, 3 1840; PPC64LE-NEXT: bne 0, .LBB107_1 1841; PPC64LE-NEXT: # %bb.3: 1842; PPC64LE-NEXT: lwsync 1843; PPC64LE-NEXT: blr 1844; PPC64LE-NEXT: .LBB107_4: 1845; PPC64LE-NEXT: stwcx. 6, 0, 3 1846; PPC64LE-NEXT: lwsync 1847; PPC64LE-NEXT: blr 1848 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst monotonic 1849 ret void 1850} 1851 1852define void @test108(i32* %ptr, i32 %cmp, i32 %val) { 1853; PPC64LE-LABEL: test108: 1854; PPC64LE: # %bb.0: 1855; PPC64LE-NEXT: sync 1856; PPC64LE-NEXT: .LBB108_1: 1857; PPC64LE-NEXT: lwarx 6, 0, 3 1858; PPC64LE-NEXT: cmpw 4, 6 1859; PPC64LE-NEXT: bne 0, .LBB108_4 1860; PPC64LE-NEXT: # %bb.2: 1861; PPC64LE-NEXT: stwcx. 5, 0, 3 1862; PPC64LE-NEXT: bne 0, .LBB108_1 1863; PPC64LE-NEXT: # %bb.3: 1864; PPC64LE-NEXT: lwsync 1865; PPC64LE-NEXT: blr 1866; PPC64LE-NEXT: .LBB108_4: 1867; PPC64LE-NEXT: stwcx. 6, 0, 3 1868; PPC64LE-NEXT: lwsync 1869; PPC64LE-NEXT: blr 1870 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst acquire 1871 ret void 1872} 1873 1874define void @test109(i32* %ptr, i32 %cmp, i32 %val) { 1875; PPC64LE-LABEL: test109: 1876; PPC64LE: # %bb.0: 1877; PPC64LE-NEXT: sync 1878; PPC64LE-NEXT: .LBB109_1: 1879; PPC64LE-NEXT: lwarx 6, 0, 3 1880; PPC64LE-NEXT: cmpw 4, 6 1881; PPC64LE-NEXT: bne 0, .LBB109_4 1882; PPC64LE-NEXT: # %bb.2: 1883; PPC64LE-NEXT: stwcx. 5, 0, 3 1884; PPC64LE-NEXT: bne 0, .LBB109_1 1885; PPC64LE-NEXT: # %bb.3: 1886; PPC64LE-NEXT: lwsync 1887; PPC64LE-NEXT: blr 1888; PPC64LE-NEXT: .LBB109_4: 1889; PPC64LE-NEXT: stwcx. 6, 0, 3 1890; PPC64LE-NEXT: lwsync 1891; PPC64LE-NEXT: blr 1892 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst seq_cst 1893 ret void 1894} 1895 1896define void @test110(i64* %ptr, i64 %cmp, i64 %val) { 1897; PPC64LE-LABEL: test110: 1898; PPC64LE: # %bb.0: 1899; PPC64LE-NEXT: .LBB110_1: 1900; PPC64LE-NEXT: ldarx 6, 0, 3 1901; PPC64LE-NEXT: cmpd 4, 6 1902; PPC64LE-NEXT: bne 0, .LBB110_3 1903; PPC64LE-NEXT: # %bb.2: 1904; PPC64LE-NEXT: stdcx. 5, 0, 3 1905; PPC64LE-NEXT: beqlr 0 1906; PPC64LE-NEXT: b .LBB110_1 1907; PPC64LE-NEXT: .LBB110_3: 1908; PPC64LE-NEXT: stdcx. 6, 0, 3 1909; PPC64LE-NEXT: blr 1910 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") monotonic monotonic 1911 ret void 1912} 1913 1914define void @test111(i64* %ptr, i64 %cmp, i64 %val) { 1915; PPC64LE-LABEL: test111: 1916; PPC64LE: # %bb.0: 1917; PPC64LE-NEXT: .LBB111_1: 1918; PPC64LE-NEXT: ldarx 6, 0, 3 1919; PPC64LE-NEXT: cmpd 4, 6 1920; PPC64LE-NEXT: bne 0, .LBB111_4 1921; PPC64LE-NEXT: # %bb.2: 1922; PPC64LE-NEXT: stdcx. 5, 0, 3 1923; PPC64LE-NEXT: bne 0, .LBB111_1 1924; PPC64LE-NEXT: # %bb.3: 1925; PPC64LE-NEXT: lwsync 1926; PPC64LE-NEXT: blr 1927; PPC64LE-NEXT: .LBB111_4: 1928; PPC64LE-NEXT: stdcx. 6, 0, 3 1929; PPC64LE-NEXT: lwsync 1930; PPC64LE-NEXT: blr 1931 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire monotonic 1932 ret void 1933} 1934 1935define void @test112(i64* %ptr, i64 %cmp, i64 %val) { 1936; PPC64LE-LABEL: test112: 1937; PPC64LE: # %bb.0: 1938; PPC64LE-NEXT: .LBB112_1: 1939; PPC64LE-NEXT: ldarx 6, 0, 3 1940; PPC64LE-NEXT: cmpd 4, 6 1941; PPC64LE-NEXT: bne 0, .LBB112_4 1942; PPC64LE-NEXT: # %bb.2: 1943; PPC64LE-NEXT: stdcx. 5, 0, 3 1944; PPC64LE-NEXT: bne 0, .LBB112_1 1945; PPC64LE-NEXT: # %bb.3: 1946; PPC64LE-NEXT: lwsync 1947; PPC64LE-NEXT: blr 1948; PPC64LE-NEXT: .LBB112_4: 1949; PPC64LE-NEXT: stdcx. 6, 0, 3 1950; PPC64LE-NEXT: lwsync 1951; PPC64LE-NEXT: blr 1952 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire acquire 1953 ret void 1954} 1955 1956define void @test113(i64* %ptr, i64 %cmp, i64 %val) { 1957; PPC64LE-LABEL: test113: 1958; PPC64LE: # %bb.0: 1959; PPC64LE-NEXT: lwsync 1960; PPC64LE-NEXT: .LBB113_1: 1961; PPC64LE-NEXT: ldarx 6, 0, 3 1962; PPC64LE-NEXT: cmpd 4, 6 1963; PPC64LE-NEXT: bne 0, .LBB113_3 1964; PPC64LE-NEXT: # %bb.2: 1965; PPC64LE-NEXT: stdcx. 5, 0, 3 1966; PPC64LE-NEXT: beqlr 0 1967; PPC64LE-NEXT: b .LBB113_1 1968; PPC64LE-NEXT: .LBB113_3: 1969; PPC64LE-NEXT: stdcx. 6, 0, 3 1970; PPC64LE-NEXT: blr 1971 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") release monotonic 1972 ret void 1973} 1974 1975define void @test114(i64* %ptr, i64 %cmp, i64 %val) { 1976; PPC64LE-LABEL: test114: 1977; PPC64LE: # %bb.0: 1978; PPC64LE-NEXT: lwsync 1979; PPC64LE-NEXT: .LBB114_1: 1980; PPC64LE-NEXT: ldarx 6, 0, 3 1981; PPC64LE-NEXT: cmpd 4, 6 1982; PPC64LE-NEXT: bne 0, .LBB114_3 1983; PPC64LE-NEXT: # %bb.2: 1984; PPC64LE-NEXT: stdcx. 5, 0, 3 1985; PPC64LE-NEXT: beqlr 0 1986; PPC64LE-NEXT: b .LBB114_1 1987; PPC64LE-NEXT: .LBB114_3: 1988; PPC64LE-NEXT: stdcx. 6, 0, 3 1989; PPC64LE-NEXT: blr 1990 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") release acquire 1991 ret void 1992} 1993 1994define void @test115(i64* %ptr, i64 %cmp, i64 %val) { 1995; PPC64LE-LABEL: test115: 1996; PPC64LE: # %bb.0: 1997; PPC64LE-NEXT: lwsync 1998; PPC64LE-NEXT: .LBB115_1: 1999; PPC64LE-NEXT: ldarx 6, 0, 3 2000; PPC64LE-NEXT: cmpd 4, 6 2001; PPC64LE-NEXT: bne 0, .LBB115_4 2002; PPC64LE-NEXT: # %bb.2: 2003; PPC64LE-NEXT: stdcx. 5, 0, 3 2004; PPC64LE-NEXT: bne 0, .LBB115_1 2005; PPC64LE-NEXT: # %bb.3: 2006; PPC64LE-NEXT: lwsync 2007; PPC64LE-NEXT: blr 2008; PPC64LE-NEXT: .LBB115_4: 2009; PPC64LE-NEXT: stdcx. 6, 0, 3 2010; PPC64LE-NEXT: lwsync 2011; PPC64LE-NEXT: blr 2012 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel monotonic 2013 ret void 2014} 2015 2016define void @test116(i64* %ptr, i64 %cmp, i64 %val) { 2017; PPC64LE-LABEL: test116: 2018; PPC64LE: # %bb.0: 2019; PPC64LE-NEXT: lwsync 2020; PPC64LE-NEXT: .LBB116_1: 2021; PPC64LE-NEXT: ldarx 6, 0, 3 2022; PPC64LE-NEXT: cmpd 4, 6 2023; PPC64LE-NEXT: bne 0, .LBB116_4 2024; PPC64LE-NEXT: # %bb.2: 2025; PPC64LE-NEXT: stdcx. 5, 0, 3 2026; PPC64LE-NEXT: bne 0, .LBB116_1 2027; PPC64LE-NEXT: # %bb.3: 2028; PPC64LE-NEXT: lwsync 2029; PPC64LE-NEXT: blr 2030; PPC64LE-NEXT: .LBB116_4: 2031; PPC64LE-NEXT: stdcx. 6, 0, 3 2032; PPC64LE-NEXT: lwsync 2033; PPC64LE-NEXT: blr 2034 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel acquire 2035 ret void 2036} 2037 2038define void @test117(i64* %ptr, i64 %cmp, i64 %val) { 2039; PPC64LE-LABEL: test117: 2040; PPC64LE: # %bb.0: 2041; PPC64LE-NEXT: sync 2042; PPC64LE-NEXT: .LBB117_1: 2043; PPC64LE-NEXT: ldarx 6, 0, 3 2044; PPC64LE-NEXT: cmpd 4, 6 2045; PPC64LE-NEXT: bne 0, .LBB117_4 2046; PPC64LE-NEXT: # %bb.2: 2047; PPC64LE-NEXT: stdcx. 5, 0, 3 2048; PPC64LE-NEXT: bne 0, .LBB117_1 2049; PPC64LE-NEXT: # %bb.3: 2050; PPC64LE-NEXT: lwsync 2051; PPC64LE-NEXT: blr 2052; PPC64LE-NEXT: .LBB117_4: 2053; PPC64LE-NEXT: stdcx. 6, 0, 3 2054; PPC64LE-NEXT: lwsync 2055; PPC64LE-NEXT: blr 2056 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst monotonic 2057 ret void 2058} 2059 2060define void @test118(i64* %ptr, i64 %cmp, i64 %val) { 2061; PPC64LE-LABEL: test118: 2062; PPC64LE: # %bb.0: 2063; PPC64LE-NEXT: sync 2064; PPC64LE-NEXT: .LBB118_1: 2065; PPC64LE-NEXT: ldarx 6, 0, 3 2066; PPC64LE-NEXT: cmpd 4, 6 2067; PPC64LE-NEXT: bne 0, .LBB118_4 2068; PPC64LE-NEXT: # %bb.2: 2069; PPC64LE-NEXT: stdcx. 5, 0, 3 2070; PPC64LE-NEXT: bne 0, .LBB118_1 2071; PPC64LE-NEXT: # %bb.3: 2072; PPC64LE-NEXT: lwsync 2073; PPC64LE-NEXT: blr 2074; PPC64LE-NEXT: .LBB118_4: 2075; PPC64LE-NEXT: stdcx. 6, 0, 3 2076; PPC64LE-NEXT: lwsync 2077; PPC64LE-NEXT: blr 2078 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst acquire 2079 ret void 2080} 2081 2082define void @test119(i64* %ptr, i64 %cmp, i64 %val) { 2083; PPC64LE-LABEL: test119: 2084; PPC64LE: # %bb.0: 2085; PPC64LE-NEXT: sync 2086; PPC64LE-NEXT: .LBB119_1: 2087; PPC64LE-NEXT: ldarx 6, 0, 3 2088; PPC64LE-NEXT: cmpd 4, 6 2089; PPC64LE-NEXT: bne 0, .LBB119_4 2090; PPC64LE-NEXT: # %bb.2: 2091; PPC64LE-NEXT: stdcx. 5, 0, 3 2092; PPC64LE-NEXT: bne 0, .LBB119_1 2093; PPC64LE-NEXT: # %bb.3: 2094; PPC64LE-NEXT: lwsync 2095; PPC64LE-NEXT: blr 2096; PPC64LE-NEXT: .LBB119_4: 2097; PPC64LE-NEXT: stdcx. 6, 0, 3 2098; PPC64LE-NEXT: lwsync 2099; PPC64LE-NEXT: blr 2100 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst seq_cst 2101 ret void 2102} 2103 2104define i8 @test120(i8* %ptr, i8 %val) { 2105; PPC64LE-LABEL: test120: 2106; PPC64LE: # %bb.0: 2107; PPC64LE-NEXT: .LBB120_1: 2108; PPC64LE-NEXT: lbarx 5, 0, 3 2109; PPC64LE-NEXT: stbcx. 4, 0, 3 2110; PPC64LE-NEXT: bne 0, .LBB120_1 2111; PPC64LE-NEXT: # %bb.2: 2112; PPC64LE-NEXT: mr 3, 5 2113; PPC64LE-NEXT: blr 2114 %ret = atomicrmw xchg i8* %ptr, i8 %val monotonic 2115 ret i8 %ret 2116} 2117 2118define i8 @test121(i8* %ptr, i8 %val) { 2119; PPC64LE-LABEL: test121: 2120; PPC64LE: # %bb.0: 2121; PPC64LE-NEXT: mr 5, 3 2122; PPC64LE-NEXT: .LBB121_1: 2123; PPC64LE-NEXT: lbarx 3, 0, 5 2124; PPC64LE-NEXT: stbcx. 4, 0, 5 2125; PPC64LE-NEXT: bne 0, .LBB121_1 2126; PPC64LE-NEXT: # %bb.2: 2127; PPC64LE-NEXT: lwsync 2128; PPC64LE-NEXT: blr 2129 %ret = atomicrmw xchg i8* %ptr, i8 %val acquire 2130 ret i8 %ret 2131} 2132 2133define i8 @test122(i8* %ptr, i8 %val) { 2134; PPC64LE-LABEL: test122: 2135; PPC64LE: # %bb.0: 2136; PPC64LE-NEXT: lwsync 2137; PPC64LE-NEXT: .LBB122_1: 2138; PPC64LE-NEXT: lbarx 5, 0, 3 2139; PPC64LE-NEXT: stbcx. 4, 0, 3 2140; PPC64LE-NEXT: bne 0, .LBB122_1 2141; PPC64LE-NEXT: # %bb.2: 2142; PPC64LE-NEXT: mr 3, 5 2143; PPC64LE-NEXT: blr 2144 %ret = atomicrmw xchg i8* %ptr, i8 %val release 2145 ret i8 %ret 2146} 2147 2148define i8 @test123(i8* %ptr, i8 %val) { 2149; PPC64LE-LABEL: test123: 2150; PPC64LE: # %bb.0: 2151; PPC64LE-NEXT: lwsync 2152; PPC64LE-NEXT: .LBB123_1: 2153; PPC64LE-NEXT: lbarx 5, 0, 3 2154; PPC64LE-NEXT: stbcx. 4, 0, 3 2155; PPC64LE-NEXT: bne 0, .LBB123_1 2156; PPC64LE-NEXT: # %bb.2: 2157; PPC64LE-NEXT: mr 3, 5 2158; PPC64LE-NEXT: lwsync 2159; PPC64LE-NEXT: blr 2160 %ret = atomicrmw xchg i8* %ptr, i8 %val acq_rel 2161 ret i8 %ret 2162} 2163 2164define i8 @test124(i8* %ptr, i8 %val) { 2165; PPC64LE-LABEL: test124: 2166; PPC64LE: # %bb.0: 2167; PPC64LE-NEXT: sync 2168; PPC64LE-NEXT: .LBB124_1: 2169; PPC64LE-NEXT: lbarx 5, 0, 3 2170; PPC64LE-NEXT: stbcx. 4, 0, 3 2171; PPC64LE-NEXT: bne 0, .LBB124_1 2172; PPC64LE-NEXT: # %bb.2: 2173; PPC64LE-NEXT: mr 3, 5 2174; PPC64LE-NEXT: lwsync 2175; PPC64LE-NEXT: blr 2176 %ret = atomicrmw xchg i8* %ptr, i8 %val seq_cst 2177 ret i8 %ret 2178} 2179 2180define i16 @test125(i16* %ptr, i16 %val) { 2181; PPC64LE-LABEL: test125: 2182; PPC64LE: # %bb.0: 2183; PPC64LE-NEXT: .LBB125_1: 2184; PPC64LE-NEXT: lharx 5, 0, 3 2185; PPC64LE-NEXT: sthcx. 4, 0, 3 2186; PPC64LE-NEXT: bne 0, .LBB125_1 2187; PPC64LE-NEXT: # %bb.2: 2188; PPC64LE-NEXT: mr 3, 5 2189; PPC64LE-NEXT: blr 2190 %ret = atomicrmw xchg i16* %ptr, i16 %val monotonic 2191 ret i16 %ret 2192} 2193 2194define i16 @test126(i16* %ptr, i16 %val) { 2195; PPC64LE-LABEL: test126: 2196; PPC64LE: # %bb.0: 2197; PPC64LE-NEXT: mr 5, 3 2198; PPC64LE-NEXT: .LBB126_1: 2199; PPC64LE-NEXT: lharx 3, 0, 5 2200; PPC64LE-NEXT: sthcx. 4, 0, 5 2201; PPC64LE-NEXT: bne 0, .LBB126_1 2202; PPC64LE-NEXT: # %bb.2: 2203; PPC64LE-NEXT: lwsync 2204; PPC64LE-NEXT: blr 2205 %ret = atomicrmw xchg i16* %ptr, i16 %val acquire 2206 ret i16 %ret 2207} 2208 2209define i16 @test127(i16* %ptr, i16 %val) { 2210; PPC64LE-LABEL: test127: 2211; PPC64LE: # %bb.0: 2212; PPC64LE-NEXT: lwsync 2213; PPC64LE-NEXT: .LBB127_1: 2214; PPC64LE-NEXT: lharx 5, 0, 3 2215; PPC64LE-NEXT: sthcx. 4, 0, 3 2216; PPC64LE-NEXT: bne 0, .LBB127_1 2217; PPC64LE-NEXT: # %bb.2: 2218; PPC64LE-NEXT: mr 3, 5 2219; PPC64LE-NEXT: blr 2220 %ret = atomicrmw xchg i16* %ptr, i16 %val release 2221 ret i16 %ret 2222} 2223 2224define i16 @test128(i16* %ptr, i16 %val) { 2225; PPC64LE-LABEL: test128: 2226; PPC64LE: # %bb.0: 2227; PPC64LE-NEXT: lwsync 2228; PPC64LE-NEXT: .LBB128_1: 2229; PPC64LE-NEXT: lharx 5, 0, 3 2230; PPC64LE-NEXT: sthcx. 4, 0, 3 2231; PPC64LE-NEXT: bne 0, .LBB128_1 2232; PPC64LE-NEXT: # %bb.2: 2233; PPC64LE-NEXT: mr 3, 5 2234; PPC64LE-NEXT: lwsync 2235; PPC64LE-NEXT: blr 2236 %ret = atomicrmw xchg i16* %ptr, i16 %val acq_rel 2237 ret i16 %ret 2238} 2239 2240define i16 @test129(i16* %ptr, i16 %val) { 2241; PPC64LE-LABEL: test129: 2242; PPC64LE: # %bb.0: 2243; PPC64LE-NEXT: sync 2244; PPC64LE-NEXT: .LBB129_1: 2245; PPC64LE-NEXT: lharx 5, 0, 3 2246; PPC64LE-NEXT: sthcx. 4, 0, 3 2247; PPC64LE-NEXT: bne 0, .LBB129_1 2248; PPC64LE-NEXT: # %bb.2: 2249; PPC64LE-NEXT: mr 3, 5 2250; PPC64LE-NEXT: lwsync 2251; PPC64LE-NEXT: blr 2252 %ret = atomicrmw xchg i16* %ptr, i16 %val seq_cst 2253 ret i16 %ret 2254} 2255 2256define i32 @test130(i32* %ptr, i32 %val) { 2257; PPC64LE-LABEL: test130: 2258; PPC64LE: # %bb.0: 2259; PPC64LE-NEXT: .LBB130_1: 2260; PPC64LE-NEXT: lwarx 5, 0, 3 2261; PPC64LE-NEXT: stwcx. 4, 0, 3 2262; PPC64LE-NEXT: bne 0, .LBB130_1 2263; PPC64LE-NEXT: # %bb.2: 2264; PPC64LE-NEXT: mr 3, 5 2265; PPC64LE-NEXT: blr 2266 %ret = atomicrmw xchg i32* %ptr, i32 %val monotonic 2267 ret i32 %ret 2268} 2269 2270define i32 @test131(i32* %ptr, i32 %val) { 2271; PPC64LE-LABEL: test131: 2272; PPC64LE: # %bb.0: 2273; PPC64LE-NEXT: mr 5, 3 2274; PPC64LE-NEXT: .LBB131_1: 2275; PPC64LE-NEXT: lwarx 3, 0, 5 2276; PPC64LE-NEXT: stwcx. 4, 0, 5 2277; PPC64LE-NEXT: bne 0, .LBB131_1 2278; PPC64LE-NEXT: # %bb.2: 2279; PPC64LE-NEXT: lwsync 2280; PPC64LE-NEXT: blr 2281 %ret = atomicrmw xchg i32* %ptr, i32 %val acquire 2282 ret i32 %ret 2283} 2284 2285define i32 @test132(i32* %ptr, i32 %val) { 2286; PPC64LE-LABEL: test132: 2287; PPC64LE: # %bb.0: 2288; PPC64LE-NEXT: lwsync 2289; PPC64LE-NEXT: .LBB132_1: 2290; PPC64LE-NEXT: lwarx 5, 0, 3 2291; PPC64LE-NEXT: stwcx. 4, 0, 3 2292; PPC64LE-NEXT: bne 0, .LBB132_1 2293; PPC64LE-NEXT: # %bb.2: 2294; PPC64LE-NEXT: mr 3, 5 2295; PPC64LE-NEXT: blr 2296 %ret = atomicrmw xchg i32* %ptr, i32 %val release 2297 ret i32 %ret 2298} 2299 2300define i32 @test133(i32* %ptr, i32 %val) { 2301; PPC64LE-LABEL: test133: 2302; PPC64LE: # %bb.0: 2303; PPC64LE-NEXT: lwsync 2304; PPC64LE-NEXT: .LBB133_1: 2305; PPC64LE-NEXT: lwarx 5, 0, 3 2306; PPC64LE-NEXT: stwcx. 4, 0, 3 2307; PPC64LE-NEXT: bne 0, .LBB133_1 2308; PPC64LE-NEXT: # %bb.2: 2309; PPC64LE-NEXT: mr 3, 5 2310; PPC64LE-NEXT: lwsync 2311; PPC64LE-NEXT: blr 2312 %ret = atomicrmw xchg i32* %ptr, i32 %val acq_rel 2313 ret i32 %ret 2314} 2315 2316define i32 @test134(i32* %ptr, i32 %val) { 2317; PPC64LE-LABEL: test134: 2318; PPC64LE: # %bb.0: 2319; PPC64LE-NEXT: sync 2320; PPC64LE-NEXT: .LBB134_1: 2321; PPC64LE-NEXT: lwarx 5, 0, 3 2322; PPC64LE-NEXT: stwcx. 4, 0, 3 2323; PPC64LE-NEXT: bne 0, .LBB134_1 2324; PPC64LE-NEXT: # %bb.2: 2325; PPC64LE-NEXT: mr 3, 5 2326; PPC64LE-NEXT: lwsync 2327; PPC64LE-NEXT: blr 2328 %ret = atomicrmw xchg i32* %ptr, i32 %val seq_cst 2329 ret i32 %ret 2330} 2331 2332define i64 @test135(i64* %ptr, i64 %val) { 2333; PPC64LE-LABEL: test135: 2334; PPC64LE: # %bb.0: 2335; PPC64LE-NEXT: .LBB135_1: 2336; PPC64LE-NEXT: ldarx 5, 0, 3 2337; PPC64LE-NEXT: stdcx. 4, 0, 3 2338; PPC64LE-NEXT: bne 0, .LBB135_1 2339; PPC64LE-NEXT: # %bb.2: 2340; PPC64LE-NEXT: mr 3, 5 2341; PPC64LE-NEXT: blr 2342 %ret = atomicrmw xchg i64* %ptr, i64 %val monotonic 2343 ret i64 %ret 2344} 2345 2346define i64 @test136(i64* %ptr, i64 %val) { 2347; PPC64LE-LABEL: test136: 2348; PPC64LE: # %bb.0: 2349; PPC64LE-NEXT: mr 5, 3 2350; PPC64LE-NEXT: .LBB136_1: 2351; PPC64LE-NEXT: ldarx 3, 0, 5 2352; PPC64LE-NEXT: stdcx. 4, 0, 5 2353; PPC64LE-NEXT: bne 0, .LBB136_1 2354; PPC64LE-NEXT: # %bb.2: 2355; PPC64LE-NEXT: lwsync 2356; PPC64LE-NEXT: blr 2357 %ret = atomicrmw xchg i64* %ptr, i64 %val acquire 2358 ret i64 %ret 2359} 2360 2361define i64 @test137(i64* %ptr, i64 %val) { 2362; PPC64LE-LABEL: test137: 2363; PPC64LE: # %bb.0: 2364; PPC64LE-NEXT: lwsync 2365; PPC64LE-NEXT: .LBB137_1: 2366; PPC64LE-NEXT: ldarx 5, 0, 3 2367; PPC64LE-NEXT: stdcx. 4, 0, 3 2368; PPC64LE-NEXT: bne 0, .LBB137_1 2369; PPC64LE-NEXT: # %bb.2: 2370; PPC64LE-NEXT: mr 3, 5 2371; PPC64LE-NEXT: blr 2372 %ret = atomicrmw xchg i64* %ptr, i64 %val release 2373 ret i64 %ret 2374} 2375 2376define i64 @test138(i64* %ptr, i64 %val) { 2377; PPC64LE-LABEL: test138: 2378; PPC64LE: # %bb.0: 2379; PPC64LE-NEXT: lwsync 2380; PPC64LE-NEXT: .LBB138_1: 2381; PPC64LE-NEXT: ldarx 5, 0, 3 2382; PPC64LE-NEXT: stdcx. 4, 0, 3 2383; PPC64LE-NEXT: bne 0, .LBB138_1 2384; PPC64LE-NEXT: # %bb.2: 2385; PPC64LE-NEXT: mr 3, 5 2386; PPC64LE-NEXT: lwsync 2387; PPC64LE-NEXT: blr 2388 %ret = atomicrmw xchg i64* %ptr, i64 %val acq_rel 2389 ret i64 %ret 2390} 2391 2392define i64 @test139(i64* %ptr, i64 %val) { 2393; PPC64LE-LABEL: test139: 2394; PPC64LE: # %bb.0: 2395; PPC64LE-NEXT: sync 2396; PPC64LE-NEXT: .LBB139_1: 2397; PPC64LE-NEXT: ldarx 5, 0, 3 2398; PPC64LE-NEXT: stdcx. 4, 0, 3 2399; PPC64LE-NEXT: bne 0, .LBB139_1 2400; PPC64LE-NEXT: # %bb.2: 2401; PPC64LE-NEXT: mr 3, 5 2402; PPC64LE-NEXT: lwsync 2403; PPC64LE-NEXT: blr 2404 %ret = atomicrmw xchg i64* %ptr, i64 %val seq_cst 2405 ret i64 %ret 2406} 2407 2408define i8 @test140(i8* %ptr, i8 %val) { 2409; PPC64LE-LABEL: test140: 2410; PPC64LE: # %bb.0: 2411; PPC64LE-NEXT: .LBB140_1: 2412; PPC64LE-NEXT: lbarx 5, 0, 3 2413; PPC64LE-NEXT: add 6, 4, 5 2414; PPC64LE-NEXT: stbcx. 6, 0, 3 2415; PPC64LE-NEXT: bne 0, .LBB140_1 2416; PPC64LE-NEXT: # %bb.2: 2417; PPC64LE-NEXT: mr 3, 5 2418; PPC64LE-NEXT: blr 2419 %ret = atomicrmw add i8* %ptr, i8 %val monotonic 2420 ret i8 %ret 2421} 2422 2423define i8 @test141(i8* %ptr, i8 %val) { 2424; PPC64LE-LABEL: test141: 2425; PPC64LE: # %bb.0: 2426; PPC64LE-NEXT: mr 5, 3 2427; PPC64LE-NEXT: .LBB141_1: 2428; PPC64LE-NEXT: lbarx 3, 0, 5 2429; PPC64LE-NEXT: add 6, 4, 3 2430; PPC64LE-NEXT: stbcx. 6, 0, 5 2431; PPC64LE-NEXT: bne 0, .LBB141_1 2432; PPC64LE-NEXT: # %bb.2: 2433; PPC64LE-NEXT: lwsync 2434; PPC64LE-NEXT: blr 2435 %ret = atomicrmw add i8* %ptr, i8 %val acquire 2436 ret i8 %ret 2437} 2438 2439define i8 @test142(i8* %ptr, i8 %val) { 2440; PPC64LE-LABEL: test142: 2441; PPC64LE: # %bb.0: 2442; PPC64LE-NEXT: lwsync 2443; PPC64LE-NEXT: .LBB142_1: 2444; PPC64LE-NEXT: lbarx 5, 0, 3 2445; PPC64LE-NEXT: add 6, 4, 5 2446; PPC64LE-NEXT: stbcx. 6, 0, 3 2447; PPC64LE-NEXT: bne 0, .LBB142_1 2448; PPC64LE-NEXT: # %bb.2: 2449; PPC64LE-NEXT: mr 3, 5 2450; PPC64LE-NEXT: blr 2451 %ret = atomicrmw add i8* %ptr, i8 %val release 2452 ret i8 %ret 2453} 2454 2455define i8 @test143(i8* %ptr, i8 %val) { 2456; PPC64LE-LABEL: test143: 2457; PPC64LE: # %bb.0: 2458; PPC64LE-NEXT: lwsync 2459; PPC64LE-NEXT: .LBB143_1: 2460; PPC64LE-NEXT: lbarx 5, 0, 3 2461; PPC64LE-NEXT: add 6, 4, 5 2462; PPC64LE-NEXT: stbcx. 6, 0, 3 2463; PPC64LE-NEXT: bne 0, .LBB143_1 2464; PPC64LE-NEXT: # %bb.2: 2465; PPC64LE-NEXT: mr 3, 5 2466; PPC64LE-NEXT: lwsync 2467; PPC64LE-NEXT: blr 2468 %ret = atomicrmw add i8* %ptr, i8 %val acq_rel 2469 ret i8 %ret 2470} 2471 2472define i8 @test144(i8* %ptr, i8 %val) { 2473; PPC64LE-LABEL: test144: 2474; PPC64LE: # %bb.0: 2475; PPC64LE-NEXT: sync 2476; PPC64LE-NEXT: .LBB144_1: 2477; PPC64LE-NEXT: lbarx 5, 0, 3 2478; PPC64LE-NEXT: add 6, 4, 5 2479; PPC64LE-NEXT: stbcx. 6, 0, 3 2480; PPC64LE-NEXT: bne 0, .LBB144_1 2481; PPC64LE-NEXT: # %bb.2: 2482; PPC64LE-NEXT: mr 3, 5 2483; PPC64LE-NEXT: lwsync 2484; PPC64LE-NEXT: blr 2485 %ret = atomicrmw add i8* %ptr, i8 %val seq_cst 2486 ret i8 %ret 2487} 2488 2489define i16 @test145(i16* %ptr, i16 %val) { 2490; PPC64LE-LABEL: test145: 2491; PPC64LE: # %bb.0: 2492; PPC64LE-NEXT: .LBB145_1: 2493; PPC64LE-NEXT: lharx 5, 0, 3 2494; PPC64LE-NEXT: add 6, 4, 5 2495; PPC64LE-NEXT: sthcx. 6, 0, 3 2496; PPC64LE-NEXT: bne 0, .LBB145_1 2497; PPC64LE-NEXT: # %bb.2: 2498; PPC64LE-NEXT: mr 3, 5 2499; PPC64LE-NEXT: blr 2500 %ret = atomicrmw add i16* %ptr, i16 %val monotonic 2501 ret i16 %ret 2502} 2503 2504define i16 @test146(i16* %ptr, i16 %val) { 2505; PPC64LE-LABEL: test146: 2506; PPC64LE: # %bb.0: 2507; PPC64LE-NEXT: mr 5, 3 2508; PPC64LE-NEXT: .LBB146_1: 2509; PPC64LE-NEXT: lharx 3, 0, 5 2510; PPC64LE-NEXT: add 6, 4, 3 2511; PPC64LE-NEXT: sthcx. 6, 0, 5 2512; PPC64LE-NEXT: bne 0, .LBB146_1 2513; PPC64LE-NEXT: # %bb.2: 2514; PPC64LE-NEXT: lwsync 2515; PPC64LE-NEXT: blr 2516 %ret = atomicrmw add i16* %ptr, i16 %val acquire 2517 ret i16 %ret 2518} 2519 2520define i16 @test147(i16* %ptr, i16 %val) { 2521; PPC64LE-LABEL: test147: 2522; PPC64LE: # %bb.0: 2523; PPC64LE-NEXT: lwsync 2524; PPC64LE-NEXT: .LBB147_1: 2525; PPC64LE-NEXT: lharx 5, 0, 3 2526; PPC64LE-NEXT: add 6, 4, 5 2527; PPC64LE-NEXT: sthcx. 6, 0, 3 2528; PPC64LE-NEXT: bne 0, .LBB147_1 2529; PPC64LE-NEXT: # %bb.2: 2530; PPC64LE-NEXT: mr 3, 5 2531; PPC64LE-NEXT: blr 2532 %ret = atomicrmw add i16* %ptr, i16 %val release 2533 ret i16 %ret 2534} 2535 2536define i16 @test148(i16* %ptr, i16 %val) { 2537; PPC64LE-LABEL: test148: 2538; PPC64LE: # %bb.0: 2539; PPC64LE-NEXT: lwsync 2540; PPC64LE-NEXT: .LBB148_1: 2541; PPC64LE-NEXT: lharx 5, 0, 3 2542; PPC64LE-NEXT: add 6, 4, 5 2543; PPC64LE-NEXT: sthcx. 6, 0, 3 2544; PPC64LE-NEXT: bne 0, .LBB148_1 2545; PPC64LE-NEXT: # %bb.2: 2546; PPC64LE-NEXT: mr 3, 5 2547; PPC64LE-NEXT: lwsync 2548; PPC64LE-NEXT: blr 2549 %ret = atomicrmw add i16* %ptr, i16 %val acq_rel 2550 ret i16 %ret 2551} 2552 2553define i16 @test149(i16* %ptr, i16 %val) { 2554; PPC64LE-LABEL: test149: 2555; PPC64LE: # %bb.0: 2556; PPC64LE-NEXT: sync 2557; PPC64LE-NEXT: .LBB149_1: 2558; PPC64LE-NEXT: lharx 5, 0, 3 2559; PPC64LE-NEXT: add 6, 4, 5 2560; PPC64LE-NEXT: sthcx. 6, 0, 3 2561; PPC64LE-NEXT: bne 0, .LBB149_1 2562; PPC64LE-NEXT: # %bb.2: 2563; PPC64LE-NEXT: mr 3, 5 2564; PPC64LE-NEXT: lwsync 2565; PPC64LE-NEXT: blr 2566 %ret = atomicrmw add i16* %ptr, i16 %val seq_cst 2567 ret i16 %ret 2568} 2569 2570define i32 @test150(i32* %ptr, i32 %val) { 2571; PPC64LE-LABEL: test150: 2572; PPC64LE: # %bb.0: 2573; PPC64LE-NEXT: .LBB150_1: 2574; PPC64LE-NEXT: lwarx 5, 0, 3 2575; PPC64LE-NEXT: add 6, 4, 5 2576; PPC64LE-NEXT: stwcx. 6, 0, 3 2577; PPC64LE-NEXT: bne 0, .LBB150_1 2578; PPC64LE-NEXT: # %bb.2: 2579; PPC64LE-NEXT: mr 3, 5 2580; PPC64LE-NEXT: blr 2581 %ret = atomicrmw add i32* %ptr, i32 %val monotonic 2582 ret i32 %ret 2583} 2584 2585define i32 @test151(i32* %ptr, i32 %val) { 2586; PPC64LE-LABEL: test151: 2587; PPC64LE: # %bb.0: 2588; PPC64LE-NEXT: mr 5, 3 2589; PPC64LE-NEXT: .LBB151_1: 2590; PPC64LE-NEXT: lwarx 3, 0, 5 2591; PPC64LE-NEXT: add 6, 4, 3 2592; PPC64LE-NEXT: stwcx. 6, 0, 5 2593; PPC64LE-NEXT: bne 0, .LBB151_1 2594; PPC64LE-NEXT: # %bb.2: 2595; PPC64LE-NEXT: lwsync 2596; PPC64LE-NEXT: blr 2597 %ret = atomicrmw add i32* %ptr, i32 %val acquire 2598 ret i32 %ret 2599} 2600 2601define i32 @test152(i32* %ptr, i32 %val) { 2602; PPC64LE-LABEL: test152: 2603; PPC64LE: # %bb.0: 2604; PPC64LE-NEXT: lwsync 2605; PPC64LE-NEXT: .LBB152_1: 2606; PPC64LE-NEXT: lwarx 5, 0, 3 2607; PPC64LE-NEXT: add 6, 4, 5 2608; PPC64LE-NEXT: stwcx. 6, 0, 3 2609; PPC64LE-NEXT: bne 0, .LBB152_1 2610; PPC64LE-NEXT: # %bb.2: 2611; PPC64LE-NEXT: mr 3, 5 2612; PPC64LE-NEXT: blr 2613 %ret = atomicrmw add i32* %ptr, i32 %val release 2614 ret i32 %ret 2615} 2616 2617define i32 @test153(i32* %ptr, i32 %val) { 2618; PPC64LE-LABEL: test153: 2619; PPC64LE: # %bb.0: 2620; PPC64LE-NEXT: lwsync 2621; PPC64LE-NEXT: .LBB153_1: 2622; PPC64LE-NEXT: lwarx 5, 0, 3 2623; PPC64LE-NEXT: add 6, 4, 5 2624; PPC64LE-NEXT: stwcx. 6, 0, 3 2625; PPC64LE-NEXT: bne 0, .LBB153_1 2626; PPC64LE-NEXT: # %bb.2: 2627; PPC64LE-NEXT: mr 3, 5 2628; PPC64LE-NEXT: lwsync 2629; PPC64LE-NEXT: blr 2630 %ret = atomicrmw add i32* %ptr, i32 %val acq_rel 2631 ret i32 %ret 2632} 2633 2634define i32 @test154(i32* %ptr, i32 %val) { 2635; PPC64LE-LABEL: test154: 2636; PPC64LE: # %bb.0: 2637; PPC64LE-NEXT: sync 2638; PPC64LE-NEXT: .LBB154_1: 2639; PPC64LE-NEXT: lwarx 5, 0, 3 2640; PPC64LE-NEXT: add 6, 4, 5 2641; PPC64LE-NEXT: stwcx. 6, 0, 3 2642; PPC64LE-NEXT: bne 0, .LBB154_1 2643; PPC64LE-NEXT: # %bb.2: 2644; PPC64LE-NEXT: mr 3, 5 2645; PPC64LE-NEXT: lwsync 2646; PPC64LE-NEXT: blr 2647 %ret = atomicrmw add i32* %ptr, i32 %val seq_cst 2648 ret i32 %ret 2649} 2650 2651define i64 @test155(i64* %ptr, i64 %val) { 2652; PPC64LE-LABEL: test155: 2653; PPC64LE: # %bb.0: 2654; PPC64LE-NEXT: .LBB155_1: 2655; PPC64LE-NEXT: ldarx 5, 0, 3 2656; PPC64LE-NEXT: add 6, 4, 5 2657; PPC64LE-NEXT: stdcx. 6, 0, 3 2658; PPC64LE-NEXT: bne 0, .LBB155_1 2659; PPC64LE-NEXT: # %bb.2: 2660; PPC64LE-NEXT: mr 3, 5 2661; PPC64LE-NEXT: blr 2662 %ret = atomicrmw add i64* %ptr, i64 %val monotonic 2663 ret i64 %ret 2664} 2665 2666define i64 @test156(i64* %ptr, i64 %val) { 2667; PPC64LE-LABEL: test156: 2668; PPC64LE: # %bb.0: 2669; PPC64LE-NEXT: mr 5, 3 2670; PPC64LE-NEXT: .LBB156_1: 2671; PPC64LE-NEXT: ldarx 3, 0, 5 2672; PPC64LE-NEXT: add 6, 4, 3 2673; PPC64LE-NEXT: stdcx. 6, 0, 5 2674; PPC64LE-NEXT: bne 0, .LBB156_1 2675; PPC64LE-NEXT: # %bb.2: 2676; PPC64LE-NEXT: lwsync 2677; PPC64LE-NEXT: blr 2678 %ret = atomicrmw add i64* %ptr, i64 %val acquire 2679 ret i64 %ret 2680} 2681 2682define i64 @test157(i64* %ptr, i64 %val) { 2683; PPC64LE-LABEL: test157: 2684; PPC64LE: # %bb.0: 2685; PPC64LE-NEXT: lwsync 2686; PPC64LE-NEXT: .LBB157_1: 2687; PPC64LE-NEXT: ldarx 5, 0, 3 2688; PPC64LE-NEXT: add 6, 4, 5 2689; PPC64LE-NEXT: stdcx. 6, 0, 3 2690; PPC64LE-NEXT: bne 0, .LBB157_1 2691; PPC64LE-NEXT: # %bb.2: 2692; PPC64LE-NEXT: mr 3, 5 2693; PPC64LE-NEXT: blr 2694 %ret = atomicrmw add i64* %ptr, i64 %val release 2695 ret i64 %ret 2696} 2697 2698define i64 @test158(i64* %ptr, i64 %val) { 2699; PPC64LE-LABEL: test158: 2700; PPC64LE: # %bb.0: 2701; PPC64LE-NEXT: lwsync 2702; PPC64LE-NEXT: .LBB158_1: 2703; PPC64LE-NEXT: ldarx 5, 0, 3 2704; PPC64LE-NEXT: add 6, 4, 5 2705; PPC64LE-NEXT: stdcx. 6, 0, 3 2706; PPC64LE-NEXT: bne 0, .LBB158_1 2707; PPC64LE-NEXT: # %bb.2: 2708; PPC64LE-NEXT: mr 3, 5 2709; PPC64LE-NEXT: lwsync 2710; PPC64LE-NEXT: blr 2711 %ret = atomicrmw add i64* %ptr, i64 %val acq_rel 2712 ret i64 %ret 2713} 2714 2715define i64 @test159(i64* %ptr, i64 %val) { 2716; PPC64LE-LABEL: test159: 2717; PPC64LE: # %bb.0: 2718; PPC64LE-NEXT: sync 2719; PPC64LE-NEXT: .LBB159_1: 2720; PPC64LE-NEXT: ldarx 5, 0, 3 2721; PPC64LE-NEXT: add 6, 4, 5 2722; PPC64LE-NEXT: stdcx. 6, 0, 3 2723; PPC64LE-NEXT: bne 0, .LBB159_1 2724; PPC64LE-NEXT: # %bb.2: 2725; PPC64LE-NEXT: mr 3, 5 2726; PPC64LE-NEXT: lwsync 2727; PPC64LE-NEXT: blr 2728 %ret = atomicrmw add i64* %ptr, i64 %val seq_cst 2729 ret i64 %ret 2730} 2731 2732define i8 @test160(i8* %ptr, i8 %val) { 2733; PPC64LE-LABEL: test160: 2734; PPC64LE: # %bb.0: 2735; PPC64LE-NEXT: .LBB160_1: 2736; PPC64LE-NEXT: lbarx 5, 0, 3 2737; PPC64LE-NEXT: subf 6, 4, 5 2738; PPC64LE-NEXT: stbcx. 6, 0, 3 2739; PPC64LE-NEXT: bne 0, .LBB160_1 2740; PPC64LE-NEXT: # %bb.2: 2741; PPC64LE-NEXT: mr 3, 5 2742; PPC64LE-NEXT: blr 2743 %ret = atomicrmw sub i8* %ptr, i8 %val monotonic 2744 ret i8 %ret 2745} 2746 2747define i8 @test161(i8* %ptr, i8 %val) { 2748; PPC64LE-LABEL: test161: 2749; PPC64LE: # %bb.0: 2750; PPC64LE-NEXT: mr 5, 3 2751; PPC64LE-NEXT: .LBB161_1: 2752; PPC64LE-NEXT: lbarx 3, 0, 5 2753; PPC64LE-NEXT: subf 6, 4, 3 2754; PPC64LE-NEXT: stbcx. 6, 0, 5 2755; PPC64LE-NEXT: bne 0, .LBB161_1 2756; PPC64LE-NEXT: # %bb.2: 2757; PPC64LE-NEXT: lwsync 2758; PPC64LE-NEXT: blr 2759 %ret = atomicrmw sub i8* %ptr, i8 %val acquire 2760 ret i8 %ret 2761} 2762 2763define i8 @test162(i8* %ptr, i8 %val) { 2764; PPC64LE-LABEL: test162: 2765; PPC64LE: # %bb.0: 2766; PPC64LE-NEXT: lwsync 2767; PPC64LE-NEXT: .LBB162_1: 2768; PPC64LE-NEXT: lbarx 5, 0, 3 2769; PPC64LE-NEXT: subf 6, 4, 5 2770; PPC64LE-NEXT: stbcx. 6, 0, 3 2771; PPC64LE-NEXT: bne 0, .LBB162_1 2772; PPC64LE-NEXT: # %bb.2: 2773; PPC64LE-NEXT: mr 3, 5 2774; PPC64LE-NEXT: blr 2775 %ret = atomicrmw sub i8* %ptr, i8 %val release 2776 ret i8 %ret 2777} 2778 2779define i8 @test163(i8* %ptr, i8 %val) { 2780; PPC64LE-LABEL: test163: 2781; PPC64LE: # %bb.0: 2782; PPC64LE-NEXT: lwsync 2783; PPC64LE-NEXT: .LBB163_1: 2784; PPC64LE-NEXT: lbarx 5, 0, 3 2785; PPC64LE-NEXT: subf 6, 4, 5 2786; PPC64LE-NEXT: stbcx. 6, 0, 3 2787; PPC64LE-NEXT: bne 0, .LBB163_1 2788; PPC64LE-NEXT: # %bb.2: 2789; PPC64LE-NEXT: mr 3, 5 2790; PPC64LE-NEXT: lwsync 2791; PPC64LE-NEXT: blr 2792 %ret = atomicrmw sub i8* %ptr, i8 %val acq_rel 2793 ret i8 %ret 2794} 2795 2796define i8 @test164(i8* %ptr, i8 %val) { 2797; PPC64LE-LABEL: test164: 2798; PPC64LE: # %bb.0: 2799; PPC64LE-NEXT: sync 2800; PPC64LE-NEXT: .LBB164_1: 2801; PPC64LE-NEXT: lbarx 5, 0, 3 2802; PPC64LE-NEXT: subf 6, 4, 5 2803; PPC64LE-NEXT: stbcx. 6, 0, 3 2804; PPC64LE-NEXT: bne 0, .LBB164_1 2805; PPC64LE-NEXT: # %bb.2: 2806; PPC64LE-NEXT: mr 3, 5 2807; PPC64LE-NEXT: lwsync 2808; PPC64LE-NEXT: blr 2809 %ret = atomicrmw sub i8* %ptr, i8 %val seq_cst 2810 ret i8 %ret 2811} 2812 2813define i16 @test165(i16* %ptr, i16 %val) { 2814; PPC64LE-LABEL: test165: 2815; PPC64LE: # %bb.0: 2816; PPC64LE-NEXT: .LBB165_1: 2817; PPC64LE-NEXT: lharx 5, 0, 3 2818; PPC64LE-NEXT: subf 6, 4, 5 2819; PPC64LE-NEXT: sthcx. 6, 0, 3 2820; PPC64LE-NEXT: bne 0, .LBB165_1 2821; PPC64LE-NEXT: # %bb.2: 2822; PPC64LE-NEXT: mr 3, 5 2823; PPC64LE-NEXT: blr 2824 %ret = atomicrmw sub i16* %ptr, i16 %val monotonic 2825 ret i16 %ret 2826} 2827 2828define i16 @test166(i16* %ptr, i16 %val) { 2829; PPC64LE-LABEL: test166: 2830; PPC64LE: # %bb.0: 2831; PPC64LE-NEXT: mr 5, 3 2832; PPC64LE-NEXT: .LBB166_1: 2833; PPC64LE-NEXT: lharx 3, 0, 5 2834; PPC64LE-NEXT: subf 6, 4, 3 2835; PPC64LE-NEXT: sthcx. 6, 0, 5 2836; PPC64LE-NEXT: bne 0, .LBB166_1 2837; PPC64LE-NEXT: # %bb.2: 2838; PPC64LE-NEXT: lwsync 2839; PPC64LE-NEXT: blr 2840 %ret = atomicrmw sub i16* %ptr, i16 %val acquire 2841 ret i16 %ret 2842} 2843 2844define i16 @test167(i16* %ptr, i16 %val) { 2845; PPC64LE-LABEL: test167: 2846; PPC64LE: # %bb.0: 2847; PPC64LE-NEXT: lwsync 2848; PPC64LE-NEXT: .LBB167_1: 2849; PPC64LE-NEXT: lharx 5, 0, 3 2850; PPC64LE-NEXT: subf 6, 4, 5 2851; PPC64LE-NEXT: sthcx. 6, 0, 3 2852; PPC64LE-NEXT: bne 0, .LBB167_1 2853; PPC64LE-NEXT: # %bb.2: 2854; PPC64LE-NEXT: mr 3, 5 2855; PPC64LE-NEXT: blr 2856 %ret = atomicrmw sub i16* %ptr, i16 %val release 2857 ret i16 %ret 2858} 2859 2860define i16 @test168(i16* %ptr, i16 %val) { 2861; PPC64LE-LABEL: test168: 2862; PPC64LE: # %bb.0: 2863; PPC64LE-NEXT: lwsync 2864; PPC64LE-NEXT: .LBB168_1: 2865; PPC64LE-NEXT: lharx 5, 0, 3 2866; PPC64LE-NEXT: subf 6, 4, 5 2867; PPC64LE-NEXT: sthcx. 6, 0, 3 2868; PPC64LE-NEXT: bne 0, .LBB168_1 2869; PPC64LE-NEXT: # %bb.2: 2870; PPC64LE-NEXT: mr 3, 5 2871; PPC64LE-NEXT: lwsync 2872; PPC64LE-NEXT: blr 2873 %ret = atomicrmw sub i16* %ptr, i16 %val acq_rel 2874 ret i16 %ret 2875} 2876 2877define i16 @test169(i16* %ptr, i16 %val) { 2878; PPC64LE-LABEL: test169: 2879; PPC64LE: # %bb.0: 2880; PPC64LE-NEXT: sync 2881; PPC64LE-NEXT: .LBB169_1: 2882; PPC64LE-NEXT: lharx 5, 0, 3 2883; PPC64LE-NEXT: subf 6, 4, 5 2884; PPC64LE-NEXT: sthcx. 6, 0, 3 2885; PPC64LE-NEXT: bne 0, .LBB169_1 2886; PPC64LE-NEXT: # %bb.2: 2887; PPC64LE-NEXT: mr 3, 5 2888; PPC64LE-NEXT: lwsync 2889; PPC64LE-NEXT: blr 2890 %ret = atomicrmw sub i16* %ptr, i16 %val seq_cst 2891 ret i16 %ret 2892} 2893 2894define i32 @test170(i32* %ptr, i32 %val) { 2895; PPC64LE-LABEL: test170: 2896; PPC64LE: # %bb.0: 2897; PPC64LE-NEXT: .LBB170_1: 2898; PPC64LE-NEXT: lwarx 5, 0, 3 2899; PPC64LE-NEXT: subf 6, 4, 5 2900; PPC64LE-NEXT: stwcx. 6, 0, 3 2901; PPC64LE-NEXT: bne 0, .LBB170_1 2902; PPC64LE-NEXT: # %bb.2: 2903; PPC64LE-NEXT: mr 3, 5 2904; PPC64LE-NEXT: blr 2905 %ret = atomicrmw sub i32* %ptr, i32 %val monotonic 2906 ret i32 %ret 2907} 2908 2909define i32 @test171(i32* %ptr, i32 %val) { 2910; PPC64LE-LABEL: test171: 2911; PPC64LE: # %bb.0: 2912; PPC64LE-NEXT: mr 5, 3 2913; PPC64LE-NEXT: .LBB171_1: 2914; PPC64LE-NEXT: lwarx 3, 0, 5 2915; PPC64LE-NEXT: subf 6, 4, 3 2916; PPC64LE-NEXT: stwcx. 6, 0, 5 2917; PPC64LE-NEXT: bne 0, .LBB171_1 2918; PPC64LE-NEXT: # %bb.2: 2919; PPC64LE-NEXT: lwsync 2920; PPC64LE-NEXT: blr 2921 %ret = atomicrmw sub i32* %ptr, i32 %val acquire 2922 ret i32 %ret 2923} 2924 2925define i32 @test172(i32* %ptr, i32 %val) { 2926; PPC64LE-LABEL: test172: 2927; PPC64LE: # %bb.0: 2928; PPC64LE-NEXT: lwsync 2929; PPC64LE-NEXT: .LBB172_1: 2930; PPC64LE-NEXT: lwarx 5, 0, 3 2931; PPC64LE-NEXT: subf 6, 4, 5 2932; PPC64LE-NEXT: stwcx. 6, 0, 3 2933; PPC64LE-NEXT: bne 0, .LBB172_1 2934; PPC64LE-NEXT: # %bb.2: 2935; PPC64LE-NEXT: mr 3, 5 2936; PPC64LE-NEXT: blr 2937 %ret = atomicrmw sub i32* %ptr, i32 %val release 2938 ret i32 %ret 2939} 2940 2941define i32 @test173(i32* %ptr, i32 %val) { 2942; PPC64LE-LABEL: test173: 2943; PPC64LE: # %bb.0: 2944; PPC64LE-NEXT: lwsync 2945; PPC64LE-NEXT: .LBB173_1: 2946; PPC64LE-NEXT: lwarx 5, 0, 3 2947; PPC64LE-NEXT: subf 6, 4, 5 2948; PPC64LE-NEXT: stwcx. 6, 0, 3 2949; PPC64LE-NEXT: bne 0, .LBB173_1 2950; PPC64LE-NEXT: # %bb.2: 2951; PPC64LE-NEXT: mr 3, 5 2952; PPC64LE-NEXT: lwsync 2953; PPC64LE-NEXT: blr 2954 %ret = atomicrmw sub i32* %ptr, i32 %val acq_rel 2955 ret i32 %ret 2956} 2957 2958define i32 @test174(i32* %ptr, i32 %val) { 2959; PPC64LE-LABEL: test174: 2960; PPC64LE: # %bb.0: 2961; PPC64LE-NEXT: sync 2962; PPC64LE-NEXT: .LBB174_1: 2963; PPC64LE-NEXT: lwarx 5, 0, 3 2964; PPC64LE-NEXT: subf 6, 4, 5 2965; PPC64LE-NEXT: stwcx. 6, 0, 3 2966; PPC64LE-NEXT: bne 0, .LBB174_1 2967; PPC64LE-NEXT: # %bb.2: 2968; PPC64LE-NEXT: mr 3, 5 2969; PPC64LE-NEXT: lwsync 2970; PPC64LE-NEXT: blr 2971 %ret = atomicrmw sub i32* %ptr, i32 %val seq_cst 2972 ret i32 %ret 2973} 2974 2975define i64 @test175(i64* %ptr, i64 %val) { 2976; PPC64LE-LABEL: test175: 2977; PPC64LE: # %bb.0: 2978; PPC64LE-NEXT: .LBB175_1: 2979; PPC64LE-NEXT: ldarx 5, 0, 3 2980; PPC64LE-NEXT: sub 6, 5, 4 2981; PPC64LE-NEXT: stdcx. 6, 0, 3 2982; PPC64LE-NEXT: bne 0, .LBB175_1 2983; PPC64LE-NEXT: # %bb.2: 2984; PPC64LE-NEXT: mr 3, 5 2985; PPC64LE-NEXT: blr 2986 %ret = atomicrmw sub i64* %ptr, i64 %val monotonic 2987 ret i64 %ret 2988} 2989 2990define i64 @test176(i64* %ptr, i64 %val) { 2991; PPC64LE-LABEL: test176: 2992; PPC64LE: # %bb.0: 2993; PPC64LE-NEXT: mr 5, 3 2994; PPC64LE-NEXT: .LBB176_1: 2995; PPC64LE-NEXT: ldarx 3, 0, 5 2996; PPC64LE-NEXT: sub 6, 3, 4 2997; PPC64LE-NEXT: stdcx. 6, 0, 5 2998; PPC64LE-NEXT: bne 0, .LBB176_1 2999; PPC64LE-NEXT: # %bb.2: 3000; PPC64LE-NEXT: lwsync 3001; PPC64LE-NEXT: blr 3002 %ret = atomicrmw sub i64* %ptr, i64 %val acquire 3003 ret i64 %ret 3004} 3005 3006define i64 @test177(i64* %ptr, i64 %val) { 3007; PPC64LE-LABEL: test177: 3008; PPC64LE: # %bb.0: 3009; PPC64LE-NEXT: lwsync 3010; PPC64LE-NEXT: .LBB177_1: 3011; PPC64LE-NEXT: ldarx 5, 0, 3 3012; PPC64LE-NEXT: sub 6, 5, 4 3013; PPC64LE-NEXT: stdcx. 6, 0, 3 3014; PPC64LE-NEXT: bne 0, .LBB177_1 3015; PPC64LE-NEXT: # %bb.2: 3016; PPC64LE-NEXT: mr 3, 5 3017; PPC64LE-NEXT: blr 3018 %ret = atomicrmw sub i64* %ptr, i64 %val release 3019 ret i64 %ret 3020} 3021 3022define i64 @test178(i64* %ptr, i64 %val) { 3023; PPC64LE-LABEL: test178: 3024; PPC64LE: # %bb.0: 3025; PPC64LE-NEXT: lwsync 3026; PPC64LE-NEXT: .LBB178_1: 3027; PPC64LE-NEXT: ldarx 5, 0, 3 3028; PPC64LE-NEXT: sub 6, 5, 4 3029; PPC64LE-NEXT: stdcx. 6, 0, 3 3030; PPC64LE-NEXT: bne 0, .LBB178_1 3031; PPC64LE-NEXT: # %bb.2: 3032; PPC64LE-NEXT: mr 3, 5 3033; PPC64LE-NEXT: lwsync 3034; PPC64LE-NEXT: blr 3035 %ret = atomicrmw sub i64* %ptr, i64 %val acq_rel 3036 ret i64 %ret 3037} 3038 3039define i64 @test179(i64* %ptr, i64 %val) { 3040; PPC64LE-LABEL: test179: 3041; PPC64LE: # %bb.0: 3042; PPC64LE-NEXT: sync 3043; PPC64LE-NEXT: .LBB179_1: 3044; PPC64LE-NEXT: ldarx 5, 0, 3 3045; PPC64LE-NEXT: sub 6, 5, 4 3046; PPC64LE-NEXT: stdcx. 6, 0, 3 3047; PPC64LE-NEXT: bne 0, .LBB179_1 3048; PPC64LE-NEXT: # %bb.2: 3049; PPC64LE-NEXT: mr 3, 5 3050; PPC64LE-NEXT: lwsync 3051; PPC64LE-NEXT: blr 3052 %ret = atomicrmw sub i64* %ptr, i64 %val seq_cst 3053 ret i64 %ret 3054} 3055 3056define i8 @test180(i8* %ptr, i8 %val) { 3057; PPC64LE-LABEL: test180: 3058; PPC64LE: # %bb.0: 3059; PPC64LE-NEXT: .LBB180_1: 3060; PPC64LE-NEXT: lbarx 5, 0, 3 3061; PPC64LE-NEXT: and 6, 4, 5 3062; PPC64LE-NEXT: stbcx. 6, 0, 3 3063; PPC64LE-NEXT: bne 0, .LBB180_1 3064; PPC64LE-NEXT: # %bb.2: 3065; PPC64LE-NEXT: mr 3, 5 3066; PPC64LE-NEXT: blr 3067 %ret = atomicrmw and i8* %ptr, i8 %val monotonic 3068 ret i8 %ret 3069} 3070 3071define i8 @test181(i8* %ptr, i8 %val) { 3072; PPC64LE-LABEL: test181: 3073; PPC64LE: # %bb.0: 3074; PPC64LE-NEXT: mr 5, 3 3075; PPC64LE-NEXT: .LBB181_1: 3076; PPC64LE-NEXT: lbarx 3, 0, 5 3077; PPC64LE-NEXT: and 6, 4, 3 3078; PPC64LE-NEXT: stbcx. 6, 0, 5 3079; PPC64LE-NEXT: bne 0, .LBB181_1 3080; PPC64LE-NEXT: # %bb.2: 3081; PPC64LE-NEXT: lwsync 3082; PPC64LE-NEXT: blr 3083 %ret = atomicrmw and i8* %ptr, i8 %val acquire 3084 ret i8 %ret 3085} 3086 3087define i8 @test182(i8* %ptr, i8 %val) { 3088; PPC64LE-LABEL: test182: 3089; PPC64LE: # %bb.0: 3090; PPC64LE-NEXT: lwsync 3091; PPC64LE-NEXT: .LBB182_1: 3092; PPC64LE-NEXT: lbarx 5, 0, 3 3093; PPC64LE-NEXT: and 6, 4, 5 3094; PPC64LE-NEXT: stbcx. 6, 0, 3 3095; PPC64LE-NEXT: bne 0, .LBB182_1 3096; PPC64LE-NEXT: # %bb.2: 3097; PPC64LE-NEXT: mr 3, 5 3098; PPC64LE-NEXT: blr 3099 %ret = atomicrmw and i8* %ptr, i8 %val release 3100 ret i8 %ret 3101} 3102 3103define i8 @test183(i8* %ptr, i8 %val) { 3104; PPC64LE-LABEL: test183: 3105; PPC64LE: # %bb.0: 3106; PPC64LE-NEXT: lwsync 3107; PPC64LE-NEXT: .LBB183_1: 3108; PPC64LE-NEXT: lbarx 5, 0, 3 3109; PPC64LE-NEXT: and 6, 4, 5 3110; PPC64LE-NEXT: stbcx. 6, 0, 3 3111; PPC64LE-NEXT: bne 0, .LBB183_1 3112; PPC64LE-NEXT: # %bb.2: 3113; PPC64LE-NEXT: mr 3, 5 3114; PPC64LE-NEXT: lwsync 3115; PPC64LE-NEXT: blr 3116 %ret = atomicrmw and i8* %ptr, i8 %val acq_rel 3117 ret i8 %ret 3118} 3119 3120define i8 @test184(i8* %ptr, i8 %val) { 3121; PPC64LE-LABEL: test184: 3122; PPC64LE: # %bb.0: 3123; PPC64LE-NEXT: sync 3124; PPC64LE-NEXT: .LBB184_1: 3125; PPC64LE-NEXT: lbarx 5, 0, 3 3126; PPC64LE-NEXT: and 6, 4, 5 3127; PPC64LE-NEXT: stbcx. 6, 0, 3 3128; PPC64LE-NEXT: bne 0, .LBB184_1 3129; PPC64LE-NEXT: # %bb.2: 3130; PPC64LE-NEXT: mr 3, 5 3131; PPC64LE-NEXT: lwsync 3132; PPC64LE-NEXT: blr 3133 %ret = atomicrmw and i8* %ptr, i8 %val seq_cst 3134 ret i8 %ret 3135} 3136 3137define i16 @test185(i16* %ptr, i16 %val) { 3138; PPC64LE-LABEL: test185: 3139; PPC64LE: # %bb.0: 3140; PPC64LE-NEXT: .LBB185_1: 3141; PPC64LE-NEXT: lharx 5, 0, 3 3142; PPC64LE-NEXT: and 6, 4, 5 3143; PPC64LE-NEXT: sthcx. 6, 0, 3 3144; PPC64LE-NEXT: bne 0, .LBB185_1 3145; PPC64LE-NEXT: # %bb.2: 3146; PPC64LE-NEXT: mr 3, 5 3147; PPC64LE-NEXT: blr 3148 %ret = atomicrmw and i16* %ptr, i16 %val monotonic 3149 ret i16 %ret 3150} 3151 3152define i16 @test186(i16* %ptr, i16 %val) { 3153; PPC64LE-LABEL: test186: 3154; PPC64LE: # %bb.0: 3155; PPC64LE-NEXT: mr 5, 3 3156; PPC64LE-NEXT: .LBB186_1: 3157; PPC64LE-NEXT: lharx 3, 0, 5 3158; PPC64LE-NEXT: and 6, 4, 3 3159; PPC64LE-NEXT: sthcx. 6, 0, 5 3160; PPC64LE-NEXT: bne 0, .LBB186_1 3161; PPC64LE-NEXT: # %bb.2: 3162; PPC64LE-NEXT: lwsync 3163; PPC64LE-NEXT: blr 3164 %ret = atomicrmw and i16* %ptr, i16 %val acquire 3165 ret i16 %ret 3166} 3167 3168define i16 @test187(i16* %ptr, i16 %val) { 3169; PPC64LE-LABEL: test187: 3170; PPC64LE: # %bb.0: 3171; PPC64LE-NEXT: lwsync 3172; PPC64LE-NEXT: .LBB187_1: 3173; PPC64LE-NEXT: lharx 5, 0, 3 3174; PPC64LE-NEXT: and 6, 4, 5 3175; PPC64LE-NEXT: sthcx. 6, 0, 3 3176; PPC64LE-NEXT: bne 0, .LBB187_1 3177; PPC64LE-NEXT: # %bb.2: 3178; PPC64LE-NEXT: mr 3, 5 3179; PPC64LE-NEXT: blr 3180 %ret = atomicrmw and i16* %ptr, i16 %val release 3181 ret i16 %ret 3182} 3183 3184define i16 @test188(i16* %ptr, i16 %val) { 3185; PPC64LE-LABEL: test188: 3186; PPC64LE: # %bb.0: 3187; PPC64LE-NEXT: lwsync 3188; PPC64LE-NEXT: .LBB188_1: 3189; PPC64LE-NEXT: lharx 5, 0, 3 3190; PPC64LE-NEXT: and 6, 4, 5 3191; PPC64LE-NEXT: sthcx. 6, 0, 3 3192; PPC64LE-NEXT: bne 0, .LBB188_1 3193; PPC64LE-NEXT: # %bb.2: 3194; PPC64LE-NEXT: mr 3, 5 3195; PPC64LE-NEXT: lwsync 3196; PPC64LE-NEXT: blr 3197 %ret = atomicrmw and i16* %ptr, i16 %val acq_rel 3198 ret i16 %ret 3199} 3200 3201define i16 @test189(i16* %ptr, i16 %val) { 3202; PPC64LE-LABEL: test189: 3203; PPC64LE: # %bb.0: 3204; PPC64LE-NEXT: sync 3205; PPC64LE-NEXT: .LBB189_1: 3206; PPC64LE-NEXT: lharx 5, 0, 3 3207; PPC64LE-NEXT: and 6, 4, 5 3208; PPC64LE-NEXT: sthcx. 6, 0, 3 3209; PPC64LE-NEXT: bne 0, .LBB189_1 3210; PPC64LE-NEXT: # %bb.2: 3211; PPC64LE-NEXT: mr 3, 5 3212; PPC64LE-NEXT: lwsync 3213; PPC64LE-NEXT: blr 3214 %ret = atomicrmw and i16* %ptr, i16 %val seq_cst 3215 ret i16 %ret 3216} 3217 3218define i32 @test190(i32* %ptr, i32 %val) { 3219; PPC64LE-LABEL: test190: 3220; PPC64LE: # %bb.0: 3221; PPC64LE-NEXT: .LBB190_1: 3222; PPC64LE-NEXT: lwarx 5, 0, 3 3223; PPC64LE-NEXT: and 6, 4, 5 3224; PPC64LE-NEXT: stwcx. 6, 0, 3 3225; PPC64LE-NEXT: bne 0, .LBB190_1 3226; PPC64LE-NEXT: # %bb.2: 3227; PPC64LE-NEXT: mr 3, 5 3228; PPC64LE-NEXT: blr 3229 %ret = atomicrmw and i32* %ptr, i32 %val monotonic 3230 ret i32 %ret 3231} 3232 3233define i32 @test191(i32* %ptr, i32 %val) { 3234; PPC64LE-LABEL: test191: 3235; PPC64LE: # %bb.0: 3236; PPC64LE-NEXT: mr 5, 3 3237; PPC64LE-NEXT: .LBB191_1: 3238; PPC64LE-NEXT: lwarx 3, 0, 5 3239; PPC64LE-NEXT: and 6, 4, 3 3240; PPC64LE-NEXT: stwcx. 6, 0, 5 3241; PPC64LE-NEXT: bne 0, .LBB191_1 3242; PPC64LE-NEXT: # %bb.2: 3243; PPC64LE-NEXT: lwsync 3244; PPC64LE-NEXT: blr 3245 %ret = atomicrmw and i32* %ptr, i32 %val acquire 3246 ret i32 %ret 3247} 3248 3249define i32 @test192(i32* %ptr, i32 %val) { 3250; PPC64LE-LABEL: test192: 3251; PPC64LE: # %bb.0: 3252; PPC64LE-NEXT: lwsync 3253; PPC64LE-NEXT: .LBB192_1: 3254; PPC64LE-NEXT: lwarx 5, 0, 3 3255; PPC64LE-NEXT: and 6, 4, 5 3256; PPC64LE-NEXT: stwcx. 6, 0, 3 3257; PPC64LE-NEXT: bne 0, .LBB192_1 3258; PPC64LE-NEXT: # %bb.2: 3259; PPC64LE-NEXT: mr 3, 5 3260; PPC64LE-NEXT: blr 3261 %ret = atomicrmw and i32* %ptr, i32 %val release 3262 ret i32 %ret 3263} 3264 3265define i32 @test193(i32* %ptr, i32 %val) { 3266; PPC64LE-LABEL: test193: 3267; PPC64LE: # %bb.0: 3268; PPC64LE-NEXT: lwsync 3269; PPC64LE-NEXT: .LBB193_1: 3270; PPC64LE-NEXT: lwarx 5, 0, 3 3271; PPC64LE-NEXT: and 6, 4, 5 3272; PPC64LE-NEXT: stwcx. 6, 0, 3 3273; PPC64LE-NEXT: bne 0, .LBB193_1 3274; PPC64LE-NEXT: # %bb.2: 3275; PPC64LE-NEXT: mr 3, 5 3276; PPC64LE-NEXT: lwsync 3277; PPC64LE-NEXT: blr 3278 %ret = atomicrmw and i32* %ptr, i32 %val acq_rel 3279 ret i32 %ret 3280} 3281 3282define i32 @test194(i32* %ptr, i32 %val) { 3283; PPC64LE-LABEL: test194: 3284; PPC64LE: # %bb.0: 3285; PPC64LE-NEXT: sync 3286; PPC64LE-NEXT: .LBB194_1: 3287; PPC64LE-NEXT: lwarx 5, 0, 3 3288; PPC64LE-NEXT: and 6, 4, 5 3289; PPC64LE-NEXT: stwcx. 6, 0, 3 3290; PPC64LE-NEXT: bne 0, .LBB194_1 3291; PPC64LE-NEXT: # %bb.2: 3292; PPC64LE-NEXT: mr 3, 5 3293; PPC64LE-NEXT: lwsync 3294; PPC64LE-NEXT: blr 3295 %ret = atomicrmw and i32* %ptr, i32 %val seq_cst 3296 ret i32 %ret 3297} 3298 3299define i64 @test195(i64* %ptr, i64 %val) { 3300; PPC64LE-LABEL: test195: 3301; PPC64LE: # %bb.0: 3302; PPC64LE-NEXT: .LBB195_1: 3303; PPC64LE-NEXT: ldarx 5, 0, 3 3304; PPC64LE-NEXT: and 6, 4, 5 3305; PPC64LE-NEXT: stdcx. 6, 0, 3 3306; PPC64LE-NEXT: bne 0, .LBB195_1 3307; PPC64LE-NEXT: # %bb.2: 3308; PPC64LE-NEXT: mr 3, 5 3309; PPC64LE-NEXT: blr 3310 %ret = atomicrmw and i64* %ptr, i64 %val monotonic 3311 ret i64 %ret 3312} 3313 3314define i64 @test196(i64* %ptr, i64 %val) { 3315; PPC64LE-LABEL: test196: 3316; PPC64LE: # %bb.0: 3317; PPC64LE-NEXT: mr 5, 3 3318; PPC64LE-NEXT: .LBB196_1: 3319; PPC64LE-NEXT: ldarx 3, 0, 5 3320; PPC64LE-NEXT: and 6, 4, 3 3321; PPC64LE-NEXT: stdcx. 6, 0, 5 3322; PPC64LE-NEXT: bne 0, .LBB196_1 3323; PPC64LE-NEXT: # %bb.2: 3324; PPC64LE-NEXT: lwsync 3325; PPC64LE-NEXT: blr 3326 %ret = atomicrmw and i64* %ptr, i64 %val acquire 3327 ret i64 %ret 3328} 3329 3330define i64 @test197(i64* %ptr, i64 %val) { 3331; PPC64LE-LABEL: test197: 3332; PPC64LE: # %bb.0: 3333; PPC64LE-NEXT: lwsync 3334; PPC64LE-NEXT: .LBB197_1: 3335; PPC64LE-NEXT: ldarx 5, 0, 3 3336; PPC64LE-NEXT: and 6, 4, 5 3337; PPC64LE-NEXT: stdcx. 6, 0, 3 3338; PPC64LE-NEXT: bne 0, .LBB197_1 3339; PPC64LE-NEXT: # %bb.2: 3340; PPC64LE-NEXT: mr 3, 5 3341; PPC64LE-NEXT: blr 3342 %ret = atomicrmw and i64* %ptr, i64 %val release 3343 ret i64 %ret 3344} 3345 3346define i64 @test198(i64* %ptr, i64 %val) { 3347; PPC64LE-LABEL: test198: 3348; PPC64LE: # %bb.0: 3349; PPC64LE-NEXT: lwsync 3350; PPC64LE-NEXT: .LBB198_1: 3351; PPC64LE-NEXT: ldarx 5, 0, 3 3352; PPC64LE-NEXT: and 6, 4, 5 3353; PPC64LE-NEXT: stdcx. 6, 0, 3 3354; PPC64LE-NEXT: bne 0, .LBB198_1 3355; PPC64LE-NEXT: # %bb.2: 3356; PPC64LE-NEXT: mr 3, 5 3357; PPC64LE-NEXT: lwsync 3358; PPC64LE-NEXT: blr 3359 %ret = atomicrmw and i64* %ptr, i64 %val acq_rel 3360 ret i64 %ret 3361} 3362 3363define i64 @test199(i64* %ptr, i64 %val) { 3364; PPC64LE-LABEL: test199: 3365; PPC64LE: # %bb.0: 3366; PPC64LE-NEXT: sync 3367; PPC64LE-NEXT: .LBB199_1: 3368; PPC64LE-NEXT: ldarx 5, 0, 3 3369; PPC64LE-NEXT: and 6, 4, 5 3370; PPC64LE-NEXT: stdcx. 6, 0, 3 3371; PPC64LE-NEXT: bne 0, .LBB199_1 3372; PPC64LE-NEXT: # %bb.2: 3373; PPC64LE-NEXT: mr 3, 5 3374; PPC64LE-NEXT: lwsync 3375; PPC64LE-NEXT: blr 3376 %ret = atomicrmw and i64* %ptr, i64 %val seq_cst 3377 ret i64 %ret 3378} 3379 3380define i8 @test200(i8* %ptr, i8 %val) { 3381; PPC64LE-LABEL: test200: 3382; PPC64LE: # %bb.0: 3383; PPC64LE-NEXT: .LBB200_1: 3384; PPC64LE-NEXT: lbarx 5, 0, 3 3385; PPC64LE-NEXT: nand 6, 4, 5 3386; PPC64LE-NEXT: stbcx. 6, 0, 3 3387; PPC64LE-NEXT: bne 0, .LBB200_1 3388; PPC64LE-NEXT: # %bb.2: 3389; PPC64LE-NEXT: mr 3, 5 3390; PPC64LE-NEXT: blr 3391 %ret = atomicrmw nand i8* %ptr, i8 %val monotonic 3392 ret i8 %ret 3393} 3394 3395define i8 @test201(i8* %ptr, i8 %val) { 3396; PPC64LE-LABEL: test201: 3397; PPC64LE: # %bb.0: 3398; PPC64LE-NEXT: mr 5, 3 3399; PPC64LE-NEXT: .LBB201_1: 3400; PPC64LE-NEXT: lbarx 3, 0, 5 3401; PPC64LE-NEXT: nand 6, 4, 3 3402; PPC64LE-NEXT: stbcx. 6, 0, 5 3403; PPC64LE-NEXT: bne 0, .LBB201_1 3404; PPC64LE-NEXT: # %bb.2: 3405; PPC64LE-NEXT: lwsync 3406; PPC64LE-NEXT: blr 3407 %ret = atomicrmw nand i8* %ptr, i8 %val acquire 3408 ret i8 %ret 3409} 3410 3411define i8 @test202(i8* %ptr, i8 %val) { 3412; PPC64LE-LABEL: test202: 3413; PPC64LE: # %bb.0: 3414; PPC64LE-NEXT: lwsync 3415; PPC64LE-NEXT: .LBB202_1: 3416; PPC64LE-NEXT: lbarx 5, 0, 3 3417; PPC64LE-NEXT: nand 6, 4, 5 3418; PPC64LE-NEXT: stbcx. 6, 0, 3 3419; PPC64LE-NEXT: bne 0, .LBB202_1 3420; PPC64LE-NEXT: # %bb.2: 3421; PPC64LE-NEXT: mr 3, 5 3422; PPC64LE-NEXT: blr 3423 %ret = atomicrmw nand i8* %ptr, i8 %val release 3424 ret i8 %ret 3425} 3426 3427define i8 @test203(i8* %ptr, i8 %val) { 3428; PPC64LE-LABEL: test203: 3429; PPC64LE: # %bb.0: 3430; PPC64LE-NEXT: lwsync 3431; PPC64LE-NEXT: .LBB203_1: 3432; PPC64LE-NEXT: lbarx 5, 0, 3 3433; PPC64LE-NEXT: nand 6, 4, 5 3434; PPC64LE-NEXT: stbcx. 6, 0, 3 3435; PPC64LE-NEXT: bne 0, .LBB203_1 3436; PPC64LE-NEXT: # %bb.2: 3437; PPC64LE-NEXT: mr 3, 5 3438; PPC64LE-NEXT: lwsync 3439; PPC64LE-NEXT: blr 3440 %ret = atomicrmw nand i8* %ptr, i8 %val acq_rel 3441 ret i8 %ret 3442} 3443 3444define i8 @test204(i8* %ptr, i8 %val) { 3445; PPC64LE-LABEL: test204: 3446; PPC64LE: # %bb.0: 3447; PPC64LE-NEXT: sync 3448; PPC64LE-NEXT: .LBB204_1: 3449; PPC64LE-NEXT: lbarx 5, 0, 3 3450; PPC64LE-NEXT: nand 6, 4, 5 3451; PPC64LE-NEXT: stbcx. 6, 0, 3 3452; PPC64LE-NEXT: bne 0, .LBB204_1 3453; PPC64LE-NEXT: # %bb.2: 3454; PPC64LE-NEXT: mr 3, 5 3455; PPC64LE-NEXT: lwsync 3456; PPC64LE-NEXT: blr 3457 %ret = atomicrmw nand i8* %ptr, i8 %val seq_cst 3458 ret i8 %ret 3459} 3460 3461define i16 @test205(i16* %ptr, i16 %val) { 3462; PPC64LE-LABEL: test205: 3463; PPC64LE: # %bb.0: 3464; PPC64LE-NEXT: .LBB205_1: 3465; PPC64LE-NEXT: lharx 5, 0, 3 3466; PPC64LE-NEXT: nand 6, 4, 5 3467; PPC64LE-NEXT: sthcx. 6, 0, 3 3468; PPC64LE-NEXT: bne 0, .LBB205_1 3469; PPC64LE-NEXT: # %bb.2: 3470; PPC64LE-NEXT: mr 3, 5 3471; PPC64LE-NEXT: blr 3472 %ret = atomicrmw nand i16* %ptr, i16 %val monotonic 3473 ret i16 %ret 3474} 3475 3476define i16 @test206(i16* %ptr, i16 %val) { 3477; PPC64LE-LABEL: test206: 3478; PPC64LE: # %bb.0: 3479; PPC64LE-NEXT: mr 5, 3 3480; PPC64LE-NEXT: .LBB206_1: 3481; PPC64LE-NEXT: lharx 3, 0, 5 3482; PPC64LE-NEXT: nand 6, 4, 3 3483; PPC64LE-NEXT: sthcx. 6, 0, 5 3484; PPC64LE-NEXT: bne 0, .LBB206_1 3485; PPC64LE-NEXT: # %bb.2: 3486; PPC64LE-NEXT: lwsync 3487; PPC64LE-NEXT: blr 3488 %ret = atomicrmw nand i16* %ptr, i16 %val acquire 3489 ret i16 %ret 3490} 3491 3492define i16 @test207(i16* %ptr, i16 %val) { 3493; PPC64LE-LABEL: test207: 3494; PPC64LE: # %bb.0: 3495; PPC64LE-NEXT: lwsync 3496; PPC64LE-NEXT: .LBB207_1: 3497; PPC64LE-NEXT: lharx 5, 0, 3 3498; PPC64LE-NEXT: nand 6, 4, 5 3499; PPC64LE-NEXT: sthcx. 6, 0, 3 3500; PPC64LE-NEXT: bne 0, .LBB207_1 3501; PPC64LE-NEXT: # %bb.2: 3502; PPC64LE-NEXT: mr 3, 5 3503; PPC64LE-NEXT: blr 3504 %ret = atomicrmw nand i16* %ptr, i16 %val release 3505 ret i16 %ret 3506} 3507 3508define i16 @test208(i16* %ptr, i16 %val) { 3509; PPC64LE-LABEL: test208: 3510; PPC64LE: # %bb.0: 3511; PPC64LE-NEXT: lwsync 3512; PPC64LE-NEXT: .LBB208_1: 3513; PPC64LE-NEXT: lharx 5, 0, 3 3514; PPC64LE-NEXT: nand 6, 4, 5 3515; PPC64LE-NEXT: sthcx. 6, 0, 3 3516; PPC64LE-NEXT: bne 0, .LBB208_1 3517; PPC64LE-NEXT: # %bb.2: 3518; PPC64LE-NEXT: mr 3, 5 3519; PPC64LE-NEXT: lwsync 3520; PPC64LE-NEXT: blr 3521 %ret = atomicrmw nand i16* %ptr, i16 %val acq_rel 3522 ret i16 %ret 3523} 3524 3525define i16 @test209(i16* %ptr, i16 %val) { 3526; PPC64LE-LABEL: test209: 3527; PPC64LE: # %bb.0: 3528; PPC64LE-NEXT: sync 3529; PPC64LE-NEXT: .LBB209_1: 3530; PPC64LE-NEXT: lharx 5, 0, 3 3531; PPC64LE-NEXT: nand 6, 4, 5 3532; PPC64LE-NEXT: sthcx. 6, 0, 3 3533; PPC64LE-NEXT: bne 0, .LBB209_1 3534; PPC64LE-NEXT: # %bb.2: 3535; PPC64LE-NEXT: mr 3, 5 3536; PPC64LE-NEXT: lwsync 3537; PPC64LE-NEXT: blr 3538 %ret = atomicrmw nand i16* %ptr, i16 %val seq_cst 3539 ret i16 %ret 3540} 3541 3542define i32 @test210(i32* %ptr, i32 %val) { 3543; PPC64LE-LABEL: test210: 3544; PPC64LE: # %bb.0: 3545; PPC64LE-NEXT: .LBB210_1: 3546; PPC64LE-NEXT: lwarx 5, 0, 3 3547; PPC64LE-NEXT: nand 6, 4, 5 3548; PPC64LE-NEXT: stwcx. 6, 0, 3 3549; PPC64LE-NEXT: bne 0, .LBB210_1 3550; PPC64LE-NEXT: # %bb.2: 3551; PPC64LE-NEXT: mr 3, 5 3552; PPC64LE-NEXT: blr 3553 %ret = atomicrmw nand i32* %ptr, i32 %val monotonic 3554 ret i32 %ret 3555} 3556 3557define i32 @test211(i32* %ptr, i32 %val) { 3558; PPC64LE-LABEL: test211: 3559; PPC64LE: # %bb.0: 3560; PPC64LE-NEXT: mr 5, 3 3561; PPC64LE-NEXT: .LBB211_1: 3562; PPC64LE-NEXT: lwarx 3, 0, 5 3563; PPC64LE-NEXT: nand 6, 4, 3 3564; PPC64LE-NEXT: stwcx. 6, 0, 5 3565; PPC64LE-NEXT: bne 0, .LBB211_1 3566; PPC64LE-NEXT: # %bb.2: 3567; PPC64LE-NEXT: lwsync 3568; PPC64LE-NEXT: blr 3569 %ret = atomicrmw nand i32* %ptr, i32 %val acquire 3570 ret i32 %ret 3571} 3572 3573define i32 @test212(i32* %ptr, i32 %val) { 3574; PPC64LE-LABEL: test212: 3575; PPC64LE: # %bb.0: 3576; PPC64LE-NEXT: lwsync 3577; PPC64LE-NEXT: .LBB212_1: 3578; PPC64LE-NEXT: lwarx 5, 0, 3 3579; PPC64LE-NEXT: nand 6, 4, 5 3580; PPC64LE-NEXT: stwcx. 6, 0, 3 3581; PPC64LE-NEXT: bne 0, .LBB212_1 3582; PPC64LE-NEXT: # %bb.2: 3583; PPC64LE-NEXT: mr 3, 5 3584; PPC64LE-NEXT: blr 3585 %ret = atomicrmw nand i32* %ptr, i32 %val release 3586 ret i32 %ret 3587} 3588 3589define i32 @test213(i32* %ptr, i32 %val) { 3590; PPC64LE-LABEL: test213: 3591; PPC64LE: # %bb.0: 3592; PPC64LE-NEXT: lwsync 3593; PPC64LE-NEXT: .LBB213_1: 3594; PPC64LE-NEXT: lwarx 5, 0, 3 3595; PPC64LE-NEXT: nand 6, 4, 5 3596; PPC64LE-NEXT: stwcx. 6, 0, 3 3597; PPC64LE-NEXT: bne 0, .LBB213_1 3598; PPC64LE-NEXT: # %bb.2: 3599; PPC64LE-NEXT: mr 3, 5 3600; PPC64LE-NEXT: lwsync 3601; PPC64LE-NEXT: blr 3602 %ret = atomicrmw nand i32* %ptr, i32 %val acq_rel 3603 ret i32 %ret 3604} 3605 3606define i32 @test214(i32* %ptr, i32 %val) { 3607; PPC64LE-LABEL: test214: 3608; PPC64LE: # %bb.0: 3609; PPC64LE-NEXT: sync 3610; PPC64LE-NEXT: .LBB214_1: 3611; PPC64LE-NEXT: lwarx 5, 0, 3 3612; PPC64LE-NEXT: nand 6, 4, 5 3613; PPC64LE-NEXT: stwcx. 6, 0, 3 3614; PPC64LE-NEXT: bne 0, .LBB214_1 3615; PPC64LE-NEXT: # %bb.2: 3616; PPC64LE-NEXT: mr 3, 5 3617; PPC64LE-NEXT: lwsync 3618; PPC64LE-NEXT: blr 3619 %ret = atomicrmw nand i32* %ptr, i32 %val seq_cst 3620 ret i32 %ret 3621} 3622 3623define i64 @test215(i64* %ptr, i64 %val) { 3624; PPC64LE-LABEL: test215: 3625; PPC64LE: # %bb.0: 3626; PPC64LE-NEXT: .LBB215_1: 3627; PPC64LE-NEXT: ldarx 5, 0, 3 3628; PPC64LE-NEXT: nand 6, 4, 5 3629; PPC64LE-NEXT: stdcx. 6, 0, 3 3630; PPC64LE-NEXT: bne 0, .LBB215_1 3631; PPC64LE-NEXT: # %bb.2: 3632; PPC64LE-NEXT: mr 3, 5 3633; PPC64LE-NEXT: blr 3634 %ret = atomicrmw nand i64* %ptr, i64 %val monotonic 3635 ret i64 %ret 3636} 3637 3638define i64 @test216(i64* %ptr, i64 %val) { 3639; PPC64LE-LABEL: test216: 3640; PPC64LE: # %bb.0: 3641; PPC64LE-NEXT: mr 5, 3 3642; PPC64LE-NEXT: .LBB216_1: 3643; PPC64LE-NEXT: ldarx 3, 0, 5 3644; PPC64LE-NEXT: nand 6, 4, 3 3645; PPC64LE-NEXT: stdcx. 6, 0, 5 3646; PPC64LE-NEXT: bne 0, .LBB216_1 3647; PPC64LE-NEXT: # %bb.2: 3648; PPC64LE-NEXT: lwsync 3649; PPC64LE-NEXT: blr 3650 %ret = atomicrmw nand i64* %ptr, i64 %val acquire 3651 ret i64 %ret 3652} 3653 3654define i64 @test217(i64* %ptr, i64 %val) { 3655; PPC64LE-LABEL: test217: 3656; PPC64LE: # %bb.0: 3657; PPC64LE-NEXT: lwsync 3658; PPC64LE-NEXT: .LBB217_1: 3659; PPC64LE-NEXT: ldarx 5, 0, 3 3660; PPC64LE-NEXT: nand 6, 4, 5 3661; PPC64LE-NEXT: stdcx. 6, 0, 3 3662; PPC64LE-NEXT: bne 0, .LBB217_1 3663; PPC64LE-NEXT: # %bb.2: 3664; PPC64LE-NEXT: mr 3, 5 3665; PPC64LE-NEXT: blr 3666 %ret = atomicrmw nand i64* %ptr, i64 %val release 3667 ret i64 %ret 3668} 3669 3670define i64 @test218(i64* %ptr, i64 %val) { 3671; PPC64LE-LABEL: test218: 3672; PPC64LE: # %bb.0: 3673; PPC64LE-NEXT: lwsync 3674; PPC64LE-NEXT: .LBB218_1: 3675; PPC64LE-NEXT: ldarx 5, 0, 3 3676; PPC64LE-NEXT: nand 6, 4, 5 3677; PPC64LE-NEXT: stdcx. 6, 0, 3 3678; PPC64LE-NEXT: bne 0, .LBB218_1 3679; PPC64LE-NEXT: # %bb.2: 3680; PPC64LE-NEXT: mr 3, 5 3681; PPC64LE-NEXT: lwsync 3682; PPC64LE-NEXT: blr 3683 %ret = atomicrmw nand i64* %ptr, i64 %val acq_rel 3684 ret i64 %ret 3685} 3686 3687define i64 @test219(i64* %ptr, i64 %val) { 3688; PPC64LE-LABEL: test219: 3689; PPC64LE: # %bb.0: 3690; PPC64LE-NEXT: sync 3691; PPC64LE-NEXT: .LBB219_1: 3692; PPC64LE-NEXT: ldarx 5, 0, 3 3693; PPC64LE-NEXT: nand 6, 4, 5 3694; PPC64LE-NEXT: stdcx. 6, 0, 3 3695; PPC64LE-NEXT: bne 0, .LBB219_1 3696; PPC64LE-NEXT: # %bb.2: 3697; PPC64LE-NEXT: mr 3, 5 3698; PPC64LE-NEXT: lwsync 3699; PPC64LE-NEXT: blr 3700 %ret = atomicrmw nand i64* %ptr, i64 %val seq_cst 3701 ret i64 %ret 3702} 3703 3704define i8 @test220(i8* %ptr, i8 %val) { 3705; PPC64LE-LABEL: test220: 3706; PPC64LE: # %bb.0: 3707; PPC64LE-NEXT: .LBB220_1: 3708; PPC64LE-NEXT: lbarx 5, 0, 3 3709; PPC64LE-NEXT: or 6, 4, 5 3710; PPC64LE-NEXT: stbcx. 6, 0, 3 3711; PPC64LE-NEXT: bne 0, .LBB220_1 3712; PPC64LE-NEXT: # %bb.2: 3713; PPC64LE-NEXT: mr 3, 5 3714; PPC64LE-NEXT: blr 3715 %ret = atomicrmw or i8* %ptr, i8 %val monotonic 3716 ret i8 %ret 3717} 3718 3719define i8 @test221(i8* %ptr, i8 %val) { 3720; PPC64LE-LABEL: test221: 3721; PPC64LE: # %bb.0: 3722; PPC64LE-NEXT: mr 5, 3 3723; PPC64LE-NEXT: .LBB221_1: 3724; PPC64LE-NEXT: lbarx 3, 0, 5 3725; PPC64LE-NEXT: or 6, 4, 3 3726; PPC64LE-NEXT: stbcx. 6, 0, 5 3727; PPC64LE-NEXT: bne 0, .LBB221_1 3728; PPC64LE-NEXT: # %bb.2: 3729; PPC64LE-NEXT: lwsync 3730; PPC64LE-NEXT: blr 3731 %ret = atomicrmw or i8* %ptr, i8 %val acquire 3732 ret i8 %ret 3733} 3734 3735define i8 @test222(i8* %ptr, i8 %val) { 3736; PPC64LE-LABEL: test222: 3737; PPC64LE: # %bb.0: 3738; PPC64LE-NEXT: lwsync 3739; PPC64LE-NEXT: .LBB222_1: 3740; PPC64LE-NEXT: lbarx 5, 0, 3 3741; PPC64LE-NEXT: or 6, 4, 5 3742; PPC64LE-NEXT: stbcx. 6, 0, 3 3743; PPC64LE-NEXT: bne 0, .LBB222_1 3744; PPC64LE-NEXT: # %bb.2: 3745; PPC64LE-NEXT: mr 3, 5 3746; PPC64LE-NEXT: blr 3747 %ret = atomicrmw or i8* %ptr, i8 %val release 3748 ret i8 %ret 3749} 3750 3751define i8 @test223(i8* %ptr, i8 %val) { 3752; PPC64LE-LABEL: test223: 3753; PPC64LE: # %bb.0: 3754; PPC64LE-NEXT: lwsync 3755; PPC64LE-NEXT: .LBB223_1: 3756; PPC64LE-NEXT: lbarx 5, 0, 3 3757; PPC64LE-NEXT: or 6, 4, 5 3758; PPC64LE-NEXT: stbcx. 6, 0, 3 3759; PPC64LE-NEXT: bne 0, .LBB223_1 3760; PPC64LE-NEXT: # %bb.2: 3761; PPC64LE-NEXT: mr 3, 5 3762; PPC64LE-NEXT: lwsync 3763; PPC64LE-NEXT: blr 3764 %ret = atomicrmw or i8* %ptr, i8 %val acq_rel 3765 ret i8 %ret 3766} 3767 3768define i8 @test224(i8* %ptr, i8 %val) { 3769; PPC64LE-LABEL: test224: 3770; PPC64LE: # %bb.0: 3771; PPC64LE-NEXT: sync 3772; PPC64LE-NEXT: .LBB224_1: 3773; PPC64LE-NEXT: lbarx 5, 0, 3 3774; PPC64LE-NEXT: or 6, 4, 5 3775; PPC64LE-NEXT: stbcx. 6, 0, 3 3776; PPC64LE-NEXT: bne 0, .LBB224_1 3777; PPC64LE-NEXT: # %bb.2: 3778; PPC64LE-NEXT: mr 3, 5 3779; PPC64LE-NEXT: lwsync 3780; PPC64LE-NEXT: blr 3781 %ret = atomicrmw or i8* %ptr, i8 %val seq_cst 3782 ret i8 %ret 3783} 3784 3785define i16 @test225(i16* %ptr, i16 %val) { 3786; PPC64LE-LABEL: test225: 3787; PPC64LE: # %bb.0: 3788; PPC64LE-NEXT: .LBB225_1: 3789; PPC64LE-NEXT: lharx 5, 0, 3 3790; PPC64LE-NEXT: or 6, 4, 5 3791; PPC64LE-NEXT: sthcx. 6, 0, 3 3792; PPC64LE-NEXT: bne 0, .LBB225_1 3793; PPC64LE-NEXT: # %bb.2: 3794; PPC64LE-NEXT: mr 3, 5 3795; PPC64LE-NEXT: blr 3796 %ret = atomicrmw or i16* %ptr, i16 %val monotonic 3797 ret i16 %ret 3798} 3799 3800define i16 @test226(i16* %ptr, i16 %val) { 3801; PPC64LE-LABEL: test226: 3802; PPC64LE: # %bb.0: 3803; PPC64LE-NEXT: mr 5, 3 3804; PPC64LE-NEXT: .LBB226_1: 3805; PPC64LE-NEXT: lharx 3, 0, 5 3806; PPC64LE-NEXT: or 6, 4, 3 3807; PPC64LE-NEXT: sthcx. 6, 0, 5 3808; PPC64LE-NEXT: bne 0, .LBB226_1 3809; PPC64LE-NEXT: # %bb.2: 3810; PPC64LE-NEXT: lwsync 3811; PPC64LE-NEXT: blr 3812 %ret = atomicrmw or i16* %ptr, i16 %val acquire 3813 ret i16 %ret 3814} 3815 3816define i16 @test227(i16* %ptr, i16 %val) { 3817; PPC64LE-LABEL: test227: 3818; PPC64LE: # %bb.0: 3819; PPC64LE-NEXT: lwsync 3820; PPC64LE-NEXT: .LBB227_1: 3821; PPC64LE-NEXT: lharx 5, 0, 3 3822; PPC64LE-NEXT: or 6, 4, 5 3823; PPC64LE-NEXT: sthcx. 6, 0, 3 3824; PPC64LE-NEXT: bne 0, .LBB227_1 3825; PPC64LE-NEXT: # %bb.2: 3826; PPC64LE-NEXT: mr 3, 5 3827; PPC64LE-NEXT: blr 3828 %ret = atomicrmw or i16* %ptr, i16 %val release 3829 ret i16 %ret 3830} 3831 3832define i16 @test228(i16* %ptr, i16 %val) { 3833; PPC64LE-LABEL: test228: 3834; PPC64LE: # %bb.0: 3835; PPC64LE-NEXT: lwsync 3836; PPC64LE-NEXT: .LBB228_1: 3837; PPC64LE-NEXT: lharx 5, 0, 3 3838; PPC64LE-NEXT: or 6, 4, 5 3839; PPC64LE-NEXT: sthcx. 6, 0, 3 3840; PPC64LE-NEXT: bne 0, .LBB228_1 3841; PPC64LE-NEXT: # %bb.2: 3842; PPC64LE-NEXT: mr 3, 5 3843; PPC64LE-NEXT: lwsync 3844; PPC64LE-NEXT: blr 3845 %ret = atomicrmw or i16* %ptr, i16 %val acq_rel 3846 ret i16 %ret 3847} 3848 3849define i16 @test229(i16* %ptr, i16 %val) { 3850; PPC64LE-LABEL: test229: 3851; PPC64LE: # %bb.0: 3852; PPC64LE-NEXT: sync 3853; PPC64LE-NEXT: .LBB229_1: 3854; PPC64LE-NEXT: lharx 5, 0, 3 3855; PPC64LE-NEXT: or 6, 4, 5 3856; PPC64LE-NEXT: sthcx. 6, 0, 3 3857; PPC64LE-NEXT: bne 0, .LBB229_1 3858; PPC64LE-NEXT: # %bb.2: 3859; PPC64LE-NEXT: mr 3, 5 3860; PPC64LE-NEXT: lwsync 3861; PPC64LE-NEXT: blr 3862 %ret = atomicrmw or i16* %ptr, i16 %val seq_cst 3863 ret i16 %ret 3864} 3865 3866define i32 @test230(i32* %ptr, i32 %val) { 3867; PPC64LE-LABEL: test230: 3868; PPC64LE: # %bb.0: 3869; PPC64LE-NEXT: .LBB230_1: 3870; PPC64LE-NEXT: lwarx 5, 0, 3 3871; PPC64LE-NEXT: or 6, 4, 5 3872; PPC64LE-NEXT: stwcx. 6, 0, 3 3873; PPC64LE-NEXT: bne 0, .LBB230_1 3874; PPC64LE-NEXT: # %bb.2: 3875; PPC64LE-NEXT: mr 3, 5 3876; PPC64LE-NEXT: blr 3877 %ret = atomicrmw or i32* %ptr, i32 %val monotonic 3878 ret i32 %ret 3879} 3880 3881define i32 @test231(i32* %ptr, i32 %val) { 3882; PPC64LE-LABEL: test231: 3883; PPC64LE: # %bb.0: 3884; PPC64LE-NEXT: mr 5, 3 3885; PPC64LE-NEXT: .LBB231_1: 3886; PPC64LE-NEXT: lwarx 3, 0, 5 3887; PPC64LE-NEXT: or 6, 4, 3 3888; PPC64LE-NEXT: stwcx. 6, 0, 5 3889; PPC64LE-NEXT: bne 0, .LBB231_1 3890; PPC64LE-NEXT: # %bb.2: 3891; PPC64LE-NEXT: lwsync 3892; PPC64LE-NEXT: blr 3893 %ret = atomicrmw or i32* %ptr, i32 %val acquire 3894 ret i32 %ret 3895} 3896 3897define i32 @test232(i32* %ptr, i32 %val) { 3898; PPC64LE-LABEL: test232: 3899; PPC64LE: # %bb.0: 3900; PPC64LE-NEXT: lwsync 3901; PPC64LE-NEXT: .LBB232_1: 3902; PPC64LE-NEXT: lwarx 5, 0, 3 3903; PPC64LE-NEXT: or 6, 4, 5 3904; PPC64LE-NEXT: stwcx. 6, 0, 3 3905; PPC64LE-NEXT: bne 0, .LBB232_1 3906; PPC64LE-NEXT: # %bb.2: 3907; PPC64LE-NEXT: mr 3, 5 3908; PPC64LE-NEXT: blr 3909 %ret = atomicrmw or i32* %ptr, i32 %val release 3910 ret i32 %ret 3911} 3912 3913define i32 @test233(i32* %ptr, i32 %val) { 3914; PPC64LE-LABEL: test233: 3915; PPC64LE: # %bb.0: 3916; PPC64LE-NEXT: lwsync 3917; PPC64LE-NEXT: .LBB233_1: 3918; PPC64LE-NEXT: lwarx 5, 0, 3 3919; PPC64LE-NEXT: or 6, 4, 5 3920; PPC64LE-NEXT: stwcx. 6, 0, 3 3921; PPC64LE-NEXT: bne 0, .LBB233_1 3922; PPC64LE-NEXT: # %bb.2: 3923; PPC64LE-NEXT: mr 3, 5 3924; PPC64LE-NEXT: lwsync 3925; PPC64LE-NEXT: blr 3926 %ret = atomicrmw or i32* %ptr, i32 %val acq_rel 3927 ret i32 %ret 3928} 3929 3930define i32 @test234(i32* %ptr, i32 %val) { 3931; PPC64LE-LABEL: test234: 3932; PPC64LE: # %bb.0: 3933; PPC64LE-NEXT: sync 3934; PPC64LE-NEXT: .LBB234_1: 3935; PPC64LE-NEXT: lwarx 5, 0, 3 3936; PPC64LE-NEXT: or 6, 4, 5 3937; PPC64LE-NEXT: stwcx. 6, 0, 3 3938; PPC64LE-NEXT: bne 0, .LBB234_1 3939; PPC64LE-NEXT: # %bb.2: 3940; PPC64LE-NEXT: mr 3, 5 3941; PPC64LE-NEXT: lwsync 3942; PPC64LE-NEXT: blr 3943 %ret = atomicrmw or i32* %ptr, i32 %val seq_cst 3944 ret i32 %ret 3945} 3946 3947define i64 @test235(i64* %ptr, i64 %val) { 3948; PPC64LE-LABEL: test235: 3949; PPC64LE: # %bb.0: 3950; PPC64LE-NEXT: .LBB235_1: 3951; PPC64LE-NEXT: ldarx 5, 0, 3 3952; PPC64LE-NEXT: or 6, 4, 5 3953; PPC64LE-NEXT: stdcx. 6, 0, 3 3954; PPC64LE-NEXT: bne 0, .LBB235_1 3955; PPC64LE-NEXT: # %bb.2: 3956; PPC64LE-NEXT: mr 3, 5 3957; PPC64LE-NEXT: blr 3958 %ret = atomicrmw or i64* %ptr, i64 %val monotonic 3959 ret i64 %ret 3960} 3961 3962define i64 @test236(i64* %ptr, i64 %val) { 3963; PPC64LE-LABEL: test236: 3964; PPC64LE: # %bb.0: 3965; PPC64LE-NEXT: mr 5, 3 3966; PPC64LE-NEXT: .LBB236_1: 3967; PPC64LE-NEXT: ldarx 3, 0, 5 3968; PPC64LE-NEXT: or 6, 4, 3 3969; PPC64LE-NEXT: stdcx. 6, 0, 5 3970; PPC64LE-NEXT: bne 0, .LBB236_1 3971; PPC64LE-NEXT: # %bb.2: 3972; PPC64LE-NEXT: lwsync 3973; PPC64LE-NEXT: blr 3974 %ret = atomicrmw or i64* %ptr, i64 %val acquire 3975 ret i64 %ret 3976} 3977 3978define i64 @test237(i64* %ptr, i64 %val) { 3979; PPC64LE-LABEL: test237: 3980; PPC64LE: # %bb.0: 3981; PPC64LE-NEXT: lwsync 3982; PPC64LE-NEXT: .LBB237_1: 3983; PPC64LE-NEXT: ldarx 5, 0, 3 3984; PPC64LE-NEXT: or 6, 4, 5 3985; PPC64LE-NEXT: stdcx. 6, 0, 3 3986; PPC64LE-NEXT: bne 0, .LBB237_1 3987; PPC64LE-NEXT: # %bb.2: 3988; PPC64LE-NEXT: mr 3, 5 3989; PPC64LE-NEXT: blr 3990 %ret = atomicrmw or i64* %ptr, i64 %val release 3991 ret i64 %ret 3992} 3993 3994define i64 @test238(i64* %ptr, i64 %val) { 3995; PPC64LE-LABEL: test238: 3996; PPC64LE: # %bb.0: 3997; PPC64LE-NEXT: lwsync 3998; PPC64LE-NEXT: .LBB238_1: 3999; PPC64LE-NEXT: ldarx 5, 0, 3 4000; PPC64LE-NEXT: or 6, 4, 5 4001; PPC64LE-NEXT: stdcx. 6, 0, 3 4002; PPC64LE-NEXT: bne 0, .LBB238_1 4003; PPC64LE-NEXT: # %bb.2: 4004; PPC64LE-NEXT: mr 3, 5 4005; PPC64LE-NEXT: lwsync 4006; PPC64LE-NEXT: blr 4007 %ret = atomicrmw or i64* %ptr, i64 %val acq_rel 4008 ret i64 %ret 4009} 4010 4011define i64 @test239(i64* %ptr, i64 %val) { 4012; PPC64LE-LABEL: test239: 4013; PPC64LE: # %bb.0: 4014; PPC64LE-NEXT: sync 4015; PPC64LE-NEXT: .LBB239_1: 4016; PPC64LE-NEXT: ldarx 5, 0, 3 4017; PPC64LE-NEXT: or 6, 4, 5 4018; PPC64LE-NEXT: stdcx. 6, 0, 3 4019; PPC64LE-NEXT: bne 0, .LBB239_1 4020; PPC64LE-NEXT: # %bb.2: 4021; PPC64LE-NEXT: mr 3, 5 4022; PPC64LE-NEXT: lwsync 4023; PPC64LE-NEXT: blr 4024 %ret = atomicrmw or i64* %ptr, i64 %val seq_cst 4025 ret i64 %ret 4026} 4027 4028define i8 @test240(i8* %ptr, i8 %val) { 4029; PPC64LE-LABEL: test240: 4030; PPC64LE: # %bb.0: 4031; PPC64LE-NEXT: .LBB240_1: 4032; PPC64LE-NEXT: lbarx 5, 0, 3 4033; PPC64LE-NEXT: xor 6, 4, 5 4034; PPC64LE-NEXT: stbcx. 6, 0, 3 4035; PPC64LE-NEXT: bne 0, .LBB240_1 4036; PPC64LE-NEXT: # %bb.2: 4037; PPC64LE-NEXT: mr 3, 5 4038; PPC64LE-NEXT: blr 4039 %ret = atomicrmw xor i8* %ptr, i8 %val monotonic 4040 ret i8 %ret 4041} 4042 4043define i8 @test241(i8* %ptr, i8 %val) { 4044; PPC64LE-LABEL: test241: 4045; PPC64LE: # %bb.0: 4046; PPC64LE-NEXT: mr 5, 3 4047; PPC64LE-NEXT: .LBB241_1: 4048; PPC64LE-NEXT: lbarx 3, 0, 5 4049; PPC64LE-NEXT: xor 6, 4, 3 4050; PPC64LE-NEXT: stbcx. 6, 0, 5 4051; PPC64LE-NEXT: bne 0, .LBB241_1 4052; PPC64LE-NEXT: # %bb.2: 4053; PPC64LE-NEXT: lwsync 4054; PPC64LE-NEXT: blr 4055 %ret = atomicrmw xor i8* %ptr, i8 %val acquire 4056 ret i8 %ret 4057} 4058 4059define i8 @test242(i8* %ptr, i8 %val) { 4060; PPC64LE-LABEL: test242: 4061; PPC64LE: # %bb.0: 4062; PPC64LE-NEXT: lwsync 4063; PPC64LE-NEXT: .LBB242_1: 4064; PPC64LE-NEXT: lbarx 5, 0, 3 4065; PPC64LE-NEXT: xor 6, 4, 5 4066; PPC64LE-NEXT: stbcx. 6, 0, 3 4067; PPC64LE-NEXT: bne 0, .LBB242_1 4068; PPC64LE-NEXT: # %bb.2: 4069; PPC64LE-NEXT: mr 3, 5 4070; PPC64LE-NEXT: blr 4071 %ret = atomicrmw xor i8* %ptr, i8 %val release 4072 ret i8 %ret 4073} 4074 4075define i8 @test243(i8* %ptr, i8 %val) { 4076; PPC64LE-LABEL: test243: 4077; PPC64LE: # %bb.0: 4078; PPC64LE-NEXT: lwsync 4079; PPC64LE-NEXT: .LBB243_1: 4080; PPC64LE-NEXT: lbarx 5, 0, 3 4081; PPC64LE-NEXT: xor 6, 4, 5 4082; PPC64LE-NEXT: stbcx. 6, 0, 3 4083; PPC64LE-NEXT: bne 0, .LBB243_1 4084; PPC64LE-NEXT: # %bb.2: 4085; PPC64LE-NEXT: mr 3, 5 4086; PPC64LE-NEXT: lwsync 4087; PPC64LE-NEXT: blr 4088 %ret = atomicrmw xor i8* %ptr, i8 %val acq_rel 4089 ret i8 %ret 4090} 4091 4092define i8 @test244(i8* %ptr, i8 %val) { 4093; PPC64LE-LABEL: test244: 4094; PPC64LE: # %bb.0: 4095; PPC64LE-NEXT: sync 4096; PPC64LE-NEXT: .LBB244_1: 4097; PPC64LE-NEXT: lbarx 5, 0, 3 4098; PPC64LE-NEXT: xor 6, 4, 5 4099; PPC64LE-NEXT: stbcx. 6, 0, 3 4100; PPC64LE-NEXT: bne 0, .LBB244_1 4101; PPC64LE-NEXT: # %bb.2: 4102; PPC64LE-NEXT: mr 3, 5 4103; PPC64LE-NEXT: lwsync 4104; PPC64LE-NEXT: blr 4105 %ret = atomicrmw xor i8* %ptr, i8 %val seq_cst 4106 ret i8 %ret 4107} 4108 4109define i16 @test245(i16* %ptr, i16 %val) { 4110; PPC64LE-LABEL: test245: 4111; PPC64LE: # %bb.0: 4112; PPC64LE-NEXT: .LBB245_1: 4113; PPC64LE-NEXT: lharx 5, 0, 3 4114; PPC64LE-NEXT: xor 6, 4, 5 4115; PPC64LE-NEXT: sthcx. 6, 0, 3 4116; PPC64LE-NEXT: bne 0, .LBB245_1 4117; PPC64LE-NEXT: # %bb.2: 4118; PPC64LE-NEXT: mr 3, 5 4119; PPC64LE-NEXT: blr 4120 %ret = atomicrmw xor i16* %ptr, i16 %val monotonic 4121 ret i16 %ret 4122} 4123 4124define i16 @test246(i16* %ptr, i16 %val) { 4125; PPC64LE-LABEL: test246: 4126; PPC64LE: # %bb.0: 4127; PPC64LE-NEXT: mr 5, 3 4128; PPC64LE-NEXT: .LBB246_1: 4129; PPC64LE-NEXT: lharx 3, 0, 5 4130; PPC64LE-NEXT: xor 6, 4, 3 4131; PPC64LE-NEXT: sthcx. 6, 0, 5 4132; PPC64LE-NEXT: bne 0, .LBB246_1 4133; PPC64LE-NEXT: # %bb.2: 4134; PPC64LE-NEXT: lwsync 4135; PPC64LE-NEXT: blr 4136 %ret = atomicrmw xor i16* %ptr, i16 %val acquire 4137 ret i16 %ret 4138} 4139 4140define i16 @test247(i16* %ptr, i16 %val) { 4141; PPC64LE-LABEL: test247: 4142; PPC64LE: # %bb.0: 4143; PPC64LE-NEXT: lwsync 4144; PPC64LE-NEXT: .LBB247_1: 4145; PPC64LE-NEXT: lharx 5, 0, 3 4146; PPC64LE-NEXT: xor 6, 4, 5 4147; PPC64LE-NEXT: sthcx. 6, 0, 3 4148; PPC64LE-NEXT: bne 0, .LBB247_1 4149; PPC64LE-NEXT: # %bb.2: 4150; PPC64LE-NEXT: mr 3, 5 4151; PPC64LE-NEXT: blr 4152 %ret = atomicrmw xor i16* %ptr, i16 %val release 4153 ret i16 %ret 4154} 4155 4156define i16 @test248(i16* %ptr, i16 %val) { 4157; PPC64LE-LABEL: test248: 4158; PPC64LE: # %bb.0: 4159; PPC64LE-NEXT: lwsync 4160; PPC64LE-NEXT: .LBB248_1: 4161; PPC64LE-NEXT: lharx 5, 0, 3 4162; PPC64LE-NEXT: xor 6, 4, 5 4163; PPC64LE-NEXT: sthcx. 6, 0, 3 4164; PPC64LE-NEXT: bne 0, .LBB248_1 4165; PPC64LE-NEXT: # %bb.2: 4166; PPC64LE-NEXT: mr 3, 5 4167; PPC64LE-NEXT: lwsync 4168; PPC64LE-NEXT: blr 4169 %ret = atomicrmw xor i16* %ptr, i16 %val acq_rel 4170 ret i16 %ret 4171} 4172 4173define i16 @test249(i16* %ptr, i16 %val) { 4174; PPC64LE-LABEL: test249: 4175; PPC64LE: # %bb.0: 4176; PPC64LE-NEXT: sync 4177; PPC64LE-NEXT: .LBB249_1: 4178; PPC64LE-NEXT: lharx 5, 0, 3 4179; PPC64LE-NEXT: xor 6, 4, 5 4180; PPC64LE-NEXT: sthcx. 6, 0, 3 4181; PPC64LE-NEXT: bne 0, .LBB249_1 4182; PPC64LE-NEXT: # %bb.2: 4183; PPC64LE-NEXT: mr 3, 5 4184; PPC64LE-NEXT: lwsync 4185; PPC64LE-NEXT: blr 4186 %ret = atomicrmw xor i16* %ptr, i16 %val seq_cst 4187 ret i16 %ret 4188} 4189 4190define i32 @test250(i32* %ptr, i32 %val) { 4191; PPC64LE-LABEL: test250: 4192; PPC64LE: # %bb.0: 4193; PPC64LE-NEXT: .LBB250_1: 4194; PPC64LE-NEXT: lwarx 5, 0, 3 4195; PPC64LE-NEXT: xor 6, 4, 5 4196; PPC64LE-NEXT: stwcx. 6, 0, 3 4197; PPC64LE-NEXT: bne 0, .LBB250_1 4198; PPC64LE-NEXT: # %bb.2: 4199; PPC64LE-NEXT: mr 3, 5 4200; PPC64LE-NEXT: blr 4201 %ret = atomicrmw xor i32* %ptr, i32 %val monotonic 4202 ret i32 %ret 4203} 4204 4205define i32 @test251(i32* %ptr, i32 %val) { 4206; PPC64LE-LABEL: test251: 4207; PPC64LE: # %bb.0: 4208; PPC64LE-NEXT: mr 5, 3 4209; PPC64LE-NEXT: .LBB251_1: 4210; PPC64LE-NEXT: lwarx 3, 0, 5 4211; PPC64LE-NEXT: xor 6, 4, 3 4212; PPC64LE-NEXT: stwcx. 6, 0, 5 4213; PPC64LE-NEXT: bne 0, .LBB251_1 4214; PPC64LE-NEXT: # %bb.2: 4215; PPC64LE-NEXT: lwsync 4216; PPC64LE-NEXT: blr 4217 %ret = atomicrmw xor i32* %ptr, i32 %val acquire 4218 ret i32 %ret 4219} 4220 4221define i32 @test252(i32* %ptr, i32 %val) { 4222; PPC64LE-LABEL: test252: 4223; PPC64LE: # %bb.0: 4224; PPC64LE-NEXT: lwsync 4225; PPC64LE-NEXT: .LBB252_1: 4226; PPC64LE-NEXT: lwarx 5, 0, 3 4227; PPC64LE-NEXT: xor 6, 4, 5 4228; PPC64LE-NEXT: stwcx. 6, 0, 3 4229; PPC64LE-NEXT: bne 0, .LBB252_1 4230; PPC64LE-NEXT: # %bb.2: 4231; PPC64LE-NEXT: mr 3, 5 4232; PPC64LE-NEXT: blr 4233 %ret = atomicrmw xor i32* %ptr, i32 %val release 4234 ret i32 %ret 4235} 4236 4237define i32 @test253(i32* %ptr, i32 %val) { 4238; PPC64LE-LABEL: test253: 4239; PPC64LE: # %bb.0: 4240; PPC64LE-NEXT: lwsync 4241; PPC64LE-NEXT: .LBB253_1: 4242; PPC64LE-NEXT: lwarx 5, 0, 3 4243; PPC64LE-NEXT: xor 6, 4, 5 4244; PPC64LE-NEXT: stwcx. 6, 0, 3 4245; PPC64LE-NEXT: bne 0, .LBB253_1 4246; PPC64LE-NEXT: # %bb.2: 4247; PPC64LE-NEXT: mr 3, 5 4248; PPC64LE-NEXT: lwsync 4249; PPC64LE-NEXT: blr 4250 %ret = atomicrmw xor i32* %ptr, i32 %val acq_rel 4251 ret i32 %ret 4252} 4253 4254define i32 @test254(i32* %ptr, i32 %val) { 4255; PPC64LE-LABEL: test254: 4256; PPC64LE: # %bb.0: 4257; PPC64LE-NEXT: sync 4258; PPC64LE-NEXT: .LBB254_1: 4259; PPC64LE-NEXT: lwarx 5, 0, 3 4260; PPC64LE-NEXT: xor 6, 4, 5 4261; PPC64LE-NEXT: stwcx. 6, 0, 3 4262; PPC64LE-NEXT: bne 0, .LBB254_1 4263; PPC64LE-NEXT: # %bb.2: 4264; PPC64LE-NEXT: mr 3, 5 4265; PPC64LE-NEXT: lwsync 4266; PPC64LE-NEXT: blr 4267 %ret = atomicrmw xor i32* %ptr, i32 %val seq_cst 4268 ret i32 %ret 4269} 4270 4271define i64 @test255(i64* %ptr, i64 %val) { 4272; PPC64LE-LABEL: test255: 4273; PPC64LE: # %bb.0: 4274; PPC64LE-NEXT: .LBB255_1: 4275; PPC64LE-NEXT: ldarx 5, 0, 3 4276; PPC64LE-NEXT: xor 6, 4, 5 4277; PPC64LE-NEXT: stdcx. 6, 0, 3 4278; PPC64LE-NEXT: bne 0, .LBB255_1 4279; PPC64LE-NEXT: # %bb.2: 4280; PPC64LE-NEXT: mr 3, 5 4281; PPC64LE-NEXT: blr 4282 %ret = atomicrmw xor i64* %ptr, i64 %val monotonic 4283 ret i64 %ret 4284} 4285 4286define i64 @test256(i64* %ptr, i64 %val) { 4287; PPC64LE-LABEL: test256: 4288; PPC64LE: # %bb.0: 4289; PPC64LE-NEXT: mr 5, 3 4290; PPC64LE-NEXT: .LBB256_1: 4291; PPC64LE-NEXT: ldarx 3, 0, 5 4292; PPC64LE-NEXT: xor 6, 4, 3 4293; PPC64LE-NEXT: stdcx. 6, 0, 5 4294; PPC64LE-NEXT: bne 0, .LBB256_1 4295; PPC64LE-NEXT: # %bb.2: 4296; PPC64LE-NEXT: lwsync 4297; PPC64LE-NEXT: blr 4298 %ret = atomicrmw xor i64* %ptr, i64 %val acquire 4299 ret i64 %ret 4300} 4301 4302define i64 @test257(i64* %ptr, i64 %val) { 4303; PPC64LE-LABEL: test257: 4304; PPC64LE: # %bb.0: 4305; PPC64LE-NEXT: lwsync 4306; PPC64LE-NEXT: .LBB257_1: 4307; PPC64LE-NEXT: ldarx 5, 0, 3 4308; PPC64LE-NEXT: xor 6, 4, 5 4309; PPC64LE-NEXT: stdcx. 6, 0, 3 4310; PPC64LE-NEXT: bne 0, .LBB257_1 4311; PPC64LE-NEXT: # %bb.2: 4312; PPC64LE-NEXT: mr 3, 5 4313; PPC64LE-NEXT: blr 4314 %ret = atomicrmw xor i64* %ptr, i64 %val release 4315 ret i64 %ret 4316} 4317 4318define i64 @test258(i64* %ptr, i64 %val) { 4319; PPC64LE-LABEL: test258: 4320; PPC64LE: # %bb.0: 4321; PPC64LE-NEXT: lwsync 4322; PPC64LE-NEXT: .LBB258_1: 4323; PPC64LE-NEXT: ldarx 5, 0, 3 4324; PPC64LE-NEXT: xor 6, 4, 5 4325; PPC64LE-NEXT: stdcx. 6, 0, 3 4326; PPC64LE-NEXT: bne 0, .LBB258_1 4327; PPC64LE-NEXT: # %bb.2: 4328; PPC64LE-NEXT: mr 3, 5 4329; PPC64LE-NEXT: lwsync 4330; PPC64LE-NEXT: blr 4331 %ret = atomicrmw xor i64* %ptr, i64 %val acq_rel 4332 ret i64 %ret 4333} 4334 4335define i64 @test259(i64* %ptr, i64 %val) { 4336; PPC64LE-LABEL: test259: 4337; PPC64LE: # %bb.0: 4338; PPC64LE-NEXT: sync 4339; PPC64LE-NEXT: .LBB259_1: 4340; PPC64LE-NEXT: ldarx 5, 0, 3 4341; PPC64LE-NEXT: xor 6, 4, 5 4342; PPC64LE-NEXT: stdcx. 6, 0, 3 4343; PPC64LE-NEXT: bne 0, .LBB259_1 4344; PPC64LE-NEXT: # %bb.2: 4345; PPC64LE-NEXT: mr 3, 5 4346; PPC64LE-NEXT: lwsync 4347; PPC64LE-NEXT: blr 4348 %ret = atomicrmw xor i64* %ptr, i64 %val seq_cst 4349 ret i64 %ret 4350} 4351 4352define i8 @test260(i8* %ptr, i8 %val) { 4353; PPC64LE-LABEL: test260: 4354; PPC64LE: # %bb.0: 4355; PPC64LE-NEXT: .LBB260_1: 4356; PPC64LE-NEXT: lbarx 5, 0, 3 4357; PPC64LE-NEXT: extsb 6, 5 4358; PPC64LE-NEXT: cmpw 4, 6 4359; PPC64LE-NEXT: ble 0, .LBB260_3 4360; PPC64LE-NEXT: # %bb.2: 4361; PPC64LE-NEXT: stbcx. 4, 0, 3 4362; PPC64LE-NEXT: bne 0, .LBB260_1 4363; PPC64LE-NEXT: .LBB260_3: 4364; PPC64LE-NEXT: mr 3, 5 4365; PPC64LE-NEXT: blr 4366 %ret = atomicrmw max i8* %ptr, i8 %val monotonic 4367 ret i8 %ret 4368} 4369 4370define i8 @test261(i8* %ptr, i8 %val) { 4371; PPC64LE-LABEL: test261: 4372; PPC64LE: # %bb.0: 4373; PPC64LE-NEXT: mr 5, 3 4374; PPC64LE-NEXT: .LBB261_1: 4375; PPC64LE-NEXT: lbarx 3, 0, 5 4376; PPC64LE-NEXT: extsb 6, 3 4377; PPC64LE-NEXT: cmpw 4, 6 4378; PPC64LE-NEXT: ble 0, .LBB261_3 4379; PPC64LE-NEXT: # %bb.2: 4380; PPC64LE-NEXT: stbcx. 4, 0, 5 4381; PPC64LE-NEXT: bne 0, .LBB261_1 4382; PPC64LE-NEXT: .LBB261_3: 4383; PPC64LE-NEXT: lwsync 4384; PPC64LE-NEXT: blr 4385 %ret = atomicrmw max i8* %ptr, i8 %val acquire 4386 ret i8 %ret 4387} 4388 4389define i8 @test262(i8* %ptr, i8 %val) { 4390; PPC64LE-LABEL: test262: 4391; PPC64LE: # %bb.0: 4392; PPC64LE-NEXT: lwsync 4393; PPC64LE-NEXT: .LBB262_1: 4394; PPC64LE-NEXT: lbarx 5, 0, 3 4395; PPC64LE-NEXT: extsb 6, 5 4396; PPC64LE-NEXT: cmpw 4, 6 4397; PPC64LE-NEXT: ble 0, .LBB262_3 4398; PPC64LE-NEXT: # %bb.2: 4399; PPC64LE-NEXT: stbcx. 4, 0, 3 4400; PPC64LE-NEXT: bne 0, .LBB262_1 4401; PPC64LE-NEXT: .LBB262_3: 4402; PPC64LE-NEXT: mr 3, 5 4403; PPC64LE-NEXT: blr 4404 %ret = atomicrmw max i8* %ptr, i8 %val release 4405 ret i8 %ret 4406} 4407 4408define i8 @test263(i8* %ptr, i8 %val) { 4409; PPC64LE-LABEL: test263: 4410; PPC64LE: # %bb.0: 4411; PPC64LE-NEXT: lwsync 4412; PPC64LE-NEXT: .LBB263_1: 4413; PPC64LE-NEXT: lbarx 5, 0, 3 4414; PPC64LE-NEXT: extsb 6, 5 4415; PPC64LE-NEXT: cmpw 4, 6 4416; PPC64LE-NEXT: ble 0, .LBB263_3 4417; PPC64LE-NEXT: # %bb.2: 4418; PPC64LE-NEXT: stbcx. 4, 0, 3 4419; PPC64LE-NEXT: bne 0, .LBB263_1 4420; PPC64LE-NEXT: .LBB263_3: 4421; PPC64LE-NEXT: mr 3, 5 4422; PPC64LE-NEXT: lwsync 4423; PPC64LE-NEXT: blr 4424 %ret = atomicrmw max i8* %ptr, i8 %val acq_rel 4425 ret i8 %ret 4426} 4427 4428define i8 @test264(i8* %ptr, i8 %val) { 4429; PPC64LE-LABEL: test264: 4430; PPC64LE: # %bb.0: 4431; PPC64LE-NEXT: sync 4432; PPC64LE-NEXT: .LBB264_1: 4433; PPC64LE-NEXT: lbarx 5, 0, 3 4434; PPC64LE-NEXT: extsb 6, 5 4435; PPC64LE-NEXT: cmpw 4, 6 4436; PPC64LE-NEXT: ble 0, .LBB264_3 4437; PPC64LE-NEXT: # %bb.2: 4438; PPC64LE-NEXT: stbcx. 4, 0, 3 4439; PPC64LE-NEXT: bne 0, .LBB264_1 4440; PPC64LE-NEXT: .LBB264_3: 4441; PPC64LE-NEXT: mr 3, 5 4442; PPC64LE-NEXT: lwsync 4443; PPC64LE-NEXT: blr 4444 %ret = atomicrmw max i8* %ptr, i8 %val seq_cst 4445 ret i8 %ret 4446} 4447 4448define i16 @test265(i16* %ptr, i16 %val) { 4449; PPC64LE-LABEL: test265: 4450; PPC64LE: # %bb.0: 4451; PPC64LE-NEXT: .LBB265_1: 4452; PPC64LE-NEXT: lharx 5, 0, 3 4453; PPC64LE-NEXT: extsh 6, 5 4454; PPC64LE-NEXT: cmpw 4, 6 4455; PPC64LE-NEXT: ble 0, .LBB265_3 4456; PPC64LE-NEXT: # %bb.2: 4457; PPC64LE-NEXT: sthcx. 4, 0, 3 4458; PPC64LE-NEXT: bne 0, .LBB265_1 4459; PPC64LE-NEXT: .LBB265_3: 4460; PPC64LE-NEXT: mr 3, 5 4461; PPC64LE-NEXT: blr 4462 %ret = atomicrmw max i16* %ptr, i16 %val monotonic 4463 ret i16 %ret 4464} 4465 4466define i16 @test266(i16* %ptr, i16 %val) { 4467; PPC64LE-LABEL: test266: 4468; PPC64LE: # %bb.0: 4469; PPC64LE-NEXT: mr 5, 3 4470; PPC64LE-NEXT: .LBB266_1: 4471; PPC64LE-NEXT: lharx 3, 0, 5 4472; PPC64LE-NEXT: extsh 6, 3 4473; PPC64LE-NEXT: cmpw 4, 6 4474; PPC64LE-NEXT: ble 0, .LBB266_3 4475; PPC64LE-NEXT: # %bb.2: 4476; PPC64LE-NEXT: sthcx. 4, 0, 5 4477; PPC64LE-NEXT: bne 0, .LBB266_1 4478; PPC64LE-NEXT: .LBB266_3: 4479; PPC64LE-NEXT: lwsync 4480; PPC64LE-NEXT: blr 4481 %ret = atomicrmw max i16* %ptr, i16 %val acquire 4482 ret i16 %ret 4483} 4484 4485define i16 @test267(i16* %ptr, i16 %val) { 4486; PPC64LE-LABEL: test267: 4487; PPC64LE: # %bb.0: 4488; PPC64LE-NEXT: lwsync 4489; PPC64LE-NEXT: .LBB267_1: 4490; PPC64LE-NEXT: lharx 5, 0, 3 4491; PPC64LE-NEXT: extsh 6, 5 4492; PPC64LE-NEXT: cmpw 4, 6 4493; PPC64LE-NEXT: ble 0, .LBB267_3 4494; PPC64LE-NEXT: # %bb.2: 4495; PPC64LE-NEXT: sthcx. 4, 0, 3 4496; PPC64LE-NEXT: bne 0, .LBB267_1 4497; PPC64LE-NEXT: .LBB267_3: 4498; PPC64LE-NEXT: mr 3, 5 4499; PPC64LE-NEXT: blr 4500 %ret = atomicrmw max i16* %ptr, i16 %val release 4501 ret i16 %ret 4502} 4503 4504define i16 @test268(i16* %ptr, i16 %val) { 4505; PPC64LE-LABEL: test268: 4506; PPC64LE: # %bb.0: 4507; PPC64LE-NEXT: lwsync 4508; PPC64LE-NEXT: .LBB268_1: 4509; PPC64LE-NEXT: lharx 5, 0, 3 4510; PPC64LE-NEXT: extsh 6, 5 4511; PPC64LE-NEXT: cmpw 4, 6 4512; PPC64LE-NEXT: ble 0, .LBB268_3 4513; PPC64LE-NEXT: # %bb.2: 4514; PPC64LE-NEXT: sthcx. 4, 0, 3 4515; PPC64LE-NEXT: bne 0, .LBB268_1 4516; PPC64LE-NEXT: .LBB268_3: 4517; PPC64LE-NEXT: mr 3, 5 4518; PPC64LE-NEXT: lwsync 4519; PPC64LE-NEXT: blr 4520 %ret = atomicrmw max i16* %ptr, i16 %val acq_rel 4521 ret i16 %ret 4522} 4523 4524define i16 @test269(i16* %ptr, i16 %val) { 4525; PPC64LE-LABEL: test269: 4526; PPC64LE: # %bb.0: 4527; PPC64LE-NEXT: sync 4528; PPC64LE-NEXT: .LBB269_1: 4529; PPC64LE-NEXT: lharx 5, 0, 3 4530; PPC64LE-NEXT: extsh 6, 5 4531; PPC64LE-NEXT: cmpw 4, 6 4532; PPC64LE-NEXT: ble 0, .LBB269_3 4533; PPC64LE-NEXT: # %bb.2: 4534; PPC64LE-NEXT: sthcx. 4, 0, 3 4535; PPC64LE-NEXT: bne 0, .LBB269_1 4536; PPC64LE-NEXT: .LBB269_3: 4537; PPC64LE-NEXT: mr 3, 5 4538; PPC64LE-NEXT: lwsync 4539; PPC64LE-NEXT: blr 4540 %ret = atomicrmw max i16* %ptr, i16 %val seq_cst 4541 ret i16 %ret 4542} 4543 4544define i32 @test270(i32* %ptr, i32 %val) { 4545; PPC64LE-LABEL: test270: 4546; PPC64LE: # %bb.0: 4547; PPC64LE-NEXT: .LBB270_1: 4548; PPC64LE-NEXT: lwarx 5, 0, 3 4549; PPC64LE-NEXT: cmpw 4, 5 4550; PPC64LE-NEXT: ble 0, .LBB270_3 4551; PPC64LE-NEXT: # %bb.2: 4552; PPC64LE-NEXT: stwcx. 4, 0, 3 4553; PPC64LE-NEXT: bne 0, .LBB270_1 4554; PPC64LE-NEXT: .LBB270_3: 4555; PPC64LE-NEXT: mr 3, 5 4556; PPC64LE-NEXT: blr 4557 %ret = atomicrmw max i32* %ptr, i32 %val monotonic 4558 ret i32 %ret 4559} 4560 4561define i32 @test271(i32* %ptr, i32 %val) { 4562; PPC64LE-LABEL: test271: 4563; PPC64LE: # %bb.0: 4564; PPC64LE-NEXT: mr 5, 3 4565; PPC64LE-NEXT: .LBB271_1: 4566; PPC64LE-NEXT: lwarx 3, 0, 5 4567; PPC64LE-NEXT: cmpw 4, 3 4568; PPC64LE-NEXT: ble 0, .LBB271_3 4569; PPC64LE-NEXT: # %bb.2: 4570; PPC64LE-NEXT: stwcx. 4, 0, 5 4571; PPC64LE-NEXT: bne 0, .LBB271_1 4572; PPC64LE-NEXT: .LBB271_3: 4573; PPC64LE-NEXT: lwsync 4574; PPC64LE-NEXT: blr 4575 %ret = atomicrmw max i32* %ptr, i32 %val acquire 4576 ret i32 %ret 4577} 4578 4579define i32 @test272(i32* %ptr, i32 %val) { 4580; PPC64LE-LABEL: test272: 4581; PPC64LE: # %bb.0: 4582; PPC64LE-NEXT: lwsync 4583; PPC64LE-NEXT: .LBB272_1: 4584; PPC64LE-NEXT: lwarx 5, 0, 3 4585; PPC64LE-NEXT: cmpw 4, 5 4586; PPC64LE-NEXT: ble 0, .LBB272_3 4587; PPC64LE-NEXT: # %bb.2: 4588; PPC64LE-NEXT: stwcx. 4, 0, 3 4589; PPC64LE-NEXT: bne 0, .LBB272_1 4590; PPC64LE-NEXT: .LBB272_3: 4591; PPC64LE-NEXT: mr 3, 5 4592; PPC64LE-NEXT: blr 4593 %ret = atomicrmw max i32* %ptr, i32 %val release 4594 ret i32 %ret 4595} 4596 4597define i32 @test273(i32* %ptr, i32 %val) { 4598; PPC64LE-LABEL: test273: 4599; PPC64LE: # %bb.0: 4600; PPC64LE-NEXT: lwsync 4601; PPC64LE-NEXT: .LBB273_1: 4602; PPC64LE-NEXT: lwarx 5, 0, 3 4603; PPC64LE-NEXT: cmpw 4, 5 4604; PPC64LE-NEXT: ble 0, .LBB273_3 4605; PPC64LE-NEXT: # %bb.2: 4606; PPC64LE-NEXT: stwcx. 4, 0, 3 4607; PPC64LE-NEXT: bne 0, .LBB273_1 4608; PPC64LE-NEXT: .LBB273_3: 4609; PPC64LE-NEXT: mr 3, 5 4610; PPC64LE-NEXT: lwsync 4611; PPC64LE-NEXT: blr 4612 %ret = atomicrmw max i32* %ptr, i32 %val acq_rel 4613 ret i32 %ret 4614} 4615 4616define i32 @test274(i32* %ptr, i32 %val) { 4617; PPC64LE-LABEL: test274: 4618; PPC64LE: # %bb.0: 4619; PPC64LE-NEXT: sync 4620; PPC64LE-NEXT: .LBB274_1: 4621; PPC64LE-NEXT: lwarx 5, 0, 3 4622; PPC64LE-NEXT: cmpw 4, 5 4623; PPC64LE-NEXT: ble 0, .LBB274_3 4624; PPC64LE-NEXT: # %bb.2: 4625; PPC64LE-NEXT: stwcx. 4, 0, 3 4626; PPC64LE-NEXT: bne 0, .LBB274_1 4627; PPC64LE-NEXT: .LBB274_3: 4628; PPC64LE-NEXT: mr 3, 5 4629; PPC64LE-NEXT: lwsync 4630; PPC64LE-NEXT: blr 4631 %ret = atomicrmw max i32* %ptr, i32 %val seq_cst 4632 ret i32 %ret 4633} 4634 4635define i64 @test275(i64* %ptr, i64 %val) { 4636; PPC64LE-LABEL: test275: 4637; PPC64LE: # %bb.0: 4638; PPC64LE-NEXT: .LBB275_1: 4639; PPC64LE-NEXT: ldarx 5, 0, 3 4640; PPC64LE-NEXT: cmpd 4, 5 4641; PPC64LE-NEXT: ble 0, .LBB275_3 4642; PPC64LE-NEXT: # %bb.2: 4643; PPC64LE-NEXT: stdcx. 4, 0, 3 4644; PPC64LE-NEXT: bne 0, .LBB275_1 4645; PPC64LE-NEXT: .LBB275_3: 4646; PPC64LE-NEXT: mr 3, 5 4647; PPC64LE-NEXT: blr 4648 %ret = atomicrmw max i64* %ptr, i64 %val monotonic 4649 ret i64 %ret 4650} 4651 4652define i64 @test276(i64* %ptr, i64 %val) { 4653; PPC64LE-LABEL: test276: 4654; PPC64LE: # %bb.0: 4655; PPC64LE-NEXT: mr 5, 3 4656; PPC64LE-NEXT: .LBB276_1: 4657; PPC64LE-NEXT: ldarx 3, 0, 5 4658; PPC64LE-NEXT: cmpd 4, 3 4659; PPC64LE-NEXT: ble 0, .LBB276_3 4660; PPC64LE-NEXT: # %bb.2: 4661; PPC64LE-NEXT: stdcx. 4, 0, 5 4662; PPC64LE-NEXT: bne 0, .LBB276_1 4663; PPC64LE-NEXT: .LBB276_3: 4664; PPC64LE-NEXT: lwsync 4665; PPC64LE-NEXT: blr 4666 %ret = atomicrmw max i64* %ptr, i64 %val acquire 4667 ret i64 %ret 4668} 4669 4670define i64 @test277(i64* %ptr, i64 %val) { 4671; PPC64LE-LABEL: test277: 4672; PPC64LE: # %bb.0: 4673; PPC64LE-NEXT: lwsync 4674; PPC64LE-NEXT: .LBB277_1: 4675; PPC64LE-NEXT: ldarx 5, 0, 3 4676; PPC64LE-NEXT: cmpd 4, 5 4677; PPC64LE-NEXT: ble 0, .LBB277_3 4678; PPC64LE-NEXT: # %bb.2: 4679; PPC64LE-NEXT: stdcx. 4, 0, 3 4680; PPC64LE-NEXT: bne 0, .LBB277_1 4681; PPC64LE-NEXT: .LBB277_3: 4682; PPC64LE-NEXT: mr 3, 5 4683; PPC64LE-NEXT: blr 4684 %ret = atomicrmw max i64* %ptr, i64 %val release 4685 ret i64 %ret 4686} 4687 4688define i64 @test278(i64* %ptr, i64 %val) { 4689; PPC64LE-LABEL: test278: 4690; PPC64LE: # %bb.0: 4691; PPC64LE-NEXT: lwsync 4692; PPC64LE-NEXT: .LBB278_1: 4693; PPC64LE-NEXT: ldarx 5, 0, 3 4694; PPC64LE-NEXT: cmpd 4, 5 4695; PPC64LE-NEXT: ble 0, .LBB278_3 4696; PPC64LE-NEXT: # %bb.2: 4697; PPC64LE-NEXT: stdcx. 4, 0, 3 4698; PPC64LE-NEXT: bne 0, .LBB278_1 4699; PPC64LE-NEXT: .LBB278_3: 4700; PPC64LE-NEXT: mr 3, 5 4701; PPC64LE-NEXT: lwsync 4702; PPC64LE-NEXT: blr 4703 %ret = atomicrmw max i64* %ptr, i64 %val acq_rel 4704 ret i64 %ret 4705} 4706 4707define i64 @test279(i64* %ptr, i64 %val) { 4708; PPC64LE-LABEL: test279: 4709; PPC64LE: # %bb.0: 4710; PPC64LE-NEXT: sync 4711; PPC64LE-NEXT: .LBB279_1: 4712; PPC64LE-NEXT: ldarx 5, 0, 3 4713; PPC64LE-NEXT: cmpd 4, 5 4714; PPC64LE-NEXT: ble 0, .LBB279_3 4715; PPC64LE-NEXT: # %bb.2: 4716; PPC64LE-NEXT: stdcx. 4, 0, 3 4717; PPC64LE-NEXT: bne 0, .LBB279_1 4718; PPC64LE-NEXT: .LBB279_3: 4719; PPC64LE-NEXT: mr 3, 5 4720; PPC64LE-NEXT: lwsync 4721; PPC64LE-NEXT: blr 4722 %ret = atomicrmw max i64* %ptr, i64 %val seq_cst 4723 ret i64 %ret 4724} 4725 4726define i8 @test280(i8* %ptr, i8 %val) { 4727; PPC64LE-LABEL: test280: 4728; PPC64LE: # %bb.0: 4729; PPC64LE-NEXT: .LBB280_1: 4730; PPC64LE-NEXT: lbarx 5, 0, 3 4731; PPC64LE-NEXT: extsb 6, 5 4732; PPC64LE-NEXT: cmpw 4, 6 4733; PPC64LE-NEXT: bge 0, .LBB280_3 4734; PPC64LE-NEXT: # %bb.2: 4735; PPC64LE-NEXT: stbcx. 4, 0, 3 4736; PPC64LE-NEXT: bne 0, .LBB280_1 4737; PPC64LE-NEXT: .LBB280_3: 4738; PPC64LE-NEXT: mr 3, 5 4739; PPC64LE-NEXT: blr 4740 %ret = atomicrmw min i8* %ptr, i8 %val monotonic 4741 ret i8 %ret 4742} 4743 4744define i8 @test281(i8* %ptr, i8 %val) { 4745; PPC64LE-LABEL: test281: 4746; PPC64LE: # %bb.0: 4747; PPC64LE-NEXT: mr 5, 3 4748; PPC64LE-NEXT: .LBB281_1: 4749; PPC64LE-NEXT: lbarx 3, 0, 5 4750; PPC64LE-NEXT: extsb 6, 3 4751; PPC64LE-NEXT: cmpw 4, 6 4752; PPC64LE-NEXT: bge 0, .LBB281_3 4753; PPC64LE-NEXT: # %bb.2: 4754; PPC64LE-NEXT: stbcx. 4, 0, 5 4755; PPC64LE-NEXT: bne 0, .LBB281_1 4756; PPC64LE-NEXT: .LBB281_3: 4757; PPC64LE-NEXT: lwsync 4758; PPC64LE-NEXT: blr 4759 %ret = atomicrmw min i8* %ptr, i8 %val acquire 4760 ret i8 %ret 4761} 4762 4763define i8 @test282(i8* %ptr, i8 %val) { 4764; PPC64LE-LABEL: test282: 4765; PPC64LE: # %bb.0: 4766; PPC64LE-NEXT: lwsync 4767; PPC64LE-NEXT: .LBB282_1: 4768; PPC64LE-NEXT: lbarx 5, 0, 3 4769; PPC64LE-NEXT: extsb 6, 5 4770; PPC64LE-NEXT: cmpw 4, 6 4771; PPC64LE-NEXT: bge 0, .LBB282_3 4772; PPC64LE-NEXT: # %bb.2: 4773; PPC64LE-NEXT: stbcx. 4, 0, 3 4774; PPC64LE-NEXT: bne 0, .LBB282_1 4775; PPC64LE-NEXT: .LBB282_3: 4776; PPC64LE-NEXT: mr 3, 5 4777; PPC64LE-NEXT: blr 4778 %ret = atomicrmw min i8* %ptr, i8 %val release 4779 ret i8 %ret 4780} 4781 4782define i8 @test283(i8* %ptr, i8 %val) { 4783; PPC64LE-LABEL: test283: 4784; PPC64LE: # %bb.0: 4785; PPC64LE-NEXT: lwsync 4786; PPC64LE-NEXT: .LBB283_1: 4787; PPC64LE-NEXT: lbarx 5, 0, 3 4788; PPC64LE-NEXT: extsb 6, 5 4789; PPC64LE-NEXT: cmpw 4, 6 4790; PPC64LE-NEXT: bge 0, .LBB283_3 4791; PPC64LE-NEXT: # %bb.2: 4792; PPC64LE-NEXT: stbcx. 4, 0, 3 4793; PPC64LE-NEXT: bne 0, .LBB283_1 4794; PPC64LE-NEXT: .LBB283_3: 4795; PPC64LE-NEXT: mr 3, 5 4796; PPC64LE-NEXT: lwsync 4797; PPC64LE-NEXT: blr 4798 %ret = atomicrmw min i8* %ptr, i8 %val acq_rel 4799 ret i8 %ret 4800} 4801 4802define i8 @test284(i8* %ptr, i8 %val) { 4803; PPC64LE-LABEL: test284: 4804; PPC64LE: # %bb.0: 4805; PPC64LE-NEXT: sync 4806; PPC64LE-NEXT: .LBB284_1: 4807; PPC64LE-NEXT: lbarx 5, 0, 3 4808; PPC64LE-NEXT: extsb 6, 5 4809; PPC64LE-NEXT: cmpw 4, 6 4810; PPC64LE-NEXT: bge 0, .LBB284_3 4811; PPC64LE-NEXT: # %bb.2: 4812; PPC64LE-NEXT: stbcx. 4, 0, 3 4813; PPC64LE-NEXT: bne 0, .LBB284_1 4814; PPC64LE-NEXT: .LBB284_3: 4815; PPC64LE-NEXT: mr 3, 5 4816; PPC64LE-NEXT: lwsync 4817; PPC64LE-NEXT: blr 4818 %ret = atomicrmw min i8* %ptr, i8 %val seq_cst 4819 ret i8 %ret 4820} 4821 4822define i16 @test285(i16* %ptr, i16 %val) { 4823; PPC64LE-LABEL: test285: 4824; PPC64LE: # %bb.0: 4825; PPC64LE-NEXT: .LBB285_1: 4826; PPC64LE-NEXT: lharx 5, 0, 3 4827; PPC64LE-NEXT: extsh 6, 5 4828; PPC64LE-NEXT: cmpw 4, 6 4829; PPC64LE-NEXT: bge 0, .LBB285_3 4830; PPC64LE-NEXT: # %bb.2: 4831; PPC64LE-NEXT: sthcx. 4, 0, 3 4832; PPC64LE-NEXT: bne 0, .LBB285_1 4833; PPC64LE-NEXT: .LBB285_3: 4834; PPC64LE-NEXT: mr 3, 5 4835; PPC64LE-NEXT: blr 4836 %ret = atomicrmw min i16* %ptr, i16 %val monotonic 4837 ret i16 %ret 4838} 4839 4840define i16 @test286(i16* %ptr, i16 %val) { 4841; PPC64LE-LABEL: test286: 4842; PPC64LE: # %bb.0: 4843; PPC64LE-NEXT: mr 5, 3 4844; PPC64LE-NEXT: .LBB286_1: 4845; PPC64LE-NEXT: lharx 3, 0, 5 4846; PPC64LE-NEXT: extsh 6, 3 4847; PPC64LE-NEXT: cmpw 4, 6 4848; PPC64LE-NEXT: bge 0, .LBB286_3 4849; PPC64LE-NEXT: # %bb.2: 4850; PPC64LE-NEXT: sthcx. 4, 0, 5 4851; PPC64LE-NEXT: bne 0, .LBB286_1 4852; PPC64LE-NEXT: .LBB286_3: 4853; PPC64LE-NEXT: lwsync 4854; PPC64LE-NEXT: blr 4855 %ret = atomicrmw min i16* %ptr, i16 %val acquire 4856 ret i16 %ret 4857} 4858 4859define i16 @test287(i16* %ptr, i16 %val) { 4860; PPC64LE-LABEL: test287: 4861; PPC64LE: # %bb.0: 4862; PPC64LE-NEXT: lwsync 4863; PPC64LE-NEXT: .LBB287_1: 4864; PPC64LE-NEXT: lharx 5, 0, 3 4865; PPC64LE-NEXT: extsh 6, 5 4866; PPC64LE-NEXT: cmpw 4, 6 4867; PPC64LE-NEXT: bge 0, .LBB287_3 4868; PPC64LE-NEXT: # %bb.2: 4869; PPC64LE-NEXT: sthcx. 4, 0, 3 4870; PPC64LE-NEXT: bne 0, .LBB287_1 4871; PPC64LE-NEXT: .LBB287_3: 4872; PPC64LE-NEXT: mr 3, 5 4873; PPC64LE-NEXT: blr 4874 %ret = atomicrmw min i16* %ptr, i16 %val release 4875 ret i16 %ret 4876} 4877 4878define i16 @test288(i16* %ptr, i16 %val) { 4879; PPC64LE-LABEL: test288: 4880; PPC64LE: # %bb.0: 4881; PPC64LE-NEXT: lwsync 4882; PPC64LE-NEXT: .LBB288_1: 4883; PPC64LE-NEXT: lharx 5, 0, 3 4884; PPC64LE-NEXT: extsh 6, 5 4885; PPC64LE-NEXT: cmpw 4, 6 4886; PPC64LE-NEXT: bge 0, .LBB288_3 4887; PPC64LE-NEXT: # %bb.2: 4888; PPC64LE-NEXT: sthcx. 4, 0, 3 4889; PPC64LE-NEXT: bne 0, .LBB288_1 4890; PPC64LE-NEXT: .LBB288_3: 4891; PPC64LE-NEXT: mr 3, 5 4892; PPC64LE-NEXT: lwsync 4893; PPC64LE-NEXT: blr 4894 %ret = atomicrmw min i16* %ptr, i16 %val acq_rel 4895 ret i16 %ret 4896} 4897 4898define i16 @test289(i16* %ptr, i16 %val) { 4899; PPC64LE-LABEL: test289: 4900; PPC64LE: # %bb.0: 4901; PPC64LE-NEXT: sync 4902; PPC64LE-NEXT: .LBB289_1: 4903; PPC64LE-NEXT: lharx 5, 0, 3 4904; PPC64LE-NEXT: extsh 6, 5 4905; PPC64LE-NEXT: cmpw 4, 6 4906; PPC64LE-NEXT: bge 0, .LBB289_3 4907; PPC64LE-NEXT: # %bb.2: 4908; PPC64LE-NEXT: sthcx. 4, 0, 3 4909; PPC64LE-NEXT: bne 0, .LBB289_1 4910; PPC64LE-NEXT: .LBB289_3: 4911; PPC64LE-NEXT: mr 3, 5 4912; PPC64LE-NEXT: lwsync 4913; PPC64LE-NEXT: blr 4914 %ret = atomicrmw min i16* %ptr, i16 %val seq_cst 4915 ret i16 %ret 4916} 4917 4918define i32 @test290(i32* %ptr, i32 %val) { 4919; PPC64LE-LABEL: test290: 4920; PPC64LE: # %bb.0: 4921; PPC64LE-NEXT: .LBB290_1: 4922; PPC64LE-NEXT: lwarx 5, 0, 3 4923; PPC64LE-NEXT: cmpw 4, 5 4924; PPC64LE-NEXT: bge 0, .LBB290_3 4925; PPC64LE-NEXT: # %bb.2: 4926; PPC64LE-NEXT: stwcx. 4, 0, 3 4927; PPC64LE-NEXT: bne 0, .LBB290_1 4928; PPC64LE-NEXT: .LBB290_3: 4929; PPC64LE-NEXT: mr 3, 5 4930; PPC64LE-NEXT: blr 4931 %ret = atomicrmw min i32* %ptr, i32 %val monotonic 4932 ret i32 %ret 4933} 4934 4935define i32 @test291(i32* %ptr, i32 %val) { 4936; PPC64LE-LABEL: test291: 4937; PPC64LE: # %bb.0: 4938; PPC64LE-NEXT: mr 5, 3 4939; PPC64LE-NEXT: .LBB291_1: 4940; PPC64LE-NEXT: lwarx 3, 0, 5 4941; PPC64LE-NEXT: cmpw 4, 3 4942; PPC64LE-NEXT: bge 0, .LBB291_3 4943; PPC64LE-NEXT: # %bb.2: 4944; PPC64LE-NEXT: stwcx. 4, 0, 5 4945; PPC64LE-NEXT: bne 0, .LBB291_1 4946; PPC64LE-NEXT: .LBB291_3: 4947; PPC64LE-NEXT: lwsync 4948; PPC64LE-NEXT: blr 4949 %ret = atomicrmw min i32* %ptr, i32 %val acquire 4950 ret i32 %ret 4951} 4952 4953define i32 @test292(i32* %ptr, i32 %val) { 4954; PPC64LE-LABEL: test292: 4955; PPC64LE: # %bb.0: 4956; PPC64LE-NEXT: lwsync 4957; PPC64LE-NEXT: .LBB292_1: 4958; PPC64LE-NEXT: lwarx 5, 0, 3 4959; PPC64LE-NEXT: cmpw 4, 5 4960; PPC64LE-NEXT: bge 0, .LBB292_3 4961; PPC64LE-NEXT: # %bb.2: 4962; PPC64LE-NEXT: stwcx. 4, 0, 3 4963; PPC64LE-NEXT: bne 0, .LBB292_1 4964; PPC64LE-NEXT: .LBB292_3: 4965; PPC64LE-NEXT: mr 3, 5 4966; PPC64LE-NEXT: blr 4967 %ret = atomicrmw min i32* %ptr, i32 %val release 4968 ret i32 %ret 4969} 4970 4971define i32 @test293(i32* %ptr, i32 %val) { 4972; PPC64LE-LABEL: test293: 4973; PPC64LE: # %bb.0: 4974; PPC64LE-NEXT: lwsync 4975; PPC64LE-NEXT: .LBB293_1: 4976; PPC64LE-NEXT: lwarx 5, 0, 3 4977; PPC64LE-NEXT: cmpw 4, 5 4978; PPC64LE-NEXT: bge 0, .LBB293_3 4979; PPC64LE-NEXT: # %bb.2: 4980; PPC64LE-NEXT: stwcx. 4, 0, 3 4981; PPC64LE-NEXT: bne 0, .LBB293_1 4982; PPC64LE-NEXT: .LBB293_3: 4983; PPC64LE-NEXT: mr 3, 5 4984; PPC64LE-NEXT: lwsync 4985; PPC64LE-NEXT: blr 4986 %ret = atomicrmw min i32* %ptr, i32 %val acq_rel 4987 ret i32 %ret 4988} 4989 4990define i32 @test294(i32* %ptr, i32 %val) { 4991; PPC64LE-LABEL: test294: 4992; PPC64LE: # %bb.0: 4993; PPC64LE-NEXT: sync 4994; PPC64LE-NEXT: .LBB294_1: 4995; PPC64LE-NEXT: lwarx 5, 0, 3 4996; PPC64LE-NEXT: cmpw 4, 5 4997; PPC64LE-NEXT: bge 0, .LBB294_3 4998; PPC64LE-NEXT: # %bb.2: 4999; PPC64LE-NEXT: stwcx. 4, 0, 3 5000; PPC64LE-NEXT: bne 0, .LBB294_1 5001; PPC64LE-NEXT: .LBB294_3: 5002; PPC64LE-NEXT: mr 3, 5 5003; PPC64LE-NEXT: lwsync 5004; PPC64LE-NEXT: blr 5005 %ret = atomicrmw min i32* %ptr, i32 %val seq_cst 5006 ret i32 %ret 5007} 5008 5009define i64 @test295(i64* %ptr, i64 %val) { 5010; PPC64LE-LABEL: test295: 5011; PPC64LE: # %bb.0: 5012; PPC64LE-NEXT: .LBB295_1: 5013; PPC64LE-NEXT: ldarx 5, 0, 3 5014; PPC64LE-NEXT: cmpd 4, 5 5015; PPC64LE-NEXT: bge 0, .LBB295_3 5016; PPC64LE-NEXT: # %bb.2: 5017; PPC64LE-NEXT: stdcx. 4, 0, 3 5018; PPC64LE-NEXT: bne 0, .LBB295_1 5019; PPC64LE-NEXT: .LBB295_3: 5020; PPC64LE-NEXT: mr 3, 5 5021; PPC64LE-NEXT: blr 5022 %ret = atomicrmw min i64* %ptr, i64 %val monotonic 5023 ret i64 %ret 5024} 5025 5026define i64 @test296(i64* %ptr, i64 %val) { 5027; PPC64LE-LABEL: test296: 5028; PPC64LE: # %bb.0: 5029; PPC64LE-NEXT: mr 5, 3 5030; PPC64LE-NEXT: .LBB296_1: 5031; PPC64LE-NEXT: ldarx 3, 0, 5 5032; PPC64LE-NEXT: cmpd 4, 3 5033; PPC64LE-NEXT: bge 0, .LBB296_3 5034; PPC64LE-NEXT: # %bb.2: 5035; PPC64LE-NEXT: stdcx. 4, 0, 5 5036; PPC64LE-NEXT: bne 0, .LBB296_1 5037; PPC64LE-NEXT: .LBB296_3: 5038; PPC64LE-NEXT: lwsync 5039; PPC64LE-NEXT: blr 5040 %ret = atomicrmw min i64* %ptr, i64 %val acquire 5041 ret i64 %ret 5042} 5043 5044define i64 @test297(i64* %ptr, i64 %val) { 5045; PPC64LE-LABEL: test297: 5046; PPC64LE: # %bb.0: 5047; PPC64LE-NEXT: lwsync 5048; PPC64LE-NEXT: .LBB297_1: 5049; PPC64LE-NEXT: ldarx 5, 0, 3 5050; PPC64LE-NEXT: cmpd 4, 5 5051; PPC64LE-NEXT: bge 0, .LBB297_3 5052; PPC64LE-NEXT: # %bb.2: 5053; PPC64LE-NEXT: stdcx. 4, 0, 3 5054; PPC64LE-NEXT: bne 0, .LBB297_1 5055; PPC64LE-NEXT: .LBB297_3: 5056; PPC64LE-NEXT: mr 3, 5 5057; PPC64LE-NEXT: blr 5058 %ret = atomicrmw min i64* %ptr, i64 %val release 5059 ret i64 %ret 5060} 5061 5062define i64 @test298(i64* %ptr, i64 %val) { 5063; PPC64LE-LABEL: test298: 5064; PPC64LE: # %bb.0: 5065; PPC64LE-NEXT: lwsync 5066; PPC64LE-NEXT: .LBB298_1: 5067; PPC64LE-NEXT: ldarx 5, 0, 3 5068; PPC64LE-NEXT: cmpd 4, 5 5069; PPC64LE-NEXT: bge 0, .LBB298_3 5070; PPC64LE-NEXT: # %bb.2: 5071; PPC64LE-NEXT: stdcx. 4, 0, 3 5072; PPC64LE-NEXT: bne 0, .LBB298_1 5073; PPC64LE-NEXT: .LBB298_3: 5074; PPC64LE-NEXT: mr 3, 5 5075; PPC64LE-NEXT: lwsync 5076; PPC64LE-NEXT: blr 5077 %ret = atomicrmw min i64* %ptr, i64 %val acq_rel 5078 ret i64 %ret 5079} 5080 5081define i64 @test299(i64* %ptr, i64 %val) { 5082; PPC64LE-LABEL: test299: 5083; PPC64LE: # %bb.0: 5084; PPC64LE-NEXT: sync 5085; PPC64LE-NEXT: .LBB299_1: 5086; PPC64LE-NEXT: ldarx 5, 0, 3 5087; PPC64LE-NEXT: cmpd 4, 5 5088; PPC64LE-NEXT: bge 0, .LBB299_3 5089; PPC64LE-NEXT: # %bb.2: 5090; PPC64LE-NEXT: stdcx. 4, 0, 3 5091; PPC64LE-NEXT: bne 0, .LBB299_1 5092; PPC64LE-NEXT: .LBB299_3: 5093; PPC64LE-NEXT: mr 3, 5 5094; PPC64LE-NEXT: lwsync 5095; PPC64LE-NEXT: blr 5096 %ret = atomicrmw min i64* %ptr, i64 %val seq_cst 5097 ret i64 %ret 5098} 5099 5100define i8 @test300(i8* %ptr, i8 %val) { 5101; PPC64LE-LABEL: test300: 5102; PPC64LE: # %bb.0: 5103; PPC64LE-NEXT: .LBB300_1: 5104; PPC64LE-NEXT: lbarx 5, 0, 3 5105; PPC64LE-NEXT: cmplw 4, 5 5106; PPC64LE-NEXT: ble 0, .LBB300_3 5107; PPC64LE-NEXT: # %bb.2: 5108; PPC64LE-NEXT: stbcx. 4, 0, 3 5109; PPC64LE-NEXT: bne 0, .LBB300_1 5110; PPC64LE-NEXT: .LBB300_3: 5111; PPC64LE-NEXT: mr 3, 5 5112; PPC64LE-NEXT: blr 5113 %ret = atomicrmw umax i8* %ptr, i8 %val monotonic 5114 ret i8 %ret 5115} 5116 5117define i8 @test301(i8* %ptr, i8 %val) { 5118; PPC64LE-LABEL: test301: 5119; PPC64LE: # %bb.0: 5120; PPC64LE-NEXT: mr 5, 3 5121; PPC64LE-NEXT: .LBB301_1: 5122; PPC64LE-NEXT: lbarx 3, 0, 5 5123; PPC64LE-NEXT: cmplw 4, 3 5124; PPC64LE-NEXT: ble 0, .LBB301_3 5125; PPC64LE-NEXT: # %bb.2: 5126; PPC64LE-NEXT: stbcx. 4, 0, 5 5127; PPC64LE-NEXT: bne 0, .LBB301_1 5128; PPC64LE-NEXT: .LBB301_3: 5129; PPC64LE-NEXT: lwsync 5130; PPC64LE-NEXT: blr 5131 %ret = atomicrmw umax i8* %ptr, i8 %val acquire 5132 ret i8 %ret 5133} 5134 5135define i8 @test302(i8* %ptr, i8 %val) { 5136; PPC64LE-LABEL: test302: 5137; PPC64LE: # %bb.0: 5138; PPC64LE-NEXT: lwsync 5139; PPC64LE-NEXT: .LBB302_1: 5140; PPC64LE-NEXT: lbarx 5, 0, 3 5141; PPC64LE-NEXT: cmplw 4, 5 5142; PPC64LE-NEXT: ble 0, .LBB302_3 5143; PPC64LE-NEXT: # %bb.2: 5144; PPC64LE-NEXT: stbcx. 4, 0, 3 5145; PPC64LE-NEXT: bne 0, .LBB302_1 5146; PPC64LE-NEXT: .LBB302_3: 5147; PPC64LE-NEXT: mr 3, 5 5148; PPC64LE-NEXT: blr 5149 %ret = atomicrmw umax i8* %ptr, i8 %val release 5150 ret i8 %ret 5151} 5152 5153define i8 @test303(i8* %ptr, i8 %val) { 5154; PPC64LE-LABEL: test303: 5155; PPC64LE: # %bb.0: 5156; PPC64LE-NEXT: lwsync 5157; PPC64LE-NEXT: .LBB303_1: 5158; PPC64LE-NEXT: lbarx 5, 0, 3 5159; PPC64LE-NEXT: cmplw 4, 5 5160; PPC64LE-NEXT: ble 0, .LBB303_3 5161; PPC64LE-NEXT: # %bb.2: 5162; PPC64LE-NEXT: stbcx. 4, 0, 3 5163; PPC64LE-NEXT: bne 0, .LBB303_1 5164; PPC64LE-NEXT: .LBB303_3: 5165; PPC64LE-NEXT: mr 3, 5 5166; PPC64LE-NEXT: lwsync 5167; PPC64LE-NEXT: blr 5168 %ret = atomicrmw umax i8* %ptr, i8 %val acq_rel 5169 ret i8 %ret 5170} 5171 5172define i8 @test304(i8* %ptr, i8 %val) { 5173; PPC64LE-LABEL: test304: 5174; PPC64LE: # %bb.0: 5175; PPC64LE-NEXT: sync 5176; PPC64LE-NEXT: .LBB304_1: 5177; PPC64LE-NEXT: lbarx 5, 0, 3 5178; PPC64LE-NEXT: cmplw 4, 5 5179; PPC64LE-NEXT: ble 0, .LBB304_3 5180; PPC64LE-NEXT: # %bb.2: 5181; PPC64LE-NEXT: stbcx. 4, 0, 3 5182; PPC64LE-NEXT: bne 0, .LBB304_1 5183; PPC64LE-NEXT: .LBB304_3: 5184; PPC64LE-NEXT: mr 3, 5 5185; PPC64LE-NEXT: lwsync 5186; PPC64LE-NEXT: blr 5187 %ret = atomicrmw umax i8* %ptr, i8 %val seq_cst 5188 ret i8 %ret 5189} 5190 5191define i16 @test305(i16* %ptr, i16 %val) { 5192; PPC64LE-LABEL: test305: 5193; PPC64LE: # %bb.0: 5194; PPC64LE-NEXT: .LBB305_1: 5195; PPC64LE-NEXT: lharx 5, 0, 3 5196; PPC64LE-NEXT: cmplw 4, 5 5197; PPC64LE-NEXT: ble 0, .LBB305_3 5198; PPC64LE-NEXT: # %bb.2: 5199; PPC64LE-NEXT: sthcx. 4, 0, 3 5200; PPC64LE-NEXT: bne 0, .LBB305_1 5201; PPC64LE-NEXT: .LBB305_3: 5202; PPC64LE-NEXT: mr 3, 5 5203; PPC64LE-NEXT: blr 5204 %ret = atomicrmw umax i16* %ptr, i16 %val monotonic 5205 ret i16 %ret 5206} 5207 5208define i16 @test306(i16* %ptr, i16 %val) { 5209; PPC64LE-LABEL: test306: 5210; PPC64LE: # %bb.0: 5211; PPC64LE-NEXT: mr 5, 3 5212; PPC64LE-NEXT: .LBB306_1: 5213; PPC64LE-NEXT: lharx 3, 0, 5 5214; PPC64LE-NEXT: cmplw 4, 3 5215; PPC64LE-NEXT: ble 0, .LBB306_3 5216; PPC64LE-NEXT: # %bb.2: 5217; PPC64LE-NEXT: sthcx. 4, 0, 5 5218; PPC64LE-NEXT: bne 0, .LBB306_1 5219; PPC64LE-NEXT: .LBB306_3: 5220; PPC64LE-NEXT: lwsync 5221; PPC64LE-NEXT: blr 5222 %ret = atomicrmw umax i16* %ptr, i16 %val acquire 5223 ret i16 %ret 5224} 5225 5226define i16 @test307(i16* %ptr, i16 %val) { 5227; PPC64LE-LABEL: test307: 5228; PPC64LE: # %bb.0: 5229; PPC64LE-NEXT: lwsync 5230; PPC64LE-NEXT: .LBB307_1: 5231; PPC64LE-NEXT: lharx 5, 0, 3 5232; PPC64LE-NEXT: cmplw 4, 5 5233; PPC64LE-NEXT: ble 0, .LBB307_3 5234; PPC64LE-NEXT: # %bb.2: 5235; PPC64LE-NEXT: sthcx. 4, 0, 3 5236; PPC64LE-NEXT: bne 0, .LBB307_1 5237; PPC64LE-NEXT: .LBB307_3: 5238; PPC64LE-NEXT: mr 3, 5 5239; PPC64LE-NEXT: blr 5240 %ret = atomicrmw umax i16* %ptr, i16 %val release 5241 ret i16 %ret 5242} 5243 5244define i16 @test308(i16* %ptr, i16 %val) { 5245; PPC64LE-LABEL: test308: 5246; PPC64LE: # %bb.0: 5247; PPC64LE-NEXT: lwsync 5248; PPC64LE-NEXT: .LBB308_1: 5249; PPC64LE-NEXT: lharx 5, 0, 3 5250; PPC64LE-NEXT: cmplw 4, 5 5251; PPC64LE-NEXT: ble 0, .LBB308_3 5252; PPC64LE-NEXT: # %bb.2: 5253; PPC64LE-NEXT: sthcx. 4, 0, 3 5254; PPC64LE-NEXT: bne 0, .LBB308_1 5255; PPC64LE-NEXT: .LBB308_3: 5256; PPC64LE-NEXT: mr 3, 5 5257; PPC64LE-NEXT: lwsync 5258; PPC64LE-NEXT: blr 5259 %ret = atomicrmw umax i16* %ptr, i16 %val acq_rel 5260 ret i16 %ret 5261} 5262 5263define i16 @test309(i16* %ptr, i16 %val) { 5264; PPC64LE-LABEL: test309: 5265; PPC64LE: # %bb.0: 5266; PPC64LE-NEXT: sync 5267; PPC64LE-NEXT: .LBB309_1: 5268; PPC64LE-NEXT: lharx 5, 0, 3 5269; PPC64LE-NEXT: cmplw 4, 5 5270; PPC64LE-NEXT: ble 0, .LBB309_3 5271; PPC64LE-NEXT: # %bb.2: 5272; PPC64LE-NEXT: sthcx. 4, 0, 3 5273; PPC64LE-NEXT: bne 0, .LBB309_1 5274; PPC64LE-NEXT: .LBB309_3: 5275; PPC64LE-NEXT: mr 3, 5 5276; PPC64LE-NEXT: lwsync 5277; PPC64LE-NEXT: blr 5278 %ret = atomicrmw umax i16* %ptr, i16 %val seq_cst 5279 ret i16 %ret 5280} 5281 5282define i32 @test310(i32* %ptr, i32 %val) { 5283; PPC64LE-LABEL: test310: 5284; PPC64LE: # %bb.0: 5285; PPC64LE-NEXT: .LBB310_1: 5286; PPC64LE-NEXT: lwarx 5, 0, 3 5287; PPC64LE-NEXT: cmplw 4, 5 5288; PPC64LE-NEXT: ble 0, .LBB310_3 5289; PPC64LE-NEXT: # %bb.2: 5290; PPC64LE-NEXT: stwcx. 4, 0, 3 5291; PPC64LE-NEXT: bne 0, .LBB310_1 5292; PPC64LE-NEXT: .LBB310_3: 5293; PPC64LE-NEXT: mr 3, 5 5294; PPC64LE-NEXT: blr 5295 %ret = atomicrmw umax i32* %ptr, i32 %val monotonic 5296 ret i32 %ret 5297} 5298 5299define i32 @test311(i32* %ptr, i32 %val) { 5300; PPC64LE-LABEL: test311: 5301; PPC64LE: # %bb.0: 5302; PPC64LE-NEXT: mr 5, 3 5303; PPC64LE-NEXT: .LBB311_1: 5304; PPC64LE-NEXT: lwarx 3, 0, 5 5305; PPC64LE-NEXT: cmplw 4, 3 5306; PPC64LE-NEXT: ble 0, .LBB311_3 5307; PPC64LE-NEXT: # %bb.2: 5308; PPC64LE-NEXT: stwcx. 4, 0, 5 5309; PPC64LE-NEXT: bne 0, .LBB311_1 5310; PPC64LE-NEXT: .LBB311_3: 5311; PPC64LE-NEXT: lwsync 5312; PPC64LE-NEXT: blr 5313 %ret = atomicrmw umax i32* %ptr, i32 %val acquire 5314 ret i32 %ret 5315} 5316 5317define i32 @test312(i32* %ptr, i32 %val) { 5318; PPC64LE-LABEL: test312: 5319; PPC64LE: # %bb.0: 5320; PPC64LE-NEXT: lwsync 5321; PPC64LE-NEXT: .LBB312_1: 5322; PPC64LE-NEXT: lwarx 5, 0, 3 5323; PPC64LE-NEXT: cmplw 4, 5 5324; PPC64LE-NEXT: ble 0, .LBB312_3 5325; PPC64LE-NEXT: # %bb.2: 5326; PPC64LE-NEXT: stwcx. 4, 0, 3 5327; PPC64LE-NEXT: bne 0, .LBB312_1 5328; PPC64LE-NEXT: .LBB312_3: 5329; PPC64LE-NEXT: mr 3, 5 5330; PPC64LE-NEXT: blr 5331 %ret = atomicrmw umax i32* %ptr, i32 %val release 5332 ret i32 %ret 5333} 5334 5335define i32 @test313(i32* %ptr, i32 %val) { 5336; PPC64LE-LABEL: test313: 5337; PPC64LE: # %bb.0: 5338; PPC64LE-NEXT: lwsync 5339; PPC64LE-NEXT: .LBB313_1: 5340; PPC64LE-NEXT: lwarx 5, 0, 3 5341; PPC64LE-NEXT: cmplw 4, 5 5342; PPC64LE-NEXT: ble 0, .LBB313_3 5343; PPC64LE-NEXT: # %bb.2: 5344; PPC64LE-NEXT: stwcx. 4, 0, 3 5345; PPC64LE-NEXT: bne 0, .LBB313_1 5346; PPC64LE-NEXT: .LBB313_3: 5347; PPC64LE-NEXT: mr 3, 5 5348; PPC64LE-NEXT: lwsync 5349; PPC64LE-NEXT: blr 5350 %ret = atomicrmw umax i32* %ptr, i32 %val acq_rel 5351 ret i32 %ret 5352} 5353 5354define i32 @test314(i32* %ptr, i32 %val) { 5355; PPC64LE-LABEL: test314: 5356; PPC64LE: # %bb.0: 5357; PPC64LE-NEXT: sync 5358; PPC64LE-NEXT: .LBB314_1: 5359; PPC64LE-NEXT: lwarx 5, 0, 3 5360; PPC64LE-NEXT: cmplw 4, 5 5361; PPC64LE-NEXT: ble 0, .LBB314_3 5362; PPC64LE-NEXT: # %bb.2: 5363; PPC64LE-NEXT: stwcx. 4, 0, 3 5364; PPC64LE-NEXT: bne 0, .LBB314_1 5365; PPC64LE-NEXT: .LBB314_3: 5366; PPC64LE-NEXT: mr 3, 5 5367; PPC64LE-NEXT: lwsync 5368; PPC64LE-NEXT: blr 5369 %ret = atomicrmw umax i32* %ptr, i32 %val seq_cst 5370 ret i32 %ret 5371} 5372 5373define i64 @test315(i64* %ptr, i64 %val) { 5374; PPC64LE-LABEL: test315: 5375; PPC64LE: # %bb.0: 5376; PPC64LE-NEXT: .LBB315_1: 5377; PPC64LE-NEXT: ldarx 5, 0, 3 5378; PPC64LE-NEXT: cmpld 4, 5 5379; PPC64LE-NEXT: ble 0, .LBB315_3 5380; PPC64LE-NEXT: # %bb.2: 5381; PPC64LE-NEXT: stdcx. 4, 0, 3 5382; PPC64LE-NEXT: bne 0, .LBB315_1 5383; PPC64LE-NEXT: .LBB315_3: 5384; PPC64LE-NEXT: mr 3, 5 5385; PPC64LE-NEXT: blr 5386 %ret = atomicrmw umax i64* %ptr, i64 %val monotonic 5387 ret i64 %ret 5388} 5389 5390define i64 @test316(i64* %ptr, i64 %val) { 5391; PPC64LE-LABEL: test316: 5392; PPC64LE: # %bb.0: 5393; PPC64LE-NEXT: mr 5, 3 5394; PPC64LE-NEXT: .LBB316_1: 5395; PPC64LE-NEXT: ldarx 3, 0, 5 5396; PPC64LE-NEXT: cmpld 4, 3 5397; PPC64LE-NEXT: ble 0, .LBB316_3 5398; PPC64LE-NEXT: # %bb.2: 5399; PPC64LE-NEXT: stdcx. 4, 0, 5 5400; PPC64LE-NEXT: bne 0, .LBB316_1 5401; PPC64LE-NEXT: .LBB316_3: 5402; PPC64LE-NEXT: lwsync 5403; PPC64LE-NEXT: blr 5404 %ret = atomicrmw umax i64* %ptr, i64 %val acquire 5405 ret i64 %ret 5406} 5407 5408define i64 @test317(i64* %ptr, i64 %val) { 5409; PPC64LE-LABEL: test317: 5410; PPC64LE: # %bb.0: 5411; PPC64LE-NEXT: lwsync 5412; PPC64LE-NEXT: .LBB317_1: 5413; PPC64LE-NEXT: ldarx 5, 0, 3 5414; PPC64LE-NEXT: cmpld 4, 5 5415; PPC64LE-NEXT: ble 0, .LBB317_3 5416; PPC64LE-NEXT: # %bb.2: 5417; PPC64LE-NEXT: stdcx. 4, 0, 3 5418; PPC64LE-NEXT: bne 0, .LBB317_1 5419; PPC64LE-NEXT: .LBB317_3: 5420; PPC64LE-NEXT: mr 3, 5 5421; PPC64LE-NEXT: blr 5422 %ret = atomicrmw umax i64* %ptr, i64 %val release 5423 ret i64 %ret 5424} 5425 5426define i64 @test318(i64* %ptr, i64 %val) { 5427; PPC64LE-LABEL: test318: 5428; PPC64LE: # %bb.0: 5429; PPC64LE-NEXT: lwsync 5430; PPC64LE-NEXT: .LBB318_1: 5431; PPC64LE-NEXT: ldarx 5, 0, 3 5432; PPC64LE-NEXT: cmpld 4, 5 5433; PPC64LE-NEXT: ble 0, .LBB318_3 5434; PPC64LE-NEXT: # %bb.2: 5435; PPC64LE-NEXT: stdcx. 4, 0, 3 5436; PPC64LE-NEXT: bne 0, .LBB318_1 5437; PPC64LE-NEXT: .LBB318_3: 5438; PPC64LE-NEXT: mr 3, 5 5439; PPC64LE-NEXT: lwsync 5440; PPC64LE-NEXT: blr 5441 %ret = atomicrmw umax i64* %ptr, i64 %val acq_rel 5442 ret i64 %ret 5443} 5444 5445define i64 @test319(i64* %ptr, i64 %val) { 5446; PPC64LE-LABEL: test319: 5447; PPC64LE: # %bb.0: 5448; PPC64LE-NEXT: sync 5449; PPC64LE-NEXT: .LBB319_1: 5450; PPC64LE-NEXT: ldarx 5, 0, 3 5451; PPC64LE-NEXT: cmpld 4, 5 5452; PPC64LE-NEXT: ble 0, .LBB319_3 5453; PPC64LE-NEXT: # %bb.2: 5454; PPC64LE-NEXT: stdcx. 4, 0, 3 5455; PPC64LE-NEXT: bne 0, .LBB319_1 5456; PPC64LE-NEXT: .LBB319_3: 5457; PPC64LE-NEXT: mr 3, 5 5458; PPC64LE-NEXT: lwsync 5459; PPC64LE-NEXT: blr 5460 %ret = atomicrmw umax i64* %ptr, i64 %val seq_cst 5461 ret i64 %ret 5462} 5463 5464define i8 @test320(i8* %ptr, i8 %val) { 5465; PPC64LE-LABEL: test320: 5466; PPC64LE: # %bb.0: 5467; PPC64LE-NEXT: .LBB320_1: 5468; PPC64LE-NEXT: lbarx 5, 0, 3 5469; PPC64LE-NEXT: cmplw 4, 5 5470; PPC64LE-NEXT: bge 0, .LBB320_3 5471; PPC64LE-NEXT: # %bb.2: 5472; PPC64LE-NEXT: stbcx. 4, 0, 3 5473; PPC64LE-NEXT: bne 0, .LBB320_1 5474; PPC64LE-NEXT: .LBB320_3: 5475; PPC64LE-NEXT: mr 3, 5 5476; PPC64LE-NEXT: blr 5477 %ret = atomicrmw umin i8* %ptr, i8 %val monotonic 5478 ret i8 %ret 5479} 5480 5481define i8 @test321(i8* %ptr, i8 %val) { 5482; PPC64LE-LABEL: test321: 5483; PPC64LE: # %bb.0: 5484; PPC64LE-NEXT: mr 5, 3 5485; PPC64LE-NEXT: .LBB321_1: 5486; PPC64LE-NEXT: lbarx 3, 0, 5 5487; PPC64LE-NEXT: cmplw 4, 3 5488; PPC64LE-NEXT: bge 0, .LBB321_3 5489; PPC64LE-NEXT: # %bb.2: 5490; PPC64LE-NEXT: stbcx. 4, 0, 5 5491; PPC64LE-NEXT: bne 0, .LBB321_1 5492; PPC64LE-NEXT: .LBB321_3: 5493; PPC64LE-NEXT: lwsync 5494; PPC64LE-NEXT: blr 5495 %ret = atomicrmw umin i8* %ptr, i8 %val acquire 5496 ret i8 %ret 5497} 5498 5499define i8 @test322(i8* %ptr, i8 %val) { 5500; PPC64LE-LABEL: test322: 5501; PPC64LE: # %bb.0: 5502; PPC64LE-NEXT: lwsync 5503; PPC64LE-NEXT: .LBB322_1: 5504; PPC64LE-NEXT: lbarx 5, 0, 3 5505; PPC64LE-NEXT: cmplw 4, 5 5506; PPC64LE-NEXT: bge 0, .LBB322_3 5507; PPC64LE-NEXT: # %bb.2: 5508; PPC64LE-NEXT: stbcx. 4, 0, 3 5509; PPC64LE-NEXT: bne 0, .LBB322_1 5510; PPC64LE-NEXT: .LBB322_3: 5511; PPC64LE-NEXT: mr 3, 5 5512; PPC64LE-NEXT: blr 5513 %ret = atomicrmw umin i8* %ptr, i8 %val release 5514 ret i8 %ret 5515} 5516 5517define i8 @test323(i8* %ptr, i8 %val) { 5518; PPC64LE-LABEL: test323: 5519; PPC64LE: # %bb.0: 5520; PPC64LE-NEXT: lwsync 5521; PPC64LE-NEXT: .LBB323_1: 5522; PPC64LE-NEXT: lbarx 5, 0, 3 5523; PPC64LE-NEXT: cmplw 4, 5 5524; PPC64LE-NEXT: bge 0, .LBB323_3 5525; PPC64LE-NEXT: # %bb.2: 5526; PPC64LE-NEXT: stbcx. 4, 0, 3 5527; PPC64LE-NEXT: bne 0, .LBB323_1 5528; PPC64LE-NEXT: .LBB323_3: 5529; PPC64LE-NEXT: mr 3, 5 5530; PPC64LE-NEXT: lwsync 5531; PPC64LE-NEXT: blr 5532 %ret = atomicrmw umin i8* %ptr, i8 %val acq_rel 5533 ret i8 %ret 5534} 5535 5536define i8 @test324(i8* %ptr, i8 %val) { 5537; PPC64LE-LABEL: test324: 5538; PPC64LE: # %bb.0: 5539; PPC64LE-NEXT: sync 5540; PPC64LE-NEXT: .LBB324_1: 5541; PPC64LE-NEXT: lbarx 5, 0, 3 5542; PPC64LE-NEXT: cmplw 4, 5 5543; PPC64LE-NEXT: bge 0, .LBB324_3 5544; PPC64LE-NEXT: # %bb.2: 5545; PPC64LE-NEXT: stbcx. 4, 0, 3 5546; PPC64LE-NEXT: bne 0, .LBB324_1 5547; PPC64LE-NEXT: .LBB324_3: 5548; PPC64LE-NEXT: mr 3, 5 5549; PPC64LE-NEXT: lwsync 5550; PPC64LE-NEXT: blr 5551 %ret = atomicrmw umin i8* %ptr, i8 %val seq_cst 5552 ret i8 %ret 5553} 5554 5555define i16 @test325(i16* %ptr, i16 %val) { 5556; PPC64LE-LABEL: test325: 5557; PPC64LE: # %bb.0: 5558; PPC64LE-NEXT: .LBB325_1: 5559; PPC64LE-NEXT: lharx 5, 0, 3 5560; PPC64LE-NEXT: cmplw 4, 5 5561; PPC64LE-NEXT: bge 0, .LBB325_3 5562; PPC64LE-NEXT: # %bb.2: 5563; PPC64LE-NEXT: sthcx. 4, 0, 3 5564; PPC64LE-NEXT: bne 0, .LBB325_1 5565; PPC64LE-NEXT: .LBB325_3: 5566; PPC64LE-NEXT: mr 3, 5 5567; PPC64LE-NEXT: blr 5568 %ret = atomicrmw umin i16* %ptr, i16 %val monotonic 5569 ret i16 %ret 5570} 5571 5572define i16 @test326(i16* %ptr, i16 %val) { 5573; PPC64LE-LABEL: test326: 5574; PPC64LE: # %bb.0: 5575; PPC64LE-NEXT: mr 5, 3 5576; PPC64LE-NEXT: .LBB326_1: 5577; PPC64LE-NEXT: lharx 3, 0, 5 5578; PPC64LE-NEXT: cmplw 4, 3 5579; PPC64LE-NEXT: bge 0, .LBB326_3 5580; PPC64LE-NEXT: # %bb.2: 5581; PPC64LE-NEXT: sthcx. 4, 0, 5 5582; PPC64LE-NEXT: bne 0, .LBB326_1 5583; PPC64LE-NEXT: .LBB326_3: 5584; PPC64LE-NEXT: lwsync 5585; PPC64LE-NEXT: blr 5586 %ret = atomicrmw umin i16* %ptr, i16 %val acquire 5587 ret i16 %ret 5588} 5589 5590define i16 @test327(i16* %ptr, i16 %val) { 5591; PPC64LE-LABEL: test327: 5592; PPC64LE: # %bb.0: 5593; PPC64LE-NEXT: lwsync 5594; PPC64LE-NEXT: .LBB327_1: 5595; PPC64LE-NEXT: lharx 5, 0, 3 5596; PPC64LE-NEXT: cmplw 4, 5 5597; PPC64LE-NEXT: bge 0, .LBB327_3 5598; PPC64LE-NEXT: # %bb.2: 5599; PPC64LE-NEXT: sthcx. 4, 0, 3 5600; PPC64LE-NEXT: bne 0, .LBB327_1 5601; PPC64LE-NEXT: .LBB327_3: 5602; PPC64LE-NEXT: mr 3, 5 5603; PPC64LE-NEXT: blr 5604 %ret = atomicrmw umin i16* %ptr, i16 %val release 5605 ret i16 %ret 5606} 5607 5608define i16 @test328(i16* %ptr, i16 %val) { 5609; PPC64LE-LABEL: test328: 5610; PPC64LE: # %bb.0: 5611; PPC64LE-NEXT: lwsync 5612; PPC64LE-NEXT: .LBB328_1: 5613; PPC64LE-NEXT: lharx 5, 0, 3 5614; PPC64LE-NEXT: cmplw 4, 5 5615; PPC64LE-NEXT: bge 0, .LBB328_3 5616; PPC64LE-NEXT: # %bb.2: 5617; PPC64LE-NEXT: sthcx. 4, 0, 3 5618; PPC64LE-NEXT: bne 0, .LBB328_1 5619; PPC64LE-NEXT: .LBB328_3: 5620; PPC64LE-NEXT: mr 3, 5 5621; PPC64LE-NEXT: lwsync 5622; PPC64LE-NEXT: blr 5623 %ret = atomicrmw umin i16* %ptr, i16 %val acq_rel 5624 ret i16 %ret 5625} 5626 5627define i16 @test329(i16* %ptr, i16 %val) { 5628; PPC64LE-LABEL: test329: 5629; PPC64LE: # %bb.0: 5630; PPC64LE-NEXT: sync 5631; PPC64LE-NEXT: .LBB329_1: 5632; PPC64LE-NEXT: lharx 5, 0, 3 5633; PPC64LE-NEXT: cmplw 4, 5 5634; PPC64LE-NEXT: bge 0, .LBB329_3 5635; PPC64LE-NEXT: # %bb.2: 5636; PPC64LE-NEXT: sthcx. 4, 0, 3 5637; PPC64LE-NEXT: bne 0, .LBB329_1 5638; PPC64LE-NEXT: .LBB329_3: 5639; PPC64LE-NEXT: mr 3, 5 5640; PPC64LE-NEXT: lwsync 5641; PPC64LE-NEXT: blr 5642 %ret = atomicrmw umin i16* %ptr, i16 %val seq_cst 5643 ret i16 %ret 5644} 5645 5646define i32 @test330(i32* %ptr, i32 %val) { 5647; PPC64LE-LABEL: test330: 5648; PPC64LE: # %bb.0: 5649; PPC64LE-NEXT: .LBB330_1: 5650; PPC64LE-NEXT: lwarx 5, 0, 3 5651; PPC64LE-NEXT: cmplw 4, 5 5652; PPC64LE-NEXT: bge 0, .LBB330_3 5653; PPC64LE-NEXT: # %bb.2: 5654; PPC64LE-NEXT: stwcx. 4, 0, 3 5655; PPC64LE-NEXT: bne 0, .LBB330_1 5656; PPC64LE-NEXT: .LBB330_3: 5657; PPC64LE-NEXT: mr 3, 5 5658; PPC64LE-NEXT: blr 5659 %ret = atomicrmw umin i32* %ptr, i32 %val monotonic 5660 ret i32 %ret 5661} 5662 5663define i32 @test331(i32* %ptr, i32 %val) { 5664; PPC64LE-LABEL: test331: 5665; PPC64LE: # %bb.0: 5666; PPC64LE-NEXT: mr 5, 3 5667; PPC64LE-NEXT: .LBB331_1: 5668; PPC64LE-NEXT: lwarx 3, 0, 5 5669; PPC64LE-NEXT: cmplw 4, 3 5670; PPC64LE-NEXT: bge 0, .LBB331_3 5671; PPC64LE-NEXT: # %bb.2: 5672; PPC64LE-NEXT: stwcx. 4, 0, 5 5673; PPC64LE-NEXT: bne 0, .LBB331_1 5674; PPC64LE-NEXT: .LBB331_3: 5675; PPC64LE-NEXT: lwsync 5676; PPC64LE-NEXT: blr 5677 %ret = atomicrmw umin i32* %ptr, i32 %val acquire 5678 ret i32 %ret 5679} 5680 5681define i32 @test332(i32* %ptr, i32 %val) { 5682; PPC64LE-LABEL: test332: 5683; PPC64LE: # %bb.0: 5684; PPC64LE-NEXT: lwsync 5685; PPC64LE-NEXT: .LBB332_1: 5686; PPC64LE-NEXT: lwarx 5, 0, 3 5687; PPC64LE-NEXT: cmplw 4, 5 5688; PPC64LE-NEXT: bge 0, .LBB332_3 5689; PPC64LE-NEXT: # %bb.2: 5690; PPC64LE-NEXT: stwcx. 4, 0, 3 5691; PPC64LE-NEXT: bne 0, .LBB332_1 5692; PPC64LE-NEXT: .LBB332_3: 5693; PPC64LE-NEXT: mr 3, 5 5694; PPC64LE-NEXT: blr 5695 %ret = atomicrmw umin i32* %ptr, i32 %val release 5696 ret i32 %ret 5697} 5698 5699define i32 @test333(i32* %ptr, i32 %val) { 5700; PPC64LE-LABEL: test333: 5701; PPC64LE: # %bb.0: 5702; PPC64LE-NEXT: lwsync 5703; PPC64LE-NEXT: .LBB333_1: 5704; PPC64LE-NEXT: lwarx 5, 0, 3 5705; PPC64LE-NEXT: cmplw 4, 5 5706; PPC64LE-NEXT: bge 0, .LBB333_3 5707; PPC64LE-NEXT: # %bb.2: 5708; PPC64LE-NEXT: stwcx. 4, 0, 3 5709; PPC64LE-NEXT: bne 0, .LBB333_1 5710; PPC64LE-NEXT: .LBB333_3: 5711; PPC64LE-NEXT: mr 3, 5 5712; PPC64LE-NEXT: lwsync 5713; PPC64LE-NEXT: blr 5714 %ret = atomicrmw umin i32* %ptr, i32 %val acq_rel 5715 ret i32 %ret 5716} 5717 5718define i32 @test334(i32* %ptr, i32 %val) { 5719; PPC64LE-LABEL: test334: 5720; PPC64LE: # %bb.0: 5721; PPC64LE-NEXT: sync 5722; PPC64LE-NEXT: .LBB334_1: 5723; PPC64LE-NEXT: lwarx 5, 0, 3 5724; PPC64LE-NEXT: cmplw 4, 5 5725; PPC64LE-NEXT: bge 0, .LBB334_3 5726; PPC64LE-NEXT: # %bb.2: 5727; PPC64LE-NEXT: stwcx. 4, 0, 3 5728; PPC64LE-NEXT: bne 0, .LBB334_1 5729; PPC64LE-NEXT: .LBB334_3: 5730; PPC64LE-NEXT: mr 3, 5 5731; PPC64LE-NEXT: lwsync 5732; PPC64LE-NEXT: blr 5733 %ret = atomicrmw umin i32* %ptr, i32 %val seq_cst 5734 ret i32 %ret 5735} 5736 5737define i64 @test335(i64* %ptr, i64 %val) { 5738; PPC64LE-LABEL: test335: 5739; PPC64LE: # %bb.0: 5740; PPC64LE-NEXT: .LBB335_1: 5741; PPC64LE-NEXT: ldarx 5, 0, 3 5742; PPC64LE-NEXT: cmpld 4, 5 5743; PPC64LE-NEXT: bge 0, .LBB335_3 5744; PPC64LE-NEXT: # %bb.2: 5745; PPC64LE-NEXT: stdcx. 4, 0, 3 5746; PPC64LE-NEXT: bne 0, .LBB335_1 5747; PPC64LE-NEXT: .LBB335_3: 5748; PPC64LE-NEXT: mr 3, 5 5749; PPC64LE-NEXT: blr 5750 %ret = atomicrmw umin i64* %ptr, i64 %val monotonic 5751 ret i64 %ret 5752} 5753 5754define i64 @test336(i64* %ptr, i64 %val) { 5755; PPC64LE-LABEL: test336: 5756; PPC64LE: # %bb.0: 5757; PPC64LE-NEXT: mr 5, 3 5758; PPC64LE-NEXT: .LBB336_1: 5759; PPC64LE-NEXT: ldarx 3, 0, 5 5760; PPC64LE-NEXT: cmpld 4, 3 5761; PPC64LE-NEXT: bge 0, .LBB336_3 5762; PPC64LE-NEXT: # %bb.2: 5763; PPC64LE-NEXT: stdcx. 4, 0, 5 5764; PPC64LE-NEXT: bne 0, .LBB336_1 5765; PPC64LE-NEXT: .LBB336_3: 5766; PPC64LE-NEXT: lwsync 5767; PPC64LE-NEXT: blr 5768 %ret = atomicrmw umin i64* %ptr, i64 %val acquire 5769 ret i64 %ret 5770} 5771 5772define i64 @test337(i64* %ptr, i64 %val) { 5773; PPC64LE-LABEL: test337: 5774; PPC64LE: # %bb.0: 5775; PPC64LE-NEXT: lwsync 5776; PPC64LE-NEXT: .LBB337_1: 5777; PPC64LE-NEXT: ldarx 5, 0, 3 5778; PPC64LE-NEXT: cmpld 4, 5 5779; PPC64LE-NEXT: bge 0, .LBB337_3 5780; PPC64LE-NEXT: # %bb.2: 5781; PPC64LE-NEXT: stdcx. 4, 0, 3 5782; PPC64LE-NEXT: bne 0, .LBB337_1 5783; PPC64LE-NEXT: .LBB337_3: 5784; PPC64LE-NEXT: mr 3, 5 5785; PPC64LE-NEXT: blr 5786 %ret = atomicrmw umin i64* %ptr, i64 %val release 5787 ret i64 %ret 5788} 5789 5790define i64 @test338(i64* %ptr, i64 %val) { 5791; PPC64LE-LABEL: test338: 5792; PPC64LE: # %bb.0: 5793; PPC64LE-NEXT: lwsync 5794; PPC64LE-NEXT: .LBB338_1: 5795; PPC64LE-NEXT: ldarx 5, 0, 3 5796; PPC64LE-NEXT: cmpld 4, 5 5797; PPC64LE-NEXT: bge 0, .LBB338_3 5798; PPC64LE-NEXT: # %bb.2: 5799; PPC64LE-NEXT: stdcx. 4, 0, 3 5800; PPC64LE-NEXT: bne 0, .LBB338_1 5801; PPC64LE-NEXT: .LBB338_3: 5802; PPC64LE-NEXT: mr 3, 5 5803; PPC64LE-NEXT: lwsync 5804; PPC64LE-NEXT: blr 5805 %ret = atomicrmw umin i64* %ptr, i64 %val acq_rel 5806 ret i64 %ret 5807} 5808 5809define i64 @test339(i64* %ptr, i64 %val) { 5810; PPC64LE-LABEL: test339: 5811; PPC64LE: # %bb.0: 5812; PPC64LE-NEXT: sync 5813; PPC64LE-NEXT: .LBB339_1: 5814; PPC64LE-NEXT: ldarx 5, 0, 3 5815; PPC64LE-NEXT: cmpld 4, 5 5816; PPC64LE-NEXT: bge 0, .LBB339_3 5817; PPC64LE-NEXT: # %bb.2: 5818; PPC64LE-NEXT: stdcx. 4, 0, 3 5819; PPC64LE-NEXT: bne 0, .LBB339_1 5820; PPC64LE-NEXT: .LBB339_3: 5821; PPC64LE-NEXT: mr 3, 5 5822; PPC64LE-NEXT: lwsync 5823; PPC64LE-NEXT: blr 5824 %ret = atomicrmw umin i64* %ptr, i64 %val seq_cst 5825 ret i64 %ret 5826} 5827 5828define i8 @test340(i8* %ptr, i8 %val) { 5829; PPC64LE-LABEL: test340: 5830; PPC64LE: # %bb.0: 5831; PPC64LE-NEXT: .LBB340_1: 5832; PPC64LE-NEXT: lbarx 5, 0, 3 5833; PPC64LE-NEXT: stbcx. 4, 0, 3 5834; PPC64LE-NEXT: bne 0, .LBB340_1 5835; PPC64LE-NEXT: # %bb.2: 5836; PPC64LE-NEXT: mr 3, 5 5837; PPC64LE-NEXT: blr 5838 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") monotonic 5839 ret i8 %ret 5840} 5841 5842define i8 @test341(i8* %ptr, i8 %val) { 5843; PPC64LE-LABEL: test341: 5844; PPC64LE: # %bb.0: 5845; PPC64LE-NEXT: mr 5, 3 5846; PPC64LE-NEXT: .LBB341_1: 5847; PPC64LE-NEXT: lbarx 3, 0, 5 5848; PPC64LE-NEXT: stbcx. 4, 0, 5 5849; PPC64LE-NEXT: bne 0, .LBB341_1 5850; PPC64LE-NEXT: # %bb.2: 5851; PPC64LE-NEXT: lwsync 5852; PPC64LE-NEXT: blr 5853 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") acquire 5854 ret i8 %ret 5855} 5856 5857define i8 @test342(i8* %ptr, i8 %val) { 5858; PPC64LE-LABEL: test342: 5859; PPC64LE: # %bb.0: 5860; PPC64LE-NEXT: lwsync 5861; PPC64LE-NEXT: .LBB342_1: 5862; PPC64LE-NEXT: lbarx 5, 0, 3 5863; PPC64LE-NEXT: stbcx. 4, 0, 3 5864; PPC64LE-NEXT: bne 0, .LBB342_1 5865; PPC64LE-NEXT: # %bb.2: 5866; PPC64LE-NEXT: mr 3, 5 5867; PPC64LE-NEXT: blr 5868 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") release 5869 ret i8 %ret 5870} 5871 5872define i8 @test343(i8* %ptr, i8 %val) { 5873; PPC64LE-LABEL: test343: 5874; PPC64LE: # %bb.0: 5875; PPC64LE-NEXT: lwsync 5876; PPC64LE-NEXT: .LBB343_1: 5877; PPC64LE-NEXT: lbarx 5, 0, 3 5878; PPC64LE-NEXT: stbcx. 4, 0, 3 5879; PPC64LE-NEXT: bne 0, .LBB343_1 5880; PPC64LE-NEXT: # %bb.2: 5881; PPC64LE-NEXT: mr 3, 5 5882; PPC64LE-NEXT: lwsync 5883; PPC64LE-NEXT: blr 5884 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") acq_rel 5885 ret i8 %ret 5886} 5887 5888define i8 @test344(i8* %ptr, i8 %val) { 5889; PPC64LE-LABEL: test344: 5890; PPC64LE: # %bb.0: 5891; PPC64LE-NEXT: sync 5892; PPC64LE-NEXT: .LBB344_1: 5893; PPC64LE-NEXT: lbarx 5, 0, 3 5894; PPC64LE-NEXT: stbcx. 4, 0, 3 5895; PPC64LE-NEXT: bne 0, .LBB344_1 5896; PPC64LE-NEXT: # %bb.2: 5897; PPC64LE-NEXT: mr 3, 5 5898; PPC64LE-NEXT: lwsync 5899; PPC64LE-NEXT: blr 5900 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") seq_cst 5901 ret i8 %ret 5902} 5903 5904define i16 @test345(i16* %ptr, i16 %val) { 5905; PPC64LE-LABEL: test345: 5906; PPC64LE: # %bb.0: 5907; PPC64LE-NEXT: .LBB345_1: 5908; PPC64LE-NEXT: lharx 5, 0, 3 5909; PPC64LE-NEXT: sthcx. 4, 0, 3 5910; PPC64LE-NEXT: bne 0, .LBB345_1 5911; PPC64LE-NEXT: # %bb.2: 5912; PPC64LE-NEXT: mr 3, 5 5913; PPC64LE-NEXT: blr 5914 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") monotonic 5915 ret i16 %ret 5916} 5917 5918define i16 @test346(i16* %ptr, i16 %val) { 5919; PPC64LE-LABEL: test346: 5920; PPC64LE: # %bb.0: 5921; PPC64LE-NEXT: mr 5, 3 5922; PPC64LE-NEXT: .LBB346_1: 5923; PPC64LE-NEXT: lharx 3, 0, 5 5924; PPC64LE-NEXT: sthcx. 4, 0, 5 5925; PPC64LE-NEXT: bne 0, .LBB346_1 5926; PPC64LE-NEXT: # %bb.2: 5927; PPC64LE-NEXT: lwsync 5928; PPC64LE-NEXT: blr 5929 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") acquire 5930 ret i16 %ret 5931} 5932 5933define i16 @test347(i16* %ptr, i16 %val) { 5934; PPC64LE-LABEL: test347: 5935; PPC64LE: # %bb.0: 5936; PPC64LE-NEXT: lwsync 5937; PPC64LE-NEXT: .LBB347_1: 5938; PPC64LE-NEXT: lharx 5, 0, 3 5939; PPC64LE-NEXT: sthcx. 4, 0, 3 5940; PPC64LE-NEXT: bne 0, .LBB347_1 5941; PPC64LE-NEXT: # %bb.2: 5942; PPC64LE-NEXT: mr 3, 5 5943; PPC64LE-NEXT: blr 5944 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") release 5945 ret i16 %ret 5946} 5947 5948define i16 @test348(i16* %ptr, i16 %val) { 5949; PPC64LE-LABEL: test348: 5950; PPC64LE: # %bb.0: 5951; PPC64LE-NEXT: lwsync 5952; PPC64LE-NEXT: .LBB348_1: 5953; PPC64LE-NEXT: lharx 5, 0, 3 5954; PPC64LE-NEXT: sthcx. 4, 0, 3 5955; PPC64LE-NEXT: bne 0, .LBB348_1 5956; PPC64LE-NEXT: # %bb.2: 5957; PPC64LE-NEXT: mr 3, 5 5958; PPC64LE-NEXT: lwsync 5959; PPC64LE-NEXT: blr 5960 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") acq_rel 5961 ret i16 %ret 5962} 5963 5964define i16 @test349(i16* %ptr, i16 %val) { 5965; PPC64LE-LABEL: test349: 5966; PPC64LE: # %bb.0: 5967; PPC64LE-NEXT: sync 5968; PPC64LE-NEXT: .LBB349_1: 5969; PPC64LE-NEXT: lharx 5, 0, 3 5970; PPC64LE-NEXT: sthcx. 4, 0, 3 5971; PPC64LE-NEXT: bne 0, .LBB349_1 5972; PPC64LE-NEXT: # %bb.2: 5973; PPC64LE-NEXT: mr 3, 5 5974; PPC64LE-NEXT: lwsync 5975; PPC64LE-NEXT: blr 5976 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") seq_cst 5977 ret i16 %ret 5978} 5979 5980define i32 @test350(i32* %ptr, i32 %val) { 5981; PPC64LE-LABEL: test350: 5982; PPC64LE: # %bb.0: 5983; PPC64LE-NEXT: .LBB350_1: 5984; PPC64LE-NEXT: lwarx 5, 0, 3 5985; PPC64LE-NEXT: stwcx. 4, 0, 3 5986; PPC64LE-NEXT: bne 0, .LBB350_1 5987; PPC64LE-NEXT: # %bb.2: 5988; PPC64LE-NEXT: mr 3, 5 5989; PPC64LE-NEXT: blr 5990 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") monotonic 5991 ret i32 %ret 5992} 5993 5994define i32 @test351(i32* %ptr, i32 %val) { 5995; PPC64LE-LABEL: test351: 5996; PPC64LE: # %bb.0: 5997; PPC64LE-NEXT: mr 5, 3 5998; PPC64LE-NEXT: .LBB351_1: 5999; PPC64LE-NEXT: lwarx 3, 0, 5 6000; PPC64LE-NEXT: stwcx. 4, 0, 5 6001; PPC64LE-NEXT: bne 0, .LBB351_1 6002; PPC64LE-NEXT: # %bb.2: 6003; PPC64LE-NEXT: lwsync 6004; PPC64LE-NEXT: blr 6005 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") acquire 6006 ret i32 %ret 6007} 6008 6009define i32 @test352(i32* %ptr, i32 %val) { 6010; PPC64LE-LABEL: test352: 6011; PPC64LE: # %bb.0: 6012; PPC64LE-NEXT: lwsync 6013; PPC64LE-NEXT: .LBB352_1: 6014; PPC64LE-NEXT: lwarx 5, 0, 3 6015; PPC64LE-NEXT: stwcx. 4, 0, 3 6016; PPC64LE-NEXT: bne 0, .LBB352_1 6017; PPC64LE-NEXT: # %bb.2: 6018; PPC64LE-NEXT: mr 3, 5 6019; PPC64LE-NEXT: blr 6020 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") release 6021 ret i32 %ret 6022} 6023 6024define i32 @test353(i32* %ptr, i32 %val) { 6025; PPC64LE-LABEL: test353: 6026; PPC64LE: # %bb.0: 6027; PPC64LE-NEXT: lwsync 6028; PPC64LE-NEXT: .LBB353_1: 6029; PPC64LE-NEXT: lwarx 5, 0, 3 6030; PPC64LE-NEXT: stwcx. 4, 0, 3 6031; PPC64LE-NEXT: bne 0, .LBB353_1 6032; PPC64LE-NEXT: # %bb.2: 6033; PPC64LE-NEXT: mr 3, 5 6034; PPC64LE-NEXT: lwsync 6035; PPC64LE-NEXT: blr 6036 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6037 ret i32 %ret 6038} 6039 6040define i32 @test354(i32* %ptr, i32 %val) { 6041; PPC64LE-LABEL: test354: 6042; PPC64LE: # %bb.0: 6043; PPC64LE-NEXT: sync 6044; PPC64LE-NEXT: .LBB354_1: 6045; PPC64LE-NEXT: lwarx 5, 0, 3 6046; PPC64LE-NEXT: stwcx. 4, 0, 3 6047; PPC64LE-NEXT: bne 0, .LBB354_1 6048; PPC64LE-NEXT: # %bb.2: 6049; PPC64LE-NEXT: mr 3, 5 6050; PPC64LE-NEXT: lwsync 6051; PPC64LE-NEXT: blr 6052 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6053 ret i32 %ret 6054} 6055 6056define i64 @test355(i64* %ptr, i64 %val) { 6057; PPC64LE-LABEL: test355: 6058; PPC64LE: # %bb.0: 6059; PPC64LE-NEXT: .LBB355_1: 6060; PPC64LE-NEXT: ldarx 5, 0, 3 6061; PPC64LE-NEXT: stdcx. 4, 0, 3 6062; PPC64LE-NEXT: bne 0, .LBB355_1 6063; PPC64LE-NEXT: # %bb.2: 6064; PPC64LE-NEXT: mr 3, 5 6065; PPC64LE-NEXT: blr 6066 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") monotonic 6067 ret i64 %ret 6068} 6069 6070define i64 @test356(i64* %ptr, i64 %val) { 6071; PPC64LE-LABEL: test356: 6072; PPC64LE: # %bb.0: 6073; PPC64LE-NEXT: mr 5, 3 6074; PPC64LE-NEXT: .LBB356_1: 6075; PPC64LE-NEXT: ldarx 3, 0, 5 6076; PPC64LE-NEXT: stdcx. 4, 0, 5 6077; PPC64LE-NEXT: bne 0, .LBB356_1 6078; PPC64LE-NEXT: # %bb.2: 6079; PPC64LE-NEXT: lwsync 6080; PPC64LE-NEXT: blr 6081 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") acquire 6082 ret i64 %ret 6083} 6084 6085define i64 @test357(i64* %ptr, i64 %val) { 6086; PPC64LE-LABEL: test357: 6087; PPC64LE: # %bb.0: 6088; PPC64LE-NEXT: lwsync 6089; PPC64LE-NEXT: .LBB357_1: 6090; PPC64LE-NEXT: ldarx 5, 0, 3 6091; PPC64LE-NEXT: stdcx. 4, 0, 3 6092; PPC64LE-NEXT: bne 0, .LBB357_1 6093; PPC64LE-NEXT: # %bb.2: 6094; PPC64LE-NEXT: mr 3, 5 6095; PPC64LE-NEXT: blr 6096 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") release 6097 ret i64 %ret 6098} 6099 6100define i64 @test358(i64* %ptr, i64 %val) { 6101; PPC64LE-LABEL: test358: 6102; PPC64LE: # %bb.0: 6103; PPC64LE-NEXT: lwsync 6104; PPC64LE-NEXT: .LBB358_1: 6105; PPC64LE-NEXT: ldarx 5, 0, 3 6106; PPC64LE-NEXT: stdcx. 4, 0, 3 6107; PPC64LE-NEXT: bne 0, .LBB358_1 6108; PPC64LE-NEXT: # %bb.2: 6109; PPC64LE-NEXT: mr 3, 5 6110; PPC64LE-NEXT: lwsync 6111; PPC64LE-NEXT: blr 6112 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6113 ret i64 %ret 6114} 6115 6116define i64 @test359(i64* %ptr, i64 %val) { 6117; PPC64LE-LABEL: test359: 6118; PPC64LE: # %bb.0: 6119; PPC64LE-NEXT: sync 6120; PPC64LE-NEXT: .LBB359_1: 6121; PPC64LE-NEXT: ldarx 5, 0, 3 6122; PPC64LE-NEXT: stdcx. 4, 0, 3 6123; PPC64LE-NEXT: bne 0, .LBB359_1 6124; PPC64LE-NEXT: # %bb.2: 6125; PPC64LE-NEXT: mr 3, 5 6126; PPC64LE-NEXT: lwsync 6127; PPC64LE-NEXT: blr 6128 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6129 ret i64 %ret 6130} 6131 6132define i8 @test360(i8* %ptr, i8 %val) { 6133; PPC64LE-LABEL: test360: 6134; PPC64LE: # %bb.0: 6135; PPC64LE-NEXT: .LBB360_1: 6136; PPC64LE-NEXT: lbarx 5, 0, 3 6137; PPC64LE-NEXT: add 6, 4, 5 6138; PPC64LE-NEXT: stbcx. 6, 0, 3 6139; PPC64LE-NEXT: bne 0, .LBB360_1 6140; PPC64LE-NEXT: # %bb.2: 6141; PPC64LE-NEXT: mr 3, 5 6142; PPC64LE-NEXT: blr 6143 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") monotonic 6144 ret i8 %ret 6145} 6146 6147define i8 @test361(i8* %ptr, i8 %val) { 6148; PPC64LE-LABEL: test361: 6149; PPC64LE: # %bb.0: 6150; PPC64LE-NEXT: mr 5, 3 6151; PPC64LE-NEXT: .LBB361_1: 6152; PPC64LE-NEXT: lbarx 3, 0, 5 6153; PPC64LE-NEXT: add 6, 4, 3 6154; PPC64LE-NEXT: stbcx. 6, 0, 5 6155; PPC64LE-NEXT: bne 0, .LBB361_1 6156; PPC64LE-NEXT: # %bb.2: 6157; PPC64LE-NEXT: lwsync 6158; PPC64LE-NEXT: blr 6159 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") acquire 6160 ret i8 %ret 6161} 6162 6163define i8 @test362(i8* %ptr, i8 %val) { 6164; PPC64LE-LABEL: test362: 6165; PPC64LE: # %bb.0: 6166; PPC64LE-NEXT: lwsync 6167; PPC64LE-NEXT: .LBB362_1: 6168; PPC64LE-NEXT: lbarx 5, 0, 3 6169; PPC64LE-NEXT: add 6, 4, 5 6170; PPC64LE-NEXT: stbcx. 6, 0, 3 6171; PPC64LE-NEXT: bne 0, .LBB362_1 6172; PPC64LE-NEXT: # %bb.2: 6173; PPC64LE-NEXT: mr 3, 5 6174; PPC64LE-NEXT: blr 6175 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") release 6176 ret i8 %ret 6177} 6178 6179define i8 @test363(i8* %ptr, i8 %val) { 6180; PPC64LE-LABEL: test363: 6181; PPC64LE: # %bb.0: 6182; PPC64LE-NEXT: lwsync 6183; PPC64LE-NEXT: .LBB363_1: 6184; PPC64LE-NEXT: lbarx 5, 0, 3 6185; PPC64LE-NEXT: add 6, 4, 5 6186; PPC64LE-NEXT: stbcx. 6, 0, 3 6187; PPC64LE-NEXT: bne 0, .LBB363_1 6188; PPC64LE-NEXT: # %bb.2: 6189; PPC64LE-NEXT: mr 3, 5 6190; PPC64LE-NEXT: lwsync 6191; PPC64LE-NEXT: blr 6192 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6193 ret i8 %ret 6194} 6195 6196define i8 @test364(i8* %ptr, i8 %val) { 6197; PPC64LE-LABEL: test364: 6198; PPC64LE: # %bb.0: 6199; PPC64LE-NEXT: sync 6200; PPC64LE-NEXT: .LBB364_1: 6201; PPC64LE-NEXT: lbarx 5, 0, 3 6202; PPC64LE-NEXT: add 6, 4, 5 6203; PPC64LE-NEXT: stbcx. 6, 0, 3 6204; PPC64LE-NEXT: bne 0, .LBB364_1 6205; PPC64LE-NEXT: # %bb.2: 6206; PPC64LE-NEXT: mr 3, 5 6207; PPC64LE-NEXT: lwsync 6208; PPC64LE-NEXT: blr 6209 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6210 ret i8 %ret 6211} 6212 6213define i16 @test365(i16* %ptr, i16 %val) { 6214; PPC64LE-LABEL: test365: 6215; PPC64LE: # %bb.0: 6216; PPC64LE-NEXT: .LBB365_1: 6217; PPC64LE-NEXT: lharx 5, 0, 3 6218; PPC64LE-NEXT: add 6, 4, 5 6219; PPC64LE-NEXT: sthcx. 6, 0, 3 6220; PPC64LE-NEXT: bne 0, .LBB365_1 6221; PPC64LE-NEXT: # %bb.2: 6222; PPC64LE-NEXT: mr 3, 5 6223; PPC64LE-NEXT: blr 6224 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") monotonic 6225 ret i16 %ret 6226} 6227 6228define i16 @test366(i16* %ptr, i16 %val) { 6229; PPC64LE-LABEL: test366: 6230; PPC64LE: # %bb.0: 6231; PPC64LE-NEXT: mr 5, 3 6232; PPC64LE-NEXT: .LBB366_1: 6233; PPC64LE-NEXT: lharx 3, 0, 5 6234; PPC64LE-NEXT: add 6, 4, 3 6235; PPC64LE-NEXT: sthcx. 6, 0, 5 6236; PPC64LE-NEXT: bne 0, .LBB366_1 6237; PPC64LE-NEXT: # %bb.2: 6238; PPC64LE-NEXT: lwsync 6239; PPC64LE-NEXT: blr 6240 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") acquire 6241 ret i16 %ret 6242} 6243 6244define i16 @test367(i16* %ptr, i16 %val) { 6245; PPC64LE-LABEL: test367: 6246; PPC64LE: # %bb.0: 6247; PPC64LE-NEXT: lwsync 6248; PPC64LE-NEXT: .LBB367_1: 6249; PPC64LE-NEXT: lharx 5, 0, 3 6250; PPC64LE-NEXT: add 6, 4, 5 6251; PPC64LE-NEXT: sthcx. 6, 0, 3 6252; PPC64LE-NEXT: bne 0, .LBB367_1 6253; PPC64LE-NEXT: # %bb.2: 6254; PPC64LE-NEXT: mr 3, 5 6255; PPC64LE-NEXT: blr 6256 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") release 6257 ret i16 %ret 6258} 6259 6260define i16 @test368(i16* %ptr, i16 %val) { 6261; PPC64LE-LABEL: test368: 6262; PPC64LE: # %bb.0: 6263; PPC64LE-NEXT: lwsync 6264; PPC64LE-NEXT: .LBB368_1: 6265; PPC64LE-NEXT: lharx 5, 0, 3 6266; PPC64LE-NEXT: add 6, 4, 5 6267; PPC64LE-NEXT: sthcx. 6, 0, 3 6268; PPC64LE-NEXT: bne 0, .LBB368_1 6269; PPC64LE-NEXT: # %bb.2: 6270; PPC64LE-NEXT: mr 3, 5 6271; PPC64LE-NEXT: lwsync 6272; PPC64LE-NEXT: blr 6273 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6274 ret i16 %ret 6275} 6276 6277define i16 @test369(i16* %ptr, i16 %val) { 6278; PPC64LE-LABEL: test369: 6279; PPC64LE: # %bb.0: 6280; PPC64LE-NEXT: sync 6281; PPC64LE-NEXT: .LBB369_1: 6282; PPC64LE-NEXT: lharx 5, 0, 3 6283; PPC64LE-NEXT: add 6, 4, 5 6284; PPC64LE-NEXT: sthcx. 6, 0, 3 6285; PPC64LE-NEXT: bne 0, .LBB369_1 6286; PPC64LE-NEXT: # %bb.2: 6287; PPC64LE-NEXT: mr 3, 5 6288; PPC64LE-NEXT: lwsync 6289; PPC64LE-NEXT: blr 6290 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6291 ret i16 %ret 6292} 6293 6294define i32 @test370(i32* %ptr, i32 %val) { 6295; PPC64LE-LABEL: test370: 6296; PPC64LE: # %bb.0: 6297; PPC64LE-NEXT: .LBB370_1: 6298; PPC64LE-NEXT: lwarx 5, 0, 3 6299; PPC64LE-NEXT: add 6, 4, 5 6300; PPC64LE-NEXT: stwcx. 6, 0, 3 6301; PPC64LE-NEXT: bne 0, .LBB370_1 6302; PPC64LE-NEXT: # %bb.2: 6303; PPC64LE-NEXT: mr 3, 5 6304; PPC64LE-NEXT: blr 6305 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") monotonic 6306 ret i32 %ret 6307} 6308 6309define i32 @test371(i32* %ptr, i32 %val) { 6310; PPC64LE-LABEL: test371: 6311; PPC64LE: # %bb.0: 6312; PPC64LE-NEXT: mr 5, 3 6313; PPC64LE-NEXT: .LBB371_1: 6314; PPC64LE-NEXT: lwarx 3, 0, 5 6315; PPC64LE-NEXT: add 6, 4, 3 6316; PPC64LE-NEXT: stwcx. 6, 0, 5 6317; PPC64LE-NEXT: bne 0, .LBB371_1 6318; PPC64LE-NEXT: # %bb.2: 6319; PPC64LE-NEXT: lwsync 6320; PPC64LE-NEXT: blr 6321 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") acquire 6322 ret i32 %ret 6323} 6324 6325define i32 @test372(i32* %ptr, i32 %val) { 6326; PPC64LE-LABEL: test372: 6327; PPC64LE: # %bb.0: 6328; PPC64LE-NEXT: lwsync 6329; PPC64LE-NEXT: .LBB372_1: 6330; PPC64LE-NEXT: lwarx 5, 0, 3 6331; PPC64LE-NEXT: add 6, 4, 5 6332; PPC64LE-NEXT: stwcx. 6, 0, 3 6333; PPC64LE-NEXT: bne 0, .LBB372_1 6334; PPC64LE-NEXT: # %bb.2: 6335; PPC64LE-NEXT: mr 3, 5 6336; PPC64LE-NEXT: blr 6337 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") release 6338 ret i32 %ret 6339} 6340 6341define i32 @test373(i32* %ptr, i32 %val) { 6342; PPC64LE-LABEL: test373: 6343; PPC64LE: # %bb.0: 6344; PPC64LE-NEXT: lwsync 6345; PPC64LE-NEXT: .LBB373_1: 6346; PPC64LE-NEXT: lwarx 5, 0, 3 6347; PPC64LE-NEXT: add 6, 4, 5 6348; PPC64LE-NEXT: stwcx. 6, 0, 3 6349; PPC64LE-NEXT: bne 0, .LBB373_1 6350; PPC64LE-NEXT: # %bb.2: 6351; PPC64LE-NEXT: mr 3, 5 6352; PPC64LE-NEXT: lwsync 6353; PPC64LE-NEXT: blr 6354 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6355 ret i32 %ret 6356} 6357 6358define i32 @test374(i32* %ptr, i32 %val) { 6359; PPC64LE-LABEL: test374: 6360; PPC64LE: # %bb.0: 6361; PPC64LE-NEXT: sync 6362; PPC64LE-NEXT: .LBB374_1: 6363; PPC64LE-NEXT: lwarx 5, 0, 3 6364; PPC64LE-NEXT: add 6, 4, 5 6365; PPC64LE-NEXT: stwcx. 6, 0, 3 6366; PPC64LE-NEXT: bne 0, .LBB374_1 6367; PPC64LE-NEXT: # %bb.2: 6368; PPC64LE-NEXT: mr 3, 5 6369; PPC64LE-NEXT: lwsync 6370; PPC64LE-NEXT: blr 6371 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6372 ret i32 %ret 6373} 6374 6375define i64 @test375(i64* %ptr, i64 %val) { 6376; PPC64LE-LABEL: test375: 6377; PPC64LE: # %bb.0: 6378; PPC64LE-NEXT: .LBB375_1: 6379; PPC64LE-NEXT: ldarx 5, 0, 3 6380; PPC64LE-NEXT: add 6, 4, 5 6381; PPC64LE-NEXT: stdcx. 6, 0, 3 6382; PPC64LE-NEXT: bne 0, .LBB375_1 6383; PPC64LE-NEXT: # %bb.2: 6384; PPC64LE-NEXT: mr 3, 5 6385; PPC64LE-NEXT: blr 6386 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") monotonic 6387 ret i64 %ret 6388} 6389 6390define i64 @test376(i64* %ptr, i64 %val) { 6391; PPC64LE-LABEL: test376: 6392; PPC64LE: # %bb.0: 6393; PPC64LE-NEXT: mr 5, 3 6394; PPC64LE-NEXT: .LBB376_1: 6395; PPC64LE-NEXT: ldarx 3, 0, 5 6396; PPC64LE-NEXT: add 6, 4, 3 6397; PPC64LE-NEXT: stdcx. 6, 0, 5 6398; PPC64LE-NEXT: bne 0, .LBB376_1 6399; PPC64LE-NEXT: # %bb.2: 6400; PPC64LE-NEXT: lwsync 6401; PPC64LE-NEXT: blr 6402 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") acquire 6403 ret i64 %ret 6404} 6405 6406define i64 @test377(i64* %ptr, i64 %val) { 6407; PPC64LE-LABEL: test377: 6408; PPC64LE: # %bb.0: 6409; PPC64LE-NEXT: lwsync 6410; PPC64LE-NEXT: .LBB377_1: 6411; PPC64LE-NEXT: ldarx 5, 0, 3 6412; PPC64LE-NEXT: add 6, 4, 5 6413; PPC64LE-NEXT: stdcx. 6, 0, 3 6414; PPC64LE-NEXT: bne 0, .LBB377_1 6415; PPC64LE-NEXT: # %bb.2: 6416; PPC64LE-NEXT: mr 3, 5 6417; PPC64LE-NEXT: blr 6418 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") release 6419 ret i64 %ret 6420} 6421 6422define i64 @test378(i64* %ptr, i64 %val) { 6423; PPC64LE-LABEL: test378: 6424; PPC64LE: # %bb.0: 6425; PPC64LE-NEXT: lwsync 6426; PPC64LE-NEXT: .LBB378_1: 6427; PPC64LE-NEXT: ldarx 5, 0, 3 6428; PPC64LE-NEXT: add 6, 4, 5 6429; PPC64LE-NEXT: stdcx. 6, 0, 3 6430; PPC64LE-NEXT: bne 0, .LBB378_1 6431; PPC64LE-NEXT: # %bb.2: 6432; PPC64LE-NEXT: mr 3, 5 6433; PPC64LE-NEXT: lwsync 6434; PPC64LE-NEXT: blr 6435 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6436 ret i64 %ret 6437} 6438 6439define i64 @test379(i64* %ptr, i64 %val) { 6440; PPC64LE-LABEL: test379: 6441; PPC64LE: # %bb.0: 6442; PPC64LE-NEXT: sync 6443; PPC64LE-NEXT: .LBB379_1: 6444; PPC64LE-NEXT: ldarx 5, 0, 3 6445; PPC64LE-NEXT: add 6, 4, 5 6446; PPC64LE-NEXT: stdcx. 6, 0, 3 6447; PPC64LE-NEXT: bne 0, .LBB379_1 6448; PPC64LE-NEXT: # %bb.2: 6449; PPC64LE-NEXT: mr 3, 5 6450; PPC64LE-NEXT: lwsync 6451; PPC64LE-NEXT: blr 6452 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6453 ret i64 %ret 6454} 6455 6456define i8 @test380(i8* %ptr, i8 %val) { 6457; PPC64LE-LABEL: test380: 6458; PPC64LE: # %bb.0: 6459; PPC64LE-NEXT: .LBB380_1: 6460; PPC64LE-NEXT: lbarx 5, 0, 3 6461; PPC64LE-NEXT: subf 6, 4, 5 6462; PPC64LE-NEXT: stbcx. 6, 0, 3 6463; PPC64LE-NEXT: bne 0, .LBB380_1 6464; PPC64LE-NEXT: # %bb.2: 6465; PPC64LE-NEXT: mr 3, 5 6466; PPC64LE-NEXT: blr 6467 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") monotonic 6468 ret i8 %ret 6469} 6470 6471define i8 @test381(i8* %ptr, i8 %val) { 6472; PPC64LE-LABEL: test381: 6473; PPC64LE: # %bb.0: 6474; PPC64LE-NEXT: mr 5, 3 6475; PPC64LE-NEXT: .LBB381_1: 6476; PPC64LE-NEXT: lbarx 3, 0, 5 6477; PPC64LE-NEXT: subf 6, 4, 3 6478; PPC64LE-NEXT: stbcx. 6, 0, 5 6479; PPC64LE-NEXT: bne 0, .LBB381_1 6480; PPC64LE-NEXT: # %bb.2: 6481; PPC64LE-NEXT: lwsync 6482; PPC64LE-NEXT: blr 6483 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") acquire 6484 ret i8 %ret 6485} 6486 6487define i8 @test382(i8* %ptr, i8 %val) { 6488; PPC64LE-LABEL: test382: 6489; PPC64LE: # %bb.0: 6490; PPC64LE-NEXT: lwsync 6491; PPC64LE-NEXT: .LBB382_1: 6492; PPC64LE-NEXT: lbarx 5, 0, 3 6493; PPC64LE-NEXT: subf 6, 4, 5 6494; PPC64LE-NEXT: stbcx. 6, 0, 3 6495; PPC64LE-NEXT: bne 0, .LBB382_1 6496; PPC64LE-NEXT: # %bb.2: 6497; PPC64LE-NEXT: mr 3, 5 6498; PPC64LE-NEXT: blr 6499 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") release 6500 ret i8 %ret 6501} 6502 6503define i8 @test383(i8* %ptr, i8 %val) { 6504; PPC64LE-LABEL: test383: 6505; PPC64LE: # %bb.0: 6506; PPC64LE-NEXT: lwsync 6507; PPC64LE-NEXT: .LBB383_1: 6508; PPC64LE-NEXT: lbarx 5, 0, 3 6509; PPC64LE-NEXT: subf 6, 4, 5 6510; PPC64LE-NEXT: stbcx. 6, 0, 3 6511; PPC64LE-NEXT: bne 0, .LBB383_1 6512; PPC64LE-NEXT: # %bb.2: 6513; PPC64LE-NEXT: mr 3, 5 6514; PPC64LE-NEXT: lwsync 6515; PPC64LE-NEXT: blr 6516 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6517 ret i8 %ret 6518} 6519 6520define i8 @test384(i8* %ptr, i8 %val) { 6521; PPC64LE-LABEL: test384: 6522; PPC64LE: # %bb.0: 6523; PPC64LE-NEXT: sync 6524; PPC64LE-NEXT: .LBB384_1: 6525; PPC64LE-NEXT: lbarx 5, 0, 3 6526; PPC64LE-NEXT: subf 6, 4, 5 6527; PPC64LE-NEXT: stbcx. 6, 0, 3 6528; PPC64LE-NEXT: bne 0, .LBB384_1 6529; PPC64LE-NEXT: # %bb.2: 6530; PPC64LE-NEXT: mr 3, 5 6531; PPC64LE-NEXT: lwsync 6532; PPC64LE-NEXT: blr 6533 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6534 ret i8 %ret 6535} 6536 6537define i16 @test385(i16* %ptr, i16 %val) { 6538; PPC64LE-LABEL: test385: 6539; PPC64LE: # %bb.0: 6540; PPC64LE-NEXT: .LBB385_1: 6541; PPC64LE-NEXT: lharx 5, 0, 3 6542; PPC64LE-NEXT: subf 6, 4, 5 6543; PPC64LE-NEXT: sthcx. 6, 0, 3 6544; PPC64LE-NEXT: bne 0, .LBB385_1 6545; PPC64LE-NEXT: # %bb.2: 6546; PPC64LE-NEXT: mr 3, 5 6547; PPC64LE-NEXT: blr 6548 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") monotonic 6549 ret i16 %ret 6550} 6551 6552define i16 @test386(i16* %ptr, i16 %val) { 6553; PPC64LE-LABEL: test386: 6554; PPC64LE: # %bb.0: 6555; PPC64LE-NEXT: mr 5, 3 6556; PPC64LE-NEXT: .LBB386_1: 6557; PPC64LE-NEXT: lharx 3, 0, 5 6558; PPC64LE-NEXT: subf 6, 4, 3 6559; PPC64LE-NEXT: sthcx. 6, 0, 5 6560; PPC64LE-NEXT: bne 0, .LBB386_1 6561; PPC64LE-NEXT: # %bb.2: 6562; PPC64LE-NEXT: lwsync 6563; PPC64LE-NEXT: blr 6564 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") acquire 6565 ret i16 %ret 6566} 6567 6568define i16 @test387(i16* %ptr, i16 %val) { 6569; PPC64LE-LABEL: test387: 6570; PPC64LE: # %bb.0: 6571; PPC64LE-NEXT: lwsync 6572; PPC64LE-NEXT: .LBB387_1: 6573; PPC64LE-NEXT: lharx 5, 0, 3 6574; PPC64LE-NEXT: subf 6, 4, 5 6575; PPC64LE-NEXT: sthcx. 6, 0, 3 6576; PPC64LE-NEXT: bne 0, .LBB387_1 6577; PPC64LE-NEXT: # %bb.2: 6578; PPC64LE-NEXT: mr 3, 5 6579; PPC64LE-NEXT: blr 6580 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") release 6581 ret i16 %ret 6582} 6583 6584define i16 @test388(i16* %ptr, i16 %val) { 6585; PPC64LE-LABEL: test388: 6586; PPC64LE: # %bb.0: 6587; PPC64LE-NEXT: lwsync 6588; PPC64LE-NEXT: .LBB388_1: 6589; PPC64LE-NEXT: lharx 5, 0, 3 6590; PPC64LE-NEXT: subf 6, 4, 5 6591; PPC64LE-NEXT: sthcx. 6, 0, 3 6592; PPC64LE-NEXT: bne 0, .LBB388_1 6593; PPC64LE-NEXT: # %bb.2: 6594; PPC64LE-NEXT: mr 3, 5 6595; PPC64LE-NEXT: lwsync 6596; PPC64LE-NEXT: blr 6597 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6598 ret i16 %ret 6599} 6600 6601define i16 @test389(i16* %ptr, i16 %val) { 6602; PPC64LE-LABEL: test389: 6603; PPC64LE: # %bb.0: 6604; PPC64LE-NEXT: sync 6605; PPC64LE-NEXT: .LBB389_1: 6606; PPC64LE-NEXT: lharx 5, 0, 3 6607; PPC64LE-NEXT: subf 6, 4, 5 6608; PPC64LE-NEXT: sthcx. 6, 0, 3 6609; PPC64LE-NEXT: bne 0, .LBB389_1 6610; PPC64LE-NEXT: # %bb.2: 6611; PPC64LE-NEXT: mr 3, 5 6612; PPC64LE-NEXT: lwsync 6613; PPC64LE-NEXT: blr 6614 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6615 ret i16 %ret 6616} 6617 6618define i32 @test390(i32* %ptr, i32 %val) { 6619; PPC64LE-LABEL: test390: 6620; PPC64LE: # %bb.0: 6621; PPC64LE-NEXT: .LBB390_1: 6622; PPC64LE-NEXT: lwarx 5, 0, 3 6623; PPC64LE-NEXT: subf 6, 4, 5 6624; PPC64LE-NEXT: stwcx. 6, 0, 3 6625; PPC64LE-NEXT: bne 0, .LBB390_1 6626; PPC64LE-NEXT: # %bb.2: 6627; PPC64LE-NEXT: mr 3, 5 6628; PPC64LE-NEXT: blr 6629 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") monotonic 6630 ret i32 %ret 6631} 6632 6633define i32 @test391(i32* %ptr, i32 %val) { 6634; PPC64LE-LABEL: test391: 6635; PPC64LE: # %bb.0: 6636; PPC64LE-NEXT: mr 5, 3 6637; PPC64LE-NEXT: .LBB391_1: 6638; PPC64LE-NEXT: lwarx 3, 0, 5 6639; PPC64LE-NEXT: subf 6, 4, 3 6640; PPC64LE-NEXT: stwcx. 6, 0, 5 6641; PPC64LE-NEXT: bne 0, .LBB391_1 6642; PPC64LE-NEXT: # %bb.2: 6643; PPC64LE-NEXT: lwsync 6644; PPC64LE-NEXT: blr 6645 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") acquire 6646 ret i32 %ret 6647} 6648 6649define i32 @test392(i32* %ptr, i32 %val) { 6650; PPC64LE-LABEL: test392: 6651; PPC64LE: # %bb.0: 6652; PPC64LE-NEXT: lwsync 6653; PPC64LE-NEXT: .LBB392_1: 6654; PPC64LE-NEXT: lwarx 5, 0, 3 6655; PPC64LE-NEXT: subf 6, 4, 5 6656; PPC64LE-NEXT: stwcx. 6, 0, 3 6657; PPC64LE-NEXT: bne 0, .LBB392_1 6658; PPC64LE-NEXT: # %bb.2: 6659; PPC64LE-NEXT: mr 3, 5 6660; PPC64LE-NEXT: blr 6661 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") release 6662 ret i32 %ret 6663} 6664 6665define i32 @test393(i32* %ptr, i32 %val) { 6666; PPC64LE-LABEL: test393: 6667; PPC64LE: # %bb.0: 6668; PPC64LE-NEXT: lwsync 6669; PPC64LE-NEXT: .LBB393_1: 6670; PPC64LE-NEXT: lwarx 5, 0, 3 6671; PPC64LE-NEXT: subf 6, 4, 5 6672; PPC64LE-NEXT: stwcx. 6, 0, 3 6673; PPC64LE-NEXT: bne 0, .LBB393_1 6674; PPC64LE-NEXT: # %bb.2: 6675; PPC64LE-NEXT: mr 3, 5 6676; PPC64LE-NEXT: lwsync 6677; PPC64LE-NEXT: blr 6678 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6679 ret i32 %ret 6680} 6681 6682define i32 @test394(i32* %ptr, i32 %val) { 6683; PPC64LE-LABEL: test394: 6684; PPC64LE: # %bb.0: 6685; PPC64LE-NEXT: sync 6686; PPC64LE-NEXT: .LBB394_1: 6687; PPC64LE-NEXT: lwarx 5, 0, 3 6688; PPC64LE-NEXT: subf 6, 4, 5 6689; PPC64LE-NEXT: stwcx. 6, 0, 3 6690; PPC64LE-NEXT: bne 0, .LBB394_1 6691; PPC64LE-NEXT: # %bb.2: 6692; PPC64LE-NEXT: mr 3, 5 6693; PPC64LE-NEXT: lwsync 6694; PPC64LE-NEXT: blr 6695 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6696 ret i32 %ret 6697} 6698 6699define i64 @test395(i64* %ptr, i64 %val) { 6700; PPC64LE-LABEL: test395: 6701; PPC64LE: # %bb.0: 6702; PPC64LE-NEXT: .LBB395_1: 6703; PPC64LE-NEXT: ldarx 5, 0, 3 6704; PPC64LE-NEXT: sub 6, 5, 4 6705; PPC64LE-NEXT: stdcx. 6, 0, 3 6706; PPC64LE-NEXT: bne 0, .LBB395_1 6707; PPC64LE-NEXT: # %bb.2: 6708; PPC64LE-NEXT: mr 3, 5 6709; PPC64LE-NEXT: blr 6710 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") monotonic 6711 ret i64 %ret 6712} 6713 6714define i64 @test396(i64* %ptr, i64 %val) { 6715; PPC64LE-LABEL: test396: 6716; PPC64LE: # %bb.0: 6717; PPC64LE-NEXT: mr 5, 3 6718; PPC64LE-NEXT: .LBB396_1: 6719; PPC64LE-NEXT: ldarx 3, 0, 5 6720; PPC64LE-NEXT: sub 6, 3, 4 6721; PPC64LE-NEXT: stdcx. 6, 0, 5 6722; PPC64LE-NEXT: bne 0, .LBB396_1 6723; PPC64LE-NEXT: # %bb.2: 6724; PPC64LE-NEXT: lwsync 6725; PPC64LE-NEXT: blr 6726 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") acquire 6727 ret i64 %ret 6728} 6729 6730define i64 @test397(i64* %ptr, i64 %val) { 6731; PPC64LE-LABEL: test397: 6732; PPC64LE: # %bb.0: 6733; PPC64LE-NEXT: lwsync 6734; PPC64LE-NEXT: .LBB397_1: 6735; PPC64LE-NEXT: ldarx 5, 0, 3 6736; PPC64LE-NEXT: sub 6, 5, 4 6737; PPC64LE-NEXT: stdcx. 6, 0, 3 6738; PPC64LE-NEXT: bne 0, .LBB397_1 6739; PPC64LE-NEXT: # %bb.2: 6740; PPC64LE-NEXT: mr 3, 5 6741; PPC64LE-NEXT: blr 6742 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") release 6743 ret i64 %ret 6744} 6745 6746define i64 @test398(i64* %ptr, i64 %val) { 6747; PPC64LE-LABEL: test398: 6748; PPC64LE: # %bb.0: 6749; PPC64LE-NEXT: lwsync 6750; PPC64LE-NEXT: .LBB398_1: 6751; PPC64LE-NEXT: ldarx 5, 0, 3 6752; PPC64LE-NEXT: sub 6, 5, 4 6753; PPC64LE-NEXT: stdcx. 6, 0, 3 6754; PPC64LE-NEXT: bne 0, .LBB398_1 6755; PPC64LE-NEXT: # %bb.2: 6756; PPC64LE-NEXT: mr 3, 5 6757; PPC64LE-NEXT: lwsync 6758; PPC64LE-NEXT: blr 6759 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6760 ret i64 %ret 6761} 6762 6763define i64 @test399(i64* %ptr, i64 %val) { 6764; PPC64LE-LABEL: test399: 6765; PPC64LE: # %bb.0: 6766; PPC64LE-NEXT: sync 6767; PPC64LE-NEXT: .LBB399_1: 6768; PPC64LE-NEXT: ldarx 5, 0, 3 6769; PPC64LE-NEXT: sub 6, 5, 4 6770; PPC64LE-NEXT: stdcx. 6, 0, 3 6771; PPC64LE-NEXT: bne 0, .LBB399_1 6772; PPC64LE-NEXT: # %bb.2: 6773; PPC64LE-NEXT: mr 3, 5 6774; PPC64LE-NEXT: lwsync 6775; PPC64LE-NEXT: blr 6776 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6777 ret i64 %ret 6778} 6779 6780define i8 @test400(i8* %ptr, i8 %val) { 6781; PPC64LE-LABEL: test400: 6782; PPC64LE: # %bb.0: 6783; PPC64LE-NEXT: .LBB400_1: 6784; PPC64LE-NEXT: lbarx 5, 0, 3 6785; PPC64LE-NEXT: and 6, 4, 5 6786; PPC64LE-NEXT: stbcx. 6, 0, 3 6787; PPC64LE-NEXT: bne 0, .LBB400_1 6788; PPC64LE-NEXT: # %bb.2: 6789; PPC64LE-NEXT: mr 3, 5 6790; PPC64LE-NEXT: blr 6791 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") monotonic 6792 ret i8 %ret 6793} 6794 6795define i8 @test401(i8* %ptr, i8 %val) { 6796; PPC64LE-LABEL: test401: 6797; PPC64LE: # %bb.0: 6798; PPC64LE-NEXT: mr 5, 3 6799; PPC64LE-NEXT: .LBB401_1: 6800; PPC64LE-NEXT: lbarx 3, 0, 5 6801; PPC64LE-NEXT: and 6, 4, 3 6802; PPC64LE-NEXT: stbcx. 6, 0, 5 6803; PPC64LE-NEXT: bne 0, .LBB401_1 6804; PPC64LE-NEXT: # %bb.2: 6805; PPC64LE-NEXT: lwsync 6806; PPC64LE-NEXT: blr 6807 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") acquire 6808 ret i8 %ret 6809} 6810 6811define i8 @test402(i8* %ptr, i8 %val) { 6812; PPC64LE-LABEL: test402: 6813; PPC64LE: # %bb.0: 6814; PPC64LE-NEXT: lwsync 6815; PPC64LE-NEXT: .LBB402_1: 6816; PPC64LE-NEXT: lbarx 5, 0, 3 6817; PPC64LE-NEXT: and 6, 4, 5 6818; PPC64LE-NEXT: stbcx. 6, 0, 3 6819; PPC64LE-NEXT: bne 0, .LBB402_1 6820; PPC64LE-NEXT: # %bb.2: 6821; PPC64LE-NEXT: mr 3, 5 6822; PPC64LE-NEXT: blr 6823 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") release 6824 ret i8 %ret 6825} 6826 6827define i8 @test403(i8* %ptr, i8 %val) { 6828; PPC64LE-LABEL: test403: 6829; PPC64LE: # %bb.0: 6830; PPC64LE-NEXT: lwsync 6831; PPC64LE-NEXT: .LBB403_1: 6832; PPC64LE-NEXT: lbarx 5, 0, 3 6833; PPC64LE-NEXT: and 6, 4, 5 6834; PPC64LE-NEXT: stbcx. 6, 0, 3 6835; PPC64LE-NEXT: bne 0, .LBB403_1 6836; PPC64LE-NEXT: # %bb.2: 6837; PPC64LE-NEXT: mr 3, 5 6838; PPC64LE-NEXT: lwsync 6839; PPC64LE-NEXT: blr 6840 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6841 ret i8 %ret 6842} 6843 6844define i8 @test404(i8* %ptr, i8 %val) { 6845; PPC64LE-LABEL: test404: 6846; PPC64LE: # %bb.0: 6847; PPC64LE-NEXT: sync 6848; PPC64LE-NEXT: .LBB404_1: 6849; PPC64LE-NEXT: lbarx 5, 0, 3 6850; PPC64LE-NEXT: and 6, 4, 5 6851; PPC64LE-NEXT: stbcx. 6, 0, 3 6852; PPC64LE-NEXT: bne 0, .LBB404_1 6853; PPC64LE-NEXT: # %bb.2: 6854; PPC64LE-NEXT: mr 3, 5 6855; PPC64LE-NEXT: lwsync 6856; PPC64LE-NEXT: blr 6857 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6858 ret i8 %ret 6859} 6860 6861define i16 @test405(i16* %ptr, i16 %val) { 6862; PPC64LE-LABEL: test405: 6863; PPC64LE: # %bb.0: 6864; PPC64LE-NEXT: .LBB405_1: 6865; PPC64LE-NEXT: lharx 5, 0, 3 6866; PPC64LE-NEXT: and 6, 4, 5 6867; PPC64LE-NEXT: sthcx. 6, 0, 3 6868; PPC64LE-NEXT: bne 0, .LBB405_1 6869; PPC64LE-NEXT: # %bb.2: 6870; PPC64LE-NEXT: mr 3, 5 6871; PPC64LE-NEXT: blr 6872 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") monotonic 6873 ret i16 %ret 6874} 6875 6876define i16 @test406(i16* %ptr, i16 %val) { 6877; PPC64LE-LABEL: test406: 6878; PPC64LE: # %bb.0: 6879; PPC64LE-NEXT: mr 5, 3 6880; PPC64LE-NEXT: .LBB406_1: 6881; PPC64LE-NEXT: lharx 3, 0, 5 6882; PPC64LE-NEXT: and 6, 4, 3 6883; PPC64LE-NEXT: sthcx. 6, 0, 5 6884; PPC64LE-NEXT: bne 0, .LBB406_1 6885; PPC64LE-NEXT: # %bb.2: 6886; PPC64LE-NEXT: lwsync 6887; PPC64LE-NEXT: blr 6888 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") acquire 6889 ret i16 %ret 6890} 6891 6892define i16 @test407(i16* %ptr, i16 %val) { 6893; PPC64LE-LABEL: test407: 6894; PPC64LE: # %bb.0: 6895; PPC64LE-NEXT: lwsync 6896; PPC64LE-NEXT: .LBB407_1: 6897; PPC64LE-NEXT: lharx 5, 0, 3 6898; PPC64LE-NEXT: and 6, 4, 5 6899; PPC64LE-NEXT: sthcx. 6, 0, 3 6900; PPC64LE-NEXT: bne 0, .LBB407_1 6901; PPC64LE-NEXT: # %bb.2: 6902; PPC64LE-NEXT: mr 3, 5 6903; PPC64LE-NEXT: blr 6904 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") release 6905 ret i16 %ret 6906} 6907 6908define i16 @test408(i16* %ptr, i16 %val) { 6909; PPC64LE-LABEL: test408: 6910; PPC64LE: # %bb.0: 6911; PPC64LE-NEXT: lwsync 6912; PPC64LE-NEXT: .LBB408_1: 6913; PPC64LE-NEXT: lharx 5, 0, 3 6914; PPC64LE-NEXT: and 6, 4, 5 6915; PPC64LE-NEXT: sthcx. 6, 0, 3 6916; PPC64LE-NEXT: bne 0, .LBB408_1 6917; PPC64LE-NEXT: # %bb.2: 6918; PPC64LE-NEXT: mr 3, 5 6919; PPC64LE-NEXT: lwsync 6920; PPC64LE-NEXT: blr 6921 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6922 ret i16 %ret 6923} 6924 6925define i16 @test409(i16* %ptr, i16 %val) { 6926; PPC64LE-LABEL: test409: 6927; PPC64LE: # %bb.0: 6928; PPC64LE-NEXT: sync 6929; PPC64LE-NEXT: .LBB409_1: 6930; PPC64LE-NEXT: lharx 5, 0, 3 6931; PPC64LE-NEXT: and 6, 4, 5 6932; PPC64LE-NEXT: sthcx. 6, 0, 3 6933; PPC64LE-NEXT: bne 0, .LBB409_1 6934; PPC64LE-NEXT: # %bb.2: 6935; PPC64LE-NEXT: mr 3, 5 6936; PPC64LE-NEXT: lwsync 6937; PPC64LE-NEXT: blr 6938 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6939 ret i16 %ret 6940} 6941 6942define i32 @test410(i32* %ptr, i32 %val) { 6943; PPC64LE-LABEL: test410: 6944; PPC64LE: # %bb.0: 6945; PPC64LE-NEXT: .LBB410_1: 6946; PPC64LE-NEXT: lwarx 5, 0, 3 6947; PPC64LE-NEXT: and 6, 4, 5 6948; PPC64LE-NEXT: stwcx. 6, 0, 3 6949; PPC64LE-NEXT: bne 0, .LBB410_1 6950; PPC64LE-NEXT: # %bb.2: 6951; PPC64LE-NEXT: mr 3, 5 6952; PPC64LE-NEXT: blr 6953 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") monotonic 6954 ret i32 %ret 6955} 6956 6957define i32 @test411(i32* %ptr, i32 %val) { 6958; PPC64LE-LABEL: test411: 6959; PPC64LE: # %bb.0: 6960; PPC64LE-NEXT: mr 5, 3 6961; PPC64LE-NEXT: .LBB411_1: 6962; PPC64LE-NEXT: lwarx 3, 0, 5 6963; PPC64LE-NEXT: and 6, 4, 3 6964; PPC64LE-NEXT: stwcx. 6, 0, 5 6965; PPC64LE-NEXT: bne 0, .LBB411_1 6966; PPC64LE-NEXT: # %bb.2: 6967; PPC64LE-NEXT: lwsync 6968; PPC64LE-NEXT: blr 6969 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") acquire 6970 ret i32 %ret 6971} 6972 6973define i32 @test412(i32* %ptr, i32 %val) { 6974; PPC64LE-LABEL: test412: 6975; PPC64LE: # %bb.0: 6976; PPC64LE-NEXT: lwsync 6977; PPC64LE-NEXT: .LBB412_1: 6978; PPC64LE-NEXT: lwarx 5, 0, 3 6979; PPC64LE-NEXT: and 6, 4, 5 6980; PPC64LE-NEXT: stwcx. 6, 0, 3 6981; PPC64LE-NEXT: bne 0, .LBB412_1 6982; PPC64LE-NEXT: # %bb.2: 6983; PPC64LE-NEXT: mr 3, 5 6984; PPC64LE-NEXT: blr 6985 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") release 6986 ret i32 %ret 6987} 6988 6989define i32 @test413(i32* %ptr, i32 %val) { 6990; PPC64LE-LABEL: test413: 6991; PPC64LE: # %bb.0: 6992; PPC64LE-NEXT: lwsync 6993; PPC64LE-NEXT: .LBB413_1: 6994; PPC64LE-NEXT: lwarx 5, 0, 3 6995; PPC64LE-NEXT: and 6, 4, 5 6996; PPC64LE-NEXT: stwcx. 6, 0, 3 6997; PPC64LE-NEXT: bne 0, .LBB413_1 6998; PPC64LE-NEXT: # %bb.2: 6999; PPC64LE-NEXT: mr 3, 5 7000; PPC64LE-NEXT: lwsync 7001; PPC64LE-NEXT: blr 7002 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7003 ret i32 %ret 7004} 7005 7006define i32 @test414(i32* %ptr, i32 %val) { 7007; PPC64LE-LABEL: test414: 7008; PPC64LE: # %bb.0: 7009; PPC64LE-NEXT: sync 7010; PPC64LE-NEXT: .LBB414_1: 7011; PPC64LE-NEXT: lwarx 5, 0, 3 7012; PPC64LE-NEXT: and 6, 4, 5 7013; PPC64LE-NEXT: stwcx. 6, 0, 3 7014; PPC64LE-NEXT: bne 0, .LBB414_1 7015; PPC64LE-NEXT: # %bb.2: 7016; PPC64LE-NEXT: mr 3, 5 7017; PPC64LE-NEXT: lwsync 7018; PPC64LE-NEXT: blr 7019 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7020 ret i32 %ret 7021} 7022 7023define i64 @test415(i64* %ptr, i64 %val) { 7024; PPC64LE-LABEL: test415: 7025; PPC64LE: # %bb.0: 7026; PPC64LE-NEXT: .LBB415_1: 7027; PPC64LE-NEXT: ldarx 5, 0, 3 7028; PPC64LE-NEXT: and 6, 4, 5 7029; PPC64LE-NEXT: stdcx. 6, 0, 3 7030; PPC64LE-NEXT: bne 0, .LBB415_1 7031; PPC64LE-NEXT: # %bb.2: 7032; PPC64LE-NEXT: mr 3, 5 7033; PPC64LE-NEXT: blr 7034 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") monotonic 7035 ret i64 %ret 7036} 7037 7038define i64 @test416(i64* %ptr, i64 %val) { 7039; PPC64LE-LABEL: test416: 7040; PPC64LE: # %bb.0: 7041; PPC64LE-NEXT: mr 5, 3 7042; PPC64LE-NEXT: .LBB416_1: 7043; PPC64LE-NEXT: ldarx 3, 0, 5 7044; PPC64LE-NEXT: and 6, 4, 3 7045; PPC64LE-NEXT: stdcx. 6, 0, 5 7046; PPC64LE-NEXT: bne 0, .LBB416_1 7047; PPC64LE-NEXT: # %bb.2: 7048; PPC64LE-NEXT: lwsync 7049; PPC64LE-NEXT: blr 7050 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") acquire 7051 ret i64 %ret 7052} 7053 7054define i64 @test417(i64* %ptr, i64 %val) { 7055; PPC64LE-LABEL: test417: 7056; PPC64LE: # %bb.0: 7057; PPC64LE-NEXT: lwsync 7058; PPC64LE-NEXT: .LBB417_1: 7059; PPC64LE-NEXT: ldarx 5, 0, 3 7060; PPC64LE-NEXT: and 6, 4, 5 7061; PPC64LE-NEXT: stdcx. 6, 0, 3 7062; PPC64LE-NEXT: bne 0, .LBB417_1 7063; PPC64LE-NEXT: # %bb.2: 7064; PPC64LE-NEXT: mr 3, 5 7065; PPC64LE-NEXT: blr 7066 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") release 7067 ret i64 %ret 7068} 7069 7070define i64 @test418(i64* %ptr, i64 %val) { 7071; PPC64LE-LABEL: test418: 7072; PPC64LE: # %bb.0: 7073; PPC64LE-NEXT: lwsync 7074; PPC64LE-NEXT: .LBB418_1: 7075; PPC64LE-NEXT: ldarx 5, 0, 3 7076; PPC64LE-NEXT: and 6, 4, 5 7077; PPC64LE-NEXT: stdcx. 6, 0, 3 7078; PPC64LE-NEXT: bne 0, .LBB418_1 7079; PPC64LE-NEXT: # %bb.2: 7080; PPC64LE-NEXT: mr 3, 5 7081; PPC64LE-NEXT: lwsync 7082; PPC64LE-NEXT: blr 7083 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7084 ret i64 %ret 7085} 7086 7087define i64 @test419(i64* %ptr, i64 %val) { 7088; PPC64LE-LABEL: test419: 7089; PPC64LE: # %bb.0: 7090; PPC64LE-NEXT: sync 7091; PPC64LE-NEXT: .LBB419_1: 7092; PPC64LE-NEXT: ldarx 5, 0, 3 7093; PPC64LE-NEXT: and 6, 4, 5 7094; PPC64LE-NEXT: stdcx. 6, 0, 3 7095; PPC64LE-NEXT: bne 0, .LBB419_1 7096; PPC64LE-NEXT: # %bb.2: 7097; PPC64LE-NEXT: mr 3, 5 7098; PPC64LE-NEXT: lwsync 7099; PPC64LE-NEXT: blr 7100 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7101 ret i64 %ret 7102} 7103 7104define i8 @test420(i8* %ptr, i8 %val) { 7105; PPC64LE-LABEL: test420: 7106; PPC64LE: # %bb.0: 7107; PPC64LE-NEXT: .LBB420_1: 7108; PPC64LE-NEXT: lbarx 5, 0, 3 7109; PPC64LE-NEXT: nand 6, 4, 5 7110; PPC64LE-NEXT: stbcx. 6, 0, 3 7111; PPC64LE-NEXT: bne 0, .LBB420_1 7112; PPC64LE-NEXT: # %bb.2: 7113; PPC64LE-NEXT: mr 3, 5 7114; PPC64LE-NEXT: blr 7115 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") monotonic 7116 ret i8 %ret 7117} 7118 7119define i8 @test421(i8* %ptr, i8 %val) { 7120; PPC64LE-LABEL: test421: 7121; PPC64LE: # %bb.0: 7122; PPC64LE-NEXT: mr 5, 3 7123; PPC64LE-NEXT: .LBB421_1: 7124; PPC64LE-NEXT: lbarx 3, 0, 5 7125; PPC64LE-NEXT: nand 6, 4, 3 7126; PPC64LE-NEXT: stbcx. 6, 0, 5 7127; PPC64LE-NEXT: bne 0, .LBB421_1 7128; PPC64LE-NEXT: # %bb.2: 7129; PPC64LE-NEXT: lwsync 7130; PPC64LE-NEXT: blr 7131 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") acquire 7132 ret i8 %ret 7133} 7134 7135define i8 @test422(i8* %ptr, i8 %val) { 7136; PPC64LE-LABEL: test422: 7137; PPC64LE: # %bb.0: 7138; PPC64LE-NEXT: lwsync 7139; PPC64LE-NEXT: .LBB422_1: 7140; PPC64LE-NEXT: lbarx 5, 0, 3 7141; PPC64LE-NEXT: nand 6, 4, 5 7142; PPC64LE-NEXT: stbcx. 6, 0, 3 7143; PPC64LE-NEXT: bne 0, .LBB422_1 7144; PPC64LE-NEXT: # %bb.2: 7145; PPC64LE-NEXT: mr 3, 5 7146; PPC64LE-NEXT: blr 7147 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") release 7148 ret i8 %ret 7149} 7150 7151define i8 @test423(i8* %ptr, i8 %val) { 7152; PPC64LE-LABEL: test423: 7153; PPC64LE: # %bb.0: 7154; PPC64LE-NEXT: lwsync 7155; PPC64LE-NEXT: .LBB423_1: 7156; PPC64LE-NEXT: lbarx 5, 0, 3 7157; PPC64LE-NEXT: nand 6, 4, 5 7158; PPC64LE-NEXT: stbcx. 6, 0, 3 7159; PPC64LE-NEXT: bne 0, .LBB423_1 7160; PPC64LE-NEXT: # %bb.2: 7161; PPC64LE-NEXT: mr 3, 5 7162; PPC64LE-NEXT: lwsync 7163; PPC64LE-NEXT: blr 7164 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7165 ret i8 %ret 7166} 7167 7168define i8 @test424(i8* %ptr, i8 %val) { 7169; PPC64LE-LABEL: test424: 7170; PPC64LE: # %bb.0: 7171; PPC64LE-NEXT: sync 7172; PPC64LE-NEXT: .LBB424_1: 7173; PPC64LE-NEXT: lbarx 5, 0, 3 7174; PPC64LE-NEXT: nand 6, 4, 5 7175; PPC64LE-NEXT: stbcx. 6, 0, 3 7176; PPC64LE-NEXT: bne 0, .LBB424_1 7177; PPC64LE-NEXT: # %bb.2: 7178; PPC64LE-NEXT: mr 3, 5 7179; PPC64LE-NEXT: lwsync 7180; PPC64LE-NEXT: blr 7181 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7182 ret i8 %ret 7183} 7184 7185define i16 @test425(i16* %ptr, i16 %val) { 7186; PPC64LE-LABEL: test425: 7187; PPC64LE: # %bb.0: 7188; PPC64LE-NEXT: .LBB425_1: 7189; PPC64LE-NEXT: lharx 5, 0, 3 7190; PPC64LE-NEXT: nand 6, 4, 5 7191; PPC64LE-NEXT: sthcx. 6, 0, 3 7192; PPC64LE-NEXT: bne 0, .LBB425_1 7193; PPC64LE-NEXT: # %bb.2: 7194; PPC64LE-NEXT: mr 3, 5 7195; PPC64LE-NEXT: blr 7196 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") monotonic 7197 ret i16 %ret 7198} 7199 7200define i16 @test426(i16* %ptr, i16 %val) { 7201; PPC64LE-LABEL: test426: 7202; PPC64LE: # %bb.0: 7203; PPC64LE-NEXT: mr 5, 3 7204; PPC64LE-NEXT: .LBB426_1: 7205; PPC64LE-NEXT: lharx 3, 0, 5 7206; PPC64LE-NEXT: nand 6, 4, 3 7207; PPC64LE-NEXT: sthcx. 6, 0, 5 7208; PPC64LE-NEXT: bne 0, .LBB426_1 7209; PPC64LE-NEXT: # %bb.2: 7210; PPC64LE-NEXT: lwsync 7211; PPC64LE-NEXT: blr 7212 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") acquire 7213 ret i16 %ret 7214} 7215 7216define i16 @test427(i16* %ptr, i16 %val) { 7217; PPC64LE-LABEL: test427: 7218; PPC64LE: # %bb.0: 7219; PPC64LE-NEXT: lwsync 7220; PPC64LE-NEXT: .LBB427_1: 7221; PPC64LE-NEXT: lharx 5, 0, 3 7222; PPC64LE-NEXT: nand 6, 4, 5 7223; PPC64LE-NEXT: sthcx. 6, 0, 3 7224; PPC64LE-NEXT: bne 0, .LBB427_1 7225; PPC64LE-NEXT: # %bb.2: 7226; PPC64LE-NEXT: mr 3, 5 7227; PPC64LE-NEXT: blr 7228 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") release 7229 ret i16 %ret 7230} 7231 7232define i16 @test428(i16* %ptr, i16 %val) { 7233; PPC64LE-LABEL: test428: 7234; PPC64LE: # %bb.0: 7235; PPC64LE-NEXT: lwsync 7236; PPC64LE-NEXT: .LBB428_1: 7237; PPC64LE-NEXT: lharx 5, 0, 3 7238; PPC64LE-NEXT: nand 6, 4, 5 7239; PPC64LE-NEXT: sthcx. 6, 0, 3 7240; PPC64LE-NEXT: bne 0, .LBB428_1 7241; PPC64LE-NEXT: # %bb.2: 7242; PPC64LE-NEXT: mr 3, 5 7243; PPC64LE-NEXT: lwsync 7244; PPC64LE-NEXT: blr 7245 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7246 ret i16 %ret 7247} 7248 7249define i16 @test429(i16* %ptr, i16 %val) { 7250; PPC64LE-LABEL: test429: 7251; PPC64LE: # %bb.0: 7252; PPC64LE-NEXT: sync 7253; PPC64LE-NEXT: .LBB429_1: 7254; PPC64LE-NEXT: lharx 5, 0, 3 7255; PPC64LE-NEXT: nand 6, 4, 5 7256; PPC64LE-NEXT: sthcx. 6, 0, 3 7257; PPC64LE-NEXT: bne 0, .LBB429_1 7258; PPC64LE-NEXT: # %bb.2: 7259; PPC64LE-NEXT: mr 3, 5 7260; PPC64LE-NEXT: lwsync 7261; PPC64LE-NEXT: blr 7262 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7263 ret i16 %ret 7264} 7265 7266define i32 @test430(i32* %ptr, i32 %val) { 7267; PPC64LE-LABEL: test430: 7268; PPC64LE: # %bb.0: 7269; PPC64LE-NEXT: .LBB430_1: 7270; PPC64LE-NEXT: lwarx 5, 0, 3 7271; PPC64LE-NEXT: nand 6, 4, 5 7272; PPC64LE-NEXT: stwcx. 6, 0, 3 7273; PPC64LE-NEXT: bne 0, .LBB430_1 7274; PPC64LE-NEXT: # %bb.2: 7275; PPC64LE-NEXT: mr 3, 5 7276; PPC64LE-NEXT: blr 7277 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") monotonic 7278 ret i32 %ret 7279} 7280 7281define i32 @test431(i32* %ptr, i32 %val) { 7282; PPC64LE-LABEL: test431: 7283; PPC64LE: # %bb.0: 7284; PPC64LE-NEXT: mr 5, 3 7285; PPC64LE-NEXT: .LBB431_1: 7286; PPC64LE-NEXT: lwarx 3, 0, 5 7287; PPC64LE-NEXT: nand 6, 4, 3 7288; PPC64LE-NEXT: stwcx. 6, 0, 5 7289; PPC64LE-NEXT: bne 0, .LBB431_1 7290; PPC64LE-NEXT: # %bb.2: 7291; PPC64LE-NEXT: lwsync 7292; PPC64LE-NEXT: blr 7293 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") acquire 7294 ret i32 %ret 7295} 7296 7297define i32 @test432(i32* %ptr, i32 %val) { 7298; PPC64LE-LABEL: test432: 7299; PPC64LE: # %bb.0: 7300; PPC64LE-NEXT: lwsync 7301; PPC64LE-NEXT: .LBB432_1: 7302; PPC64LE-NEXT: lwarx 5, 0, 3 7303; PPC64LE-NEXT: nand 6, 4, 5 7304; PPC64LE-NEXT: stwcx. 6, 0, 3 7305; PPC64LE-NEXT: bne 0, .LBB432_1 7306; PPC64LE-NEXT: # %bb.2: 7307; PPC64LE-NEXT: mr 3, 5 7308; PPC64LE-NEXT: blr 7309 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") release 7310 ret i32 %ret 7311} 7312 7313define i32 @test433(i32* %ptr, i32 %val) { 7314; PPC64LE-LABEL: test433: 7315; PPC64LE: # %bb.0: 7316; PPC64LE-NEXT: lwsync 7317; PPC64LE-NEXT: .LBB433_1: 7318; PPC64LE-NEXT: lwarx 5, 0, 3 7319; PPC64LE-NEXT: nand 6, 4, 5 7320; PPC64LE-NEXT: stwcx. 6, 0, 3 7321; PPC64LE-NEXT: bne 0, .LBB433_1 7322; PPC64LE-NEXT: # %bb.2: 7323; PPC64LE-NEXT: mr 3, 5 7324; PPC64LE-NEXT: lwsync 7325; PPC64LE-NEXT: blr 7326 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7327 ret i32 %ret 7328} 7329 7330define i32 @test434(i32* %ptr, i32 %val) { 7331; PPC64LE-LABEL: test434: 7332; PPC64LE: # %bb.0: 7333; PPC64LE-NEXT: sync 7334; PPC64LE-NEXT: .LBB434_1: 7335; PPC64LE-NEXT: lwarx 5, 0, 3 7336; PPC64LE-NEXT: nand 6, 4, 5 7337; PPC64LE-NEXT: stwcx. 6, 0, 3 7338; PPC64LE-NEXT: bne 0, .LBB434_1 7339; PPC64LE-NEXT: # %bb.2: 7340; PPC64LE-NEXT: mr 3, 5 7341; PPC64LE-NEXT: lwsync 7342; PPC64LE-NEXT: blr 7343 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7344 ret i32 %ret 7345} 7346 7347define i64 @test435(i64* %ptr, i64 %val) { 7348; PPC64LE-LABEL: test435: 7349; PPC64LE: # %bb.0: 7350; PPC64LE-NEXT: .LBB435_1: 7351; PPC64LE-NEXT: ldarx 5, 0, 3 7352; PPC64LE-NEXT: nand 6, 4, 5 7353; PPC64LE-NEXT: stdcx. 6, 0, 3 7354; PPC64LE-NEXT: bne 0, .LBB435_1 7355; PPC64LE-NEXT: # %bb.2: 7356; PPC64LE-NEXT: mr 3, 5 7357; PPC64LE-NEXT: blr 7358 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") monotonic 7359 ret i64 %ret 7360} 7361 7362define i64 @test436(i64* %ptr, i64 %val) { 7363; PPC64LE-LABEL: test436: 7364; PPC64LE: # %bb.0: 7365; PPC64LE-NEXT: mr 5, 3 7366; PPC64LE-NEXT: .LBB436_1: 7367; PPC64LE-NEXT: ldarx 3, 0, 5 7368; PPC64LE-NEXT: nand 6, 4, 3 7369; PPC64LE-NEXT: stdcx. 6, 0, 5 7370; PPC64LE-NEXT: bne 0, .LBB436_1 7371; PPC64LE-NEXT: # %bb.2: 7372; PPC64LE-NEXT: lwsync 7373; PPC64LE-NEXT: blr 7374 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") acquire 7375 ret i64 %ret 7376} 7377 7378define i64 @test437(i64* %ptr, i64 %val) { 7379; PPC64LE-LABEL: test437: 7380; PPC64LE: # %bb.0: 7381; PPC64LE-NEXT: lwsync 7382; PPC64LE-NEXT: .LBB437_1: 7383; PPC64LE-NEXT: ldarx 5, 0, 3 7384; PPC64LE-NEXT: nand 6, 4, 5 7385; PPC64LE-NEXT: stdcx. 6, 0, 3 7386; PPC64LE-NEXT: bne 0, .LBB437_1 7387; PPC64LE-NEXT: # %bb.2: 7388; PPC64LE-NEXT: mr 3, 5 7389; PPC64LE-NEXT: blr 7390 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") release 7391 ret i64 %ret 7392} 7393 7394define i64 @test438(i64* %ptr, i64 %val) { 7395; PPC64LE-LABEL: test438: 7396; PPC64LE: # %bb.0: 7397; PPC64LE-NEXT: lwsync 7398; PPC64LE-NEXT: .LBB438_1: 7399; PPC64LE-NEXT: ldarx 5, 0, 3 7400; PPC64LE-NEXT: nand 6, 4, 5 7401; PPC64LE-NEXT: stdcx. 6, 0, 3 7402; PPC64LE-NEXT: bne 0, .LBB438_1 7403; PPC64LE-NEXT: # %bb.2: 7404; PPC64LE-NEXT: mr 3, 5 7405; PPC64LE-NEXT: lwsync 7406; PPC64LE-NEXT: blr 7407 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7408 ret i64 %ret 7409} 7410 7411define i64 @test439(i64* %ptr, i64 %val) { 7412; PPC64LE-LABEL: test439: 7413; PPC64LE: # %bb.0: 7414; PPC64LE-NEXT: sync 7415; PPC64LE-NEXT: .LBB439_1: 7416; PPC64LE-NEXT: ldarx 5, 0, 3 7417; PPC64LE-NEXT: nand 6, 4, 5 7418; PPC64LE-NEXT: stdcx. 6, 0, 3 7419; PPC64LE-NEXT: bne 0, .LBB439_1 7420; PPC64LE-NEXT: # %bb.2: 7421; PPC64LE-NEXT: mr 3, 5 7422; PPC64LE-NEXT: lwsync 7423; PPC64LE-NEXT: blr 7424 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7425 ret i64 %ret 7426} 7427 7428define i8 @test440(i8* %ptr, i8 %val) { 7429; PPC64LE-LABEL: test440: 7430; PPC64LE: # %bb.0: 7431; PPC64LE-NEXT: .LBB440_1: 7432; PPC64LE-NEXT: lbarx 5, 0, 3 7433; PPC64LE-NEXT: or 6, 4, 5 7434; PPC64LE-NEXT: stbcx. 6, 0, 3 7435; PPC64LE-NEXT: bne 0, .LBB440_1 7436; PPC64LE-NEXT: # %bb.2: 7437; PPC64LE-NEXT: mr 3, 5 7438; PPC64LE-NEXT: blr 7439 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") monotonic 7440 ret i8 %ret 7441} 7442 7443define i8 @test441(i8* %ptr, i8 %val) { 7444; PPC64LE-LABEL: test441: 7445; PPC64LE: # %bb.0: 7446; PPC64LE-NEXT: mr 5, 3 7447; PPC64LE-NEXT: .LBB441_1: 7448; PPC64LE-NEXT: lbarx 3, 0, 5 7449; PPC64LE-NEXT: or 6, 4, 3 7450; PPC64LE-NEXT: stbcx. 6, 0, 5 7451; PPC64LE-NEXT: bne 0, .LBB441_1 7452; PPC64LE-NEXT: # %bb.2: 7453; PPC64LE-NEXT: lwsync 7454; PPC64LE-NEXT: blr 7455 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") acquire 7456 ret i8 %ret 7457} 7458 7459define i8 @test442(i8* %ptr, i8 %val) { 7460; PPC64LE-LABEL: test442: 7461; PPC64LE: # %bb.0: 7462; PPC64LE-NEXT: lwsync 7463; PPC64LE-NEXT: .LBB442_1: 7464; PPC64LE-NEXT: lbarx 5, 0, 3 7465; PPC64LE-NEXT: or 6, 4, 5 7466; PPC64LE-NEXT: stbcx. 6, 0, 3 7467; PPC64LE-NEXT: bne 0, .LBB442_1 7468; PPC64LE-NEXT: # %bb.2: 7469; PPC64LE-NEXT: mr 3, 5 7470; PPC64LE-NEXT: blr 7471 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") release 7472 ret i8 %ret 7473} 7474 7475define i8 @test443(i8* %ptr, i8 %val) { 7476; PPC64LE-LABEL: test443: 7477; PPC64LE: # %bb.0: 7478; PPC64LE-NEXT: lwsync 7479; PPC64LE-NEXT: .LBB443_1: 7480; PPC64LE-NEXT: lbarx 5, 0, 3 7481; PPC64LE-NEXT: or 6, 4, 5 7482; PPC64LE-NEXT: stbcx. 6, 0, 3 7483; PPC64LE-NEXT: bne 0, .LBB443_1 7484; PPC64LE-NEXT: # %bb.2: 7485; PPC64LE-NEXT: mr 3, 5 7486; PPC64LE-NEXT: lwsync 7487; PPC64LE-NEXT: blr 7488 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7489 ret i8 %ret 7490} 7491 7492define i8 @test444(i8* %ptr, i8 %val) { 7493; PPC64LE-LABEL: test444: 7494; PPC64LE: # %bb.0: 7495; PPC64LE-NEXT: sync 7496; PPC64LE-NEXT: .LBB444_1: 7497; PPC64LE-NEXT: lbarx 5, 0, 3 7498; PPC64LE-NEXT: or 6, 4, 5 7499; PPC64LE-NEXT: stbcx. 6, 0, 3 7500; PPC64LE-NEXT: bne 0, .LBB444_1 7501; PPC64LE-NEXT: # %bb.2: 7502; PPC64LE-NEXT: mr 3, 5 7503; PPC64LE-NEXT: lwsync 7504; PPC64LE-NEXT: blr 7505 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7506 ret i8 %ret 7507} 7508 7509define i16 @test445(i16* %ptr, i16 %val) { 7510; PPC64LE-LABEL: test445: 7511; PPC64LE: # %bb.0: 7512; PPC64LE-NEXT: .LBB445_1: 7513; PPC64LE-NEXT: lharx 5, 0, 3 7514; PPC64LE-NEXT: or 6, 4, 5 7515; PPC64LE-NEXT: sthcx. 6, 0, 3 7516; PPC64LE-NEXT: bne 0, .LBB445_1 7517; PPC64LE-NEXT: # %bb.2: 7518; PPC64LE-NEXT: mr 3, 5 7519; PPC64LE-NEXT: blr 7520 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") monotonic 7521 ret i16 %ret 7522} 7523 7524define i16 @test446(i16* %ptr, i16 %val) { 7525; PPC64LE-LABEL: test446: 7526; PPC64LE: # %bb.0: 7527; PPC64LE-NEXT: mr 5, 3 7528; PPC64LE-NEXT: .LBB446_1: 7529; PPC64LE-NEXT: lharx 3, 0, 5 7530; PPC64LE-NEXT: or 6, 4, 3 7531; PPC64LE-NEXT: sthcx. 6, 0, 5 7532; PPC64LE-NEXT: bne 0, .LBB446_1 7533; PPC64LE-NEXT: # %bb.2: 7534; PPC64LE-NEXT: lwsync 7535; PPC64LE-NEXT: blr 7536 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") acquire 7537 ret i16 %ret 7538} 7539 7540define i16 @test447(i16* %ptr, i16 %val) { 7541; PPC64LE-LABEL: test447: 7542; PPC64LE: # %bb.0: 7543; PPC64LE-NEXT: lwsync 7544; PPC64LE-NEXT: .LBB447_1: 7545; PPC64LE-NEXT: lharx 5, 0, 3 7546; PPC64LE-NEXT: or 6, 4, 5 7547; PPC64LE-NEXT: sthcx. 6, 0, 3 7548; PPC64LE-NEXT: bne 0, .LBB447_1 7549; PPC64LE-NEXT: # %bb.2: 7550; PPC64LE-NEXT: mr 3, 5 7551; PPC64LE-NEXT: blr 7552 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") release 7553 ret i16 %ret 7554} 7555 7556define i16 @test448(i16* %ptr, i16 %val) { 7557; PPC64LE-LABEL: test448: 7558; PPC64LE: # %bb.0: 7559; PPC64LE-NEXT: lwsync 7560; PPC64LE-NEXT: .LBB448_1: 7561; PPC64LE-NEXT: lharx 5, 0, 3 7562; PPC64LE-NEXT: or 6, 4, 5 7563; PPC64LE-NEXT: sthcx. 6, 0, 3 7564; PPC64LE-NEXT: bne 0, .LBB448_1 7565; PPC64LE-NEXT: # %bb.2: 7566; PPC64LE-NEXT: mr 3, 5 7567; PPC64LE-NEXT: lwsync 7568; PPC64LE-NEXT: blr 7569 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7570 ret i16 %ret 7571} 7572 7573define i16 @test449(i16* %ptr, i16 %val) { 7574; PPC64LE-LABEL: test449: 7575; PPC64LE: # %bb.0: 7576; PPC64LE-NEXT: sync 7577; PPC64LE-NEXT: .LBB449_1: 7578; PPC64LE-NEXT: lharx 5, 0, 3 7579; PPC64LE-NEXT: or 6, 4, 5 7580; PPC64LE-NEXT: sthcx. 6, 0, 3 7581; PPC64LE-NEXT: bne 0, .LBB449_1 7582; PPC64LE-NEXT: # %bb.2: 7583; PPC64LE-NEXT: mr 3, 5 7584; PPC64LE-NEXT: lwsync 7585; PPC64LE-NEXT: blr 7586 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7587 ret i16 %ret 7588} 7589 7590define i32 @test450(i32* %ptr, i32 %val) { 7591; PPC64LE-LABEL: test450: 7592; PPC64LE: # %bb.0: 7593; PPC64LE-NEXT: .LBB450_1: 7594; PPC64LE-NEXT: lwarx 5, 0, 3 7595; PPC64LE-NEXT: or 6, 4, 5 7596; PPC64LE-NEXT: stwcx. 6, 0, 3 7597; PPC64LE-NEXT: bne 0, .LBB450_1 7598; PPC64LE-NEXT: # %bb.2: 7599; PPC64LE-NEXT: mr 3, 5 7600; PPC64LE-NEXT: blr 7601 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") monotonic 7602 ret i32 %ret 7603} 7604 7605define i32 @test451(i32* %ptr, i32 %val) { 7606; PPC64LE-LABEL: test451: 7607; PPC64LE: # %bb.0: 7608; PPC64LE-NEXT: mr 5, 3 7609; PPC64LE-NEXT: .LBB451_1: 7610; PPC64LE-NEXT: lwarx 3, 0, 5 7611; PPC64LE-NEXT: or 6, 4, 3 7612; PPC64LE-NEXT: stwcx. 6, 0, 5 7613; PPC64LE-NEXT: bne 0, .LBB451_1 7614; PPC64LE-NEXT: # %bb.2: 7615; PPC64LE-NEXT: lwsync 7616; PPC64LE-NEXT: blr 7617 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") acquire 7618 ret i32 %ret 7619} 7620 7621define i32 @test452(i32* %ptr, i32 %val) { 7622; PPC64LE-LABEL: test452: 7623; PPC64LE: # %bb.0: 7624; PPC64LE-NEXT: lwsync 7625; PPC64LE-NEXT: .LBB452_1: 7626; PPC64LE-NEXT: lwarx 5, 0, 3 7627; PPC64LE-NEXT: or 6, 4, 5 7628; PPC64LE-NEXT: stwcx. 6, 0, 3 7629; PPC64LE-NEXT: bne 0, .LBB452_1 7630; PPC64LE-NEXT: # %bb.2: 7631; PPC64LE-NEXT: mr 3, 5 7632; PPC64LE-NEXT: blr 7633 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") release 7634 ret i32 %ret 7635} 7636 7637define i32 @test453(i32* %ptr, i32 %val) { 7638; PPC64LE-LABEL: test453: 7639; PPC64LE: # %bb.0: 7640; PPC64LE-NEXT: lwsync 7641; PPC64LE-NEXT: .LBB453_1: 7642; PPC64LE-NEXT: lwarx 5, 0, 3 7643; PPC64LE-NEXT: or 6, 4, 5 7644; PPC64LE-NEXT: stwcx. 6, 0, 3 7645; PPC64LE-NEXT: bne 0, .LBB453_1 7646; PPC64LE-NEXT: # %bb.2: 7647; PPC64LE-NEXT: mr 3, 5 7648; PPC64LE-NEXT: lwsync 7649; PPC64LE-NEXT: blr 7650 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7651 ret i32 %ret 7652} 7653 7654define i32 @test454(i32* %ptr, i32 %val) { 7655; PPC64LE-LABEL: test454: 7656; PPC64LE: # %bb.0: 7657; PPC64LE-NEXT: sync 7658; PPC64LE-NEXT: .LBB454_1: 7659; PPC64LE-NEXT: lwarx 5, 0, 3 7660; PPC64LE-NEXT: or 6, 4, 5 7661; PPC64LE-NEXT: stwcx. 6, 0, 3 7662; PPC64LE-NEXT: bne 0, .LBB454_1 7663; PPC64LE-NEXT: # %bb.2: 7664; PPC64LE-NEXT: mr 3, 5 7665; PPC64LE-NEXT: lwsync 7666; PPC64LE-NEXT: blr 7667 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7668 ret i32 %ret 7669} 7670 7671define i64 @test455(i64* %ptr, i64 %val) { 7672; PPC64LE-LABEL: test455: 7673; PPC64LE: # %bb.0: 7674; PPC64LE-NEXT: .LBB455_1: 7675; PPC64LE-NEXT: ldarx 5, 0, 3 7676; PPC64LE-NEXT: or 6, 4, 5 7677; PPC64LE-NEXT: stdcx. 6, 0, 3 7678; PPC64LE-NEXT: bne 0, .LBB455_1 7679; PPC64LE-NEXT: # %bb.2: 7680; PPC64LE-NEXT: mr 3, 5 7681; PPC64LE-NEXT: blr 7682 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") monotonic 7683 ret i64 %ret 7684} 7685 7686define i64 @test456(i64* %ptr, i64 %val) { 7687; PPC64LE-LABEL: test456: 7688; PPC64LE: # %bb.0: 7689; PPC64LE-NEXT: mr 5, 3 7690; PPC64LE-NEXT: .LBB456_1: 7691; PPC64LE-NEXT: ldarx 3, 0, 5 7692; PPC64LE-NEXT: or 6, 4, 3 7693; PPC64LE-NEXT: stdcx. 6, 0, 5 7694; PPC64LE-NEXT: bne 0, .LBB456_1 7695; PPC64LE-NEXT: # %bb.2: 7696; PPC64LE-NEXT: lwsync 7697; PPC64LE-NEXT: blr 7698 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") acquire 7699 ret i64 %ret 7700} 7701 7702define i64 @test457(i64* %ptr, i64 %val) { 7703; PPC64LE-LABEL: test457: 7704; PPC64LE: # %bb.0: 7705; PPC64LE-NEXT: lwsync 7706; PPC64LE-NEXT: .LBB457_1: 7707; PPC64LE-NEXT: ldarx 5, 0, 3 7708; PPC64LE-NEXT: or 6, 4, 5 7709; PPC64LE-NEXT: stdcx. 6, 0, 3 7710; PPC64LE-NEXT: bne 0, .LBB457_1 7711; PPC64LE-NEXT: # %bb.2: 7712; PPC64LE-NEXT: mr 3, 5 7713; PPC64LE-NEXT: blr 7714 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") release 7715 ret i64 %ret 7716} 7717 7718define i64 @test458(i64* %ptr, i64 %val) { 7719; PPC64LE-LABEL: test458: 7720; PPC64LE: # %bb.0: 7721; PPC64LE-NEXT: lwsync 7722; PPC64LE-NEXT: .LBB458_1: 7723; PPC64LE-NEXT: ldarx 5, 0, 3 7724; PPC64LE-NEXT: or 6, 4, 5 7725; PPC64LE-NEXT: stdcx. 6, 0, 3 7726; PPC64LE-NEXT: bne 0, .LBB458_1 7727; PPC64LE-NEXT: # %bb.2: 7728; PPC64LE-NEXT: mr 3, 5 7729; PPC64LE-NEXT: lwsync 7730; PPC64LE-NEXT: blr 7731 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7732 ret i64 %ret 7733} 7734 7735define i64 @test459(i64* %ptr, i64 %val) { 7736; PPC64LE-LABEL: test459: 7737; PPC64LE: # %bb.0: 7738; PPC64LE-NEXT: sync 7739; PPC64LE-NEXT: .LBB459_1: 7740; PPC64LE-NEXT: ldarx 5, 0, 3 7741; PPC64LE-NEXT: or 6, 4, 5 7742; PPC64LE-NEXT: stdcx. 6, 0, 3 7743; PPC64LE-NEXT: bne 0, .LBB459_1 7744; PPC64LE-NEXT: # %bb.2: 7745; PPC64LE-NEXT: mr 3, 5 7746; PPC64LE-NEXT: lwsync 7747; PPC64LE-NEXT: blr 7748 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7749 ret i64 %ret 7750} 7751 7752define i8 @test460(i8* %ptr, i8 %val) { 7753; PPC64LE-LABEL: test460: 7754; PPC64LE: # %bb.0: 7755; PPC64LE-NEXT: .LBB460_1: 7756; PPC64LE-NEXT: lbarx 5, 0, 3 7757; PPC64LE-NEXT: xor 6, 4, 5 7758; PPC64LE-NEXT: stbcx. 6, 0, 3 7759; PPC64LE-NEXT: bne 0, .LBB460_1 7760; PPC64LE-NEXT: # %bb.2: 7761; PPC64LE-NEXT: mr 3, 5 7762; PPC64LE-NEXT: blr 7763 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") monotonic 7764 ret i8 %ret 7765} 7766 7767define i8 @test461(i8* %ptr, i8 %val) { 7768; PPC64LE-LABEL: test461: 7769; PPC64LE: # %bb.0: 7770; PPC64LE-NEXT: mr 5, 3 7771; PPC64LE-NEXT: .LBB461_1: 7772; PPC64LE-NEXT: lbarx 3, 0, 5 7773; PPC64LE-NEXT: xor 6, 4, 3 7774; PPC64LE-NEXT: stbcx. 6, 0, 5 7775; PPC64LE-NEXT: bne 0, .LBB461_1 7776; PPC64LE-NEXT: # %bb.2: 7777; PPC64LE-NEXT: lwsync 7778; PPC64LE-NEXT: blr 7779 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") acquire 7780 ret i8 %ret 7781} 7782 7783define i8 @test462(i8* %ptr, i8 %val) { 7784; PPC64LE-LABEL: test462: 7785; PPC64LE: # %bb.0: 7786; PPC64LE-NEXT: lwsync 7787; PPC64LE-NEXT: .LBB462_1: 7788; PPC64LE-NEXT: lbarx 5, 0, 3 7789; PPC64LE-NEXT: xor 6, 4, 5 7790; PPC64LE-NEXT: stbcx. 6, 0, 3 7791; PPC64LE-NEXT: bne 0, .LBB462_1 7792; PPC64LE-NEXT: # %bb.2: 7793; PPC64LE-NEXT: mr 3, 5 7794; PPC64LE-NEXT: blr 7795 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") release 7796 ret i8 %ret 7797} 7798 7799define i8 @test463(i8* %ptr, i8 %val) { 7800; PPC64LE-LABEL: test463: 7801; PPC64LE: # %bb.0: 7802; PPC64LE-NEXT: lwsync 7803; PPC64LE-NEXT: .LBB463_1: 7804; PPC64LE-NEXT: lbarx 5, 0, 3 7805; PPC64LE-NEXT: xor 6, 4, 5 7806; PPC64LE-NEXT: stbcx. 6, 0, 3 7807; PPC64LE-NEXT: bne 0, .LBB463_1 7808; PPC64LE-NEXT: # %bb.2: 7809; PPC64LE-NEXT: mr 3, 5 7810; PPC64LE-NEXT: lwsync 7811; PPC64LE-NEXT: blr 7812 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7813 ret i8 %ret 7814} 7815 7816define i8 @test464(i8* %ptr, i8 %val) { 7817; PPC64LE-LABEL: test464: 7818; PPC64LE: # %bb.0: 7819; PPC64LE-NEXT: sync 7820; PPC64LE-NEXT: .LBB464_1: 7821; PPC64LE-NEXT: lbarx 5, 0, 3 7822; PPC64LE-NEXT: xor 6, 4, 5 7823; PPC64LE-NEXT: stbcx. 6, 0, 3 7824; PPC64LE-NEXT: bne 0, .LBB464_1 7825; PPC64LE-NEXT: # %bb.2: 7826; PPC64LE-NEXT: mr 3, 5 7827; PPC64LE-NEXT: lwsync 7828; PPC64LE-NEXT: blr 7829 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7830 ret i8 %ret 7831} 7832 7833define i16 @test465(i16* %ptr, i16 %val) { 7834; PPC64LE-LABEL: test465: 7835; PPC64LE: # %bb.0: 7836; PPC64LE-NEXT: .LBB465_1: 7837; PPC64LE-NEXT: lharx 5, 0, 3 7838; PPC64LE-NEXT: xor 6, 4, 5 7839; PPC64LE-NEXT: sthcx. 6, 0, 3 7840; PPC64LE-NEXT: bne 0, .LBB465_1 7841; PPC64LE-NEXT: # %bb.2: 7842; PPC64LE-NEXT: mr 3, 5 7843; PPC64LE-NEXT: blr 7844 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") monotonic 7845 ret i16 %ret 7846} 7847 7848define i16 @test466(i16* %ptr, i16 %val) { 7849; PPC64LE-LABEL: test466: 7850; PPC64LE: # %bb.0: 7851; PPC64LE-NEXT: mr 5, 3 7852; PPC64LE-NEXT: .LBB466_1: 7853; PPC64LE-NEXT: lharx 3, 0, 5 7854; PPC64LE-NEXT: xor 6, 4, 3 7855; PPC64LE-NEXT: sthcx. 6, 0, 5 7856; PPC64LE-NEXT: bne 0, .LBB466_1 7857; PPC64LE-NEXT: # %bb.2: 7858; PPC64LE-NEXT: lwsync 7859; PPC64LE-NEXT: blr 7860 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") acquire 7861 ret i16 %ret 7862} 7863 7864define i16 @test467(i16* %ptr, i16 %val) { 7865; PPC64LE-LABEL: test467: 7866; PPC64LE: # %bb.0: 7867; PPC64LE-NEXT: lwsync 7868; PPC64LE-NEXT: .LBB467_1: 7869; PPC64LE-NEXT: lharx 5, 0, 3 7870; PPC64LE-NEXT: xor 6, 4, 5 7871; PPC64LE-NEXT: sthcx. 6, 0, 3 7872; PPC64LE-NEXT: bne 0, .LBB467_1 7873; PPC64LE-NEXT: # %bb.2: 7874; PPC64LE-NEXT: mr 3, 5 7875; PPC64LE-NEXT: blr 7876 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") release 7877 ret i16 %ret 7878} 7879 7880define i16 @test468(i16* %ptr, i16 %val) { 7881; PPC64LE-LABEL: test468: 7882; PPC64LE: # %bb.0: 7883; PPC64LE-NEXT: lwsync 7884; PPC64LE-NEXT: .LBB468_1: 7885; PPC64LE-NEXT: lharx 5, 0, 3 7886; PPC64LE-NEXT: xor 6, 4, 5 7887; PPC64LE-NEXT: sthcx. 6, 0, 3 7888; PPC64LE-NEXT: bne 0, .LBB468_1 7889; PPC64LE-NEXT: # %bb.2: 7890; PPC64LE-NEXT: mr 3, 5 7891; PPC64LE-NEXT: lwsync 7892; PPC64LE-NEXT: blr 7893 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7894 ret i16 %ret 7895} 7896 7897define i16 @test469(i16* %ptr, i16 %val) { 7898; PPC64LE-LABEL: test469: 7899; PPC64LE: # %bb.0: 7900; PPC64LE-NEXT: sync 7901; PPC64LE-NEXT: .LBB469_1: 7902; PPC64LE-NEXT: lharx 5, 0, 3 7903; PPC64LE-NEXT: xor 6, 4, 5 7904; PPC64LE-NEXT: sthcx. 6, 0, 3 7905; PPC64LE-NEXT: bne 0, .LBB469_1 7906; PPC64LE-NEXT: # %bb.2: 7907; PPC64LE-NEXT: mr 3, 5 7908; PPC64LE-NEXT: lwsync 7909; PPC64LE-NEXT: blr 7910 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7911 ret i16 %ret 7912} 7913 7914define i32 @test470(i32* %ptr, i32 %val) { 7915; PPC64LE-LABEL: test470: 7916; PPC64LE: # %bb.0: 7917; PPC64LE-NEXT: .LBB470_1: 7918; PPC64LE-NEXT: lwarx 5, 0, 3 7919; PPC64LE-NEXT: xor 6, 4, 5 7920; PPC64LE-NEXT: stwcx. 6, 0, 3 7921; PPC64LE-NEXT: bne 0, .LBB470_1 7922; PPC64LE-NEXT: # %bb.2: 7923; PPC64LE-NEXT: mr 3, 5 7924; PPC64LE-NEXT: blr 7925 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") monotonic 7926 ret i32 %ret 7927} 7928 7929define i32 @test471(i32* %ptr, i32 %val) { 7930; PPC64LE-LABEL: test471: 7931; PPC64LE: # %bb.0: 7932; PPC64LE-NEXT: mr 5, 3 7933; PPC64LE-NEXT: .LBB471_1: 7934; PPC64LE-NEXT: lwarx 3, 0, 5 7935; PPC64LE-NEXT: xor 6, 4, 3 7936; PPC64LE-NEXT: stwcx. 6, 0, 5 7937; PPC64LE-NEXT: bne 0, .LBB471_1 7938; PPC64LE-NEXT: # %bb.2: 7939; PPC64LE-NEXT: lwsync 7940; PPC64LE-NEXT: blr 7941 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") acquire 7942 ret i32 %ret 7943} 7944 7945define i32 @test472(i32* %ptr, i32 %val) { 7946; PPC64LE-LABEL: test472: 7947; PPC64LE: # %bb.0: 7948; PPC64LE-NEXT: lwsync 7949; PPC64LE-NEXT: .LBB472_1: 7950; PPC64LE-NEXT: lwarx 5, 0, 3 7951; PPC64LE-NEXT: xor 6, 4, 5 7952; PPC64LE-NEXT: stwcx. 6, 0, 3 7953; PPC64LE-NEXT: bne 0, .LBB472_1 7954; PPC64LE-NEXT: # %bb.2: 7955; PPC64LE-NEXT: mr 3, 5 7956; PPC64LE-NEXT: blr 7957 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") release 7958 ret i32 %ret 7959} 7960 7961define i32 @test473(i32* %ptr, i32 %val) { 7962; PPC64LE-LABEL: test473: 7963; PPC64LE: # %bb.0: 7964; PPC64LE-NEXT: lwsync 7965; PPC64LE-NEXT: .LBB473_1: 7966; PPC64LE-NEXT: lwarx 5, 0, 3 7967; PPC64LE-NEXT: xor 6, 4, 5 7968; PPC64LE-NEXT: stwcx. 6, 0, 3 7969; PPC64LE-NEXT: bne 0, .LBB473_1 7970; PPC64LE-NEXT: # %bb.2: 7971; PPC64LE-NEXT: mr 3, 5 7972; PPC64LE-NEXT: lwsync 7973; PPC64LE-NEXT: blr 7974 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7975 ret i32 %ret 7976} 7977 7978define i32 @test474(i32* %ptr, i32 %val) { 7979; PPC64LE-LABEL: test474: 7980; PPC64LE: # %bb.0: 7981; PPC64LE-NEXT: sync 7982; PPC64LE-NEXT: .LBB474_1: 7983; PPC64LE-NEXT: lwarx 5, 0, 3 7984; PPC64LE-NEXT: xor 6, 4, 5 7985; PPC64LE-NEXT: stwcx. 6, 0, 3 7986; PPC64LE-NEXT: bne 0, .LBB474_1 7987; PPC64LE-NEXT: # %bb.2: 7988; PPC64LE-NEXT: mr 3, 5 7989; PPC64LE-NEXT: lwsync 7990; PPC64LE-NEXT: blr 7991 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7992 ret i32 %ret 7993} 7994 7995define i64 @test475(i64* %ptr, i64 %val) { 7996; PPC64LE-LABEL: test475: 7997; PPC64LE: # %bb.0: 7998; PPC64LE-NEXT: .LBB475_1: 7999; PPC64LE-NEXT: ldarx 5, 0, 3 8000; PPC64LE-NEXT: xor 6, 4, 5 8001; PPC64LE-NEXT: stdcx. 6, 0, 3 8002; PPC64LE-NEXT: bne 0, .LBB475_1 8003; PPC64LE-NEXT: # %bb.2: 8004; PPC64LE-NEXT: mr 3, 5 8005; PPC64LE-NEXT: blr 8006 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") monotonic 8007 ret i64 %ret 8008} 8009 8010define i64 @test476(i64* %ptr, i64 %val) { 8011; PPC64LE-LABEL: test476: 8012; PPC64LE: # %bb.0: 8013; PPC64LE-NEXT: mr 5, 3 8014; PPC64LE-NEXT: .LBB476_1: 8015; PPC64LE-NEXT: ldarx 3, 0, 5 8016; PPC64LE-NEXT: xor 6, 4, 3 8017; PPC64LE-NEXT: stdcx. 6, 0, 5 8018; PPC64LE-NEXT: bne 0, .LBB476_1 8019; PPC64LE-NEXT: # %bb.2: 8020; PPC64LE-NEXT: lwsync 8021; PPC64LE-NEXT: blr 8022 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") acquire 8023 ret i64 %ret 8024} 8025 8026define i64 @test477(i64* %ptr, i64 %val) { 8027; PPC64LE-LABEL: test477: 8028; PPC64LE: # %bb.0: 8029; PPC64LE-NEXT: lwsync 8030; PPC64LE-NEXT: .LBB477_1: 8031; PPC64LE-NEXT: ldarx 5, 0, 3 8032; PPC64LE-NEXT: xor 6, 4, 5 8033; PPC64LE-NEXT: stdcx. 6, 0, 3 8034; PPC64LE-NEXT: bne 0, .LBB477_1 8035; PPC64LE-NEXT: # %bb.2: 8036; PPC64LE-NEXT: mr 3, 5 8037; PPC64LE-NEXT: blr 8038 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") release 8039 ret i64 %ret 8040} 8041 8042define i64 @test478(i64* %ptr, i64 %val) { 8043; PPC64LE-LABEL: test478: 8044; PPC64LE: # %bb.0: 8045; PPC64LE-NEXT: lwsync 8046; PPC64LE-NEXT: .LBB478_1: 8047; PPC64LE-NEXT: ldarx 5, 0, 3 8048; PPC64LE-NEXT: xor 6, 4, 5 8049; PPC64LE-NEXT: stdcx. 6, 0, 3 8050; PPC64LE-NEXT: bne 0, .LBB478_1 8051; PPC64LE-NEXT: # %bb.2: 8052; PPC64LE-NEXT: mr 3, 5 8053; PPC64LE-NEXT: lwsync 8054; PPC64LE-NEXT: blr 8055 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8056 ret i64 %ret 8057} 8058 8059define i64 @test479(i64* %ptr, i64 %val) { 8060; PPC64LE-LABEL: test479: 8061; PPC64LE: # %bb.0: 8062; PPC64LE-NEXT: sync 8063; PPC64LE-NEXT: .LBB479_1: 8064; PPC64LE-NEXT: ldarx 5, 0, 3 8065; PPC64LE-NEXT: xor 6, 4, 5 8066; PPC64LE-NEXT: stdcx. 6, 0, 3 8067; PPC64LE-NEXT: bne 0, .LBB479_1 8068; PPC64LE-NEXT: # %bb.2: 8069; PPC64LE-NEXT: mr 3, 5 8070; PPC64LE-NEXT: lwsync 8071; PPC64LE-NEXT: blr 8072 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8073 ret i64 %ret 8074} 8075 8076define i8 @test480(i8* %ptr, i8 %val) { 8077; PPC64LE-LABEL: test480: 8078; PPC64LE: # %bb.0: 8079; PPC64LE-NEXT: .LBB480_1: 8080; PPC64LE-NEXT: lbarx 5, 0, 3 8081; PPC64LE-NEXT: extsb 6, 5 8082; PPC64LE-NEXT: cmpw 4, 6 8083; PPC64LE-NEXT: ble 0, .LBB480_3 8084; PPC64LE-NEXT: # %bb.2: 8085; PPC64LE-NEXT: stbcx. 4, 0, 3 8086; PPC64LE-NEXT: bne 0, .LBB480_1 8087; PPC64LE-NEXT: .LBB480_3: 8088; PPC64LE-NEXT: mr 3, 5 8089; PPC64LE-NEXT: blr 8090 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") monotonic 8091 ret i8 %ret 8092} 8093 8094define i8 @test481(i8* %ptr, i8 %val) { 8095; PPC64LE-LABEL: test481: 8096; PPC64LE: # %bb.0: 8097; PPC64LE-NEXT: mr 5, 3 8098; PPC64LE-NEXT: .LBB481_1: 8099; PPC64LE-NEXT: lbarx 3, 0, 5 8100; PPC64LE-NEXT: extsb 6, 3 8101; PPC64LE-NEXT: cmpw 4, 6 8102; PPC64LE-NEXT: ble 0, .LBB481_3 8103; PPC64LE-NEXT: # %bb.2: 8104; PPC64LE-NEXT: stbcx. 4, 0, 5 8105; PPC64LE-NEXT: bne 0, .LBB481_1 8106; PPC64LE-NEXT: .LBB481_3: 8107; PPC64LE-NEXT: lwsync 8108; PPC64LE-NEXT: blr 8109 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") acquire 8110 ret i8 %ret 8111} 8112 8113define i8 @test482(i8* %ptr, i8 %val) { 8114; PPC64LE-LABEL: test482: 8115; PPC64LE: # %bb.0: 8116; PPC64LE-NEXT: lwsync 8117; PPC64LE-NEXT: .LBB482_1: 8118; PPC64LE-NEXT: lbarx 5, 0, 3 8119; PPC64LE-NEXT: extsb 6, 5 8120; PPC64LE-NEXT: cmpw 4, 6 8121; PPC64LE-NEXT: ble 0, .LBB482_3 8122; PPC64LE-NEXT: # %bb.2: 8123; PPC64LE-NEXT: stbcx. 4, 0, 3 8124; PPC64LE-NEXT: bne 0, .LBB482_1 8125; PPC64LE-NEXT: .LBB482_3: 8126; PPC64LE-NEXT: mr 3, 5 8127; PPC64LE-NEXT: blr 8128 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") release 8129 ret i8 %ret 8130} 8131 8132define i8 @test483(i8* %ptr, i8 %val) { 8133; PPC64LE-LABEL: test483: 8134; PPC64LE: # %bb.0: 8135; PPC64LE-NEXT: lwsync 8136; PPC64LE-NEXT: .LBB483_1: 8137; PPC64LE-NEXT: lbarx 5, 0, 3 8138; PPC64LE-NEXT: extsb 6, 5 8139; PPC64LE-NEXT: cmpw 4, 6 8140; PPC64LE-NEXT: ble 0, .LBB483_3 8141; PPC64LE-NEXT: # %bb.2: 8142; PPC64LE-NEXT: stbcx. 4, 0, 3 8143; PPC64LE-NEXT: bne 0, .LBB483_1 8144; PPC64LE-NEXT: .LBB483_3: 8145; PPC64LE-NEXT: mr 3, 5 8146; PPC64LE-NEXT: lwsync 8147; PPC64LE-NEXT: blr 8148 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8149 ret i8 %ret 8150} 8151 8152define i8 @test484(i8* %ptr, i8 %val) { 8153; PPC64LE-LABEL: test484: 8154; PPC64LE: # %bb.0: 8155; PPC64LE-NEXT: sync 8156; PPC64LE-NEXT: .LBB484_1: 8157; PPC64LE-NEXT: lbarx 5, 0, 3 8158; PPC64LE-NEXT: extsb 6, 5 8159; PPC64LE-NEXT: cmpw 4, 6 8160; PPC64LE-NEXT: ble 0, .LBB484_3 8161; PPC64LE-NEXT: # %bb.2: 8162; PPC64LE-NEXT: stbcx. 4, 0, 3 8163; PPC64LE-NEXT: bne 0, .LBB484_1 8164; PPC64LE-NEXT: .LBB484_3: 8165; PPC64LE-NEXT: mr 3, 5 8166; PPC64LE-NEXT: lwsync 8167; PPC64LE-NEXT: blr 8168 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8169 ret i8 %ret 8170} 8171 8172define i16 @test485(i16* %ptr, i16 %val) { 8173; PPC64LE-LABEL: test485: 8174; PPC64LE: # %bb.0: 8175; PPC64LE-NEXT: .LBB485_1: 8176; PPC64LE-NEXT: lharx 5, 0, 3 8177; PPC64LE-NEXT: extsh 6, 5 8178; PPC64LE-NEXT: cmpw 4, 6 8179; PPC64LE-NEXT: ble 0, .LBB485_3 8180; PPC64LE-NEXT: # %bb.2: 8181; PPC64LE-NEXT: sthcx. 4, 0, 3 8182; PPC64LE-NEXT: bne 0, .LBB485_1 8183; PPC64LE-NEXT: .LBB485_3: 8184; PPC64LE-NEXT: mr 3, 5 8185; PPC64LE-NEXT: blr 8186 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") monotonic 8187 ret i16 %ret 8188} 8189 8190define i16 @test486(i16* %ptr, i16 %val) { 8191; PPC64LE-LABEL: test486: 8192; PPC64LE: # %bb.0: 8193; PPC64LE-NEXT: mr 5, 3 8194; PPC64LE-NEXT: .LBB486_1: 8195; PPC64LE-NEXT: lharx 3, 0, 5 8196; PPC64LE-NEXT: extsh 6, 3 8197; PPC64LE-NEXT: cmpw 4, 6 8198; PPC64LE-NEXT: ble 0, .LBB486_3 8199; PPC64LE-NEXT: # %bb.2: 8200; PPC64LE-NEXT: sthcx. 4, 0, 5 8201; PPC64LE-NEXT: bne 0, .LBB486_1 8202; PPC64LE-NEXT: .LBB486_3: 8203; PPC64LE-NEXT: lwsync 8204; PPC64LE-NEXT: blr 8205 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") acquire 8206 ret i16 %ret 8207} 8208 8209define i16 @test487(i16* %ptr, i16 %val) { 8210; PPC64LE-LABEL: test487: 8211; PPC64LE: # %bb.0: 8212; PPC64LE-NEXT: lwsync 8213; PPC64LE-NEXT: .LBB487_1: 8214; PPC64LE-NEXT: lharx 5, 0, 3 8215; PPC64LE-NEXT: extsh 6, 5 8216; PPC64LE-NEXT: cmpw 4, 6 8217; PPC64LE-NEXT: ble 0, .LBB487_3 8218; PPC64LE-NEXT: # %bb.2: 8219; PPC64LE-NEXT: sthcx. 4, 0, 3 8220; PPC64LE-NEXT: bne 0, .LBB487_1 8221; PPC64LE-NEXT: .LBB487_3: 8222; PPC64LE-NEXT: mr 3, 5 8223; PPC64LE-NEXT: blr 8224 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") release 8225 ret i16 %ret 8226} 8227 8228define i16 @test488(i16* %ptr, i16 %val) { 8229; PPC64LE-LABEL: test488: 8230; PPC64LE: # %bb.0: 8231; PPC64LE-NEXT: lwsync 8232; PPC64LE-NEXT: .LBB488_1: 8233; PPC64LE-NEXT: lharx 5, 0, 3 8234; PPC64LE-NEXT: extsh 6, 5 8235; PPC64LE-NEXT: cmpw 4, 6 8236; PPC64LE-NEXT: ble 0, .LBB488_3 8237; PPC64LE-NEXT: # %bb.2: 8238; PPC64LE-NEXT: sthcx. 4, 0, 3 8239; PPC64LE-NEXT: bne 0, .LBB488_1 8240; PPC64LE-NEXT: .LBB488_3: 8241; PPC64LE-NEXT: mr 3, 5 8242; PPC64LE-NEXT: lwsync 8243; PPC64LE-NEXT: blr 8244 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") acq_rel 8245 ret i16 %ret 8246} 8247 8248define i16 @test489(i16* %ptr, i16 %val) { 8249; PPC64LE-LABEL: test489: 8250; PPC64LE: # %bb.0: 8251; PPC64LE-NEXT: sync 8252; PPC64LE-NEXT: .LBB489_1: 8253; PPC64LE-NEXT: lharx 5, 0, 3 8254; PPC64LE-NEXT: extsh 6, 5 8255; PPC64LE-NEXT: cmpw 4, 6 8256; PPC64LE-NEXT: ble 0, .LBB489_3 8257; PPC64LE-NEXT: # %bb.2: 8258; PPC64LE-NEXT: sthcx. 4, 0, 3 8259; PPC64LE-NEXT: bne 0, .LBB489_1 8260; PPC64LE-NEXT: .LBB489_3: 8261; PPC64LE-NEXT: mr 3, 5 8262; PPC64LE-NEXT: lwsync 8263; PPC64LE-NEXT: blr 8264 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") seq_cst 8265 ret i16 %ret 8266} 8267 8268define i32 @test490(i32* %ptr, i32 %val) { 8269; PPC64LE-LABEL: test490: 8270; PPC64LE: # %bb.0: 8271; PPC64LE-NEXT: .LBB490_1: 8272; PPC64LE-NEXT: lwarx 5, 0, 3 8273; PPC64LE-NEXT: cmpw 4, 5 8274; PPC64LE-NEXT: ble 0, .LBB490_3 8275; PPC64LE-NEXT: # %bb.2: 8276; PPC64LE-NEXT: stwcx. 4, 0, 3 8277; PPC64LE-NEXT: bne 0, .LBB490_1 8278; PPC64LE-NEXT: .LBB490_3: 8279; PPC64LE-NEXT: mr 3, 5 8280; PPC64LE-NEXT: blr 8281 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") monotonic 8282 ret i32 %ret 8283} 8284 8285define i32 @test491(i32* %ptr, i32 %val) { 8286; PPC64LE-LABEL: test491: 8287; PPC64LE: # %bb.0: 8288; PPC64LE-NEXT: mr 5, 3 8289; PPC64LE-NEXT: .LBB491_1: 8290; PPC64LE-NEXT: lwarx 3, 0, 5 8291; PPC64LE-NEXT: cmpw 4, 3 8292; PPC64LE-NEXT: ble 0, .LBB491_3 8293; PPC64LE-NEXT: # %bb.2: 8294; PPC64LE-NEXT: stwcx. 4, 0, 5 8295; PPC64LE-NEXT: bne 0, .LBB491_1 8296; PPC64LE-NEXT: .LBB491_3: 8297; PPC64LE-NEXT: lwsync 8298; PPC64LE-NEXT: blr 8299 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") acquire 8300 ret i32 %ret 8301} 8302 8303define i32 @test492(i32* %ptr, i32 %val) { 8304; PPC64LE-LABEL: test492: 8305; PPC64LE: # %bb.0: 8306; PPC64LE-NEXT: lwsync 8307; PPC64LE-NEXT: .LBB492_1: 8308; PPC64LE-NEXT: lwarx 5, 0, 3 8309; PPC64LE-NEXT: cmpw 4, 5 8310; PPC64LE-NEXT: ble 0, .LBB492_3 8311; PPC64LE-NEXT: # %bb.2: 8312; PPC64LE-NEXT: stwcx. 4, 0, 3 8313; PPC64LE-NEXT: bne 0, .LBB492_1 8314; PPC64LE-NEXT: .LBB492_3: 8315; PPC64LE-NEXT: mr 3, 5 8316; PPC64LE-NEXT: blr 8317 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") release 8318 ret i32 %ret 8319} 8320 8321define i32 @test493(i32* %ptr, i32 %val) { 8322; PPC64LE-LABEL: test493: 8323; PPC64LE: # %bb.0: 8324; PPC64LE-NEXT: lwsync 8325; PPC64LE-NEXT: .LBB493_1: 8326; PPC64LE-NEXT: lwarx 5, 0, 3 8327; PPC64LE-NEXT: cmpw 4, 5 8328; PPC64LE-NEXT: ble 0, .LBB493_3 8329; PPC64LE-NEXT: # %bb.2: 8330; PPC64LE-NEXT: stwcx. 4, 0, 3 8331; PPC64LE-NEXT: bne 0, .LBB493_1 8332; PPC64LE-NEXT: .LBB493_3: 8333; PPC64LE-NEXT: mr 3, 5 8334; PPC64LE-NEXT: lwsync 8335; PPC64LE-NEXT: blr 8336 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") acq_rel 8337 ret i32 %ret 8338} 8339 8340define i32 @test494(i32* %ptr, i32 %val) { 8341; PPC64LE-LABEL: test494: 8342; PPC64LE: # %bb.0: 8343; PPC64LE-NEXT: sync 8344; PPC64LE-NEXT: .LBB494_1: 8345; PPC64LE-NEXT: lwarx 5, 0, 3 8346; PPC64LE-NEXT: cmpw 4, 5 8347; PPC64LE-NEXT: ble 0, .LBB494_3 8348; PPC64LE-NEXT: # %bb.2: 8349; PPC64LE-NEXT: stwcx. 4, 0, 3 8350; PPC64LE-NEXT: bne 0, .LBB494_1 8351; PPC64LE-NEXT: .LBB494_3: 8352; PPC64LE-NEXT: mr 3, 5 8353; PPC64LE-NEXT: lwsync 8354; PPC64LE-NEXT: blr 8355 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8356 ret i32 %ret 8357} 8358 8359define i64 @test495(i64* %ptr, i64 %val) { 8360; PPC64LE-LABEL: test495: 8361; PPC64LE: # %bb.0: 8362; PPC64LE-NEXT: .LBB495_1: 8363; PPC64LE-NEXT: ldarx 5, 0, 3 8364; PPC64LE-NEXT: cmpd 4, 5 8365; PPC64LE-NEXT: ble 0, .LBB495_3 8366; PPC64LE-NEXT: # %bb.2: 8367; PPC64LE-NEXT: stdcx. 4, 0, 3 8368; PPC64LE-NEXT: bne 0, .LBB495_1 8369; PPC64LE-NEXT: .LBB495_3: 8370; PPC64LE-NEXT: mr 3, 5 8371; PPC64LE-NEXT: blr 8372 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") monotonic 8373 ret i64 %ret 8374} 8375 8376define i64 @test496(i64* %ptr, i64 %val) { 8377; PPC64LE-LABEL: test496: 8378; PPC64LE: # %bb.0: 8379; PPC64LE-NEXT: mr 5, 3 8380; PPC64LE-NEXT: .LBB496_1: 8381; PPC64LE-NEXT: ldarx 3, 0, 5 8382; PPC64LE-NEXT: cmpd 4, 3 8383; PPC64LE-NEXT: ble 0, .LBB496_3 8384; PPC64LE-NEXT: # %bb.2: 8385; PPC64LE-NEXT: stdcx. 4, 0, 5 8386; PPC64LE-NEXT: bne 0, .LBB496_1 8387; PPC64LE-NEXT: .LBB496_3: 8388; PPC64LE-NEXT: lwsync 8389; PPC64LE-NEXT: blr 8390 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") acquire 8391 ret i64 %ret 8392} 8393 8394define i64 @test497(i64* %ptr, i64 %val) { 8395; PPC64LE-LABEL: test497: 8396; PPC64LE: # %bb.0: 8397; PPC64LE-NEXT: lwsync 8398; PPC64LE-NEXT: .LBB497_1: 8399; PPC64LE-NEXT: ldarx 5, 0, 3 8400; PPC64LE-NEXT: cmpd 4, 5 8401; PPC64LE-NEXT: ble 0, .LBB497_3 8402; PPC64LE-NEXT: # %bb.2: 8403; PPC64LE-NEXT: stdcx. 4, 0, 3 8404; PPC64LE-NEXT: bne 0, .LBB497_1 8405; PPC64LE-NEXT: .LBB497_3: 8406; PPC64LE-NEXT: mr 3, 5 8407; PPC64LE-NEXT: blr 8408 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") release 8409 ret i64 %ret 8410} 8411 8412define i64 @test498(i64* %ptr, i64 %val) { 8413; PPC64LE-LABEL: test498: 8414; PPC64LE: # %bb.0: 8415; PPC64LE-NEXT: lwsync 8416; PPC64LE-NEXT: .LBB498_1: 8417; PPC64LE-NEXT: ldarx 5, 0, 3 8418; PPC64LE-NEXT: cmpd 4, 5 8419; PPC64LE-NEXT: ble 0, .LBB498_3 8420; PPC64LE-NEXT: # %bb.2: 8421; PPC64LE-NEXT: stdcx. 4, 0, 3 8422; PPC64LE-NEXT: bne 0, .LBB498_1 8423; PPC64LE-NEXT: .LBB498_3: 8424; PPC64LE-NEXT: mr 3, 5 8425; PPC64LE-NEXT: lwsync 8426; PPC64LE-NEXT: blr 8427 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8428 ret i64 %ret 8429} 8430 8431define i64 @test499(i64* %ptr, i64 %val) { 8432; PPC64LE-LABEL: test499: 8433; PPC64LE: # %bb.0: 8434; PPC64LE-NEXT: sync 8435; PPC64LE-NEXT: .LBB499_1: 8436; PPC64LE-NEXT: ldarx 5, 0, 3 8437; PPC64LE-NEXT: cmpd 4, 5 8438; PPC64LE-NEXT: ble 0, .LBB499_3 8439; PPC64LE-NEXT: # %bb.2: 8440; PPC64LE-NEXT: stdcx. 4, 0, 3 8441; PPC64LE-NEXT: bne 0, .LBB499_1 8442; PPC64LE-NEXT: .LBB499_3: 8443; PPC64LE-NEXT: mr 3, 5 8444; PPC64LE-NEXT: lwsync 8445; PPC64LE-NEXT: blr 8446 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8447 ret i64 %ret 8448} 8449 8450define i8 @test500(i8* %ptr, i8 %val) { 8451; PPC64LE-LABEL: test500: 8452; PPC64LE: # %bb.0: 8453; PPC64LE-NEXT: .LBB500_1: 8454; PPC64LE-NEXT: lbarx 5, 0, 3 8455; PPC64LE-NEXT: extsb 6, 5 8456; PPC64LE-NEXT: cmpw 4, 6 8457; PPC64LE-NEXT: bge 0, .LBB500_3 8458; PPC64LE-NEXT: # %bb.2: 8459; PPC64LE-NEXT: stbcx. 4, 0, 3 8460; PPC64LE-NEXT: bne 0, .LBB500_1 8461; PPC64LE-NEXT: .LBB500_3: 8462; PPC64LE-NEXT: mr 3, 5 8463; PPC64LE-NEXT: blr 8464 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") monotonic 8465 ret i8 %ret 8466} 8467 8468define i8 @test501(i8* %ptr, i8 %val) { 8469; PPC64LE-LABEL: test501: 8470; PPC64LE: # %bb.0: 8471; PPC64LE-NEXT: mr 5, 3 8472; PPC64LE-NEXT: .LBB501_1: 8473; PPC64LE-NEXT: lbarx 3, 0, 5 8474; PPC64LE-NEXT: extsb 6, 3 8475; PPC64LE-NEXT: cmpw 4, 6 8476; PPC64LE-NEXT: bge 0, .LBB501_3 8477; PPC64LE-NEXT: # %bb.2: 8478; PPC64LE-NEXT: stbcx. 4, 0, 5 8479; PPC64LE-NEXT: bne 0, .LBB501_1 8480; PPC64LE-NEXT: .LBB501_3: 8481; PPC64LE-NEXT: lwsync 8482; PPC64LE-NEXT: blr 8483 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") acquire 8484 ret i8 %ret 8485} 8486 8487define i8 @test502(i8* %ptr, i8 %val) { 8488; PPC64LE-LABEL: test502: 8489; PPC64LE: # %bb.0: 8490; PPC64LE-NEXT: lwsync 8491; PPC64LE-NEXT: .LBB502_1: 8492; PPC64LE-NEXT: lbarx 5, 0, 3 8493; PPC64LE-NEXT: extsb 6, 5 8494; PPC64LE-NEXT: cmpw 4, 6 8495; PPC64LE-NEXT: bge 0, .LBB502_3 8496; PPC64LE-NEXT: # %bb.2: 8497; PPC64LE-NEXT: stbcx. 4, 0, 3 8498; PPC64LE-NEXT: bne 0, .LBB502_1 8499; PPC64LE-NEXT: .LBB502_3: 8500; PPC64LE-NEXT: mr 3, 5 8501; PPC64LE-NEXT: blr 8502 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") release 8503 ret i8 %ret 8504} 8505 8506define i8 @test503(i8* %ptr, i8 %val) { 8507; PPC64LE-LABEL: test503: 8508; PPC64LE: # %bb.0: 8509; PPC64LE-NEXT: lwsync 8510; PPC64LE-NEXT: .LBB503_1: 8511; PPC64LE-NEXT: lbarx 5, 0, 3 8512; PPC64LE-NEXT: extsb 6, 5 8513; PPC64LE-NEXT: cmpw 4, 6 8514; PPC64LE-NEXT: bge 0, .LBB503_3 8515; PPC64LE-NEXT: # %bb.2: 8516; PPC64LE-NEXT: stbcx. 4, 0, 3 8517; PPC64LE-NEXT: bne 0, .LBB503_1 8518; PPC64LE-NEXT: .LBB503_3: 8519; PPC64LE-NEXT: mr 3, 5 8520; PPC64LE-NEXT: lwsync 8521; PPC64LE-NEXT: blr 8522 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8523 ret i8 %ret 8524} 8525 8526define i8 @test504(i8* %ptr, i8 %val) { 8527; PPC64LE-LABEL: test504: 8528; PPC64LE: # %bb.0: 8529; PPC64LE-NEXT: sync 8530; PPC64LE-NEXT: .LBB504_1: 8531; PPC64LE-NEXT: lbarx 5, 0, 3 8532; PPC64LE-NEXT: extsb 6, 5 8533; PPC64LE-NEXT: cmpw 4, 6 8534; PPC64LE-NEXT: bge 0, .LBB504_3 8535; PPC64LE-NEXT: # %bb.2: 8536; PPC64LE-NEXT: stbcx. 4, 0, 3 8537; PPC64LE-NEXT: bne 0, .LBB504_1 8538; PPC64LE-NEXT: .LBB504_3: 8539; PPC64LE-NEXT: mr 3, 5 8540; PPC64LE-NEXT: lwsync 8541; PPC64LE-NEXT: blr 8542 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8543 ret i8 %ret 8544} 8545 8546define i16 @test505(i16* %ptr, i16 %val) { 8547; PPC64LE-LABEL: test505: 8548; PPC64LE: # %bb.0: 8549; PPC64LE-NEXT: .LBB505_1: 8550; PPC64LE-NEXT: lharx 5, 0, 3 8551; PPC64LE-NEXT: extsh 6, 5 8552; PPC64LE-NEXT: cmpw 4, 6 8553; PPC64LE-NEXT: bge 0, .LBB505_3 8554; PPC64LE-NEXT: # %bb.2: 8555; PPC64LE-NEXT: sthcx. 4, 0, 3 8556; PPC64LE-NEXT: bne 0, .LBB505_1 8557; PPC64LE-NEXT: .LBB505_3: 8558; PPC64LE-NEXT: mr 3, 5 8559; PPC64LE-NEXT: blr 8560 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") monotonic 8561 ret i16 %ret 8562} 8563 8564define i16 @test506(i16* %ptr, i16 %val) { 8565; PPC64LE-LABEL: test506: 8566; PPC64LE: # %bb.0: 8567; PPC64LE-NEXT: mr 5, 3 8568; PPC64LE-NEXT: .LBB506_1: 8569; PPC64LE-NEXT: lharx 3, 0, 5 8570; PPC64LE-NEXT: extsh 6, 3 8571; PPC64LE-NEXT: cmpw 4, 6 8572; PPC64LE-NEXT: bge 0, .LBB506_3 8573; PPC64LE-NEXT: # %bb.2: 8574; PPC64LE-NEXT: sthcx. 4, 0, 5 8575; PPC64LE-NEXT: bne 0, .LBB506_1 8576; PPC64LE-NEXT: .LBB506_3: 8577; PPC64LE-NEXT: lwsync 8578; PPC64LE-NEXT: blr 8579 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") acquire 8580 ret i16 %ret 8581} 8582 8583define i16 @test507(i16* %ptr, i16 %val) { 8584; PPC64LE-LABEL: test507: 8585; PPC64LE: # %bb.0: 8586; PPC64LE-NEXT: lwsync 8587; PPC64LE-NEXT: .LBB507_1: 8588; PPC64LE-NEXT: lharx 5, 0, 3 8589; PPC64LE-NEXT: extsh 6, 5 8590; PPC64LE-NEXT: cmpw 4, 6 8591; PPC64LE-NEXT: bge 0, .LBB507_3 8592; PPC64LE-NEXT: # %bb.2: 8593; PPC64LE-NEXT: sthcx. 4, 0, 3 8594; PPC64LE-NEXT: bne 0, .LBB507_1 8595; PPC64LE-NEXT: .LBB507_3: 8596; PPC64LE-NEXT: mr 3, 5 8597; PPC64LE-NEXT: blr 8598 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") release 8599 ret i16 %ret 8600} 8601 8602define i16 @test508(i16* %ptr, i16 %val) { 8603; PPC64LE-LABEL: test508: 8604; PPC64LE: # %bb.0: 8605; PPC64LE-NEXT: lwsync 8606; PPC64LE-NEXT: .LBB508_1: 8607; PPC64LE-NEXT: lharx 5, 0, 3 8608; PPC64LE-NEXT: extsh 6, 5 8609; PPC64LE-NEXT: cmpw 4, 6 8610; PPC64LE-NEXT: bge 0, .LBB508_3 8611; PPC64LE-NEXT: # %bb.2: 8612; PPC64LE-NEXT: sthcx. 4, 0, 3 8613; PPC64LE-NEXT: bne 0, .LBB508_1 8614; PPC64LE-NEXT: .LBB508_3: 8615; PPC64LE-NEXT: mr 3, 5 8616; PPC64LE-NEXT: lwsync 8617; PPC64LE-NEXT: blr 8618 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") acq_rel 8619 ret i16 %ret 8620} 8621 8622define i16 @test509(i16* %ptr, i16 %val) { 8623; PPC64LE-LABEL: test509: 8624; PPC64LE: # %bb.0: 8625; PPC64LE-NEXT: sync 8626; PPC64LE-NEXT: .LBB509_1: 8627; PPC64LE-NEXT: lharx 5, 0, 3 8628; PPC64LE-NEXT: extsh 6, 5 8629; PPC64LE-NEXT: cmpw 4, 6 8630; PPC64LE-NEXT: bge 0, .LBB509_3 8631; PPC64LE-NEXT: # %bb.2: 8632; PPC64LE-NEXT: sthcx. 4, 0, 3 8633; PPC64LE-NEXT: bne 0, .LBB509_1 8634; PPC64LE-NEXT: .LBB509_3: 8635; PPC64LE-NEXT: mr 3, 5 8636; PPC64LE-NEXT: lwsync 8637; PPC64LE-NEXT: blr 8638 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") seq_cst 8639 ret i16 %ret 8640} 8641 8642define i32 @test510(i32* %ptr, i32 %val) { 8643; PPC64LE-LABEL: test510: 8644; PPC64LE: # %bb.0: 8645; PPC64LE-NEXT: .LBB510_1: 8646; PPC64LE-NEXT: lwarx 5, 0, 3 8647; PPC64LE-NEXT: cmpw 4, 5 8648; PPC64LE-NEXT: bge 0, .LBB510_3 8649; PPC64LE-NEXT: # %bb.2: 8650; PPC64LE-NEXT: stwcx. 4, 0, 3 8651; PPC64LE-NEXT: bne 0, .LBB510_1 8652; PPC64LE-NEXT: .LBB510_3: 8653; PPC64LE-NEXT: mr 3, 5 8654; PPC64LE-NEXT: blr 8655 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") monotonic 8656 ret i32 %ret 8657} 8658 8659define i32 @test511(i32* %ptr, i32 %val) { 8660; PPC64LE-LABEL: test511: 8661; PPC64LE: # %bb.0: 8662; PPC64LE-NEXT: mr 5, 3 8663; PPC64LE-NEXT: .LBB511_1: 8664; PPC64LE-NEXT: lwarx 3, 0, 5 8665; PPC64LE-NEXT: cmpw 4, 3 8666; PPC64LE-NEXT: bge 0, .LBB511_3 8667; PPC64LE-NEXT: # %bb.2: 8668; PPC64LE-NEXT: stwcx. 4, 0, 5 8669; PPC64LE-NEXT: bne 0, .LBB511_1 8670; PPC64LE-NEXT: .LBB511_3: 8671; PPC64LE-NEXT: lwsync 8672; PPC64LE-NEXT: blr 8673 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") acquire 8674 ret i32 %ret 8675} 8676 8677define i32 @test512(i32* %ptr, i32 %val) { 8678; PPC64LE-LABEL: test512: 8679; PPC64LE: # %bb.0: 8680; PPC64LE-NEXT: lwsync 8681; PPC64LE-NEXT: .LBB512_1: 8682; PPC64LE-NEXT: lwarx 5, 0, 3 8683; PPC64LE-NEXT: cmpw 4, 5 8684; PPC64LE-NEXT: bge 0, .LBB512_3 8685; PPC64LE-NEXT: # %bb.2: 8686; PPC64LE-NEXT: stwcx. 4, 0, 3 8687; PPC64LE-NEXT: bne 0, .LBB512_1 8688; PPC64LE-NEXT: .LBB512_3: 8689; PPC64LE-NEXT: mr 3, 5 8690; PPC64LE-NEXT: blr 8691 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") release 8692 ret i32 %ret 8693} 8694 8695define i32 @test513(i32* %ptr, i32 %val) { 8696; PPC64LE-LABEL: test513: 8697; PPC64LE: # %bb.0: 8698; PPC64LE-NEXT: lwsync 8699; PPC64LE-NEXT: .LBB513_1: 8700; PPC64LE-NEXT: lwarx 5, 0, 3 8701; PPC64LE-NEXT: cmpw 4, 5 8702; PPC64LE-NEXT: bge 0, .LBB513_3 8703; PPC64LE-NEXT: # %bb.2: 8704; PPC64LE-NEXT: stwcx. 4, 0, 3 8705; PPC64LE-NEXT: bne 0, .LBB513_1 8706; PPC64LE-NEXT: .LBB513_3: 8707; PPC64LE-NEXT: mr 3, 5 8708; PPC64LE-NEXT: lwsync 8709; PPC64LE-NEXT: blr 8710 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") acq_rel 8711 ret i32 %ret 8712} 8713 8714define i32 @test514(i32* %ptr, i32 %val) { 8715; PPC64LE-LABEL: test514: 8716; PPC64LE: # %bb.0: 8717; PPC64LE-NEXT: sync 8718; PPC64LE-NEXT: .LBB514_1: 8719; PPC64LE-NEXT: lwarx 5, 0, 3 8720; PPC64LE-NEXT: cmpw 4, 5 8721; PPC64LE-NEXT: bge 0, .LBB514_3 8722; PPC64LE-NEXT: # %bb.2: 8723; PPC64LE-NEXT: stwcx. 4, 0, 3 8724; PPC64LE-NEXT: bne 0, .LBB514_1 8725; PPC64LE-NEXT: .LBB514_3: 8726; PPC64LE-NEXT: mr 3, 5 8727; PPC64LE-NEXT: lwsync 8728; PPC64LE-NEXT: blr 8729 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8730 ret i32 %ret 8731} 8732 8733define i64 @test515(i64* %ptr, i64 %val) { 8734; PPC64LE-LABEL: test515: 8735; PPC64LE: # %bb.0: 8736; PPC64LE-NEXT: .LBB515_1: 8737; PPC64LE-NEXT: ldarx 5, 0, 3 8738; PPC64LE-NEXT: cmpd 4, 5 8739; PPC64LE-NEXT: bge 0, .LBB515_3 8740; PPC64LE-NEXT: # %bb.2: 8741; PPC64LE-NEXT: stdcx. 4, 0, 3 8742; PPC64LE-NEXT: bne 0, .LBB515_1 8743; PPC64LE-NEXT: .LBB515_3: 8744; PPC64LE-NEXT: mr 3, 5 8745; PPC64LE-NEXT: blr 8746 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") monotonic 8747 ret i64 %ret 8748} 8749 8750define i64 @test516(i64* %ptr, i64 %val) { 8751; PPC64LE-LABEL: test516: 8752; PPC64LE: # %bb.0: 8753; PPC64LE-NEXT: mr 5, 3 8754; PPC64LE-NEXT: .LBB516_1: 8755; PPC64LE-NEXT: ldarx 3, 0, 5 8756; PPC64LE-NEXT: cmpd 4, 3 8757; PPC64LE-NEXT: bge 0, .LBB516_3 8758; PPC64LE-NEXT: # %bb.2: 8759; PPC64LE-NEXT: stdcx. 4, 0, 5 8760; PPC64LE-NEXT: bne 0, .LBB516_1 8761; PPC64LE-NEXT: .LBB516_3: 8762; PPC64LE-NEXT: lwsync 8763; PPC64LE-NEXT: blr 8764 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") acquire 8765 ret i64 %ret 8766} 8767 8768define i64 @test517(i64* %ptr, i64 %val) { 8769; PPC64LE-LABEL: test517: 8770; PPC64LE: # %bb.0: 8771; PPC64LE-NEXT: lwsync 8772; PPC64LE-NEXT: .LBB517_1: 8773; PPC64LE-NEXT: ldarx 5, 0, 3 8774; PPC64LE-NEXT: cmpd 4, 5 8775; PPC64LE-NEXT: bge 0, .LBB517_3 8776; PPC64LE-NEXT: # %bb.2: 8777; PPC64LE-NEXT: stdcx. 4, 0, 3 8778; PPC64LE-NEXT: bne 0, .LBB517_1 8779; PPC64LE-NEXT: .LBB517_3: 8780; PPC64LE-NEXT: mr 3, 5 8781; PPC64LE-NEXT: blr 8782 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") release 8783 ret i64 %ret 8784} 8785 8786define i64 @test518(i64* %ptr, i64 %val) { 8787; PPC64LE-LABEL: test518: 8788; PPC64LE: # %bb.0: 8789; PPC64LE-NEXT: lwsync 8790; PPC64LE-NEXT: .LBB518_1: 8791; PPC64LE-NEXT: ldarx 5, 0, 3 8792; PPC64LE-NEXT: cmpd 4, 5 8793; PPC64LE-NEXT: bge 0, .LBB518_3 8794; PPC64LE-NEXT: # %bb.2: 8795; PPC64LE-NEXT: stdcx. 4, 0, 3 8796; PPC64LE-NEXT: bne 0, .LBB518_1 8797; PPC64LE-NEXT: .LBB518_3: 8798; PPC64LE-NEXT: mr 3, 5 8799; PPC64LE-NEXT: lwsync 8800; PPC64LE-NEXT: blr 8801 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8802 ret i64 %ret 8803} 8804 8805define i64 @test519(i64* %ptr, i64 %val) { 8806; PPC64LE-LABEL: test519: 8807; PPC64LE: # %bb.0: 8808; PPC64LE-NEXT: sync 8809; PPC64LE-NEXT: .LBB519_1: 8810; PPC64LE-NEXT: ldarx 5, 0, 3 8811; PPC64LE-NEXT: cmpd 4, 5 8812; PPC64LE-NEXT: bge 0, .LBB519_3 8813; PPC64LE-NEXT: # %bb.2: 8814; PPC64LE-NEXT: stdcx. 4, 0, 3 8815; PPC64LE-NEXT: bne 0, .LBB519_1 8816; PPC64LE-NEXT: .LBB519_3: 8817; PPC64LE-NEXT: mr 3, 5 8818; PPC64LE-NEXT: lwsync 8819; PPC64LE-NEXT: blr 8820 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8821 ret i64 %ret 8822} 8823 8824define i8 @test520(i8* %ptr, i8 %val) { 8825; PPC64LE-LABEL: test520: 8826; PPC64LE: # %bb.0: 8827; PPC64LE-NEXT: .LBB520_1: 8828; PPC64LE-NEXT: lbarx 5, 0, 3 8829; PPC64LE-NEXT: cmplw 4, 5 8830; PPC64LE-NEXT: ble 0, .LBB520_3 8831; PPC64LE-NEXT: # %bb.2: 8832; PPC64LE-NEXT: stbcx. 4, 0, 3 8833; PPC64LE-NEXT: bne 0, .LBB520_1 8834; PPC64LE-NEXT: .LBB520_3: 8835; PPC64LE-NEXT: mr 3, 5 8836; PPC64LE-NEXT: blr 8837 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") monotonic 8838 ret i8 %ret 8839} 8840 8841define i8 @test521(i8* %ptr, i8 %val) { 8842; PPC64LE-LABEL: test521: 8843; PPC64LE: # %bb.0: 8844; PPC64LE-NEXT: mr 5, 3 8845; PPC64LE-NEXT: .LBB521_1: 8846; PPC64LE-NEXT: lbarx 3, 0, 5 8847; PPC64LE-NEXT: cmplw 4, 3 8848; PPC64LE-NEXT: ble 0, .LBB521_3 8849; PPC64LE-NEXT: # %bb.2: 8850; PPC64LE-NEXT: stbcx. 4, 0, 5 8851; PPC64LE-NEXT: bne 0, .LBB521_1 8852; PPC64LE-NEXT: .LBB521_3: 8853; PPC64LE-NEXT: lwsync 8854; PPC64LE-NEXT: blr 8855 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") acquire 8856 ret i8 %ret 8857} 8858 8859define i8 @test522(i8* %ptr, i8 %val) { 8860; PPC64LE-LABEL: test522: 8861; PPC64LE: # %bb.0: 8862; PPC64LE-NEXT: lwsync 8863; PPC64LE-NEXT: .LBB522_1: 8864; PPC64LE-NEXT: lbarx 5, 0, 3 8865; PPC64LE-NEXT: cmplw 4, 5 8866; PPC64LE-NEXT: ble 0, .LBB522_3 8867; PPC64LE-NEXT: # %bb.2: 8868; PPC64LE-NEXT: stbcx. 4, 0, 3 8869; PPC64LE-NEXT: bne 0, .LBB522_1 8870; PPC64LE-NEXT: .LBB522_3: 8871; PPC64LE-NEXT: mr 3, 5 8872; PPC64LE-NEXT: blr 8873 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") release 8874 ret i8 %ret 8875} 8876 8877define i8 @test523(i8* %ptr, i8 %val) { 8878; PPC64LE-LABEL: test523: 8879; PPC64LE: # %bb.0: 8880; PPC64LE-NEXT: lwsync 8881; PPC64LE-NEXT: .LBB523_1: 8882; PPC64LE-NEXT: lbarx 5, 0, 3 8883; PPC64LE-NEXT: cmplw 4, 5 8884; PPC64LE-NEXT: ble 0, .LBB523_3 8885; PPC64LE-NEXT: # %bb.2: 8886; PPC64LE-NEXT: stbcx. 4, 0, 3 8887; PPC64LE-NEXT: bne 0, .LBB523_1 8888; PPC64LE-NEXT: .LBB523_3: 8889; PPC64LE-NEXT: mr 3, 5 8890; PPC64LE-NEXT: lwsync 8891; PPC64LE-NEXT: blr 8892 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8893 ret i8 %ret 8894} 8895 8896define i8 @test524(i8* %ptr, i8 %val) { 8897; PPC64LE-LABEL: test524: 8898; PPC64LE: # %bb.0: 8899; PPC64LE-NEXT: sync 8900; PPC64LE-NEXT: .LBB524_1: 8901; PPC64LE-NEXT: lbarx 5, 0, 3 8902; PPC64LE-NEXT: cmplw 4, 5 8903; PPC64LE-NEXT: ble 0, .LBB524_3 8904; PPC64LE-NEXT: # %bb.2: 8905; PPC64LE-NEXT: stbcx. 4, 0, 3 8906; PPC64LE-NEXT: bne 0, .LBB524_1 8907; PPC64LE-NEXT: .LBB524_3: 8908; PPC64LE-NEXT: mr 3, 5 8909; PPC64LE-NEXT: lwsync 8910; PPC64LE-NEXT: blr 8911 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8912 ret i8 %ret 8913} 8914 8915define i16 @test525(i16* %ptr, i16 %val) { 8916; PPC64LE-LABEL: test525: 8917; PPC64LE: # %bb.0: 8918; PPC64LE-NEXT: .LBB525_1: 8919; PPC64LE-NEXT: lharx 5, 0, 3 8920; PPC64LE-NEXT: cmplw 4, 5 8921; PPC64LE-NEXT: ble 0, .LBB525_3 8922; PPC64LE-NEXT: # %bb.2: 8923; PPC64LE-NEXT: sthcx. 4, 0, 3 8924; PPC64LE-NEXT: bne 0, .LBB525_1 8925; PPC64LE-NEXT: .LBB525_3: 8926; PPC64LE-NEXT: mr 3, 5 8927; PPC64LE-NEXT: blr 8928 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") monotonic 8929 ret i16 %ret 8930} 8931 8932define i16 @test526(i16* %ptr, i16 %val) { 8933; PPC64LE-LABEL: test526: 8934; PPC64LE: # %bb.0: 8935; PPC64LE-NEXT: mr 5, 3 8936; PPC64LE-NEXT: .LBB526_1: 8937; PPC64LE-NEXT: lharx 3, 0, 5 8938; PPC64LE-NEXT: cmplw 4, 3 8939; PPC64LE-NEXT: ble 0, .LBB526_3 8940; PPC64LE-NEXT: # %bb.2: 8941; PPC64LE-NEXT: sthcx. 4, 0, 5 8942; PPC64LE-NEXT: bne 0, .LBB526_1 8943; PPC64LE-NEXT: .LBB526_3: 8944; PPC64LE-NEXT: lwsync 8945; PPC64LE-NEXT: blr 8946 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") acquire 8947 ret i16 %ret 8948} 8949 8950define i16 @test527(i16* %ptr, i16 %val) { 8951; PPC64LE-LABEL: test527: 8952; PPC64LE: # %bb.0: 8953; PPC64LE-NEXT: lwsync 8954; PPC64LE-NEXT: .LBB527_1: 8955; PPC64LE-NEXT: lharx 5, 0, 3 8956; PPC64LE-NEXT: cmplw 4, 5 8957; PPC64LE-NEXT: ble 0, .LBB527_3 8958; PPC64LE-NEXT: # %bb.2: 8959; PPC64LE-NEXT: sthcx. 4, 0, 3 8960; PPC64LE-NEXT: bne 0, .LBB527_1 8961; PPC64LE-NEXT: .LBB527_3: 8962; PPC64LE-NEXT: mr 3, 5 8963; PPC64LE-NEXT: blr 8964 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") release 8965 ret i16 %ret 8966} 8967 8968define i16 @test528(i16* %ptr, i16 %val) { 8969; PPC64LE-LABEL: test528: 8970; PPC64LE: # %bb.0: 8971; PPC64LE-NEXT: lwsync 8972; PPC64LE-NEXT: .LBB528_1: 8973; PPC64LE-NEXT: lharx 5, 0, 3 8974; PPC64LE-NEXT: cmplw 4, 5 8975; PPC64LE-NEXT: ble 0, .LBB528_3 8976; PPC64LE-NEXT: # %bb.2: 8977; PPC64LE-NEXT: sthcx. 4, 0, 3 8978; PPC64LE-NEXT: bne 0, .LBB528_1 8979; PPC64LE-NEXT: .LBB528_3: 8980; PPC64LE-NEXT: mr 3, 5 8981; PPC64LE-NEXT: lwsync 8982; PPC64LE-NEXT: blr 8983 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") acq_rel 8984 ret i16 %ret 8985} 8986 8987define i16 @test529(i16* %ptr, i16 %val) { 8988; PPC64LE-LABEL: test529: 8989; PPC64LE: # %bb.0: 8990; PPC64LE-NEXT: sync 8991; PPC64LE-NEXT: .LBB529_1: 8992; PPC64LE-NEXT: lharx 5, 0, 3 8993; PPC64LE-NEXT: cmplw 4, 5 8994; PPC64LE-NEXT: ble 0, .LBB529_3 8995; PPC64LE-NEXT: # %bb.2: 8996; PPC64LE-NEXT: sthcx. 4, 0, 3 8997; PPC64LE-NEXT: bne 0, .LBB529_1 8998; PPC64LE-NEXT: .LBB529_3: 8999; PPC64LE-NEXT: mr 3, 5 9000; PPC64LE-NEXT: lwsync 9001; PPC64LE-NEXT: blr 9002 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") seq_cst 9003 ret i16 %ret 9004} 9005 9006define i32 @test530(i32* %ptr, i32 %val) { 9007; PPC64LE-LABEL: test530: 9008; PPC64LE: # %bb.0: 9009; PPC64LE-NEXT: .LBB530_1: 9010; PPC64LE-NEXT: lwarx 5, 0, 3 9011; PPC64LE-NEXT: cmplw 4, 5 9012; PPC64LE-NEXT: ble 0, .LBB530_3 9013; PPC64LE-NEXT: # %bb.2: 9014; PPC64LE-NEXT: stwcx. 4, 0, 3 9015; PPC64LE-NEXT: bne 0, .LBB530_1 9016; PPC64LE-NEXT: .LBB530_3: 9017; PPC64LE-NEXT: mr 3, 5 9018; PPC64LE-NEXT: blr 9019 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") monotonic 9020 ret i32 %ret 9021} 9022 9023define i32 @test531(i32* %ptr, i32 %val) { 9024; PPC64LE-LABEL: test531: 9025; PPC64LE: # %bb.0: 9026; PPC64LE-NEXT: mr 5, 3 9027; PPC64LE-NEXT: .LBB531_1: 9028; PPC64LE-NEXT: lwarx 3, 0, 5 9029; PPC64LE-NEXT: cmplw 4, 3 9030; PPC64LE-NEXT: ble 0, .LBB531_3 9031; PPC64LE-NEXT: # %bb.2: 9032; PPC64LE-NEXT: stwcx. 4, 0, 5 9033; PPC64LE-NEXT: bne 0, .LBB531_1 9034; PPC64LE-NEXT: .LBB531_3: 9035; PPC64LE-NEXT: lwsync 9036; PPC64LE-NEXT: blr 9037 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") acquire 9038 ret i32 %ret 9039} 9040 9041define i32 @test532(i32* %ptr, i32 %val) { 9042; PPC64LE-LABEL: test532: 9043; PPC64LE: # %bb.0: 9044; PPC64LE-NEXT: lwsync 9045; PPC64LE-NEXT: .LBB532_1: 9046; PPC64LE-NEXT: lwarx 5, 0, 3 9047; PPC64LE-NEXT: cmplw 4, 5 9048; PPC64LE-NEXT: ble 0, .LBB532_3 9049; PPC64LE-NEXT: # %bb.2: 9050; PPC64LE-NEXT: stwcx. 4, 0, 3 9051; PPC64LE-NEXT: bne 0, .LBB532_1 9052; PPC64LE-NEXT: .LBB532_3: 9053; PPC64LE-NEXT: mr 3, 5 9054; PPC64LE-NEXT: blr 9055 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") release 9056 ret i32 %ret 9057} 9058 9059define i32 @test533(i32* %ptr, i32 %val) { 9060; PPC64LE-LABEL: test533: 9061; PPC64LE: # %bb.0: 9062; PPC64LE-NEXT: lwsync 9063; PPC64LE-NEXT: .LBB533_1: 9064; PPC64LE-NEXT: lwarx 5, 0, 3 9065; PPC64LE-NEXT: cmplw 4, 5 9066; PPC64LE-NEXT: ble 0, .LBB533_3 9067; PPC64LE-NEXT: # %bb.2: 9068; PPC64LE-NEXT: stwcx. 4, 0, 3 9069; PPC64LE-NEXT: bne 0, .LBB533_1 9070; PPC64LE-NEXT: .LBB533_3: 9071; PPC64LE-NEXT: mr 3, 5 9072; PPC64LE-NEXT: lwsync 9073; PPC64LE-NEXT: blr 9074 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") acq_rel 9075 ret i32 %ret 9076} 9077 9078define i32 @test534(i32* %ptr, i32 %val) { 9079; PPC64LE-LABEL: test534: 9080; PPC64LE: # %bb.0: 9081; PPC64LE-NEXT: sync 9082; PPC64LE-NEXT: .LBB534_1: 9083; PPC64LE-NEXT: lwarx 5, 0, 3 9084; PPC64LE-NEXT: cmplw 4, 5 9085; PPC64LE-NEXT: ble 0, .LBB534_3 9086; PPC64LE-NEXT: # %bb.2: 9087; PPC64LE-NEXT: stwcx. 4, 0, 3 9088; PPC64LE-NEXT: bne 0, .LBB534_1 9089; PPC64LE-NEXT: .LBB534_3: 9090; PPC64LE-NEXT: mr 3, 5 9091; PPC64LE-NEXT: lwsync 9092; PPC64LE-NEXT: blr 9093 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") seq_cst 9094 ret i32 %ret 9095} 9096 9097define i64 @test535(i64* %ptr, i64 %val) { 9098; PPC64LE-LABEL: test535: 9099; PPC64LE: # %bb.0: 9100; PPC64LE-NEXT: .LBB535_1: 9101; PPC64LE-NEXT: ldarx 5, 0, 3 9102; PPC64LE-NEXT: cmpld 4, 5 9103; PPC64LE-NEXT: ble 0, .LBB535_3 9104; PPC64LE-NEXT: # %bb.2: 9105; PPC64LE-NEXT: stdcx. 4, 0, 3 9106; PPC64LE-NEXT: bne 0, .LBB535_1 9107; PPC64LE-NEXT: .LBB535_3: 9108; PPC64LE-NEXT: mr 3, 5 9109; PPC64LE-NEXT: blr 9110 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") monotonic 9111 ret i64 %ret 9112} 9113 9114define i64 @test536(i64* %ptr, i64 %val) { 9115; PPC64LE-LABEL: test536: 9116; PPC64LE: # %bb.0: 9117; PPC64LE-NEXT: mr 5, 3 9118; PPC64LE-NEXT: .LBB536_1: 9119; PPC64LE-NEXT: ldarx 3, 0, 5 9120; PPC64LE-NEXT: cmpld 4, 3 9121; PPC64LE-NEXT: ble 0, .LBB536_3 9122; PPC64LE-NEXT: # %bb.2: 9123; PPC64LE-NEXT: stdcx. 4, 0, 5 9124; PPC64LE-NEXT: bne 0, .LBB536_1 9125; PPC64LE-NEXT: .LBB536_3: 9126; PPC64LE-NEXT: lwsync 9127; PPC64LE-NEXT: blr 9128 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") acquire 9129 ret i64 %ret 9130} 9131 9132define i64 @test537(i64* %ptr, i64 %val) { 9133; PPC64LE-LABEL: test537: 9134; PPC64LE: # %bb.0: 9135; PPC64LE-NEXT: lwsync 9136; PPC64LE-NEXT: .LBB537_1: 9137; PPC64LE-NEXT: ldarx 5, 0, 3 9138; PPC64LE-NEXT: cmpld 4, 5 9139; PPC64LE-NEXT: ble 0, .LBB537_3 9140; PPC64LE-NEXT: # %bb.2: 9141; PPC64LE-NEXT: stdcx. 4, 0, 3 9142; PPC64LE-NEXT: bne 0, .LBB537_1 9143; PPC64LE-NEXT: .LBB537_3: 9144; PPC64LE-NEXT: mr 3, 5 9145; PPC64LE-NEXT: blr 9146 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") release 9147 ret i64 %ret 9148} 9149 9150define i64 @test538(i64* %ptr, i64 %val) { 9151; PPC64LE-LABEL: test538: 9152; PPC64LE: # %bb.0: 9153; PPC64LE-NEXT: lwsync 9154; PPC64LE-NEXT: .LBB538_1: 9155; PPC64LE-NEXT: ldarx 5, 0, 3 9156; PPC64LE-NEXT: cmpld 4, 5 9157; PPC64LE-NEXT: ble 0, .LBB538_3 9158; PPC64LE-NEXT: # %bb.2: 9159; PPC64LE-NEXT: stdcx. 4, 0, 3 9160; PPC64LE-NEXT: bne 0, .LBB538_1 9161; PPC64LE-NEXT: .LBB538_3: 9162; PPC64LE-NEXT: mr 3, 5 9163; PPC64LE-NEXT: lwsync 9164; PPC64LE-NEXT: blr 9165 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") acq_rel 9166 ret i64 %ret 9167} 9168 9169define i64 @test539(i64* %ptr, i64 %val) { 9170; PPC64LE-LABEL: test539: 9171; PPC64LE: # %bb.0: 9172; PPC64LE-NEXT: sync 9173; PPC64LE-NEXT: .LBB539_1: 9174; PPC64LE-NEXT: ldarx 5, 0, 3 9175; PPC64LE-NEXT: cmpld 4, 5 9176; PPC64LE-NEXT: ble 0, .LBB539_3 9177; PPC64LE-NEXT: # %bb.2: 9178; PPC64LE-NEXT: stdcx. 4, 0, 3 9179; PPC64LE-NEXT: bne 0, .LBB539_1 9180; PPC64LE-NEXT: .LBB539_3: 9181; PPC64LE-NEXT: mr 3, 5 9182; PPC64LE-NEXT: lwsync 9183; PPC64LE-NEXT: blr 9184 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") seq_cst 9185 ret i64 %ret 9186} 9187 9188define i8 @test540(i8* %ptr, i8 %val) { 9189; PPC64LE-LABEL: test540: 9190; PPC64LE: # %bb.0: 9191; PPC64LE-NEXT: .LBB540_1: 9192; PPC64LE-NEXT: lbarx 5, 0, 3 9193; PPC64LE-NEXT: cmplw 4, 5 9194; PPC64LE-NEXT: bge 0, .LBB540_3 9195; PPC64LE-NEXT: # %bb.2: 9196; PPC64LE-NEXT: stbcx. 4, 0, 3 9197; PPC64LE-NEXT: bne 0, .LBB540_1 9198; PPC64LE-NEXT: .LBB540_3: 9199; PPC64LE-NEXT: mr 3, 5 9200; PPC64LE-NEXT: blr 9201 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") monotonic 9202 ret i8 %ret 9203} 9204 9205define i8 @test541(i8* %ptr, i8 %val) { 9206; PPC64LE-LABEL: test541: 9207; PPC64LE: # %bb.0: 9208; PPC64LE-NEXT: mr 5, 3 9209; PPC64LE-NEXT: .LBB541_1: 9210; PPC64LE-NEXT: lbarx 3, 0, 5 9211; PPC64LE-NEXT: cmplw 4, 3 9212; PPC64LE-NEXT: bge 0, .LBB541_3 9213; PPC64LE-NEXT: # %bb.2: 9214; PPC64LE-NEXT: stbcx. 4, 0, 5 9215; PPC64LE-NEXT: bne 0, .LBB541_1 9216; PPC64LE-NEXT: .LBB541_3: 9217; PPC64LE-NEXT: lwsync 9218; PPC64LE-NEXT: blr 9219 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") acquire 9220 ret i8 %ret 9221} 9222 9223define i8 @test542(i8* %ptr, i8 %val) { 9224; PPC64LE-LABEL: test542: 9225; PPC64LE: # %bb.0: 9226; PPC64LE-NEXT: lwsync 9227; PPC64LE-NEXT: .LBB542_1: 9228; PPC64LE-NEXT: lbarx 5, 0, 3 9229; PPC64LE-NEXT: cmplw 4, 5 9230; PPC64LE-NEXT: bge 0, .LBB542_3 9231; PPC64LE-NEXT: # %bb.2: 9232; PPC64LE-NEXT: stbcx. 4, 0, 3 9233; PPC64LE-NEXT: bne 0, .LBB542_1 9234; PPC64LE-NEXT: .LBB542_3: 9235; PPC64LE-NEXT: mr 3, 5 9236; PPC64LE-NEXT: blr 9237 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") release 9238 ret i8 %ret 9239} 9240 9241define i8 @test543(i8* %ptr, i8 %val) { 9242; PPC64LE-LABEL: test543: 9243; PPC64LE: # %bb.0: 9244; PPC64LE-NEXT: lwsync 9245; PPC64LE-NEXT: .LBB543_1: 9246; PPC64LE-NEXT: lbarx 5, 0, 3 9247; PPC64LE-NEXT: cmplw 4, 5 9248; PPC64LE-NEXT: bge 0, .LBB543_3 9249; PPC64LE-NEXT: # %bb.2: 9250; PPC64LE-NEXT: stbcx. 4, 0, 3 9251; PPC64LE-NEXT: bne 0, .LBB543_1 9252; PPC64LE-NEXT: .LBB543_3: 9253; PPC64LE-NEXT: mr 3, 5 9254; PPC64LE-NEXT: lwsync 9255; PPC64LE-NEXT: blr 9256 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") acq_rel 9257 ret i8 %ret 9258} 9259 9260define i8 @test544(i8* %ptr, i8 %val) { 9261; PPC64LE-LABEL: test544: 9262; PPC64LE: # %bb.0: 9263; PPC64LE-NEXT: sync 9264; PPC64LE-NEXT: .LBB544_1: 9265; PPC64LE-NEXT: lbarx 5, 0, 3 9266; PPC64LE-NEXT: cmplw 4, 5 9267; PPC64LE-NEXT: bge 0, .LBB544_3 9268; PPC64LE-NEXT: # %bb.2: 9269; PPC64LE-NEXT: stbcx. 4, 0, 3 9270; PPC64LE-NEXT: bne 0, .LBB544_1 9271; PPC64LE-NEXT: .LBB544_3: 9272; PPC64LE-NEXT: mr 3, 5 9273; PPC64LE-NEXT: lwsync 9274; PPC64LE-NEXT: blr 9275 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") seq_cst 9276 ret i8 %ret 9277} 9278 9279define i16 @test545(i16* %ptr, i16 %val) { 9280; PPC64LE-LABEL: test545: 9281; PPC64LE: # %bb.0: 9282; PPC64LE-NEXT: .LBB545_1: 9283; PPC64LE-NEXT: lharx 5, 0, 3 9284; PPC64LE-NEXT: cmplw 4, 5 9285; PPC64LE-NEXT: bge 0, .LBB545_3 9286; PPC64LE-NEXT: # %bb.2: 9287; PPC64LE-NEXT: sthcx. 4, 0, 3 9288; PPC64LE-NEXT: bne 0, .LBB545_1 9289; PPC64LE-NEXT: .LBB545_3: 9290; PPC64LE-NEXT: mr 3, 5 9291; PPC64LE-NEXT: blr 9292 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") monotonic 9293 ret i16 %ret 9294} 9295 9296define i16 @test546(i16* %ptr, i16 %val) { 9297; PPC64LE-LABEL: test546: 9298; PPC64LE: # %bb.0: 9299; PPC64LE-NEXT: mr 5, 3 9300; PPC64LE-NEXT: .LBB546_1: 9301; PPC64LE-NEXT: lharx 3, 0, 5 9302; PPC64LE-NEXT: cmplw 4, 3 9303; PPC64LE-NEXT: bge 0, .LBB546_3 9304; PPC64LE-NEXT: # %bb.2: 9305; PPC64LE-NEXT: sthcx. 4, 0, 5 9306; PPC64LE-NEXT: bne 0, .LBB546_1 9307; PPC64LE-NEXT: .LBB546_3: 9308; PPC64LE-NEXT: lwsync 9309; PPC64LE-NEXT: blr 9310 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") acquire 9311 ret i16 %ret 9312} 9313 9314define i16 @test547(i16* %ptr, i16 %val) { 9315; PPC64LE-LABEL: test547: 9316; PPC64LE: # %bb.0: 9317; PPC64LE-NEXT: lwsync 9318; PPC64LE-NEXT: .LBB547_1: 9319; PPC64LE-NEXT: lharx 5, 0, 3 9320; PPC64LE-NEXT: cmplw 4, 5 9321; PPC64LE-NEXT: bge 0, .LBB547_3 9322; PPC64LE-NEXT: # %bb.2: 9323; PPC64LE-NEXT: sthcx. 4, 0, 3 9324; PPC64LE-NEXT: bne 0, .LBB547_1 9325; PPC64LE-NEXT: .LBB547_3: 9326; PPC64LE-NEXT: mr 3, 5 9327; PPC64LE-NEXT: blr 9328 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") release 9329 ret i16 %ret 9330} 9331 9332define i16 @test548(i16* %ptr, i16 %val) { 9333; PPC64LE-LABEL: test548: 9334; PPC64LE: # %bb.0: 9335; PPC64LE-NEXT: lwsync 9336; PPC64LE-NEXT: .LBB548_1: 9337; PPC64LE-NEXT: lharx 5, 0, 3 9338; PPC64LE-NEXT: cmplw 4, 5 9339; PPC64LE-NEXT: bge 0, .LBB548_3 9340; PPC64LE-NEXT: # %bb.2: 9341; PPC64LE-NEXT: sthcx. 4, 0, 3 9342; PPC64LE-NEXT: bne 0, .LBB548_1 9343; PPC64LE-NEXT: .LBB548_3: 9344; PPC64LE-NEXT: mr 3, 5 9345; PPC64LE-NEXT: lwsync 9346; PPC64LE-NEXT: blr 9347 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") acq_rel 9348 ret i16 %ret 9349} 9350 9351define i16 @test549(i16* %ptr, i16 %val) { 9352; PPC64LE-LABEL: test549: 9353; PPC64LE: # %bb.0: 9354; PPC64LE-NEXT: sync 9355; PPC64LE-NEXT: .LBB549_1: 9356; PPC64LE-NEXT: lharx 5, 0, 3 9357; PPC64LE-NEXT: cmplw 4, 5 9358; PPC64LE-NEXT: bge 0, .LBB549_3 9359; PPC64LE-NEXT: # %bb.2: 9360; PPC64LE-NEXT: sthcx. 4, 0, 3 9361; PPC64LE-NEXT: bne 0, .LBB549_1 9362; PPC64LE-NEXT: .LBB549_3: 9363; PPC64LE-NEXT: mr 3, 5 9364; PPC64LE-NEXT: lwsync 9365; PPC64LE-NEXT: blr 9366 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") seq_cst 9367 ret i16 %ret 9368} 9369 9370define i32 @test550(i32* %ptr, i32 %val) { 9371; PPC64LE-LABEL: test550: 9372; PPC64LE: # %bb.0: 9373; PPC64LE-NEXT: .LBB550_1: 9374; PPC64LE-NEXT: lwarx 5, 0, 3 9375; PPC64LE-NEXT: cmplw 4, 5 9376; PPC64LE-NEXT: bge 0, .LBB550_3 9377; PPC64LE-NEXT: # %bb.2: 9378; PPC64LE-NEXT: stwcx. 4, 0, 3 9379; PPC64LE-NEXT: bne 0, .LBB550_1 9380; PPC64LE-NEXT: .LBB550_3: 9381; PPC64LE-NEXT: mr 3, 5 9382; PPC64LE-NEXT: blr 9383 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") monotonic 9384 ret i32 %ret 9385} 9386 9387define i32 @test551(i32* %ptr, i32 %val) { 9388; PPC64LE-LABEL: test551: 9389; PPC64LE: # %bb.0: 9390; PPC64LE-NEXT: mr 5, 3 9391; PPC64LE-NEXT: .LBB551_1: 9392; PPC64LE-NEXT: lwarx 3, 0, 5 9393; PPC64LE-NEXT: cmplw 4, 3 9394; PPC64LE-NEXT: bge 0, .LBB551_3 9395; PPC64LE-NEXT: # %bb.2: 9396; PPC64LE-NEXT: stwcx. 4, 0, 5 9397; PPC64LE-NEXT: bne 0, .LBB551_1 9398; PPC64LE-NEXT: .LBB551_3: 9399; PPC64LE-NEXT: lwsync 9400; PPC64LE-NEXT: blr 9401 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") acquire 9402 ret i32 %ret 9403} 9404 9405define i32 @test552(i32* %ptr, i32 %val) { 9406; PPC64LE-LABEL: test552: 9407; PPC64LE: # %bb.0: 9408; PPC64LE-NEXT: lwsync 9409; PPC64LE-NEXT: .LBB552_1: 9410; PPC64LE-NEXT: lwarx 5, 0, 3 9411; PPC64LE-NEXT: cmplw 4, 5 9412; PPC64LE-NEXT: bge 0, .LBB552_3 9413; PPC64LE-NEXT: # %bb.2: 9414; PPC64LE-NEXT: stwcx. 4, 0, 3 9415; PPC64LE-NEXT: bne 0, .LBB552_1 9416; PPC64LE-NEXT: .LBB552_3: 9417; PPC64LE-NEXT: mr 3, 5 9418; PPC64LE-NEXT: blr 9419 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") release 9420 ret i32 %ret 9421} 9422 9423define i32 @test553(i32* %ptr, i32 %val) { 9424; PPC64LE-LABEL: test553: 9425; PPC64LE: # %bb.0: 9426; PPC64LE-NEXT: lwsync 9427; PPC64LE-NEXT: .LBB553_1: 9428; PPC64LE-NEXT: lwarx 5, 0, 3 9429; PPC64LE-NEXT: cmplw 4, 5 9430; PPC64LE-NEXT: bge 0, .LBB553_3 9431; PPC64LE-NEXT: # %bb.2: 9432; PPC64LE-NEXT: stwcx. 4, 0, 3 9433; PPC64LE-NEXT: bne 0, .LBB553_1 9434; PPC64LE-NEXT: .LBB553_3: 9435; PPC64LE-NEXT: mr 3, 5 9436; PPC64LE-NEXT: lwsync 9437; PPC64LE-NEXT: blr 9438 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") acq_rel 9439 ret i32 %ret 9440} 9441 9442define i32 @test554(i32* %ptr, i32 %val) { 9443; PPC64LE-LABEL: test554: 9444; PPC64LE: # %bb.0: 9445; PPC64LE-NEXT: sync 9446; PPC64LE-NEXT: .LBB554_1: 9447; PPC64LE-NEXT: lwarx 5, 0, 3 9448; PPC64LE-NEXT: cmplw 4, 5 9449; PPC64LE-NEXT: bge 0, .LBB554_3 9450; PPC64LE-NEXT: # %bb.2: 9451; PPC64LE-NEXT: stwcx. 4, 0, 3 9452; PPC64LE-NEXT: bne 0, .LBB554_1 9453; PPC64LE-NEXT: .LBB554_3: 9454; PPC64LE-NEXT: mr 3, 5 9455; PPC64LE-NEXT: lwsync 9456; PPC64LE-NEXT: blr 9457 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") seq_cst 9458 ret i32 %ret 9459} 9460 9461define i64 @test555(i64* %ptr, i64 %val) { 9462; PPC64LE-LABEL: test555: 9463; PPC64LE: # %bb.0: 9464; PPC64LE-NEXT: .LBB555_1: 9465; PPC64LE-NEXT: ldarx 5, 0, 3 9466; PPC64LE-NEXT: cmpld 4, 5 9467; PPC64LE-NEXT: bge 0, .LBB555_3 9468; PPC64LE-NEXT: # %bb.2: 9469; PPC64LE-NEXT: stdcx. 4, 0, 3 9470; PPC64LE-NEXT: bne 0, .LBB555_1 9471; PPC64LE-NEXT: .LBB555_3: 9472; PPC64LE-NEXT: mr 3, 5 9473; PPC64LE-NEXT: blr 9474 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") monotonic 9475 ret i64 %ret 9476} 9477 9478define i64 @test556(i64* %ptr, i64 %val) { 9479; PPC64LE-LABEL: test556: 9480; PPC64LE: # %bb.0: 9481; PPC64LE-NEXT: mr 5, 3 9482; PPC64LE-NEXT: .LBB556_1: 9483; PPC64LE-NEXT: ldarx 3, 0, 5 9484; PPC64LE-NEXT: cmpld 4, 3 9485; PPC64LE-NEXT: bge 0, .LBB556_3 9486; PPC64LE-NEXT: # %bb.2: 9487; PPC64LE-NEXT: stdcx. 4, 0, 5 9488; PPC64LE-NEXT: bne 0, .LBB556_1 9489; PPC64LE-NEXT: .LBB556_3: 9490; PPC64LE-NEXT: lwsync 9491; PPC64LE-NEXT: blr 9492 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") acquire 9493 ret i64 %ret 9494} 9495 9496define i64 @test557(i64* %ptr, i64 %val) { 9497; PPC64LE-LABEL: test557: 9498; PPC64LE: # %bb.0: 9499; PPC64LE-NEXT: lwsync 9500; PPC64LE-NEXT: .LBB557_1: 9501; PPC64LE-NEXT: ldarx 5, 0, 3 9502; PPC64LE-NEXT: cmpld 4, 5 9503; PPC64LE-NEXT: bge 0, .LBB557_3 9504; PPC64LE-NEXT: # %bb.2: 9505; PPC64LE-NEXT: stdcx. 4, 0, 3 9506; PPC64LE-NEXT: bne 0, .LBB557_1 9507; PPC64LE-NEXT: .LBB557_3: 9508; PPC64LE-NEXT: mr 3, 5 9509; PPC64LE-NEXT: blr 9510 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") release 9511 ret i64 %ret 9512} 9513 9514define i64 @test558(i64* %ptr, i64 %val) { 9515; PPC64LE-LABEL: test558: 9516; PPC64LE: # %bb.0: 9517; PPC64LE-NEXT: lwsync 9518; PPC64LE-NEXT: .LBB558_1: 9519; PPC64LE-NEXT: ldarx 5, 0, 3 9520; PPC64LE-NEXT: cmpld 4, 5 9521; PPC64LE-NEXT: bge 0, .LBB558_3 9522; PPC64LE-NEXT: # %bb.2: 9523; PPC64LE-NEXT: stdcx. 4, 0, 3 9524; PPC64LE-NEXT: bne 0, .LBB558_1 9525; PPC64LE-NEXT: .LBB558_3: 9526; PPC64LE-NEXT: mr 3, 5 9527; PPC64LE-NEXT: lwsync 9528; PPC64LE-NEXT: blr 9529 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") acq_rel 9530 ret i64 %ret 9531} 9532 9533define i64 @test559(i64* %ptr, i64 %val) { 9534; PPC64LE-LABEL: test559: 9535; PPC64LE: # %bb.0: 9536; PPC64LE-NEXT: sync 9537; PPC64LE-NEXT: .LBB559_1: 9538; PPC64LE-NEXT: ldarx 5, 0, 3 9539; PPC64LE-NEXT: cmpld 4, 5 9540; PPC64LE-NEXT: bge 0, .LBB559_3 9541; PPC64LE-NEXT: # %bb.2: 9542; PPC64LE-NEXT: stdcx. 4, 0, 3 9543; PPC64LE-NEXT: bne 0, .LBB559_1 9544; PPC64LE-NEXT: .LBB559_3: 9545; PPC64LE-NEXT: mr 3, 5 9546; PPC64LE-NEXT: lwsync 9547; PPC64LE-NEXT: blr 9548 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") seq_cst 9549 ret i64 %ret 9550} 9551 9552; The second load should never be scheduled before isync. 9553define i32 @test_ordering0(i32* %ptr1, i32* %ptr2) { 9554; PPC64LE-LABEL: test_ordering0: 9555; PPC64LE: # %bb.0: 9556; PPC64LE-NEXT: lwz 4, 0(3) 9557; PPC64LE-NEXT: cmpd 7, 4, 4 9558; PPC64LE-NEXT: bne- 7, .+4 9559; PPC64LE-NEXT: isync 9560; PPC64LE-NEXT: lwz 3, 0(3) 9561; PPC64LE-NEXT: add 3, 4, 3 9562; PPC64LE-NEXT: blr 9563 %val1 = load atomic i32, i32* %ptr1 acquire, align 4 9564 %val2 = load i32, i32* %ptr1 9565 %add = add i32 %val1, %val2 9566 ret i32 %add 9567} 9568 9569; The second store should never be scheduled before isync. 9570define i32 @test_ordering1(i32* %ptr1, i32 %val1, i32* %ptr2) { 9571; PPC64LE-LABEL: test_ordering1: 9572; PPC64LE: # %bb.0: 9573; PPC64LE-NEXT: lwz 3, 0(3) 9574; PPC64LE-NEXT: cmpd 7, 3, 3 9575; PPC64LE-NEXT: bne- 7, .+4 9576; PPC64LE-NEXT: isync 9577; PPC64LE-NEXT: stw 4, 0(5) 9578; PPC64LE-NEXT: blr 9579 %val2 = load atomic i32, i32* %ptr1 acquire, align 4 9580 store i32 %val1, i32* %ptr2 9581 ret i32 %val2 9582} 9583