1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-unknown-linux-gnu \ 3; RUN: -mattr=+spe | FileCheck %s 4 5declare float @llvm.fabs.float(float) 6define float @test_float_abs(float %a) #0 { 7; CHECK-LABEL: test_float_abs: 8; CHECK: # %bb.0: # %entry 9; CHECK-NEXT: efsabs 3, 3 10; CHECK-NEXT: blr 11 entry: 12 %0 = tail call float @llvm.fabs.float(float %a) 13 ret float %0 14} 15 16define float @test_fnabs(float %a) #0 { 17; CHECK-LABEL: test_fnabs: 18; CHECK: # %bb.0: # %entry 19; CHECK-NEXT: efsnabs 3, 3 20; CHECK-NEXT: blr 21 entry: 22 %0 = tail call float @llvm.fabs.float(float %a) 23 %sub = fsub float -0.000000e+00, %0 24 ret float %sub 25} 26 27define float @test_fdiv(float %a, float %b) { 28; CHECK-LABEL: test_fdiv: 29; CHECK: # %bb.0: # %entry 30; CHECK-NEXT: efsdiv 3, 3, 4 31; CHECK-NEXT: blr 32entry: 33 %v = fdiv float %a, %b 34 ret float %v 35 36} 37 38define float @test_fmul(float %a, float %b) { 39; CHECK-LABEL: test_fmul: 40; CHECK: # %bb.0: # %entry 41; CHECK-NEXT: efsmul 3, 3, 4 42; CHECK-NEXT: blr 43 entry: 44 %v = fmul float %a, %b 45 ret float %v 46; CHECK-LABEL @test_fmul 47} 48 49define float @test_fadd(float %a, float %b) { 50; CHECK-LABEL: test_fadd: 51; CHECK: # %bb.0: # %entry 52; CHECK-NEXT: efsadd 3, 3, 4 53; CHECK-NEXT: blr 54 entry: 55 %v = fadd float %a, %b 56 ret float %v 57; CHECK-LABEL @test_fadd 58} 59 60define float @test_fsub(float %a, float %b) { 61; CHECK-LABEL: test_fsub: 62; CHECK: # %bb.0: # %entry 63; CHECK-NEXT: efssub 3, 3, 4 64; CHECK-NEXT: blr 65 entry: 66 %v = fsub float %a, %b 67 ret float %v 68; CHECK-LABEL @test_fsub 69} 70 71define float @test_fneg(float %a) { 72; CHECK-LABEL: test_fneg: 73; CHECK: # %bb.0: # %entry 74; CHECK-NEXT: efsneg 3, 3 75; CHECK-NEXT: blr 76 entry: 77 %v = fsub float -0.0, %a 78 ret float %v 79 80; CHECK-LABEL @test_fneg 81} 82 83define float @test_dtos(double %a) { 84; CHECK-LABEL: test_dtos: 85; CHECK: # %bb.0: # %entry 86; CHECK-NEXT: evmergelo 3, 3, 4 87; CHECK-NEXT: efscfd 3, 3 88; CHECK-NEXT: blr 89 entry: 90 %v = fptrunc double %a to float 91 ret float %v 92} 93 94define i32 @test_fcmpgt(float %a, float %b) { 95; CHECK-LABEL: test_fcmpgt: 96; CHECK: # %bb.0: # %entry 97; CHECK-NEXT: stwu 1, -16(1) 98; CHECK-NEXT: .cfi_def_cfa_offset 16 99; CHECK-NEXT: efscmpgt 0, 3, 4 100; CHECK-NEXT: ble 0, .LBB8_2 101; CHECK-NEXT: # %bb.1: # %tr 102; CHECK-NEXT: li 3, 1 103; CHECK-NEXT: b .LBB8_3 104; CHECK-NEXT: .LBB8_2: # %fa 105; CHECK-NEXT: li 3, 0 106; CHECK-NEXT: .LBB8_3: # %ret 107; CHECK-NEXT: stw 3, 12(1) 108; CHECK-NEXT: lwz 3, 12(1) 109; CHECK-NEXT: addi 1, 1, 16 110; CHECK-NEXT: blr 111 entry: 112 %r = alloca i32, align 4 113 %c = fcmp ogt float %a, %b 114 br i1 %c, label %tr, label %fa 115tr: 116 store i32 1, i32* %r, align 4 117 br label %ret 118fa: 119 store i32 0, i32* %r, align 4 120 br label %ret 121ret: 122 %0 = load i32, i32* %r, align 4 123 ret i32 %0 124} 125 126define i32 @test_fcmpugt(float %a, float %b) { 127; CHECK-LABEL: test_fcmpugt: 128; CHECK: # %bb.0: # %entry 129; CHECK-NEXT: stwu 1, -16(1) 130; CHECK-NEXT: .cfi_def_cfa_offset 16 131; CHECK-NEXT: efscmpeq 0, 4, 4 132; CHECK-NEXT: bc 4, 1, .LBB9_4 133; CHECK-NEXT: # %bb.1: # %entry 134; CHECK-NEXT: efscmpeq 0, 3, 3 135; CHECK-NEXT: bc 4, 1, .LBB9_4 136; CHECK-NEXT: # %bb.2: # %entry 137; CHECK-NEXT: efscmpgt 0, 3, 4 138; CHECK-NEXT: bc 12, 1, .LBB9_4 139; CHECK-NEXT: # %bb.3: # %fa 140; CHECK-NEXT: li 3, 0 141; CHECK-NEXT: b .LBB9_5 142; CHECK-NEXT: .LBB9_4: # %tr 143; CHECK-NEXT: li 3, 1 144; CHECK-NEXT: .LBB9_5: # %ret 145; CHECK-NEXT: stw 3, 12(1) 146; CHECK-NEXT: lwz 3, 12(1) 147; CHECK-NEXT: addi 1, 1, 16 148; CHECK-NEXT: blr 149 entry: 150 %r = alloca i32, align 4 151 %c = fcmp ugt float %a, %b 152 br i1 %c, label %tr, label %fa 153tr: 154 store i32 1, i32* %r, align 4 155 br label %ret 156fa: 157 store i32 0, i32* %r, align 4 158 br label %ret 159ret: 160 %0 = load i32, i32* %r, align 4 161 ret i32 %0 162} 163 164define i32 @test_fcmple(float %a, float %b) { 165; CHECK-LABEL: test_fcmple: 166; CHECK: # %bb.0: # %entry 167; CHECK-NEXT: stwu 1, -16(1) 168; CHECK-NEXT: .cfi_def_cfa_offset 16 169; CHECK-NEXT: efscmpeq 0, 3, 3 170; CHECK-NEXT: bc 4, 1, .LBB10_4 171; CHECK-NEXT: # %bb.1: # %entry 172; CHECK-NEXT: efscmpeq 0, 4, 4 173; CHECK-NEXT: bc 4, 1, .LBB10_4 174; CHECK-NEXT: # %bb.2: # %entry 175; CHECK-NEXT: efscmpgt 0, 3, 4 176; CHECK-NEXT: bc 12, 1, .LBB10_4 177; CHECK-NEXT: # %bb.3: # %tr 178; CHECK-NEXT: li 3, 1 179; CHECK-NEXT: b .LBB10_5 180; CHECK-NEXT: .LBB10_4: # %fa 181; CHECK-NEXT: li 3, 0 182; CHECK-NEXT: .LBB10_5: # %ret 183; CHECK-NEXT: stw 3, 12(1) 184; CHECK-NEXT: lwz 3, 12(1) 185; CHECK-NEXT: addi 1, 1, 16 186; CHECK-NEXT: blr 187 entry: 188 %r = alloca i32, align 4 189 %c = fcmp ole float %a, %b 190 br i1 %c, label %tr, label %fa 191tr: 192 store i32 1, i32* %r, align 4 193 br label %ret 194fa: 195 store i32 0, i32* %r, align 4 196 br label %ret 197ret: 198 %0 = load i32, i32* %r, align 4 199 ret i32 %0 200} 201 202define i32 @test_fcmpule(float %a, float %b) { 203; CHECK-LABEL: test_fcmpule: 204; CHECK: # %bb.0: # %entry 205; CHECK-NEXT: stwu 1, -16(1) 206; CHECK-NEXT: .cfi_def_cfa_offset 16 207; CHECK-NEXT: efscmpgt 0, 3, 4 208; CHECK-NEXT: bgt 0, .LBB11_2 209; CHECK-NEXT: # %bb.1: # %tr 210; CHECK-NEXT: li 3, 1 211; CHECK-NEXT: b .LBB11_3 212; CHECK-NEXT: .LBB11_2: # %fa 213; CHECK-NEXT: li 3, 0 214; CHECK-NEXT: .LBB11_3: # %ret 215; CHECK-NEXT: stw 3, 12(1) 216; CHECK-NEXT: lwz 3, 12(1) 217; CHECK-NEXT: addi 1, 1, 16 218; CHECK-NEXT: blr 219 entry: 220 %r = alloca i32, align 4 221 %c = fcmp ule float %a, %b 222 br i1 %c, label %tr, label %fa 223tr: 224 store i32 1, i32* %r, align 4 225 br label %ret 226fa: 227 store i32 0, i32* %r, align 4 228 br label %ret 229ret: 230 %0 = load i32, i32* %r, align 4 231 ret i32 %0 232} 233 234; The type of comparison found in C's if (x == y) 235define i32 @test_fcmpeq(float %a, float %b) { 236; CHECK-LABEL: test_fcmpeq: 237; CHECK: # %bb.0: # %entry 238; CHECK-NEXT: stwu 1, -16(1) 239; CHECK-NEXT: .cfi_def_cfa_offset 16 240; CHECK-NEXT: efscmpeq 0, 3, 4 241; CHECK-NEXT: ble 0, .LBB12_2 242; CHECK-NEXT: # %bb.1: # %tr 243; CHECK-NEXT: li 3, 1 244; CHECK-NEXT: b .LBB12_3 245; CHECK-NEXT: .LBB12_2: # %fa 246; CHECK-NEXT: li 3, 0 247; CHECK-NEXT: .LBB12_3: # %ret 248; CHECK-NEXT: stw 3, 12(1) 249; CHECK-NEXT: lwz 3, 12(1) 250; CHECK-NEXT: addi 1, 1, 16 251; CHECK-NEXT: blr 252 entry: 253 %r = alloca i32, align 4 254 %c = fcmp oeq float %a, %b 255 br i1 %c, label %tr, label %fa 256tr: 257 store i32 1, i32* %r, align 4 258 br label %ret 259fa: 260 store i32 0, i32* %r, align 4 261 br label %ret 262ret: 263 %0 = load i32, i32* %r, align 4 264 ret i32 %0 265} 266 267; (un)ordered tests are expanded to une and oeq so verify 268define i1 @test_fcmpuno(float %a, float %b) { 269; CHECK-LABEL: test_fcmpuno: 270; CHECK: # %bb.0: # %entry 271; CHECK-NEXT: efscmpeq 0, 3, 3 272; CHECK-NEXT: efscmpeq 1, 4, 4 273; CHECK-NEXT: li 5, 1 274; CHECK-NEXT: crand 20, 5, 1 275; CHECK-NEXT: bc 12, 20, .LBB13_2 276; CHECK-NEXT: # %bb.1: # %entry 277; CHECK-NEXT: ori 3, 5, 0 278; CHECK-NEXT: blr 279; CHECK-NEXT: .LBB13_2: # %entry 280; CHECK-NEXT: addi 3, 0, 0 281; CHECK-NEXT: blr 282 entry: 283 %r = fcmp uno float %a, %b 284 ret i1 %r 285} 286 287define i1 @test_fcmpord(float %a, float %b) { 288; CHECK-LABEL: test_fcmpord: 289; CHECK: # %bb.0: # %entry 290; CHECK-NEXT: efscmpeq 0, 4, 4 291; CHECK-NEXT: efscmpeq 1, 3, 3 292; CHECK-NEXT: li 5, 1 293; CHECK-NEXT: crnand 20, 5, 1 294; CHECK-NEXT: bc 12, 20, .LBB14_2 295; CHECK-NEXT: # %bb.1: # %entry 296; CHECK-NEXT: ori 3, 5, 0 297; CHECK-NEXT: blr 298; CHECK-NEXT: .LBB14_2: # %entry 299; CHECK-NEXT: addi 3, 0, 0 300; CHECK-NEXT: blr 301 entry: 302 %r = fcmp ord float %a, %b 303 ret i1 %r 304} 305 306define i1 @test_fcmpueq(float %a, float %b) { 307; CHECK-LABEL: test_fcmpueq: 308; CHECK: # %bb.0: # %entry 309; CHECK-NEXT: efscmpeq 0, 3, 3 310; CHECK-NEXT: efscmpeq 1, 4, 4 311; CHECK-NEXT: crnand 20, 5, 1 312; CHECK-NEXT: efscmpeq 0, 3, 4 313; CHECK-NEXT: li 5, 1 314; CHECK-NEXT: crnor 20, 1, 20 315; CHECK-NEXT: bc 12, 20, .LBB15_2 316; CHECK-NEXT: # %bb.1: # %entry 317; CHECK-NEXT: ori 3, 5, 0 318; CHECK-NEXT: blr 319; CHECK-NEXT: .LBB15_2: # %entry 320; CHECK-NEXT: addi 3, 0, 0 321; CHECK-NEXT: blr 322 entry: 323 %r = fcmp ueq float %a, %b 324 ret i1 %r 325} 326 327define i1 @test_fcmpne(float %a, float %b) { 328; CHECK-LABEL: test_fcmpne: 329; CHECK: # %bb.0: # %entry 330; CHECK-NEXT: efscmpeq 0, 4, 4 331; CHECK-NEXT: efscmpeq 1, 3, 3 332; CHECK-NEXT: crand 20, 5, 1 333; CHECK-NEXT: efscmpeq 0, 3, 4 334; CHECK-NEXT: li 5, 1 335; CHECK-NEXT: crorc 20, 1, 20 336; CHECK-NEXT: bc 12, 20, .LBB16_2 337; CHECK-NEXT: # %bb.1: # %entry 338; CHECK-NEXT: ori 3, 5, 0 339; CHECK-NEXT: blr 340; CHECK-NEXT: .LBB16_2: # %entry 341; CHECK-NEXT: addi 3, 0, 0 342; CHECK-NEXT: blr 343 entry: 344 %r = fcmp one float %a, %b 345 ret i1 %r 346} 347 348define i32 @test_fcmpune(float %a, float %b) { 349; CHECK-LABEL: test_fcmpune: 350; CHECK: # %bb.0: # %entry 351; CHECK-NEXT: stwu 1, -16(1) 352; CHECK-NEXT: .cfi_def_cfa_offset 16 353; CHECK-NEXT: efscmpeq 0, 3, 4 354; CHECK-NEXT: bgt 0, .LBB17_2 355; CHECK-NEXT: # %bb.1: # %tr 356; CHECK-NEXT: li 3, 1 357; CHECK-NEXT: b .LBB17_3 358; CHECK-NEXT: .LBB17_2: # %fa 359; CHECK-NEXT: li 3, 0 360; CHECK-NEXT: .LBB17_3: # %ret 361; CHECK-NEXT: stw 3, 12(1) 362; CHECK-NEXT: lwz 3, 12(1) 363; CHECK-NEXT: addi 1, 1, 16 364; CHECK-NEXT: blr 365 entry: 366 %r = alloca i32, align 4 367 %c = fcmp une float %a, %b 368 br i1 %c, label %tr, label %fa 369tr: 370 store i32 1, i32* %r, align 4 371 br label %ret 372fa: 373 store i32 0, i32* %r, align 4 374 br label %ret 375ret: 376 %0 = load i32, i32* %r, align 4 377 ret i32 %0 378} 379 380define i32 @test_fcmplt(float %a, float %b) { 381; CHECK-LABEL: test_fcmplt: 382; CHECK: # %bb.0: # %entry 383; CHECK-NEXT: stwu 1, -16(1) 384; CHECK-NEXT: .cfi_def_cfa_offset 16 385; CHECK-NEXT: efscmplt 0, 3, 4 386; CHECK-NEXT: ble 0, .LBB18_2 387; CHECK-NEXT: # %bb.1: # %tr 388; CHECK-NEXT: li 3, 1 389; CHECK-NEXT: b .LBB18_3 390; CHECK-NEXT: .LBB18_2: # %fa 391; CHECK-NEXT: li 3, 0 392; CHECK-NEXT: .LBB18_3: # %ret 393; CHECK-NEXT: stw 3, 12(1) 394; CHECK-NEXT: lwz 3, 12(1) 395; CHECK-NEXT: addi 1, 1, 16 396; CHECK-NEXT: blr 397 entry: 398 %r = alloca i32, align 4 399 %c = fcmp olt float %a, %b 400 br i1 %c, label %tr, label %fa 401tr: 402 store i32 1, i32* %r, align 4 403 br label %ret 404fa: 405 store i32 0, i32* %r, align 4 406 br label %ret 407ret: 408 %0 = load i32, i32* %r, align 4 409 ret i32 %0 410} 411 412define i1 @test_fcmpult(float %a, float %b) { 413; CHECK-LABEL: test_fcmpult: 414; CHECK: # %bb.0: # %entry 415; CHECK-NEXT: efscmpeq 0, 3, 3 416; CHECK-NEXT: efscmpeq 1, 4, 4 417; CHECK-NEXT: crnand 20, 5, 1 418; CHECK-NEXT: efscmplt 0, 3, 4 419; CHECK-NEXT: li 5, 1 420; CHECK-NEXT: crnor 20, 1, 20 421; CHECK-NEXT: bc 12, 20, .LBB19_2 422; CHECK-NEXT: # %bb.1: # %entry 423; CHECK-NEXT: ori 3, 5, 0 424; CHECK-NEXT: blr 425; CHECK-NEXT: .LBB19_2: # %entry 426; CHECK-NEXT: addi 3, 0, 0 427; CHECK-NEXT: blr 428 entry: 429 %r = fcmp ult float %a, %b 430 ret i1 %r 431} 432 433define i32 @test_fcmpge(float %a, float %b) { 434; CHECK-LABEL: test_fcmpge: 435; CHECK: # %bb.0: # %entry 436; CHECK-NEXT: stwu 1, -16(1) 437; CHECK-NEXT: .cfi_def_cfa_offset 16 438; CHECK-NEXT: efscmpeq 0, 3, 3 439; CHECK-NEXT: bc 4, 1, .LBB20_4 440; CHECK-NEXT: # %bb.1: # %entry 441; CHECK-NEXT: efscmpeq 0, 4, 4 442; CHECK-NEXT: bc 4, 1, .LBB20_4 443; CHECK-NEXT: # %bb.2: # %entry 444; CHECK-NEXT: efscmplt 0, 3, 4 445; CHECK-NEXT: bc 12, 1, .LBB20_4 446; CHECK-NEXT: # %bb.3: # %tr 447; CHECK-NEXT: li 3, 1 448; CHECK-NEXT: b .LBB20_5 449; CHECK-NEXT: .LBB20_4: # %fa 450; CHECK-NEXT: li 3, 0 451; CHECK-NEXT: .LBB20_5: # %ret 452; CHECK-NEXT: stw 3, 12(1) 453; CHECK-NEXT: lwz 3, 12(1) 454; CHECK-NEXT: addi 1, 1, 16 455; CHECK-NEXT: blr 456 entry: 457 %r = alloca i32, align 4 458 %c = fcmp oge float %a, %b 459 br i1 %c, label %tr, label %fa 460tr: 461 store i32 1, i32* %r, align 4 462 br label %ret 463fa: 464 store i32 0, i32* %r, align 4 465 br label %ret 466ret: 467 %0 = load i32, i32* %r, align 4 468 ret i32 %0 469} 470 471define i32 @test_fcmpuge(float %a, float %b) { 472; CHECK-LABEL: test_fcmpuge: 473; CHECK: # %bb.0: # %entry 474; CHECK-NEXT: stwu 1, -16(1) 475; CHECK-NEXT: .cfi_def_cfa_offset 16 476; CHECK-NEXT: efscmplt 0, 3, 4 477; CHECK-NEXT: bgt 0, .LBB21_2 478; CHECK-NEXT: # %bb.1: # %tr 479; CHECK-NEXT: li 3, 1 480; CHECK-NEXT: b .LBB21_3 481; CHECK-NEXT: .LBB21_2: # %fa 482; CHECK-NEXT: li 3, 0 483; CHECK-NEXT: .LBB21_3: # %ret 484; CHECK-NEXT: stw 3, 12(1) 485; CHECK-NEXT: lwz 3, 12(1) 486; CHECK-NEXT: addi 1, 1, 16 487; CHECK-NEXT: blr 488 entry: 489 %r = alloca i32, align 4 490 %c = fcmp uge float %a, %b 491 br i1 %c, label %tr, label %fa 492tr: 493 store i32 1, i32* %r, align 4 494 br label %ret 495fa: 496 store i32 0, i32* %r, align 4 497 br label %ret 498ret: 499 %0 = load i32, i32* %r, align 4 500 ret i32 %0 501} 502 503 504define i32 @test_ftoui(float %a) { 505; CHECK-LABEL: test_ftoui: 506; CHECK: # %bb.0: 507; CHECK-NEXT: efsctuiz 3, 3 508; CHECK-NEXT: blr 509 %v = fptoui float %a to i32 510 ret i32 %v 511} 512 513define i32 @test_ftosi(float %a) { 514; CHECK-LABEL: test_ftosi: 515; CHECK: # %bb.0: 516; CHECK-NEXT: efsctsiz 3, 3 517; CHECK-NEXT: blr 518 %v = fptosi float %a to i32 519 ret i32 %v 520} 521 522define float @test_ffromui(i32 %a) { 523; CHECK-LABEL: test_ffromui: 524; CHECK: # %bb.0: 525; CHECK-NEXT: efscfui 3, 3 526; CHECK-NEXT: blr 527 %v = uitofp i32 %a to float 528 ret float %v 529} 530 531define float @test_ffromsi(i32 %a) { 532; CHECK-LABEL: test_ffromsi: 533; CHECK: # %bb.0: 534; CHECK-NEXT: efscfsi 3, 3 535; CHECK-NEXT: blr 536 %v = sitofp i32 %a to float 537 ret float %v 538} 539 540define i32 @test_fasmconst(float %x) { 541; CHECK-LABEL: test_fasmconst: 542; CHECK: # %bb.0: # %entry 543; CHECK-NEXT: stwu 1, -32(1) 544; CHECK-NEXT: .cfi_def_cfa_offset 32 545; CHECK-NEXT: stw 3, 20(1) 546; CHECK-NEXT: stw 3, 24(1) 547; CHECK-NEXT: lwz 3, 20(1) 548; CHECK-NEXT: #APP 549; CHECK-NEXT: efsctsi 3, 3 550; CHECK-NEXT: #NO_APP 551; CHECK-NEXT: addi 1, 1, 32 552; CHECK-NEXT: blr 553entry: 554 %x.addr = alloca float, align 8 555 store float %x, float* %x.addr, align 8 556 %0 = load float, float* %x.addr, align 8 557 %1 = call i32 asm sideeffect "efsctsi $0, $1", "=f,f"(float %0) 558 ret i32 %1 559; Check that it's not loading a double 560} 561 562; Double tests 563 564define void @test_double_abs(double * %aa) #0 { 565; CHECK-LABEL: test_double_abs: 566; CHECK: # %bb.0: # %entry 567; CHECK-NEXT: evldd 4, 0(3) 568; CHECK-NEXT: efdabs 4, 4 569; CHECK-NEXT: evstdd 4, 0(3) 570; CHECK-NEXT: blr 571 entry: 572 %0 = load double, double * %aa 573 %1 = tail call double @llvm.fabs.f64(double %0) #2 574 store double %1, double * %aa 575 ret void 576} 577 578; Function Attrs: nounwind readnone 579declare double @llvm.fabs.f64(double) #1 580 581define void @test_dnabs(double * %aa) #0 { 582; CHECK-LABEL: test_dnabs: 583; CHECK: # %bb.0: # %entry 584; CHECK-NEXT: evldd 4, 0(3) 585; CHECK-NEXT: efdnabs 4, 4 586; CHECK-NEXT: evstdd 4, 0(3) 587; CHECK-NEXT: blr 588 entry: 589 %0 = load double, double * %aa 590 %1 = tail call double @llvm.fabs.f64(double %0) #2 591 %sub = fsub double -0.000000e+00, %1 592 store double %sub, double * %aa 593 ret void 594} 595 596define double @test_ddiv(double %a, double %b) { 597; CHECK-LABEL: test_ddiv: 598; CHECK: # %bb.0: # %entry 599; CHECK-NEXT: evmergelo 5, 5, 6 600; CHECK-NEXT: evmergelo 3, 3, 4 601; CHECK-NEXT: efddiv 4, 3, 5 602; CHECK-NEXT: evmergehi 3, 4, 4 603; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 604; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 605; CHECK-NEXT: blr 606entry: 607 %v = fdiv double %a, %b 608 ret double %v 609 610} 611 612define double @test_dmul(double %a, double %b) { 613; CHECK-LABEL: test_dmul: 614; CHECK: # %bb.0: # %entry 615; CHECK-NEXT: evmergelo 5, 5, 6 616; CHECK-NEXT: evmergelo 3, 3, 4 617; CHECK-NEXT: efdmul 4, 3, 5 618; CHECK-NEXT: evmergehi 3, 4, 4 619; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 620; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 621; CHECK-NEXT: blr 622 entry: 623 %v = fmul double %a, %b 624 ret double %v 625} 626 627define double @test_dadd(double %a, double %b) { 628; CHECK-LABEL: test_dadd: 629; CHECK: # %bb.0: # %entry 630; CHECK-NEXT: evmergelo 5, 5, 6 631; CHECK-NEXT: evmergelo 3, 3, 4 632; CHECK-NEXT: efdadd 4, 3, 5 633; CHECK-NEXT: evmergehi 3, 4, 4 634; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 635; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 636; CHECK-NEXT: blr 637 entry: 638 %v = fadd double %a, %b 639 ret double %v 640} 641 642define double @test_dsub(double %a, double %b) { 643; CHECK-LABEL: test_dsub: 644; CHECK: # %bb.0: # %entry 645; CHECK-NEXT: evmergelo 5, 5, 6 646; CHECK-NEXT: evmergelo 3, 3, 4 647; CHECK-NEXT: efdsub 4, 3, 5 648; CHECK-NEXT: evmergehi 3, 4, 4 649; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 650; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 651; CHECK-NEXT: blr 652 entry: 653 %v = fsub double %a, %b 654 ret double %v 655} 656 657define double @test_dneg(double %a) { 658; CHECK-LABEL: test_dneg: 659; CHECK: # %bb.0: # %entry 660; CHECK-NEXT: evmergelo 3, 3, 4 661; CHECK-NEXT: efdneg 4, 3 662; CHECK-NEXT: evmergehi 3, 4, 4 663; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 664; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 665; CHECK-NEXT: blr 666 entry: 667 %v = fsub double -0.0, %a 668 ret double %v 669} 670 671define double @test_stod(float %a) { 672; CHECK-LABEL: test_stod: 673; CHECK: # %bb.0: # %entry 674; CHECK-NEXT: efdcfs 4, 3 675; CHECK-NEXT: evmergehi 3, 4, 4 676; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 677; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 678; CHECK-NEXT: blr 679 entry: 680 %v = fpext float %a to double 681 ret double %v 682} 683 684; (un)ordered tests are expanded to une and oeq so verify 685define i1 @test_dcmpuno(double %a, double %b) { 686; CHECK-LABEL: test_dcmpuno: 687; CHECK: # %bb.0: # %entry 688; CHECK-NEXT: evmergelo 5, 5, 6 689; CHECK-NEXT: evmergelo 3, 3, 4 690; CHECK-NEXT: li 7, 1 691; CHECK-NEXT: efdcmpeq 0, 3, 3 692; CHECK-NEXT: efdcmpeq 1, 5, 5 693; CHECK-NEXT: crand 20, 5, 1 694; CHECK-NEXT: bc 12, 20, .LBB35_2 695; CHECK-NEXT: # %bb.1: # %entry 696; CHECK-NEXT: ori 3, 7, 0 697; CHECK-NEXT: blr 698; CHECK-NEXT: .LBB35_2: # %entry 699; CHECK-NEXT: addi 3, 0, 0 700; CHECK-NEXT: blr 701 entry: 702 %r = fcmp uno double %a, %b 703 ret i1 %r 704} 705 706define i1 @test_dcmpord(double %a, double %b) { 707; CHECK-LABEL: test_dcmpord: 708; CHECK: # %bb.0: # %entry 709; CHECK-NEXT: evmergelo 3, 3, 4 710; CHECK-NEXT: evmergelo 4, 5, 6 711; CHECK-NEXT: li 7, 1 712; CHECK-NEXT: efdcmpeq 0, 4, 4 713; CHECK-NEXT: efdcmpeq 1, 3, 3 714; CHECK-NEXT: crnand 20, 5, 1 715; CHECK-NEXT: bc 12, 20, .LBB36_2 716; CHECK-NEXT: # %bb.1: # %entry 717; CHECK-NEXT: ori 3, 7, 0 718; CHECK-NEXT: blr 719; CHECK-NEXT: .LBB36_2: # %entry 720; CHECK-NEXT: addi 3, 0, 0 721; CHECK-NEXT: blr 722 entry: 723 %r = fcmp ord double %a, %b 724 ret i1 %r 725} 726 727define i32 @test_dcmpgt(double %a, double %b) { 728; CHECK-LABEL: test_dcmpgt: 729; CHECK: # %bb.0: # %entry 730; CHECK-NEXT: stwu 1, -16(1) 731; CHECK-NEXT: .cfi_def_cfa_offset 16 732; CHECK-NEXT: evmergelo 5, 5, 6 733; CHECK-NEXT: evmergelo 3, 3, 4 734; CHECK-NEXT: efdcmpgt 0, 3, 5 735; CHECK-NEXT: ble 0, .LBB37_2 736; CHECK-NEXT: # %bb.1: # %tr 737; CHECK-NEXT: li 3, 1 738; CHECK-NEXT: b .LBB37_3 739; CHECK-NEXT: .LBB37_2: # %fa 740; CHECK-NEXT: li 3, 0 741; CHECK-NEXT: .LBB37_3: # %ret 742; CHECK-NEXT: stw 3, 12(1) 743; CHECK-NEXT: lwz 3, 12(1) 744; CHECK-NEXT: addi 1, 1, 16 745; CHECK-NEXT: blr 746 entry: 747 %r = alloca i32, align 4 748 %c = fcmp ogt double %a, %b 749 br i1 %c, label %tr, label %fa 750tr: 751 store i32 1, i32* %r, align 4 752 br label %ret 753fa: 754 store i32 0, i32* %r, align 4 755 br label %ret 756ret: 757 %0 = load i32, i32* %r, align 4 758 ret i32 %0 759} 760 761define i32 @test_dcmpugt(double %a, double %b) { 762; CHECK-LABEL: test_dcmpugt: 763; CHECK: # %bb.0: # %entry 764; CHECK-NEXT: stwu 1, -16(1) 765; CHECK-NEXT: .cfi_def_cfa_offset 16 766; CHECK-NEXT: evmergelo 3, 3, 4 767; CHECK-NEXT: evmergelo 4, 5, 6 768; CHECK-NEXT: efdcmpeq 0, 4, 4 769; CHECK-NEXT: bc 4, 1, .LBB38_4 770; CHECK-NEXT: # %bb.1: # %entry 771; CHECK-NEXT: efdcmpeq 0, 3, 3 772; CHECK-NEXT: bc 4, 1, .LBB38_4 773; CHECK-NEXT: # %bb.2: # %entry 774; CHECK-NEXT: efdcmpgt 0, 3, 4 775; CHECK-NEXT: bc 12, 1, .LBB38_4 776; CHECK-NEXT: # %bb.3: # %fa 777; CHECK-NEXT: li 3, 0 778; CHECK-NEXT: b .LBB38_5 779; CHECK-NEXT: .LBB38_4: # %tr 780; CHECK-NEXT: li 3, 1 781; CHECK-NEXT: .LBB38_5: # %ret 782; CHECK-NEXT: stw 3, 12(1) 783; CHECK-NEXT: lwz 3, 12(1) 784; CHECK-NEXT: addi 1, 1, 16 785; CHECK-NEXT: blr 786 entry: 787 %r = alloca i32, align 4 788 %c = fcmp ugt double %a, %b 789 br i1 %c, label %tr, label %fa 790tr: 791 store i32 1, i32* %r, align 4 792 br label %ret 793fa: 794 store i32 0, i32* %r, align 4 795 br label %ret 796ret: 797 %0 = load i32, i32* %r, align 4 798 ret i32 %0 799} 800 801define i32 @test_dcmple(double %a, double %b) { 802; CHECK-LABEL: test_dcmple: 803; CHECK: # %bb.0: # %entry 804; CHECK-NEXT: stwu 1, -16(1) 805; CHECK-NEXT: .cfi_def_cfa_offset 16 806; CHECK-NEXT: evmergelo 5, 5, 6 807; CHECK-NEXT: evmergelo 3, 3, 4 808; CHECK-NEXT: efdcmpgt 0, 3, 5 809; CHECK-NEXT: bgt 0, .LBB39_2 810; CHECK-NEXT: # %bb.1: # %tr 811; CHECK-NEXT: li 3, 1 812; CHECK-NEXT: b .LBB39_3 813; CHECK-NEXT: .LBB39_2: # %fa 814; CHECK-NEXT: li 3, 0 815; CHECK-NEXT: .LBB39_3: # %ret 816; CHECK-NEXT: stw 3, 12(1) 817; CHECK-NEXT: lwz 3, 12(1) 818; CHECK-NEXT: addi 1, 1, 16 819; CHECK-NEXT: blr 820 entry: 821 %r = alloca i32, align 4 822 %c = fcmp ule double %a, %b 823 br i1 %c, label %tr, label %fa 824tr: 825 store i32 1, i32* %r, align 4 826 br label %ret 827fa: 828 store i32 0, i32* %r, align 4 829 br label %ret 830ret: 831 %0 = load i32, i32* %r, align 4 832 ret i32 %0 833} 834 835define i32 @test_dcmpule(double %a, double %b) { 836; CHECK-LABEL: test_dcmpule: 837; CHECK: # %bb.0: # %entry 838; CHECK-NEXT: stwu 1, -16(1) 839; CHECK-NEXT: .cfi_def_cfa_offset 16 840; CHECK-NEXT: evmergelo 5, 5, 6 841; CHECK-NEXT: evmergelo 3, 3, 4 842; CHECK-NEXT: efdcmpgt 0, 3, 5 843; CHECK-NEXT: bgt 0, .LBB40_2 844; CHECK-NEXT: # %bb.1: # %tr 845; CHECK-NEXT: li 3, 1 846; CHECK-NEXT: b .LBB40_3 847; CHECK-NEXT: .LBB40_2: # %fa 848; CHECK-NEXT: li 3, 0 849; CHECK-NEXT: .LBB40_3: # %ret 850; CHECK-NEXT: stw 3, 12(1) 851; CHECK-NEXT: lwz 3, 12(1) 852; CHECK-NEXT: addi 1, 1, 16 853; CHECK-NEXT: blr 854 entry: 855 %r = alloca i32, align 4 856 %c = fcmp ule double %a, %b 857 br i1 %c, label %tr, label %fa 858tr: 859 store i32 1, i32* %r, align 4 860 br label %ret 861fa: 862 store i32 0, i32* %r, align 4 863 br label %ret 864ret: 865 %0 = load i32, i32* %r, align 4 866 ret i32 %0 867} 868 869; The type of comparison found in C's if (x == y) 870define i32 @test_dcmpeq(double %a, double %b) { 871; CHECK-LABEL: test_dcmpeq: 872; CHECK: # %bb.0: # %entry 873; CHECK-NEXT: stwu 1, -16(1) 874; CHECK-NEXT: .cfi_def_cfa_offset 16 875; CHECK-NEXT: evmergelo 5, 5, 6 876; CHECK-NEXT: evmergelo 3, 3, 4 877; CHECK-NEXT: efdcmpeq 0, 3, 5 878; CHECK-NEXT: ble 0, .LBB41_2 879; CHECK-NEXT: # %bb.1: # %tr 880; CHECK-NEXT: li 3, 1 881; CHECK-NEXT: b .LBB41_3 882; CHECK-NEXT: .LBB41_2: # %fa 883; CHECK-NEXT: li 3, 0 884; CHECK-NEXT: .LBB41_3: # %ret 885; CHECK-NEXT: stw 3, 12(1) 886; CHECK-NEXT: lwz 3, 12(1) 887; CHECK-NEXT: addi 1, 1, 16 888; CHECK-NEXT: blr 889 entry: 890 %r = alloca i32, align 4 891 %c = fcmp oeq double %a, %b 892 br i1 %c, label %tr, label %fa 893tr: 894 store i32 1, i32* %r, align 4 895 br label %ret 896fa: 897 store i32 0, i32* %r, align 4 898 br label %ret 899ret: 900 %0 = load i32, i32* %r, align 4 901 ret i32 %0 902} 903 904define i32 @test_dcmpueq(double %a, double %b) { 905; CHECK-LABEL: test_dcmpueq: 906; CHECK: # %bb.0: # %entry 907; CHECK-NEXT: stwu 1, -16(1) 908; CHECK-NEXT: .cfi_def_cfa_offset 16 909; CHECK-NEXT: evmergelo 3, 3, 4 910; CHECK-NEXT: evmergelo 4, 5, 6 911; CHECK-NEXT: efdcmpeq 0, 4, 4 912; CHECK-NEXT: bc 4, 1, .LBB42_4 913; CHECK-NEXT: # %bb.1: # %entry 914; CHECK-NEXT: efdcmpeq 0, 3, 3 915; CHECK-NEXT: bc 4, 1, .LBB42_4 916; CHECK-NEXT: # %bb.2: # %entry 917; CHECK-NEXT: efdcmpeq 0, 3, 4 918; CHECK-NEXT: bc 12, 1, .LBB42_4 919; CHECK-NEXT: # %bb.3: # %fa 920; CHECK-NEXT: li 3, 0 921; CHECK-NEXT: b .LBB42_5 922; CHECK-NEXT: .LBB42_4: # %tr 923; CHECK-NEXT: li 3, 1 924; CHECK-NEXT: .LBB42_5: # %ret 925; CHECK-NEXT: stw 3, 12(1) 926; CHECK-NEXT: lwz 3, 12(1) 927; CHECK-NEXT: addi 1, 1, 16 928; CHECK-NEXT: blr 929 entry: 930 %r = alloca i32, align 4 931 %c = fcmp ueq double %a, %b 932 br i1 %c, label %tr, label %fa 933tr: 934 store i32 1, i32* %r, align 4 935 br label %ret 936fa: 937 store i32 0, i32* %r, align 4 938 br label %ret 939ret: 940 %0 = load i32, i32* %r, align 4 941 ret i32 %0 942} 943 944define i1 @test_dcmpne(double %a, double %b) { 945; CHECK-LABEL: test_dcmpne: 946; CHECK: # %bb.0: # %entry 947; CHECK-NEXT: evmergelo 3, 3, 4 948; CHECK-NEXT: evmergelo 4, 5, 6 949; CHECK-NEXT: li 7, 1 950; CHECK-NEXT: efdcmpeq 0, 4, 4 951; CHECK-NEXT: efdcmpeq 1, 3, 3 952; CHECK-NEXT: efdcmpeq 5, 3, 4 953; CHECK-NEXT: crand 24, 5, 1 954; CHECK-NEXT: crorc 20, 21, 24 955; CHECK-NEXT: bc 12, 20, .LBB43_2 956; CHECK-NEXT: # %bb.1: # %entry 957; CHECK-NEXT: ori 3, 7, 0 958; CHECK-NEXT: blr 959; CHECK-NEXT: .LBB43_2: # %entry 960; CHECK-NEXT: addi 3, 0, 0 961; CHECK-NEXT: blr 962 entry: 963 %r = fcmp one double %a, %b 964 ret i1 %r 965} 966 967define i32 @test_dcmpune(double %a, double %b) { 968; CHECK-LABEL: test_dcmpune: 969; CHECK: # %bb.0: # %entry 970; CHECK-NEXT: stwu 1, -16(1) 971; CHECK-NEXT: .cfi_def_cfa_offset 16 972; CHECK-NEXT: evmergelo 5, 5, 6 973; CHECK-NEXT: evmergelo 3, 3, 4 974; CHECK-NEXT: efdcmpeq 0, 3, 5 975; CHECK-NEXT: bgt 0, .LBB44_2 976; CHECK-NEXT: # %bb.1: # %tr 977; CHECK-NEXT: li 3, 1 978; CHECK-NEXT: b .LBB44_3 979; CHECK-NEXT: .LBB44_2: # %fa 980; CHECK-NEXT: li 3, 0 981; CHECK-NEXT: .LBB44_3: # %ret 982; CHECK-NEXT: stw 3, 12(1) 983; CHECK-NEXT: lwz 3, 12(1) 984; CHECK-NEXT: addi 1, 1, 16 985; CHECK-NEXT: blr 986 entry: 987 %r = alloca i32, align 4 988 %c = fcmp une double %a, %b 989 br i1 %c, label %tr, label %fa 990tr: 991 store i32 1, i32* %r, align 4 992 br label %ret 993fa: 994 store i32 0, i32* %r, align 4 995 br label %ret 996ret: 997 %0 = load i32, i32* %r, align 4 998 ret i32 %0 999} 1000 1001define i32 @test_dcmplt(double %a, double %b) { 1002; CHECK-LABEL: test_dcmplt: 1003; CHECK: # %bb.0: # %entry 1004; CHECK-NEXT: stwu 1, -16(1) 1005; CHECK-NEXT: .cfi_def_cfa_offset 16 1006; CHECK-NEXT: evmergelo 5, 5, 6 1007; CHECK-NEXT: evmergelo 3, 3, 4 1008; CHECK-NEXT: efdcmplt 0, 3, 5 1009; CHECK-NEXT: ble 0, .LBB45_2 1010; CHECK-NEXT: # %bb.1: # %tr 1011; CHECK-NEXT: li 3, 1 1012; CHECK-NEXT: b .LBB45_3 1013; CHECK-NEXT: .LBB45_2: # %fa 1014; CHECK-NEXT: li 3, 0 1015; CHECK-NEXT: .LBB45_3: # %ret 1016; CHECK-NEXT: stw 3, 12(1) 1017; CHECK-NEXT: lwz 3, 12(1) 1018; CHECK-NEXT: addi 1, 1, 16 1019; CHECK-NEXT: blr 1020 entry: 1021 %r = alloca i32, align 4 1022 %c = fcmp olt double %a, %b 1023 br i1 %c, label %tr, label %fa 1024tr: 1025 store i32 1, i32* %r, align 4 1026 br label %ret 1027fa: 1028 store i32 0, i32* %r, align 4 1029 br label %ret 1030ret: 1031 %0 = load i32, i32* %r, align 4 1032 ret i32 %0 1033} 1034 1035define i32 @test_dcmpult(double %a, double %b) { 1036; CHECK-LABEL: test_dcmpult: 1037; CHECK: # %bb.0: # %entry 1038; CHECK-NEXT: stwu 1, -16(1) 1039; CHECK-NEXT: .cfi_def_cfa_offset 16 1040; CHECK-NEXT: evmergelo 3, 3, 4 1041; CHECK-NEXT: evmergelo 4, 5, 6 1042; CHECK-NEXT: efdcmpeq 0, 4, 4 1043; CHECK-NEXT: bc 4, 1, .LBB46_4 1044; CHECK-NEXT: # %bb.1: # %entry 1045; CHECK-NEXT: efdcmpeq 0, 3, 3 1046; CHECK-NEXT: bc 4, 1, .LBB46_4 1047; CHECK-NEXT: # %bb.2: # %entry 1048; CHECK-NEXT: efdcmplt 0, 3, 4 1049; CHECK-NEXT: bc 12, 1, .LBB46_4 1050; CHECK-NEXT: # %bb.3: # %fa 1051; CHECK-NEXT: li 3, 0 1052; CHECK-NEXT: b .LBB46_5 1053; CHECK-NEXT: .LBB46_4: # %tr 1054; CHECK-NEXT: li 3, 1 1055; CHECK-NEXT: .LBB46_5: # %ret 1056; CHECK-NEXT: stw 3, 12(1) 1057; CHECK-NEXT: lwz 3, 12(1) 1058; CHECK-NEXT: addi 1, 1, 16 1059; CHECK-NEXT: blr 1060 entry: 1061 %r = alloca i32, align 4 1062 %c = fcmp ult double %a, %b 1063 br i1 %c, label %tr, label %fa 1064tr: 1065 store i32 1, i32* %r, align 4 1066 br label %ret 1067fa: 1068 store i32 0, i32* %r, align 4 1069 br label %ret 1070ret: 1071 %0 = load i32, i32* %r, align 4 1072 ret i32 %0 1073} 1074 1075define i1 @test_dcmpge(double %a, double %b) { 1076; CHECK-LABEL: test_dcmpge: 1077; CHECK: # %bb.0: # %entry 1078; CHECK-NEXT: evmergelo 3, 3, 4 1079; CHECK-NEXT: evmergelo 4, 5, 6 1080; CHECK-NEXT: li 7, 1 1081; CHECK-NEXT: efdcmpeq 0, 4, 4 1082; CHECK-NEXT: efdcmpeq 1, 3, 3 1083; CHECK-NEXT: efdcmplt 5, 3, 4 1084; CHECK-NEXT: crand 24, 5, 1 1085; CHECK-NEXT: crorc 20, 21, 24 1086; CHECK-NEXT: bc 12, 20, .LBB47_2 1087; CHECK-NEXT: # %bb.1: # %entry 1088; CHECK-NEXT: ori 3, 7, 0 1089; CHECK-NEXT: blr 1090; CHECK-NEXT: .LBB47_2: # %entry 1091; CHECK-NEXT: addi 3, 0, 0 1092; CHECK-NEXT: blr 1093 entry: 1094 %r = fcmp oge double %a, %b 1095 ret i1 %r 1096} 1097 1098define i32 @test_dcmpuge(double %a, double %b) { 1099; CHECK-LABEL: test_dcmpuge: 1100; CHECK: # %bb.0: # %entry 1101; CHECK-NEXT: stwu 1, -16(1) 1102; CHECK-NEXT: .cfi_def_cfa_offset 16 1103; CHECK-NEXT: evmergelo 5, 5, 6 1104; CHECK-NEXT: evmergelo 3, 3, 4 1105; CHECK-NEXT: efdcmplt 0, 3, 5 1106; CHECK-NEXT: bgt 0, .LBB48_2 1107; CHECK-NEXT: # %bb.1: # %tr 1108; CHECK-NEXT: li 3, 1 1109; CHECK-NEXT: b .LBB48_3 1110; CHECK-NEXT: .LBB48_2: # %fa 1111; CHECK-NEXT: li 3, 0 1112; CHECK-NEXT: .LBB48_3: # %ret 1113; CHECK-NEXT: stw 3, 12(1) 1114; CHECK-NEXT: lwz 3, 12(1) 1115; CHECK-NEXT: addi 1, 1, 16 1116; CHECK-NEXT: blr 1117 entry: 1118 %r = alloca i32, align 4 1119 %c = fcmp uge double %a, %b 1120 br i1 %c, label %tr, label %fa 1121tr: 1122 store i32 1, i32* %r, align 4 1123 br label %ret 1124fa: 1125 store i32 0, i32* %r, align 4 1126 br label %ret 1127ret: 1128 %0 = load i32, i32* %r, align 4 1129 ret i32 %0 1130} 1131 1132define double @test_dselect(double %a, double %b, i1 %c) { 1133; CHECK-LABEL: test_dselect: 1134; CHECK: # %bb.0: # %entry 1135; CHECK-NEXT: andi. 7, 7, 1 1136; CHECK-NEXT: evmergelo 5, 5, 6 1137; CHECK-NEXT: evmergelo 4, 3, 4 1138; CHECK-NEXT: bc 12, 1, .LBB49_2 1139; CHECK-NEXT: # %bb.1: # %entry 1140; CHECK-NEXT: evor 4, 5, 5 1141; CHECK-NEXT: .LBB49_2: # %entry 1142; CHECK-NEXT: evmergehi 3, 4, 4 1143; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1144; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1145; CHECK-NEXT: blr 1146entry: 1147 %r = select i1 %c, double %a, double %b 1148 ret double %r 1149} 1150 1151define i32 @test_dtoui(double %a) { 1152; CHECK-LABEL: test_dtoui: 1153; CHECK: # %bb.0: # %entry 1154; CHECK-NEXT: evmergelo 3, 3, 4 1155; CHECK-NEXT: efdctuiz 3, 3 1156; CHECK-NEXT: blr 1157entry: 1158 %v = fptoui double %a to i32 1159 ret i32 %v 1160} 1161 1162define i32 @test_dtosi(double %a) { 1163; CHECK-LABEL: test_dtosi: 1164; CHECK: # %bb.0: # %entry 1165; CHECK-NEXT: evmergelo 3, 3, 4 1166; CHECK-NEXT: efdctsiz 3, 3 1167; CHECK-NEXT: blr 1168entry: 1169 %v = fptosi double %a to i32 1170 ret i32 %v 1171} 1172 1173define double @test_dfromui(i32 %a) { 1174; CHECK-LABEL: test_dfromui: 1175; CHECK: # %bb.0: # %entry 1176; CHECK-NEXT: efdcfui 4, 3 1177; CHECK-NEXT: evmergehi 3, 4, 4 1178; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1179; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1180; CHECK-NEXT: blr 1181entry: 1182 %v = uitofp i32 %a to double 1183 ret double %v 1184} 1185 1186define double @test_dfromsi(i32 %a) { 1187; CHECK-LABEL: test_dfromsi: 1188; CHECK: # %bb.0: # %entry 1189; CHECK-NEXT: efdcfsi 4, 3 1190; CHECK-NEXT: evmergehi 3, 4, 4 1191; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1192; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1193; CHECK-NEXT: blr 1194entry: 1195 %v = sitofp i32 %a to double 1196 ret double %v 1197} 1198 1199define i32 @test_dasmconst(double %x) { 1200; CHECK-LABEL: test_dasmconst: 1201; CHECK: # %bb.0: # %entry 1202; CHECK-NEXT: stwu 1, -16(1) 1203; CHECK-NEXT: .cfi_def_cfa_offset 16 1204; CHECK-NEXT: evmergelo 3, 3, 4 1205; CHECK-NEXT: evstdd 3, 8(1) 1206; CHECK-NEXT: #APP 1207; CHECK-NEXT: efdctsi 3, 3 1208; CHECK-NEXT: #NO_APP 1209; CHECK-NEXT: addi 1, 1, 16 1210; CHECK-NEXT: blr 1211entry: 1212 %x.addr = alloca double, align 8 1213 store double %x, double* %x.addr, align 8 1214 %0 = load double, double* %x.addr, align 8 1215 %1 = call i32 asm sideeffect "efdctsi $0, $1", "=d,d"(double %0) 1216 ret i32 %1 1217} 1218 1219declare double @test_spill_spe_regs(double, double); 1220define dso_local void @test_func2() #0 { 1221; CHECK-LABEL: test_func2: 1222; CHECK: # %bb.0: # %entry 1223; CHECK-NEXT: blr 1224entry: 1225 ret void 1226} 1227 1228declare void @test_memset(i8* nocapture writeonly, i8, i32, i1) 1229@global_var1 = global i32 0, align 4 1230define double @test_spill(double %a, i32 %a1, i64 %a2, i8 * %a3, i32 *%a4, i32* %a5) nounwind { 1231; CHECK-LABEL: test_spill: 1232; CHECK: # %bb.0: # %entry 1233; CHECK-NEXT: mflr 0 1234; CHECK-NEXT: stw 0, 4(1) 1235; CHECK-NEXT: stwu 1, -352(1) 1236; CHECK-NEXT: li 5, 256 1237; CHECK-NEXT: evstddx 30, 1, 5 # 8-byte Folded Spill 1238; CHECK-NEXT: li 5, 264 1239; CHECK-NEXT: evstddx 31, 1, 5 # 8-byte Folded Spill 1240; CHECK-NEXT: li 5, .LCPI56_0@l 1241; CHECK-NEXT: lis 6, .LCPI56_0@ha 1242; CHECK-NEXT: evlddx 5, 6, 5 1243; CHECK-NEXT: stw 14, 280(1) # 4-byte Folded Spill 1244; CHECK-NEXT: stw 15, 284(1) # 4-byte Folded Spill 1245; CHECK-NEXT: stw 16, 288(1) # 4-byte Folded Spill 1246; CHECK-NEXT: stw 17, 292(1) # 4-byte Folded Spill 1247; CHECK-NEXT: stw 18, 296(1) # 4-byte Folded Spill 1248; CHECK-NEXT: stw 19, 300(1) # 4-byte Folded Spill 1249; CHECK-NEXT: stw 20, 304(1) # 4-byte Folded Spill 1250; CHECK-NEXT: stw 21, 308(1) # 4-byte Folded Spill 1251; CHECK-NEXT: stw 22, 312(1) # 4-byte Folded Spill 1252; CHECK-NEXT: stw 23, 316(1) # 4-byte Folded Spill 1253; CHECK-NEXT: stw 24, 320(1) # 4-byte Folded Spill 1254; CHECK-NEXT: stw 25, 324(1) # 4-byte Folded Spill 1255; CHECK-NEXT: stw 26, 328(1) # 4-byte Folded Spill 1256; CHECK-NEXT: stw 27, 332(1) # 4-byte Folded Spill 1257; CHECK-NEXT: stw 28, 336(1) # 4-byte Folded Spill 1258; CHECK-NEXT: stw 29, 340(1) # 4-byte Folded Spill 1259; CHECK-NEXT: stw 30, 344(1) # 4-byte Folded Spill 1260; CHECK-NEXT: stw 31, 348(1) # 4-byte Folded Spill 1261; CHECK-NEXT: evstdd 14, 128(1) # 8-byte Folded Spill 1262; CHECK-NEXT: evstdd 15, 136(1) # 8-byte Folded Spill 1263; CHECK-NEXT: evstdd 16, 144(1) # 8-byte Folded Spill 1264; CHECK-NEXT: evstdd 17, 152(1) # 8-byte Folded Spill 1265; CHECK-NEXT: evstdd 18, 160(1) # 8-byte Folded Spill 1266; CHECK-NEXT: evstdd 19, 168(1) # 8-byte Folded Spill 1267; CHECK-NEXT: evstdd 20, 176(1) # 8-byte Folded Spill 1268; CHECK-NEXT: evstdd 21, 184(1) # 8-byte Folded Spill 1269; CHECK-NEXT: evstdd 22, 192(1) # 8-byte Folded Spill 1270; CHECK-NEXT: evstdd 23, 200(1) # 8-byte Folded Spill 1271; CHECK-NEXT: evstdd 24, 208(1) # 8-byte Folded Spill 1272; CHECK-NEXT: evstdd 25, 216(1) # 8-byte Folded Spill 1273; CHECK-NEXT: evstdd 26, 224(1) # 8-byte Folded Spill 1274; CHECK-NEXT: evstdd 27, 232(1) # 8-byte Folded Spill 1275; CHECK-NEXT: evstdd 28, 240(1) # 8-byte Folded Spill 1276; CHECK-NEXT: evstdd 29, 248(1) # 8-byte Folded Spill 1277; CHECK-NEXT: evmergelo 3, 3, 4 1278; CHECK-NEXT: lwz 4, 360(1) 1279; CHECK-NEXT: efdadd 3, 3, 3 1280; CHECK-NEXT: efdadd 3, 3, 5 1281; CHECK-NEXT: evstdd 3, 24(1) # 8-byte Folded Spill 1282; CHECK-NEXT: stw 4, 20(1) # 4-byte Folded Spill 1283; CHECK-NEXT: #APP 1284; CHECK-NEXT: #NO_APP 1285; CHECK-NEXT: addi 3, 1, 76 1286; CHECK-NEXT: li 4, 0 1287; CHECK-NEXT: li 5, 24 1288; CHECK-NEXT: li 6, 1 1289; CHECK-NEXT: li 30, 0 1290; CHECK-NEXT: bl test_memset 1291; CHECK-NEXT: lwz 3, 20(1) # 4-byte Folded Reload 1292; CHECK-NEXT: stw 30, 0(3) 1293; CHECK-NEXT: bl test_func2 1294; CHECK-NEXT: addi 3, 1, 32 1295; CHECK-NEXT: li 4, 0 1296; CHECK-NEXT: li 5, 20 1297; CHECK-NEXT: li 6, 1 1298; CHECK-NEXT: bl test_memset 1299; CHECK-NEXT: evldd 4, 24(1) # 8-byte Folded Reload 1300; CHECK-NEXT: li 5, 264 1301; CHECK-NEXT: evmergehi 3, 4, 4 1302; CHECK-NEXT: evlddx 31, 1, 5 # 8-byte Folded Reload 1303; CHECK-NEXT: li 5, 256 1304; CHECK-NEXT: evlddx 30, 1, 5 # 8-byte Folded Reload 1305; CHECK-NEXT: evldd 29, 248(1) # 8-byte Folded Reload 1306; CHECK-NEXT: evldd 28, 240(1) # 8-byte Folded Reload 1307; CHECK-NEXT: evldd 27, 232(1) # 8-byte Folded Reload 1308; CHECK-NEXT: evldd 26, 224(1) # 8-byte Folded Reload 1309; CHECK-NEXT: evldd 25, 216(1) # 8-byte Folded Reload 1310; CHECK-NEXT: evldd 24, 208(1) # 8-byte Folded Reload 1311; CHECK-NEXT: evldd 23, 200(1) # 8-byte Folded Reload 1312; CHECK-NEXT: evldd 22, 192(1) # 8-byte Folded Reload 1313; CHECK-NEXT: evldd 21, 184(1) # 8-byte Folded Reload 1314; CHECK-NEXT: evldd 20, 176(1) # 8-byte Folded Reload 1315; CHECK-NEXT: evldd 19, 168(1) # 8-byte Folded Reload 1316; CHECK-NEXT: evldd 18, 160(1) # 8-byte Folded Reload 1317; CHECK-NEXT: evldd 17, 152(1) # 8-byte Folded Reload 1318; CHECK-NEXT: evldd 16, 144(1) # 8-byte Folded Reload 1319; CHECK-NEXT: evldd 15, 136(1) # 8-byte Folded Reload 1320; CHECK-NEXT: evldd 14, 128(1) # 8-byte Folded Reload 1321; CHECK-NEXT: # kill: def $r3 killed $r3 killed $s3 1322; CHECK-NEXT: # kill: def $r4 killed $r4 killed $s4 1323; CHECK-NEXT: lwz 31, 348(1) # 4-byte Folded Reload 1324; CHECK-NEXT: lwz 30, 344(1) # 4-byte Folded Reload 1325; CHECK-NEXT: lwz 29, 340(1) # 4-byte Folded Reload 1326; CHECK-NEXT: lwz 28, 336(1) # 4-byte Folded Reload 1327; CHECK-NEXT: lwz 27, 332(1) # 4-byte Folded Reload 1328; CHECK-NEXT: lwz 26, 328(1) # 4-byte Folded Reload 1329; CHECK-NEXT: lwz 25, 324(1) # 4-byte Folded Reload 1330; CHECK-NEXT: lwz 24, 320(1) # 4-byte Folded Reload 1331; CHECK-NEXT: lwz 23, 316(1) # 4-byte Folded Reload 1332; CHECK-NEXT: lwz 22, 312(1) # 4-byte Folded Reload 1333; CHECK-NEXT: lwz 21, 308(1) # 4-byte Folded Reload 1334; CHECK-NEXT: lwz 20, 304(1) # 4-byte Folded Reload 1335; CHECK-NEXT: lwz 19, 300(1) # 4-byte Folded Reload 1336; CHECK-NEXT: lwz 18, 296(1) # 4-byte Folded Reload 1337; CHECK-NEXT: lwz 17, 292(1) # 4-byte Folded Reload 1338; CHECK-NEXT: lwz 16, 288(1) # 4-byte Folded Reload 1339; CHECK-NEXT: lwz 15, 284(1) # 4-byte Folded Reload 1340; CHECK-NEXT: lwz 14, 280(1) # 4-byte Folded Reload 1341; CHECK-NEXT: lwz 0, 356(1) 1342; CHECK-NEXT: addi 1, 1, 352 1343; CHECK-NEXT: mtlr 0 1344; CHECK-NEXT: blr 1345entry: 1346 %v1 = alloca [13 x i32], align 4 1347 %v2 = alloca [11 x i32], align 4 1348 %0 = fadd double %a, %a 1349 call void asm sideeffect "","~{s0},~{s3},~{s4},~{s5},~{s6},~{s7},~{s8},~{s9},~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19},~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29},~{s30},~{s31}"() nounwind 1350 %1 = fadd double %0, 3.14159 1351 %2 = bitcast [13 x i32]* %v1 to i8* 1352 call void @test_memset(i8* align 4 %2, i8 0, i32 24, i1 true) 1353 store i32 0, i32* %a5, align 4 1354 call void @test_func2() 1355 %3 = bitcast [11 x i32]* %v2 to i8* 1356 call void @test_memset(i8* align 4 %3, i8 0, i32 20, i1 true) 1357 br label %return 1358 1359return: 1360 ret double %1 1361 1362} 1363