1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
5; RUN:  --check-prefixes=CHECK,BE
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
7; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
8; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
9; RUN:  --check-prefixes=CHECK,LE
10
11@glob = local_unnamed_addr global i64 0, align 8
12
13; Function Attrs: norecurse nounwind readnone
14define i64 @test_llgeull(i64 %a, i64 %b) {
15; CHECK-LABEL: test_llgeull:
16; CHECK:       # %bb.0: # %entry
17; CHECK-NEXT:    subfc r3, r4, r3
18; CHECK-NEXT:    subfe r3, r4, r4
19; CHECK-NEXT:    addi r3, r3, 1
20; CHECK-NEXT:    blr
21entry:
22  %cmp = icmp uge i64 %a, %b
23  %conv1 = zext i1 %cmp to i64
24  ret i64 %conv1
25}
26
27; Function Attrs: norecurse nounwind readnone
28define i64 @test_llgeull_sext(i64 %a, i64 %b) {
29; CHECK-LABEL: test_llgeull_sext:
30; CHECK:       # %bb.0: # %entry
31; CHECK-NEXT:    subfc r3, r4, r3
32; CHECK-NEXT:    subfe r3, r4, r4
33; CHECK-NEXT:    not r3, r3
34; CHECK-NEXT:    blr
35entry:
36  %cmp = icmp uge i64 %a, %b
37  %conv1 = sext i1 %cmp to i64
38  ret i64 %conv1
39}
40
41; Function Attrs: norecurse nounwind readnone
42define i64 @test_llgeull_z(i64 %a) {
43; CHECK-LABEL: test_llgeull_z:
44; CHECK:       # %bb.0: # %entry
45; CHECK-NEXT:    li r3, 1
46; CHECK-NEXT:    blr
47entry:
48  %cmp = icmp uge i64 %a, 0
49  %conv1 = zext i1 %cmp to i64
50  ret i64 %conv1
51}
52
53; Function Attrs: norecurse nounwind readnone
54define i64 @test_llgeull_sext_z(i64 %a) {
55; CHECK-LABEL: test_llgeull_sext_z:
56; CHECK:       # %bb.0: # %entry
57; CHECK-NEXT:    li r3, -1
58; CHECK-NEXT:    blr
59entry:
60  %cmp = icmp uge i64 %a, 0
61  %conv1 = sext i1 %cmp to i64
62  ret i64 %conv1
63}
64
65; Function Attrs: norecurse nounwind
66define void @test_llgeull_store(i64 %a, i64 %b) {
67; BE-LABEL: test_llgeull_store:
68; BE:       # %bb.0: # %entry
69; BE-NEXT:    addis r5, r2, .LC0@toc@ha
70; BE-NEXT:    subfc r3, r4, r3
71; BE-NEXT:    ld r3, .LC0@toc@l(r5)
72; BE-NEXT:    subfe r4, r4, r4
73; BE-NEXT:    addi r4, r4, 1
74; BE-NEXT:    std r4, 0(r3)
75; BE-NEXT:    blr
76;
77; LE-LABEL: test_llgeull_store:
78; LE:       # %bb.0: # %entry
79; LE-NEXT:    subfc r3, r4, r3
80; LE-NEXT:    addis r5, r2, glob@toc@ha
81; LE-NEXT:    subfe r3, r4, r4
82; LE-NEXT:    addi r3, r3, 1
83; LE-NEXT:    std r3, glob@toc@l(r5)
84; LE-NEXT:    blr
85entry:
86  %cmp = icmp uge i64 %a, %b
87  %conv1 = zext i1 %cmp to i64
88  store i64 %conv1, i64* @glob
89  ret void
90}
91
92; Function Attrs: norecurse nounwind
93define void @test_llgeull_sext_store(i64 %a, i64 %b) {
94; BE-LABEL: test_llgeull_sext_store:
95; BE:       # %bb.0: # %entry
96; BE-NEXT:    addis r5, r2, .LC0@toc@ha
97; BE-NEXT:    subfc r3, r4, r3
98; BE-NEXT:    ld r3, .LC0@toc@l(r5)
99; BE-NEXT:    subfe r4, r4, r4
100; BE-NEXT:    not r4, r4
101; BE-NEXT:    std r4, 0(r3)
102; BE-NEXT:    blr
103;
104; LE-LABEL: test_llgeull_sext_store:
105; LE:       # %bb.0: # %entry
106; LE-NEXT:    subfc r3, r4, r3
107; LE-NEXT:    addis r5, r2, glob@toc@ha
108; LE-NEXT:    subfe r3, r4, r4
109; LE-NEXT:    not r3, r3
110; LE-NEXT:    std r3, glob@toc@l(r5)
111; LE-NEXT:    blr
112entry:
113  %cmp = icmp uge i64 %a, %b
114  %conv1 = sext i1 %cmp to i64
115  store i64 %conv1, i64* @glob
116  ret void
117}
118
119; Function Attrs: norecurse nounwind
120define void @test_llgeull_z_store(i64 %a) {
121; BE-LABEL: test_llgeull_z_store:
122; BE:       # %bb.0: # %entry
123; BE-NEXT:    addis r3, r2, .LC0@toc@ha
124; BE-NEXT:    li r4, 1
125; BE-NEXT:    ld r3, .LC0@toc@l(r3)
126; BE-NEXT:    std r4, 0(r3)
127; BE-NEXT:    blr
128;
129; LE-LABEL: test_llgeull_z_store:
130; LE:       # %bb.0: # %entry
131; LE-NEXT:    addis r3, r2, glob@toc@ha
132; LE-NEXT:    li r4, 1
133; LE-NEXT:    std r4, glob@toc@l(r3)
134; LE-NEXT:    blr
135entry:
136  %cmp = icmp uge i64 %a, 0
137  %conv1 = zext i1 %cmp to i64
138  store i64 %conv1, i64* @glob
139  ret void
140}
141
142; Function Attrs: norecurse nounwind
143define void @test_llgeull_sext_z_store(i64 %a) {
144; BE-LABEL: test_llgeull_sext_z_store:
145; BE:       # %bb.0: # %entry
146; BE-NEXT:    addis r3, r2, .LC0@toc@ha
147; BE-NEXT:    li r4, -1
148; BE-NEXT:    ld r3, .LC0@toc@l(r3)
149; BE-NEXT:    std r4, 0(r3)
150; BE-NEXT:    blr
151;
152; LE-LABEL: test_llgeull_sext_z_store:
153; LE:       # %bb.0: # %entry
154; LE-NEXT:    addis r3, r2, glob@toc@ha
155; LE-NEXT:    li r4, -1
156; LE-NEXT:    std r4, glob@toc@l(r3)
157; LE-NEXT:    blr
158entry:
159  store i64 -1, i64* @glob
160  ret void
161}
162
163