1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
5; RUN:  --check-prefixes=CHECK,BE
6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
7; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
8; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \
9; RUN:  --check-prefixes=CHECK,LE
10
11@glob = local_unnamed_addr global i64 0, align 8
12
13; Function Attrs: norecurse nounwind readnone
14define i64 @test_llltsll(i64 %a, i64 %b) {
15; CHECK-LABEL: test_llltsll:
16; CHECK:       # %bb.0: # %entry
17; CHECK-NEXT:    sradi r5, r3, 63
18; CHECK-NEXT:    rldicl r6, r4, 1, 63
19; CHECK-NEXT:    subfc r3, r4, r3
20; CHECK-NEXT:    adde r3, r6, r5
21; CHECK-NEXT:    xori r3, r3, 1
22; CHECK-NEXT:    blr
23entry:
24  %cmp = icmp slt i64 %a, %b
25  %conv1 = zext i1 %cmp to i64
26  ret i64 %conv1
27}
28
29; Function Attrs: norecurse nounwind readnone
30define i64 @test_llltsll_sext(i64 %a, i64 %b) {
31; CHECK-LABEL: test_llltsll_sext:
32; CHECK:       # %bb.0: # %entry
33; CHECK-NEXT:    sradi r5, r3, 63
34; CHECK-NEXT:    rldicl r6, r4, 1, 63
35; CHECK-NEXT:    subfc r3, r4, r3
36; CHECK-NEXT:    adde r3, r6, r5
37; CHECK-NEXT:    xori r3, r3, 1
38; CHECK-NEXT:    neg r3, r3
39; CHECK-NEXT:    blr
40entry:
41  %cmp = icmp slt i64 %a, %b
42  %conv1 = sext i1 %cmp to i64
43  ret i64 %conv1
44}
45
46; Function Attrs: norecurse nounwind readnone
47define i64 @test_llltsll_sext_z(i64 %a) {
48; CHECK-LABEL: test_llltsll_sext_z:
49; CHECK:       # %bb.0: # %entry
50; CHECK-NEXT:    sradi r3, r3, 63
51; CHECK-NEXT:    blr
52entry:
53  %cmp = icmp slt i64 %a, 0
54  %sub = sext i1 %cmp to i64
55  ret i64 %sub
56}
57
58; Function Attrs: norecurse nounwind
59define void @test_llltsll_store(i64 %a, i64 %b) {
60; BE-LABEL: test_llltsll_store:
61; BE:       # %bb.0: # %entry
62; BE-NEXT:    sradi r6, r3, 63
63; BE-NEXT:    addis r5, r2, .LC0@toc@ha
64; BE-NEXT:    subfc r3, r4, r3
65; BE-NEXT:    rldicl r3, r4, 1, 63
66; BE-NEXT:    ld r4, .LC0@toc@l(r5)
67; BE-NEXT:    adde r3, r3, r6
68; BE-NEXT:    xori r3, r3, 1
69; BE-NEXT:    std r3, 0(r4)
70; BE-NEXT:    blr
71;
72; LE-LABEL: test_llltsll_store:
73; LE:       # %bb.0: # %entry
74; LE-NEXT:    sradi r6, r3, 63
75; LE-NEXT:    addis r5, r2, glob@toc@ha
76; LE-NEXT:    subfc r3, r4, r3
77; LE-NEXT:    rldicl r3, r4, 1, 63
78; LE-NEXT:    adde r3, r3, r6
79; LE-NEXT:    xori r3, r3, 1
80; LE-NEXT:    std r3, glob@toc@l(r5)
81; LE-NEXT:    blr
82; CHECK-DIAG:    subfc [[REG3:r[0-9]+]], r4, r3
83entry:
84  %cmp = icmp slt i64 %a, %b
85  %conv1 = zext i1 %cmp to i64
86  store i64 %conv1, i64* @glob, align 8
87  ret void
88}
89
90; Function Attrs: norecurse nounwind
91define void @test_llltsll_sext_store(i64 %a, i64 %b) {
92; BE-LABEL: test_llltsll_sext_store:
93; BE:       # %bb.0: # %entry
94; BE-NEXT:    sradi r6, r3, 63
95; BE-NEXT:    addis r5, r2, .LC0@toc@ha
96; BE-NEXT:    subfc r3, r4, r3
97; BE-NEXT:    rldicl r3, r4, 1, 63
98; BE-NEXT:    ld r4, .LC0@toc@l(r5)
99; BE-NEXT:    adde r3, r3, r6
100; BE-NEXT:    xori r3, r3, 1
101; BE-NEXT:    neg r3, r3
102; BE-NEXT:    std r3, 0(r4)
103; BE-NEXT:    blr
104;
105; LE-LABEL: test_llltsll_sext_store:
106; LE:       # %bb.0: # %entry
107; LE-NEXT:    sradi r6, r3, 63
108; LE-NEXT:    addis r5, r2, glob@toc@ha
109; LE-NEXT:    subfc r3, r4, r3
110; LE-NEXT:    rldicl r3, r4, 1, 63
111; LE-NEXT:    adde r3, r3, r6
112; LE-NEXT:    xori r3, r3, 1
113; LE-NEXT:    neg r3, r3
114; LE-NEXT:    std r3, glob@toc@l(r5)
115; LE-NEXT:    blr
116; CHECK-DIAG:    subfc [[REG3:r[0-9]+]], r4, r3
117entry:
118  %cmp = icmp slt i64 %a, %b
119  %conv1 = sext i1 %cmp to i64
120  store i64 %conv1, i64* @glob, align 8
121  ret void
122}
123
124; Function Attrs: norecurse nounwind
125define void @test_llltsll_sext_z_store(i64 %a) {
126; BE-LABEL: test_llltsll_sext_z_store:
127; BE:       # %bb.0: # %entry
128; BE-NEXT:    addis r4, r2, .LC0@toc@ha
129; BE-NEXT:    sradi r3, r3, 63
130; BE-NEXT:    ld r4, .LC0@toc@l(r4)
131; BE-NEXT:    std r3, 0(r4)
132; BE-NEXT:    blr
133;
134; LE-LABEL: test_llltsll_sext_z_store:
135; LE:       # %bb.0: # %entry
136; LE-NEXT:    addis r4, r2, glob@toc@ha
137; LE-NEXT:    sradi r3, r3, 63
138; LE-NEXT:    std r3, glob@toc@l(r4)
139; LE-NEXT:    blr
140entry:
141  %cmp = icmp slt i64 %a, 0
142  %sub = sext i1 %cmp to i64
143  store i64 %sub, i64* @glob, align 8
144  ret void
145}
146