1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s 3; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 < %s | FileCheck %s 4 5define <8 x i16> @testXXBRH(<8 x i16> %a) { 6; CHECK-LABEL: testXXBRH: 7; CHECK: # %bb.0: # %entry 8; CHECK-NEXT: xxbrh 34, 34 9; CHECK-NEXT: blr 10 11entry: 12 %0 = bitcast <8 x i16> %a to <16 x i8> 13 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 1, i32 0, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6, i32 9, i32 8, i32 11, i32 10, i32 13, i32 12, i32 15, i32 14> 14 %2 = bitcast <16 x i8> %1 to <8 x i16> 15 ret <8 x i16> %2 16} 17 18define <4 x i32> @testXXBRW(<4 x i32> %a) { 19; CHECK-LABEL: testXXBRW: 20; CHECK: # %bb.0: # %entry 21; CHECK-NEXT: xxbrw 34, 34 22; CHECK-NEXT: blr 23 24entry: 25 %0 = bitcast <4 x i32> %a to <16 x i8> 26 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12> 27 %2 = bitcast <16 x i8> %1 to <4 x i32> 28 ret <4 x i32> %2 29} 30 31define <2 x double> @testXXBRD(<2 x double> %a) { 32; CHECK-LABEL: testXXBRD: 33; CHECK: # %bb.0: # %entry 34; CHECK-NEXT: xxbrd 34, 34 35; CHECK-NEXT: blr 36 37entry: 38 %0 = bitcast <2 x double> %a to <16 x i8> 39 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8> 40 %2 = bitcast <16 x i8> %1 to <2 x double> 41 ret <2 x double> %2 42} 43 44define <1 x i128> @testXXBRQ(<1 x i128> %a) { 45; CHECK-LABEL: testXXBRQ: 46; CHECK: # %bb.0: # %entry 47; CHECK-NEXT: xxbrq 34, 34 48; CHECK-NEXT: blr 49 50entry: 51 %0 = bitcast <1 x i128> %a to <16 x i8> 52 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 53 %2 = bitcast <16 x i8> %1 to <1 x i128> 54 ret <1 x i128> %2 55} 56 57define <4 x i32> @testXXBRD_With_LogicalOp(<4 x i32> %a, <4 x i32> %b) { 58; CHECK-LABEL: testXXBRD_With_LogicalOp: 59; CHECK: # %bb.0: # %entry 60; CHECK-NEXT: xxland 0, 34, 35 61; CHECK-NEXT: xxbrw 34, 0 62; CHECK-NEXT: blr 63entry: 64 %0 = bitcast <4 x i32> %a to <16 x i8> 65 %1 = shufflevector <16 x i8> %0, <16 x i8> undef, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12> 66 %2 = bitcast <16 x i8> %1 to <4 x i32> 67 %3 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %b) 68 %4 = and <4 x i32> %2, %3 69 ret <4 x i32> %4 70} 71declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) 72