1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
3
4; Test that the dag combiner can understand that some vector operands are
5; all-zeros and then optimize the logical operations.
6
7define void @f1(<2 x i64> %a0) {
8; CHECK-LABEL: f1:
9; CHECK:       # %bb.0: # %bb
10; CHECK-NEXT:    vlrepg %v0, 0(%r1)
11; CHECK-NEXT:    vgbm %v1, 0
12; CHECK-NEXT:    vceqg %v2, %v24, %v1
13; CHECK-NEXT:    vn %v0, %v0, %v0
14; CHECK-NEXT:    vno %v2, %v2, %v2
15; CHECK-NEXT:    vceqg %v0, %v0, %v1
16; CHECK-NEXT:    vx %v0, %v0, %v2
17; CHECK-NEXT:    vnc %v0, %v2, %v0
18; CHECK-NEXT:    vlgvf %r0, %v0, 1
19; CHECK-NEXT:    tmll %r0, 1
20; CHECK-NEXT:  # %bb.1: # %bb15
21
22bb:
23  %tmp = shufflevector <2 x i64> undef, <2 x i64> undef, <2 x i32> zeroinitializer
24  br label %bb1
25
26bb1:                                              ; preds = %bb
27  %tmp2 = load i64, i64* undef, align 8
28  %tmp3 = insertelement <2 x i64> undef, i64 %tmp2, i32 1
29  %tmp4 = icmp ne <2 x i64> %a0, zeroinitializer
30  %tmp5 = xor <2 x i1> %tmp4, zeroinitializer
31  %tmp6 = xor <2 x i1> zeroinitializer, %tmp5
32  %tmp7 = and <2 x i64> %tmp3, %tmp
33  %tmp8 = icmp ne <2 x i64> %tmp7, zeroinitializer
34  %tmp9 = xor <2 x i1> zeroinitializer, %tmp8
35  %tmp10 = icmp ne <2 x i64> %a0, zeroinitializer
36  %tmp11 = xor <2 x i1> %tmp10, %tmp9
37  %tmp12 = and <2 x i1> %tmp6, %tmp11
38  %tmp13 = extractelement <2 x i1> %tmp12, i32 0
39  br i1 %tmp13, label %bb14, label %bb15
40
41bb14:                                             ; preds = %bb1
42  store i64 undef, i64* undef, align 8
43  br label %bb15
44
45bb15:                                             ; preds = %bb14, %bb1
46  unreachable
47}
48