1; Test SELR and SELGR.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 -verify-machineinstrs | FileCheck %s
4
5; Test SELR.
6define i32 @f1(i32 %limit, i32 %a, i32 %b) {
7; CHECK-LABEL: f1:
8; CHECK: clfi %r2, 42
9; CHECK: selrl %r2, %r3, %r4
10; CHECK: br %r14
11  %cond = icmp ult i32 %limit, 42
12  %res = select i1 %cond, i32 %a, i32 %b
13  ret i32 %res
14}
15
16; Test SELGR.
17define i64 @f2(i64 %limit, i64 %a, i64 %b) {
18; CHECK-LABEL: f2:
19; CHECK: clgfi %r2, 42
20; CHECK: selgrl %r2, %r3, %r4
21; CHECK: br %r14
22  %cond = icmp ult i64 %limit, 42
23  %res = select i1 %cond, i64 %a, i64 %b
24  ret i64 %res
25}
26
27; Test SELR in a case that could use COMPARE AND BRANCH.  We prefer using
28; SELR if possible.
29define i32 @f3(i32 %limit, i32 %a, i32 %b) {
30; CHECK-LABEL: f3:
31; CHECK: chi %r2, 42
32; CHECK: selre %r2, %r3, %r4
33; CHECK: br %r14
34  %cond = icmp eq i32 %limit, 42
35  %res = select i1 %cond, i32 %a, i32 %b
36  ret i32 %res
37}
38
39; ...and again for SELGR.
40define i64 @f4(i64 %limit, i64 %a, i64 %b) {
41; CHECK-LABEL: f4:
42; CHECK: cghi %r2, 42
43; CHECK: selgre %r2, %r3, %r4
44; CHECK: br %r14
45  %cond = icmp eq i64 %limit, 42
46  %res = select i1 %cond, i64 %a, i64 %b
47  ret i64 %res
48}
49
50; Check that we also get SELR as a result of early if-conversion.
51define i32 @f5(i32 %limit, i32 %a, i32 %b) {
52; CHECK-LABEL: f5:
53; CHECK: clfi %r2, 41
54; CHECK: selrh %r2, %r4, %r3
55; CHECK: br %r14
56entry:
57  %cond = icmp ult i32 %limit, 42
58  br i1 %cond, label %if.then, label %return
59
60if.then:
61  br label %return
62
63return:
64  %res = phi i32 [ %a, %if.then ], [ %b, %entry ]
65  ret i32 %res
66}
67
68; ... and likewise for SELGR.
69define i64 @f6(i64 %limit, i64 %a, i64 %b) {
70; CHECK-LABEL: f6:
71; CHECK: clgfi %r2, 41
72; CHECK: selgrh %r2, %r4, %r3
73; CHECK: br %r14
74entry:
75  %cond = icmp ult i64 %limit, 42
76  br i1 %cond, label %if.then, label %return
77
78if.then:
79  br label %return
80
81return:
82  %res = phi i64 [ %a, %if.then ], [ %b, %entry ]
83  ret i64 %res
84}
85
86; Check that inverting the condition works as well.
87define i32 @f7(i32 %limit, i32 %a, i32 %b) {
88; CHECK-LABEL: f7:
89; CHECK: clfi %r2, 41
90; CHECK: selrh %r2, %r3, %r4
91; CHECK: br %r14
92entry:
93  %cond = icmp ult i32 %limit, 42
94  br i1 %cond, label %if.then, label %return
95
96if.then:
97  br label %return
98
99return:
100  %res = phi i32 [ %b, %if.then ], [ %a, %entry ]
101  ret i32 %res
102}
103
104; ... and likewise for SELGR.
105define i64 @f8(i64 %limit, i64 %a, i64 %b) {
106; CHECK-LABEL: f8:
107; CHECK: clgfi %r2, 41
108; CHECK: selgrh %r2, %r3, %r4
109; CHECK: br %r14
110entry:
111  %cond = icmp ult i64 %limit, 42
112  br i1 %cond, label %if.then, label %return
113
114if.then:
115  br label %return
116
117return:
118  %res = phi i64 [ %b, %if.then ], [ %a, %entry ]
119  ret i64 %res
120}
121
122