1; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 | FileCheck %s
2;
3; Test that <1 x i8> is legalized properly without vector support.
4
5define void @autogen_SD18500(i8*) {
6; CHECK: .text
7BB:
8  %L5 = load i8, i8* %0
9  %I22 = insertelement <1 x i8> undef, i8 %L5, i32 0
10  %Cmp53 = icmp ule i1 undef, undef
11  br label %CF244
12
13CF244:                                            ; preds = %CF244, %BB
14  %Sl119 = select i1 %Cmp53, <1 x i8> %I22, <1 x i8> undef
15  %Cmp148 = fcmp une float 0x3E03A81780000000, 0x42D92DCD00000000
16  br i1 %Cmp148, label %CF244, label %CF241
17
18CF241:                                            ; preds = %CF241, %CF244
19  %Sl199 = select i1 true, <1 x i8> %Sl119, <1 x i8> zeroinitializer
20  br label %CF241
21}
22