1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s 2 3 4// --------------------------------------------------------------------------// 5// Immediate out of lower bound [-32, 28]. 6 7ld4b {z12.b, z13.b, z14.b, z15.b}, p4/z, [x12, #-36, MUL VL] 8// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [-32, 28]. 9// CHECK-NEXT: ld4b {z12.b, z13.b, z14.b, z15.b}, p4/z, [x12, #-36, MUL VL] 10// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 11 12ld4b {z7.b, z8.b, z9.b, z10.b}, p3/z, [x1, #32, MUL VL] 13// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [-32, 28]. 14// CHECK-NEXT: ld4b {z7.b, z8.b, z9.b, z10.b}, p3/z, [x1, #32, MUL VL] 15// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 16 17 18// --------------------------------------------------------------------------// 19// Immediate not a multiple of four. 20 21ld4b {z12.b, z13.b, z14.b, z15.b}, p4/z, [x12, #-7, MUL VL] 22// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [-32, 28]. 23// CHECK-NEXT: ld4b {z12.b, z13.b, z14.b, z15.b}, p4/z, [x12, #-7, MUL VL] 24// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 25 26ld4b {z7.b, z8.b, z9.b, z10.b}, p3/z, [x1, #5, MUL VL] 27// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [-32, 28]. 28// CHECK-NEXT: ld4b {z7.b, z8.b, z9.b, z10.b}, p3/z, [x1, #5, MUL VL] 29// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 30 31 32// --------------------------------------------------------------------------// 33// Invalid scalar + scalar addressing modes 34 35ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, xzr] 36// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 37// CHECK-NEXT: ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, xzr] 38// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 39 40ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, x0, lsl #1] 41// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 42// CHECK-NEXT: ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, x0, lsl #1] 43// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 44 45ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, w0] 46// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 47// CHECK-NEXT: ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, w0] 48// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 49 50ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, w0, uxtw] 51// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift 52// CHECK-NEXT: ld4b { z0.b, z1.b, z2.b, z3.b }, p0/z, [x0, w0, uxtw] 53// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 54 55 56// --------------------------------------------------------------------------// 57// error: invalid restricted predicate register, expected p0..p7 (without element suffix) 58 59ld4b {z2.b, z3.b, z4.b, z5.b}, p8/z, [x15, #10, MUL VL] 60// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix) 61// CHECK-NEXT: ld4b {z2.b, z3.b, z4.b, z5.b}, p8/z, [x15, #10, MUL VL] 62// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 63 64 65// --------------------------------------------------------------------------// 66// Invalid vector list. 67 68ld4b { }, p0/z, [x0] 69// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected 70// CHECK-NEXT: ld4b { }, p0/z, [x0] 71// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 72 73ld4b { z0.b, z1.b, z2.b, z3.b, z4.b }, p0/z, [x0] 74// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid number of vectors 75// CHECK-NEXT: ld4b { z0.b, z1.b, z2.b, z3.b, z4.b }, p0/z, [x0] 76// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 77 78ld4b { z0.b, z1.b, z2.b, z3.h }, p0/z, [x0] 79// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: mismatched register size suffix 80// CHECK-NEXT: ld4b { z0.b, z1.b, z2.b, z3.h }, p0/z, [x0] 81// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 82 83ld4b { z0.b, z1.b, z3.b, z5.b }, p0/z, [x0] 84// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: registers must be sequential 85// CHECK-NEXT: ld4b { z0.b, z1.b, z3.b, z5.b }, p0/z, [x0] 86// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 87 88ld4b { v0.16b, v1.16b, v2.16b }, p0/z, [x0] 89// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand 90// CHECK-NEXT: ld4b { v0.16b, v1.16b, v2.16b }, p0/z, [x0] 91// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 92 93 94// --------------------------------------------------------------------------// 95// Negative tests for instructions that are incompatible with movprfx 96 97movprfx z21.b, p5/z, z28.b 98ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] 99// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 100// CHECK-NEXT: ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] 101// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 102 103movprfx z21, z28 104ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] 105// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov 106// CHECK-NEXT: ld4b { z21.b, z22.b, z23.b, z24.b }, p5/z, [x10, #20, mul vl] 107// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: 108