1
2 /*---------------------------------------------------------------*/
3 /*--- begin ir_defs.c ---*/
4 /*---------------------------------------------------------------*/
5
6 /*
7 This file is part of Valgrind, a dynamic binary instrumentation
8 framework.
9
10 Copyright (C) 2004-2017 OpenWorks LLP
11 info@open-works.net
12
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
17
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
22
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, write to the Free Software
25 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
26 02110-1301, USA.
27
28 The GNU General Public License is contained in the file COPYING.
29
30 Neither the names of the U.S. Department of Energy nor the
31 University of California nor the names of its contributors may be
32 used to endorse or promote products derived from this software
33 without prior written permission.
34 */
35
36 #include "libvex_basictypes.h"
37 #include "libvex_ir.h"
38 #include "libvex.h"
39
40 #include "main_util.h"
41
42
43 /*---------------------------------------------------------------*/
44 /*--- Printing the IR ---*/
45 /*---------------------------------------------------------------*/
46
ppIRType(IRType ty)47 void ppIRType ( IRType ty )
48 {
49 switch (ty) {
50 case Ity_INVALID: vex_printf("Ity_INVALID"); break;
51 case Ity_I1: vex_printf( "I1"); break;
52 case Ity_I8: vex_printf( "I8"); break;
53 case Ity_I16: vex_printf( "I16"); break;
54 case Ity_I32: vex_printf( "I32"); break;
55 case Ity_I64: vex_printf( "I64"); break;
56 case Ity_I128: vex_printf( "I128"); break;
57 case Ity_F16: vex_printf( "F16"); break;
58 case Ity_F32: vex_printf( "F32"); break;
59 case Ity_F64: vex_printf( "F64"); break;
60 case Ity_F128: vex_printf( "F128"); break;
61 case Ity_D32: vex_printf( "D32"); break;
62 case Ity_D64: vex_printf( "D64"); break;
63 case Ity_D128: vex_printf( "D128"); break;
64 case Ity_V128: vex_printf( "V128"); break;
65 case Ity_V256: vex_printf( "V256"); break;
66 default: vex_printf("ty = 0x%x\n", (UInt)ty);
67 vpanic("ppIRType");
68 }
69 }
70
ppIRConst(const IRConst * con)71 void ppIRConst ( const IRConst* con )
72 {
73 union { ULong i64; Double f64; UInt i32; Float f32; } u;
74 vassert(sizeof(ULong) == sizeof(Double));
75 switch (con->tag) {
76 case Ico_U1: vex_printf( "%d:I1", con->Ico.U1 ? 1 : 0); break;
77 case Ico_U8: vex_printf( "0x%x:I8", (UInt)(con->Ico.U8)); break;
78 case Ico_U16: vex_printf( "0x%x:I16", (UInt)(con->Ico.U16)); break;
79 case Ico_U32: vex_printf( "0x%x:I32", (UInt)(con->Ico.U32)); break;
80 case Ico_U64: vex_printf( "0x%llx:I64", (ULong)(con->Ico.U64)); break;
81 case Ico_F32: u.f32 = con->Ico.F32;
82 vex_printf( "F32{0x%x}", u.i32);
83 break;
84 case Ico_F32i: vex_printf( "F32i{0x%x}", con->Ico.F32i); break;
85 case Ico_F64: u.f64 = con->Ico.F64;
86 vex_printf( "F64{0x%llx}", u.i64);
87 break;
88 case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break;
89 case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break;
90 case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break;
91 default: vpanic("ppIRConst");
92 }
93 }
94
ppIRCallee(const IRCallee * ce)95 void ppIRCallee ( const IRCallee* ce )
96 {
97 vex_printf("%s", ce->name);
98 if (ce->regparms > 0)
99 vex_printf("[rp=%d]", ce->regparms);
100 if (ce->mcx_mask > 0)
101 vex_printf("[mcx=0x%x]", ce->mcx_mask);
102 vex_printf("{%p}", (void*)ce->addr);
103 }
104
ppIRRegArray(const IRRegArray * arr)105 void ppIRRegArray ( const IRRegArray* arr )
106 {
107 vex_printf("(%d:%dx", arr->base, arr->nElems);
108 ppIRType(arr->elemTy);
109 vex_printf(")");
110 }
111
ppIRTemp(IRTemp tmp)112 void ppIRTemp ( IRTemp tmp )
113 {
114 if (tmp == IRTemp_INVALID)
115 vex_printf("IRTemp_INVALID");
116 else
117 vex_printf( "t%u", tmp);
118 }
119
ppIROp(IROp op)120 void ppIROp ( IROp op )
121 {
122 const HChar* str = NULL;
123 IROp base;
124 switch (op) {
125 case Iop_Add8 ... Iop_Add64:
126 str = "Add"; base = Iop_Add8; break;
127 case Iop_Sub8 ... Iop_Sub64:
128 str = "Sub"; base = Iop_Sub8; break;
129 case Iop_Mul8 ... Iop_Mul64:
130 str = "Mul"; base = Iop_Mul8; break;
131 case Iop_Or8 ... Iop_Or64:
132 str = "Or"; base = Iop_Or8; break;
133 case Iop_And8 ... Iop_And64:
134 str = "And"; base = Iop_And8; break;
135 case Iop_Xor8 ... Iop_Xor64:
136 str = "Xor"; base = Iop_Xor8; break;
137 case Iop_Shl8 ... Iop_Shl64:
138 str = "Shl"; base = Iop_Shl8; break;
139 case Iop_Shr8 ... Iop_Shr64:
140 str = "Shr"; base = Iop_Shr8; break;
141 case Iop_Sar8 ... Iop_Sar64:
142 str = "Sar"; base = Iop_Sar8; break;
143 case Iop_CmpEQ8 ... Iop_CmpEQ64:
144 str = "CmpEQ"; base = Iop_CmpEQ8; break;
145 case Iop_CmpNE8 ... Iop_CmpNE64:
146 str = "CmpNE"; base = Iop_CmpNE8; break;
147 case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64:
148 str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break;
149 case Iop_CasCmpNE8 ... Iop_CasCmpNE64:
150 str = "CasCmpNE"; base = Iop_CasCmpNE8; break;
151 case Iop_ExpCmpNE8 ... Iop_ExpCmpNE64:
152 str = "ExpCmpNE"; base = Iop_ExpCmpNE8; break;
153 case Iop_Not8 ... Iop_Not64:
154 str = "Not"; base = Iop_Not8; break;
155 /* other cases must explicitly "return;" */
156 case Iop_8Uto16: vex_printf("8Uto16"); return;
157 case Iop_8Uto32: vex_printf("8Uto32"); return;
158 case Iop_16Uto32: vex_printf("16Uto32"); return;
159 case Iop_8Sto16: vex_printf("8Sto16"); return;
160 case Iop_8Sto32: vex_printf("8Sto32"); return;
161 case Iop_16Sto32: vex_printf("16Sto32"); return;
162 case Iop_32Sto64: vex_printf("32Sto64"); return;
163 case Iop_32Uto64: vex_printf("32Uto64"); return;
164 case Iop_32to8: vex_printf("32to8"); return;
165 case Iop_16Uto64: vex_printf("16Uto64"); return;
166 case Iop_16Sto64: vex_printf("16Sto64"); return;
167 case Iop_8Uto64: vex_printf("8Uto64"); return;
168 case Iop_8Sto64: vex_printf("8Sto64"); return;
169 case Iop_64to16: vex_printf("64to16"); return;
170 case Iop_64to8: vex_printf("64to8"); return;
171
172 case Iop_Not1: vex_printf("Not1"); return;
173 case Iop_32to1: vex_printf("32to1"); return;
174 case Iop_64to1: vex_printf("64to1"); return;
175 case Iop_1Uto8: vex_printf("1Uto8"); return;
176 case Iop_1Uto32: vex_printf("1Uto32"); return;
177 case Iop_1Uto64: vex_printf("1Uto64"); return;
178 case Iop_1Sto8: vex_printf("1Sto8"); return;
179 case Iop_1Sto16: vex_printf("1Sto16"); return;
180 case Iop_1Sto32: vex_printf("1Sto32"); return;
181 case Iop_1Sto64: vex_printf("1Sto64"); return;
182
183 case Iop_MullS8: vex_printf("MullS8"); return;
184 case Iop_MullS16: vex_printf("MullS16"); return;
185 case Iop_MullS32: vex_printf("MullS32"); return;
186 case Iop_MullS64: vex_printf("MullS64"); return;
187 case Iop_MullU8: vex_printf("MullU8"); return;
188 case Iop_MullU16: vex_printf("MullU16"); return;
189 case Iop_MullU32: vex_printf("MullU32"); return;
190 case Iop_MullU64: vex_printf("MullU64"); return;
191
192 case Iop_Clz64: vex_printf("Clz64"); return;
193 case Iop_Clz32: vex_printf("Clz32"); return;
194 case Iop_Ctz64: vex_printf("Ctz64"); return;
195 case Iop_Ctz32: vex_printf("Ctz32"); return;
196
197 case Iop_ClzNat64: vex_printf("ClzNat64"); return;
198 case Iop_ClzNat32: vex_printf("ClzNat32"); return;
199 case Iop_CtzNat64: vex_printf("CtzNat64"); return;
200 case Iop_CtzNat32: vex_printf("CtzNat32"); return;
201
202 case Iop_PopCount64: vex_printf("PopCount64"); return;
203 case Iop_PopCount32: vex_printf("PopCount32"); return;
204
205 case Iop_CmpLT32S: vex_printf("CmpLT32S"); return;
206 case Iop_CmpLE32S: vex_printf("CmpLE32S"); return;
207 case Iop_CmpLT32U: vex_printf("CmpLT32U"); return;
208 case Iop_CmpLE32U: vex_printf("CmpLE32U"); return;
209
210 case Iop_CmpLT64S: vex_printf("CmpLT64S"); return;
211 case Iop_CmpLE64S: vex_printf("CmpLE64S"); return;
212 case Iop_CmpLT64U: vex_printf("CmpLT64U"); return;
213 case Iop_CmpLE64U: vex_printf("CmpLE64U"); return;
214
215 case Iop_CmpNEZ8: vex_printf("CmpNEZ8"); return;
216 case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return;
217 case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return;
218 case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return;
219
220 case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return;
221 case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return;
222
223 case Iop_Left8: vex_printf("Left8"); return;
224 case Iop_Left16: vex_printf("Left16"); return;
225 case Iop_Left32: vex_printf("Left32"); return;
226 case Iop_Left64: vex_printf("Left64"); return;
227 case Iop_Max32U: vex_printf("Max32U"); return;
228
229 case Iop_CmpORD32U: vex_printf("CmpORD32U"); return;
230 case Iop_CmpORD32S: vex_printf("CmpORD32S"); return;
231
232 case Iop_CmpORD64U: vex_printf("CmpORD64U"); return;
233 case Iop_CmpORD64S: vex_printf("CmpORD64S"); return;
234
235 case Iop_DivU32: vex_printf("DivU32"); return;
236 case Iop_DivS32: vex_printf("DivS32"); return;
237 case Iop_DivU64: vex_printf("DivU64"); return;
238 case Iop_DivS64: vex_printf("DivS64"); return;
239 case Iop_DivU64E: vex_printf("DivU64E"); return;
240 case Iop_DivS64E: vex_printf("DivS64E"); return;
241 case Iop_DivU32E: vex_printf("DivU32E"); return;
242 case Iop_DivS32E: vex_printf("DivS32E"); return;
243
244 case Iop_DivModU64to32: vex_printf("DivModU64to32"); return;
245 case Iop_DivModS64to32: vex_printf("DivModS64to32"); return;
246
247 case Iop_DivModU32to32: vex_printf("DivModU32to32"); return;
248 case Iop_DivModS32to32: vex_printf("DivModS32to32"); return;
249
250 case Iop_DivModU128to64: vex_printf("DivModU128to64"); return;
251 case Iop_DivModS128to64: vex_printf("DivModS128to64"); return;
252
253 case Iop_DivModS64to64: vex_printf("DivModS64to64"); return;
254 case Iop_DivModU64to64: vex_printf("DivModU64to64"); return;
255
256 case Iop_16HIto8: vex_printf("16HIto8"); return;
257 case Iop_16to8: vex_printf("16to8"); return;
258 case Iop_8HLto16: vex_printf("8HLto16"); return;
259
260 case Iop_32HIto16: vex_printf("32HIto16"); return;
261 case Iop_32to16: vex_printf("32to16"); return;
262 case Iop_16HLto32: vex_printf("16HLto32"); return;
263
264 case Iop_64HIto32: vex_printf("64HIto32"); return;
265 case Iop_64to32: vex_printf("64to32"); return;
266 case Iop_32HLto64: vex_printf("32HLto64"); return;
267
268 case Iop_128HIto64: vex_printf("128HIto64"); return;
269 case Iop_128to64: vex_printf("128to64"); return;
270 case Iop_64HLto128: vex_printf("64HLto128"); return;
271
272 case Iop_CmpF32: vex_printf("CmpF32"); return;
273 case Iop_F32toI32S: vex_printf("F32toI32S"); return;
274 case Iop_F32toI64S: vex_printf("F32toI64S"); return;
275 case Iop_I32StoF32: vex_printf("I32StoF32"); return;
276 case Iop_I64StoF32: vex_printf("I64StoF32"); return;
277
278 case Iop_AddF64: vex_printf("AddF64"); return;
279 case Iop_SubF64: vex_printf("SubF64"); return;
280 case Iop_MulF64: vex_printf("MulF64"); return;
281 case Iop_DivF64: vex_printf("DivF64"); return;
282 case Iop_AddF64r32: vex_printf("AddF64r32"); return;
283 case Iop_SubF64r32: vex_printf("SubF64r32"); return;
284 case Iop_MulF64r32: vex_printf("MulF64r32"); return;
285 case Iop_DivF64r32: vex_printf("DivF64r32"); return;
286 case Iop_AddF32: vex_printf("AddF32"); return;
287 case Iop_SubF32: vex_printf("SubF32"); return;
288 case Iop_MulF32: vex_printf("MulF32"); return;
289 case Iop_DivF32: vex_printf("DivF32"); return;
290
291 /* 128 bit floating point */
292 case Iop_AddF128: vex_printf("AddF128"); return;
293 case Iop_SubF128: vex_printf("SubF128"); return;
294 case Iop_MulF128: vex_printf("MulF128"); return;
295 case Iop_DivF128: vex_printf("DivF128"); return;
296
297 case Iop_TruncF128toI64S: vex_printf("TruncF128toI64S"); return;
298 case Iop_TruncF128toI32S: vex_printf("TruncF128toI32S"); return;
299 case Iop_TruncF128toI64U: vex_printf("TruncF128toI64U"); return;
300 case Iop_TruncF128toI32U: vex_printf("TruncF128toI32U"); return;
301
302 case Iop_MAddF128: vex_printf("MAddF128"); return;
303 case Iop_MSubF128: vex_printf("MSubF128"); return;
304 case Iop_NegMAddF128: vex_printf("NegMAddF128"); return;
305 case Iop_NegMSubF128: vex_printf("NegMSubF128"); return;
306
307 case Iop_AbsF128: vex_printf("AbsF128"); return;
308 case Iop_NegF128: vex_printf("NegF128"); return;
309 case Iop_SqrtF128: vex_printf("SqrtF128"); return;
310 case Iop_CmpF128: vex_printf("CmpF128"); return;
311
312 case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return;
313 case Iop_F128HItoF64: vex_printf("F128HItoF64"); return;
314 case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return;
315 case Iop_I32StoF128: vex_printf("I32StoF128"); return;
316 case Iop_I64StoF128: vex_printf("I64StoF128"); return;
317 case Iop_I32UtoF128: vex_printf("I32UtoF128"); return;
318 case Iop_I64UtoF128: vex_printf("I64UtoF128"); return;
319 case Iop_F128toI32S: vex_printf("F128toI32S"); return;
320 case Iop_F128toI64S: vex_printf("F128toI64S"); return;
321 case Iop_F128toI32U: vex_printf("F128toI32U"); return;
322 case Iop_F128toI64U: vex_printf("F128toI64U"); return;
323 case Iop_F32toF128: vex_printf("F32toF128"); return;
324 case Iop_F64toF128: vex_printf("F64toF128"); return;
325 case Iop_F128toF64: vex_printf("F128toF64"); return;
326 case Iop_F128toF32: vex_printf("F128toF32"); return;
327 case Iop_F128toI128S: vex_printf("F128toI128"); return;
328 case Iop_RndF128: vex_printf("RndF128"); return;
329
330 /* s390 specific */
331 case Iop_MAddF32: vex_printf("s390_MAddF32"); return;
332 case Iop_MSubF32: vex_printf("s390_MSubF32"); return;
333
334 case Iop_ScaleF64: vex_printf("ScaleF64"); return;
335 case Iop_AtanF64: vex_printf("AtanF64"); return;
336 case Iop_Yl2xF64: vex_printf("Yl2xF64"); return;
337 case Iop_Yl2xp1F64: vex_printf("Yl2xp1F64"); return;
338 case Iop_PRemF64: vex_printf("PRemF64"); return;
339 case Iop_PRemC3210F64: vex_printf("PRemC3210F64"); return;
340 case Iop_PRem1F64: vex_printf("PRem1F64"); return;
341 case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return;
342 case Iop_NegF64: vex_printf("NegF64"); return;
343 case Iop_AbsF64: vex_printf("AbsF64"); return;
344 case Iop_NegF32: vex_printf("NegF32"); return;
345 case Iop_AbsF32: vex_printf("AbsF32"); return;
346 case Iop_SqrtF64: vex_printf("SqrtF64"); return;
347 case Iop_SqrtF32: vex_printf("SqrtF32"); return;
348 case Iop_SinF64: vex_printf("SinF64"); return;
349 case Iop_CosF64: vex_printf("CosF64"); return;
350 case Iop_TanF64: vex_printf("TanF64"); return;
351 case Iop_2xm1F64: vex_printf("2xm1F64"); return;
352
353 case Iop_MAddF64: vex_printf("MAddF64"); return;
354 case Iop_MSubF64: vex_printf("MSubF64"); return;
355 case Iop_MAddF64r32: vex_printf("MAddF64r32"); return;
356 case Iop_MSubF64r32: vex_printf("MSubF64r32"); return;
357
358 case Iop_RSqrtEst5GoodF64: vex_printf("RSqrtEst5GoodF64"); return;
359 case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return;
360 case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return;
361 case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return;
362 case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return;
363
364 case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return;
365
366 case Iop_RecpExpF64: vex_printf("RecpExpF64"); return;
367 case Iop_RecpExpF32: vex_printf("RecpExpF32"); return;
368
369 case Iop_MaxNumF64: vex_printf("MaxNumF64"); return;
370 case Iop_MinNumF64: vex_printf("MinNumF64"); return;
371 case Iop_MaxNumF32: vex_printf("MaxNumF32"); return;
372 case Iop_MinNumF32: vex_printf("MinNumF32"); return;
373
374 case Iop_F16toF64: vex_printf("F16toF64"); return;
375 case Iop_F64toF16: vex_printf("F64toF16"); return;
376 case Iop_F16toF32: vex_printf("F16toF32"); return;
377 case Iop_F32toF16: vex_printf("F32toF16"); return;
378
379 case Iop_QAdd32S: vex_printf("QAdd32S"); return;
380 case Iop_QSub32S: vex_printf("QSub32S"); return;
381 case Iop_Add16x2: vex_printf("Add16x2"); return;
382 case Iop_Sub16x2: vex_printf("Sub16x2"); return;
383 case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return;
384 case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return;
385 case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return;
386 case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return;
387 case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return;
388 case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return;
389 case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return;
390 case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return;
391
392 case Iop_Add8x4: vex_printf("Add8x4"); return;
393 case Iop_Sub8x4: vex_printf("Sub8x4"); return;
394 case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return;
395 case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return;
396 case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return;
397 case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return;
398 case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return;
399 case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return;
400 case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return;
401 case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return;
402 case Iop_Sad8Ux4: vex_printf("Sad8Ux4"); return;
403
404 case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return;
405 case Iop_CmpNEZ8x4: vex_printf("CmpNEZ8x4"); return;
406 case Iop_Reverse8sIn32_x1: vex_printf("Reverse8sIn32_x1"); return;
407
408 case Iop_CmpF64: vex_printf("CmpF64"); return;
409
410 case Iop_F64toI16S: vex_printf("F64toI16S"); return;
411 case Iop_F64toI32S: vex_printf("F64toI32S"); return;
412 case Iop_F64toI64S: vex_printf("F64toI64S"); return;
413 case Iop_F64toI64U: vex_printf("F64toI64U"); return;
414 case Iop_F32toI32U: vex_printf("F32toI32U"); return;
415 case Iop_F32toI64U: vex_printf("F32toI64U"); return;
416
417 case Iop_F64toI32U: vex_printf("F64toI32U"); return;
418
419 case Iop_I32StoF64: vex_printf("I32StoF64"); return;
420 case Iop_I64StoF64: vex_printf("I64StoF64"); return;
421 case Iop_I64UtoF64: vex_printf("I64UtoF64"); return;
422 case Iop_I32UtoF32: vex_printf("I32UtoF32"); return;
423 case Iop_I64UtoF32: vex_printf("I64UtoF32"); return;
424
425 case Iop_I32UtoF64: vex_printf("I32UtoF64"); return;
426
427 case Iop_F32toF64: vex_printf("F32toF64"); return;
428 case Iop_F64toF32: vex_printf("F64toF32"); return;
429
430 case Iop_RoundF128toInt: vex_printf("RoundF128toInt"); return;
431 case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return;
432 case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return;
433 case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return;
434
435 case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
436 case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
437 case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
438 case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
439
440 case Iop_I32UtoFx4: vex_printf("I32UtoFx4"); return;
441 case Iop_I32StoFx4: vex_printf("I32StoFx4"); return;
442
443 case Iop_I32StoF32x4: vex_printf("I32StoF32x4"); return;
444 case Iop_F32toI32Sx4: vex_printf("F32toI32Sx4"); return;
445
446 case Iop_F32toF16x4: vex_printf("F32toF16x4"); return;
447 case Iop_F16toF32x4: vex_printf("F16toF32x4"); return;
448 case Iop_F16toF64x2: vex_printf("F16toF64x2"); return;
449 case Iop_F64toF16x2: vex_printf("F64toF16x2"); return;
450
451 case Iop_RSqrtEst32Fx4: vex_printf("RSqrtEst32Fx4"); return;
452 case Iop_RSqrtEst32Ux4: vex_printf("RSqrtEst32Ux4"); return;
453 case Iop_RSqrtEst32Fx2: vex_printf("RSqrtEst32Fx2"); return;
454 case Iop_RSqrtEst32Ux2: vex_printf("RSqrtEst32Ux2"); return;
455
456 case Iop_QFtoI32Ux4_RZ: vex_printf("QFtoI32Ux4_RZ"); return;
457 case Iop_QFtoI32Sx4_RZ: vex_printf("QFtoI32Sx4_RZ"); return;
458
459 case Iop_FtoI32Ux4_RZ: vex_printf("FtoI32Ux4_RZ"); return;
460 case Iop_FtoI32Sx4_RZ: vex_printf("FtoI32Sx4_RZ"); return;
461
462 case Iop_I32UtoFx2: vex_printf("I32UtoFx2"); return;
463 case Iop_I32StoFx2: vex_printf("I32StoFx2"); return;
464
465 case Iop_FtoI32Ux2_RZ: vex_printf("FtoI32Ux2_RZ"); return;
466 case Iop_FtoI32Sx2_RZ: vex_printf("FtoI32Sx2_RZ"); return;
467
468 case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return;
469 case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return;
470 case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return;
471 case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return;
472
473 case Iop_Abs8x8: vex_printf("Abs8x8"); return;
474 case Iop_Abs16x4: vex_printf("Abs16x4"); return;
475 case Iop_Abs32x2: vex_printf("Abs32x2"); return;
476 case Iop_Add8x8: vex_printf("Add8x8"); return;
477 case Iop_Add16x4: vex_printf("Add16x4"); return;
478 case Iop_Add32x2: vex_printf("Add32x2"); return;
479 case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return;
480 case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return;
481 case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return;
482 case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return;
483 case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return;
484 case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return;
485 case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return;
486 case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return;
487 case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return;
488 case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return;
489 case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return;
490 case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return;
491 case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return;
492 case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return;
493 case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return;
494 case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return;
495 case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return;
496 case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return;
497 case Iop_Sub8x8: vex_printf("Sub8x8"); return;
498 case Iop_Sub16x4: vex_printf("Sub16x4"); return;
499 case Iop_Sub32x2: vex_printf("Sub32x2"); return;
500 case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return;
501 case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return;
502 case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return;
503 case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return;
504 case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return;
505 case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return;
506 case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return;
507 case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return;
508 case Iop_Mul8x8: vex_printf("Mul8x8"); return;
509 case Iop_Mul16x4: vex_printf("Mul16x4"); return;
510 case Iop_Mul32x2: vex_printf("Mul32x2"); return;
511 case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return;
512 case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return;
513 case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return;
514 case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return;
515 case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return;
516 case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return;
517 case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return;
518 case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return;
519 case Iop_QDMull16Sx4: vex_printf("QDMull16Sx4"); return;
520 case Iop_QDMull32Sx2: vex_printf("QDMull32Sx2"); return;
521 case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return;
522 case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return;
523 case Iop_Max8Sx8: vex_printf("Max8Sx8"); return;
524 case Iop_Max16Sx4: vex_printf("Max16Sx4"); return;
525 case Iop_Max32Sx2: vex_printf("Max32Sx2"); return;
526 case Iop_Max8Ux8: vex_printf("Max8Ux8"); return;
527 case Iop_Max16Ux4: vex_printf("Max16Ux4"); return;
528 case Iop_Max32Ux2: vex_printf("Max32Ux2"); return;
529 case Iop_Min8Sx8: vex_printf("Min8Sx8"); return;
530 case Iop_Min16Sx4: vex_printf("Min16Sx4"); return;
531 case Iop_Min32Sx2: vex_printf("Min32Sx2"); return;
532 case Iop_Min8Ux8: vex_printf("Min8Ux8"); return;
533 case Iop_Min16Ux4: vex_printf("Min16Ux4"); return;
534 case Iop_Min32Ux2: vex_printf("Min32Ux2"); return;
535 case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return;
536 case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return;
537 case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return;
538 case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return;
539 case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return;
540 case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return;
541 case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return;
542 case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return;
543 case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return;
544 case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return;
545 case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return;
546 case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return;
547 case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return;
548 case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return;
549 case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return;
550 case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return;
551 case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return;
552 case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return;
553 case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return;
554 case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return;
555 case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return;
556 case Iop_Cnt8x8: vex_printf("Cnt8x8"); return;
557 case Iop_Clz8x8: vex_printf("Clz8x8"); return;
558 case Iop_Clz16x4: vex_printf("Clz16x4"); return;
559 case Iop_Clz32x2: vex_printf("Clz32x2"); return;
560 case Iop_Cls8x8: vex_printf("Cls8x8"); return;
561 case Iop_Cls16x4: vex_printf("Cls16x4"); return;
562 case Iop_Cls32x2: vex_printf("Cls32x2"); return;
563 case Iop_ShlN8x8: vex_printf("ShlN8x8"); return;
564 case Iop_ShlN16x4: vex_printf("ShlN16x4"); return;
565 case Iop_ShlN32x2: vex_printf("ShlN32x2"); return;
566 case Iop_ShrN8x8: vex_printf("ShrN8x8"); return;
567 case Iop_ShrN16x4: vex_printf("ShrN16x4"); return;
568 case Iop_ShrN32x2: vex_printf("ShrN32x2"); return;
569 case Iop_SarN8x8: vex_printf("SarN8x8"); return;
570 case Iop_SarN16x4: vex_printf("SarN16x4"); return;
571 case Iop_SarN32x2: vex_printf("SarN32x2"); return;
572 case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return;
573 case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return;
574 case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return;
575 case Iop_QNarrowBin64Sto32Sx4: vex_printf("QNarrowBin64Sto32Sx4"); return;
576 case Iop_QNarrowBin64Uto32Ux4: vex_printf("QNarrowBin64Uto32Ux4"); return;
577 case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return;
578 case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return;
579 case Iop_NarrowBin64to32x4: vex_printf("NarrowBin64to32x4"); return;
580 case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return;
581 case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return;
582 case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return;
583 case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return;
584 case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return;
585 case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return;
586 case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return;
587 case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return;
588 case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return;
589 case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return;
590 case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return;
591 case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return;
592 case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return;
593 case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return;
594 case Iop_Shl8x8: vex_printf("Shl8x8"); return;
595 case Iop_Shl16x4: vex_printf("Shl16x4"); return;
596 case Iop_Shl32x2: vex_printf("Shl32x2"); return;
597 case Iop_Shr8x8: vex_printf("Shr8x8"); return;
598 case Iop_Shr16x4: vex_printf("Shr16x4"); return;
599 case Iop_Shr32x2: vex_printf("Shr32x2"); return;
600 case Iop_QShl8x8: vex_printf("QShl8x8"); return;
601 case Iop_QShl16x4: vex_printf("QShl16x4"); return;
602 case Iop_QShl32x2: vex_printf("QShl32x2"); return;
603 case Iop_QShl64x1: vex_printf("QShl64x1"); return;
604 case Iop_QSal8x8: vex_printf("QSal8x8"); return;
605 case Iop_QSal16x4: vex_printf("QSal16x4"); return;
606 case Iop_QSal32x2: vex_printf("QSal32x2"); return;
607 case Iop_QSal64x1: vex_printf("QSal64x1"); return;
608 case Iop_QShlNsatUU8x8: vex_printf("QShlNsatUU8x8"); return;
609 case Iop_QShlNsatUU16x4: vex_printf("QShlNsatUU16x4"); return;
610 case Iop_QShlNsatUU32x2: vex_printf("QShlNsatUU32x2"); return;
611 case Iop_QShlNsatUU64x1: vex_printf("QShlNsatUU64x1"); return;
612 case Iop_QShlNsatSU8x8: vex_printf("QShlNsatSU8x8"); return;
613 case Iop_QShlNsatSU16x4: vex_printf("QShlNsatSU16x4"); return;
614 case Iop_QShlNsatSU32x2: vex_printf("QShlNsatSU32x2"); return;
615 case Iop_QShlNsatSU64x1: vex_printf("QShlNsatSU64x1"); return;
616 case Iop_QShlNsatSS8x8: vex_printf("QShlNsatSS8x8"); return;
617 case Iop_QShlNsatSS16x4: vex_printf("QShlNsatSS16x4"); return;
618 case Iop_QShlNsatSS32x2: vex_printf("QShlNsatSS32x2"); return;
619 case Iop_QShlNsatSS64x1: vex_printf("QShlNsatSS64x1"); return;
620 case Iop_Sar8x8: vex_printf("Sar8x8"); return;
621 case Iop_Sar16x4: vex_printf("Sar16x4"); return;
622 case Iop_Sar32x2: vex_printf("Sar32x2"); return;
623 case Iop_Sal8x8: vex_printf("Sal8x8"); return;
624 case Iop_Sal16x4: vex_printf("Sal16x4"); return;
625 case Iop_Sal32x2: vex_printf("Sal32x2"); return;
626 case Iop_Sal64x1: vex_printf("Sal64x1"); return;
627 case Iop_Perm8x8: vex_printf("Perm8x8"); return;
628 case Iop_PermOrZero8x8: vex_printf("PermOrZero8x8"); return;
629 case Iop_Reverse8sIn16_x4: vex_printf("Reverse8sIn16_x4"); return;
630 case Iop_Reverse8sIn32_x2: vex_printf("Reverse8sIn32_x2"); return;
631 case Iop_Reverse16sIn32_x2: vex_printf("Reverse16sIn32_x2"); return;
632 case Iop_Reverse8sIn64_x1: vex_printf("Reverse8sIn64_x1"); return;
633 case Iop_Reverse16sIn64_x1: vex_printf("Reverse16sIn64_x1"); return;
634 case Iop_Reverse32sIn64_x1: vex_printf("Reverse32sIn64_x1"); return;
635 case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return;
636 case Iop_GetMSBs8x8: vex_printf("GetMSBs8x8"); return;
637 case Iop_GetMSBs8x16: vex_printf("GetMSBs8x16"); return;
638
639 case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return;
640 case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return;
641 case Iop_CmpNEZ8x8: vex_printf("CmpNEZ8x8"); return;
642
643 case Iop_Add32Fx4: vex_printf("Add32Fx4"); return;
644 case Iop_Add32Fx2: vex_printf("Add32Fx2"); return;
645 case Iop_Add32F0x4: vex_printf("Add32F0x4"); return;
646 case Iop_Add64Fx2: vex_printf("Add64Fx2"); return;
647 case Iop_Add64F0x2: vex_printf("Add64F0x2"); return;
648
649 case Iop_Div32Fx4: vex_printf("Div32Fx4"); return;
650 case Iop_Div32F0x4: vex_printf("Div32F0x4"); return;
651 case Iop_Div64Fx2: vex_printf("Div64Fx2"); return;
652 case Iop_Div64F0x2: vex_printf("Div64F0x2"); return;
653
654 case Iop_Max32Fx8: vex_printf("Max32Fx8"); return;
655 case Iop_Max32Fx4: vex_printf("Max32Fx4"); return;
656 case Iop_Max32Fx2: vex_printf("Max32Fx2"); return;
657 case Iop_PwMax32Fx4: vex_printf("PwMax32Fx4"); return;
658 case Iop_PwMax32Fx2: vex_printf("PwMax32Fx2"); return;
659 case Iop_Max32F0x4: vex_printf("Max32F0x4"); return;
660 case Iop_Max64Fx4: vex_printf("Max64Fx4"); return;
661 case Iop_Max64Fx2: vex_printf("Max64Fx2"); return;
662 case Iop_Max64F0x2: vex_printf("Max64F0x2"); return;
663
664 case Iop_Min32Fx8: vex_printf("Min32Fx8"); return;
665 case Iop_Min32Fx4: vex_printf("Min32Fx4"); return;
666 case Iop_Min32Fx2: vex_printf("Min32Fx2"); return;
667 case Iop_PwMin32Fx4: vex_printf("PwMin32Fx4"); return;
668 case Iop_PwMin32Fx2: vex_printf("PwMin32Fx2"); return;
669 case Iop_Min32F0x4: vex_printf("Min32F0x4"); return;
670 case Iop_Min64Fx4: vex_printf("Min64Fx4"); return;
671 case Iop_Min64Fx2: vex_printf("Min64Fx2"); return;
672 case Iop_Min64F0x2: vex_printf("Min64F0x2"); return;
673
674 case Iop_Mul32Fx4: vex_printf("Mul32Fx4"); return;
675 case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return;
676 case Iop_Mul64Fx2: vex_printf("Mul64Fx2"); return;
677 case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return;
678
679 case Iop_RecipEst32Ux2: vex_printf("RecipEst32Ux2"); return;
680 case Iop_RecipEst32Fx2: vex_printf("RecipEst32Fx2"); return;
681 case Iop_RecipEst32Fx4: vex_printf("RecipEst32Fx4"); return;
682 case Iop_RecipEst32Fx8: vex_printf("RecipEst32Fx8"); return;
683 case Iop_RecipEst32Ux4: vex_printf("RecipEst32Ux4"); return;
684 case Iop_RecipEst32F0x4: vex_printf("RecipEst32F0x4"); return;
685 case Iop_RecipStep32Fx2: vex_printf("RecipStep32Fx2"); return;
686 case Iop_RecipStep32Fx4: vex_printf("RecipStep32Fx4"); return;
687 case Iop_RecipEst64Fx2: vex_printf("RecipEst64Fx2"); return;
688 case Iop_RecipStep64Fx2: vex_printf("RecipStep64Fx2"); return;
689
690 case Iop_Abs32Fx4: vex_printf("Abs32Fx4"); return;
691 case Iop_Abs64Fx2: vex_printf("Abs64Fx2"); return;
692 case Iop_RSqrtStep32Fx4: vex_printf("RSqrtStep32Fx4"); return;
693 case Iop_RSqrtStep64Fx2: vex_printf("RSqrtStep64Fx2"); return;
694 case Iop_RSqrtStep32Fx2: vex_printf("RSqrtStep32Fx2"); return;
695 case Iop_RSqrtEst64Fx2: vex_printf("RSqrtEst64Fx2"); return;
696
697 case Iop_RSqrtEst32F0x4: vex_printf("RSqrtEst32F0x4"); return;
698 case Iop_RSqrtEst32Fx8: vex_printf("RSqrtEst32Fx8"); return;
699
700 case Iop_Sqrt32Fx4: vex_printf("Sqrt32Fx4"); return;
701 case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return;
702 case Iop_Sqrt64Fx2: vex_printf("Sqrt64Fx2"); return;
703 case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return;
704 case Iop_Sqrt32Fx8: vex_printf("Sqrt32Fx8"); return;
705 case Iop_Sqrt64Fx4: vex_printf("Sqrt64Fx4"); return;
706
707 case Iop_Scale2_32Fx4: vex_printf("Scale2_32Fx4"); return;
708 case Iop_Scale2_64Fx2: vex_printf("Scale2_64Fx2"); return;
709 case Iop_Log2_32Fx4: vex_printf("Log2_32Fx4"); return;
710 case Iop_Log2_64Fx2: vex_printf("Log2_64Fx2"); return;
711
712 case Iop_Sub32Fx4: vex_printf("Sub32Fx4"); return;
713 case Iop_Sub32Fx2: vex_printf("Sub32Fx2"); return;
714 case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return;
715 case Iop_Sub64Fx2: vex_printf("Sub64Fx2"); return;
716 case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return;
717
718 case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return;
719 case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return;
720 case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return;
721 case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return;
722 case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return;
723 case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return;
724 case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return;
725 case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return;
726 case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return;
727 case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return;
728 case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return;
729 case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return;
730 case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return;
731
732 case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return;
733 case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return;
734 case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return;
735 case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return;
736 case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return;
737 case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return;
738 case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return;
739 case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return;
740
741 case Iop_Neg64Fx2: vex_printf("Neg64Fx2"); return;
742 case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return;
743 case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return;
744
745 case Iop_F32x4_2toQ16x8: vex_printf("F32x4_2toQ16x8"); return;
746 case Iop_F64x2_2toQ32x4: vex_printf("F64x2_2toQ32x4"); return;
747
748 case Iop_V128to64: vex_printf("V128to64"); return;
749 case Iop_V128HIto64: vex_printf("V128HIto64"); return;
750 case Iop_64HLtoV128: vex_printf("64HLtoV128"); return;
751
752 case Iop_64UtoV128: vex_printf("64UtoV128"); return;
753 case Iop_SetV128lo64: vex_printf("SetV128lo64"); return;
754
755 case Iop_ZeroHI64ofV128: vex_printf("ZeroHI64ofV128"); return;
756 case Iop_ZeroHI96ofV128: vex_printf("ZeroHI96ofV128"); return;
757 case Iop_ZeroHI112ofV128: vex_printf("ZeroHI112ofV128"); return;
758 case Iop_ZeroHI120ofV128: vex_printf("ZeroHI120ofV128"); return;
759
760 case Iop_32UtoV128: vex_printf("32UtoV128"); return;
761 case Iop_V128to32: vex_printf("V128to32"); return;
762 case Iop_SetV128lo32: vex_printf("SetV128lo32"); return;
763
764 case Iop_Dup8x16: vex_printf("Dup8x16"); return;
765 case Iop_Dup16x8: vex_printf("Dup16x8"); return;
766 case Iop_Dup32x4: vex_printf("Dup32x4"); return;
767 case Iop_Dup8x8: vex_printf("Dup8x8"); return;
768 case Iop_Dup16x4: vex_printf("Dup16x4"); return;
769 case Iop_Dup32x2: vex_printf("Dup32x2"); return;
770
771 case Iop_NotV128: vex_printf("NotV128"); return;
772 case Iop_AndV128: vex_printf("AndV128"); return;
773 case Iop_OrV128: vex_printf("OrV128"); return;
774 case Iop_XorV128: vex_printf("XorV128"); return;
775
776 case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return;
777 case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return;
778 case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return;
779 case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return;
780 case Iop_CmpNEZ128x1: vex_printf("CmpNEZ128x1"); return;
781
782 case Iop_Abs8x16: vex_printf("Abs8x16"); return;
783 case Iop_Abs16x8: vex_printf("Abs16x8"); return;
784 case Iop_Abs32x4: vex_printf("Abs32x4"); return;
785 case Iop_Abs64x2: vex_printf("Abs64x2"); return;
786
787 case Iop_Add8x16: vex_printf("Add8x16"); return;
788 case Iop_Add16x8: vex_printf("Add16x8"); return;
789 case Iop_Add32x4: vex_printf("Add32x4"); return;
790 case Iop_Add64x2: vex_printf("Add64x2"); return;
791 case Iop_Add128x1: vex_printf("Add128x1"); return;
792 case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
793 case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
794 case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
795 case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return;
796 case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return;
797 case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return;
798 case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return;
799 case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return;
800
801 case Iop_QAddExtUSsatSS8x16: vex_printf("QAddExtUSsatSS8x16"); return;
802 case Iop_QAddExtUSsatSS16x8: vex_printf("QAddExtUSsatSS16x8"); return;
803 case Iop_QAddExtUSsatSS32x4: vex_printf("QAddExtUSsatSS32x4"); return;
804 case Iop_QAddExtUSsatSS64x2: vex_printf("QAddExtUSsatSS64x2"); return;
805 case Iop_QAddExtSUsatUU8x16: vex_printf("QAddExtSUsatUU8x16"); return;
806 case Iop_QAddExtSUsatUU16x8: vex_printf("QAddExtSUsatUU16x8"); return;
807 case Iop_QAddExtSUsatUU32x4: vex_printf("QAddExtSUsatUU32x4"); return;
808 case Iop_QAddExtSUsatUU64x2: vex_printf("QAddExtSUsatUU64x2"); return;
809
810 case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return;
811 case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return;
812 case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return;
813 case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return;
814 case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return;
815 case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return;
816 case Iop_PwAddL64Ux2: vex_printf("PwAddL64Ux2"); return;
817 case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return;
818 case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return;
819 case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return;
820
821 case Iop_Sub8x16: vex_printf("Sub8x16"); return;
822 case Iop_Sub16x8: vex_printf("Sub16x8"); return;
823 case Iop_Sub32x4: vex_printf("Sub32x4"); return;
824 case Iop_Sub64x2: vex_printf("Sub64x2"); return;
825 case Iop_Sub128x1: vex_printf("Sub128x1"); return;
826 case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
827 case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
828 case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
829 case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return;
830 case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return;
831 case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return;
832 case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return;
833 case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return;
834
835 case Iop_Mul8x16: vex_printf("Mul8x16"); return;
836 case Iop_Mul16x8: vex_printf("Mul16x8"); return;
837 case Iop_Mul32x4: vex_printf("Mul32x4"); return;
838 case Iop_Mull8Ux8: vex_printf("Mull8Ux8"); return;
839 case Iop_Mull8Sx8: vex_printf("Mull8Sx8"); return;
840 case Iop_Mull16Ux4: vex_printf("Mull16Ux4"); return;
841 case Iop_Mull16Sx4: vex_printf("Mull16Sx4"); return;
842 case Iop_Mull32Ux2: vex_printf("Mull32Ux2"); return;
843 case Iop_Mull32Sx2: vex_printf("Mull32Sx2"); return;
844 case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return;
845 case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return;
846 case Iop_MulHi8Ux16: vex_printf("MulHi8Ux16"); return;
847 case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
848 case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
849 case Iop_MulHi8Sx16: vex_printf("MulHi8Sx16"); return;
850 case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
851 case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
852 case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return;
853 case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return;
854 case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return;
855 case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return;
856
857 case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return;
858 case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return;
859 case Iop_MullEven32Ux4: vex_printf("MullEven32Ux4"); return;
860 case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return;
861 case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return;
862 case Iop_MullEven32Sx4: vex_printf("MullEven32Sx4"); return;
863
864 case Iop_PolynomialMulAdd8x16:
865 vex_printf("PolynomialMulAdd8x16"); return;
866 case Iop_PolynomialMulAdd16x8:
867 vex_printf("PolynomialMulAdd16x8"); return;
868 case Iop_PolynomialMulAdd32x4:
869 vex_printf("PolynomialMulAdd32x4"); return;
870 case Iop_PolynomialMulAdd64x2:
871 vex_printf("PolynomialMulAdd64x2"); return;
872
873 case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
874 case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
875 case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
876 case Iop_Avg64Ux2: vex_printf("Avg64Ux2"); return;
877 case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
878 case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
879 case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
880 case Iop_Avg64Sx2: vex_printf("Avg64Sx2"); return;
881
882 case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
883 case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
884 case Iop_Max32Sx4: vex_printf("Max32Sx4"); return;
885 case Iop_Max64Sx2: vex_printf("Max64Sx2"); return;
886 case Iop_Max8Ux16: vex_printf("Max8Ux16"); return;
887 case Iop_Max16Ux8: vex_printf("Max16Ux8"); return;
888 case Iop_Max32Ux4: vex_printf("Max32Ux4"); return;
889 case Iop_Max64Ux2: vex_printf("Max64Ux2"); return;
890
891 case Iop_Min8Sx16: vex_printf("Min8Sx16"); return;
892 case Iop_Min16Sx8: vex_printf("Min16Sx8"); return;
893 case Iop_Min32Sx4: vex_printf("Min32Sx4"); return;
894 case Iop_Min64Sx2: vex_printf("Min64Sx2"); return;
895 case Iop_Min8Ux16: vex_printf("Min8Ux16"); return;
896 case Iop_Min16Ux8: vex_printf("Min16Ux8"); return;
897 case Iop_Min32Ux4: vex_printf("Min32Ux4"); return;
898 case Iop_Min64Ux2: vex_printf("Min64Ux2"); return;
899
900 case Iop_CmpEQ8x16: vex_printf("CmpEQ8x16"); return;
901 case Iop_CmpEQ16x8: vex_printf("CmpEQ16x8"); return;
902 case Iop_CmpEQ32x4: vex_printf("CmpEQ32x4"); return;
903 case Iop_CmpEQ64x2: vex_printf("CmpEQ64x2"); return;
904 case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
905 case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
906 case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
907 case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return;
908 case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return;
909 case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return;
910 case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return;
911 case Iop_CmpGT64Ux2: vex_printf("CmpGT64Ux2"); return;
912
913 case Iop_Cnt8x16: vex_printf("Cnt8x16"); return;
914 case Iop_Clz8x16: vex_printf("Clz8x16"); return;
915 case Iop_Clz16x8: vex_printf("Clz16x8"); return;
916 case Iop_Clz32x4: vex_printf("Clz32x4"); return;
917 case Iop_Clz64x2: vex_printf("Clz64x2"); return;
918 case Iop_Cls8x16: vex_printf("Cls8x16"); return;
919 case Iop_Cls16x8: vex_printf("Cls16x8"); return;
920 case Iop_Cls32x4: vex_printf("Cls32x4"); return;
921 case Iop_Ctz8x16: vex_printf("Iop_Ctz8x16"); return;
922 case Iop_Ctz16x8: vex_printf("Iop_Ctz16x8"); return;
923 case Iop_Ctz32x4: vex_printf("Iop_Ctz32x4"); return;
924 case Iop_Ctz64x2: vex_printf("Iop_Ctz64x2"); return;
925
926 case Iop_ShlV128: vex_printf("ShlV128"); return;
927 case Iop_ShrV128: vex_printf("ShrV128"); return;
928 case Iop_SarV128: vex_printf("SarV128"); return;
929
930 case Iop_ShlN8x16: vex_printf("ShlN8x16"); return;
931 case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
932 case Iop_ShlN32x4: vex_printf("ShlN32x4"); return;
933 case Iop_ShlN64x2: vex_printf("ShlN64x2"); return;
934 case Iop_ShrN8x16: vex_printf("ShrN8x16"); return;
935 case Iop_ShrN16x8: vex_printf("ShrN16x8"); return;
936 case Iop_ShrN32x4: vex_printf("ShrN32x4"); return;
937 case Iop_ShrN64x2: vex_printf("ShrN64x2"); return;
938 case Iop_SarN8x16: vex_printf("SarN8x16"); return;
939 case Iop_SarN16x8: vex_printf("SarN16x8"); return;
940 case Iop_SarN32x4: vex_printf("SarN32x4"); return;
941 case Iop_SarN64x2: vex_printf("SarN64x2"); return;
942
943 case Iop_Shl8x16: vex_printf("Shl8x16"); return;
944 case Iop_Shl16x8: vex_printf("Shl16x8"); return;
945 case Iop_Shl32x4: vex_printf("Shl32x4"); return;
946 case Iop_Shl64x2: vex_printf("Shl64x2"); return;
947 case Iop_QSal8x16: vex_printf("QSal8x16"); return;
948 case Iop_QSal16x8: vex_printf("QSal16x8"); return;
949 case Iop_QSal32x4: vex_printf("QSal32x4"); return;
950 case Iop_QSal64x2: vex_printf("QSal64x2"); return;
951 case Iop_QShl8x16: vex_printf("QShl8x16"); return;
952 case Iop_QShl16x8: vex_printf("QShl16x8"); return;
953 case Iop_QShl32x4: vex_printf("QShl32x4"); return;
954 case Iop_QShl64x2: vex_printf("QShl64x2"); return;
955 case Iop_QShlNsatSS8x16: vex_printf("QShlNsatSS8x16"); return;
956 case Iop_QShlNsatSS16x8: vex_printf("QShlNsatSS16x8"); return;
957 case Iop_QShlNsatSS32x4: vex_printf("QShlNsatSS32x4"); return;
958 case Iop_QShlNsatSS64x2: vex_printf("QShlNsatSS64x2"); return;
959 case Iop_QShlNsatUU8x16: vex_printf("QShlNsatUU8x16"); return;
960 case Iop_QShlNsatUU16x8: vex_printf("QShlNsatUU16x8"); return;
961 case Iop_QShlNsatUU32x4: vex_printf("QShlNsatUU32x4"); return;
962 case Iop_QShlNsatUU64x2: vex_printf("QShlNsatUU64x2"); return;
963 case Iop_QShlNsatSU8x16: vex_printf("QShlNsatSU8x16"); return;
964 case Iop_QShlNsatSU16x8: vex_printf("QShlNsatSU16x8"); return;
965 case Iop_QShlNsatSU32x4: vex_printf("QShlNsatSU32x4"); return;
966 case Iop_QShlNsatSU64x2: vex_printf("QShlNsatSU64x2"); return;
967 case Iop_Shr8x16: vex_printf("Shr8x16"); return;
968 case Iop_Shr16x8: vex_printf("Shr16x8"); return;
969 case Iop_Shr32x4: vex_printf("Shr32x4"); return;
970 case Iop_Shr64x2: vex_printf("Shr64x2"); return;
971 case Iop_Sar8x16: vex_printf("Sar8x16"); return;
972 case Iop_Sar16x8: vex_printf("Sar16x8"); return;
973 case Iop_Sar32x4: vex_printf("Sar32x4"); return;
974 case Iop_Sar64x2: vex_printf("Sar64x2"); return;
975 case Iop_Sal8x16: vex_printf("Sal8x16"); return;
976 case Iop_Sal16x8: vex_printf("Sal16x8"); return;
977 case Iop_Sal32x4: vex_printf("Sal32x4"); return;
978 case Iop_Sal64x2: vex_printf("Sal64x2"); return;
979 case Iop_Rol8x16: vex_printf("Rol8x16"); return;
980 case Iop_Rol16x8: vex_printf("Rol16x8"); return;
981 case Iop_Rol32x4: vex_printf("Rol32x4"); return;
982 case Iop_Rol64x2: vex_printf("Rol64x2"); return;
983
984 case Iop_QandUQsh8x16: vex_printf("QandUQsh8x16"); return;
985 case Iop_QandUQsh16x8: vex_printf("QandUQsh16x8"); return;
986 case Iop_QandUQsh32x4: vex_printf("QandUQsh32x4"); return;
987 case Iop_QandUQsh64x2: vex_printf("QandUQsh64x2"); return;
988 case Iop_QandSQsh8x16: vex_printf("QandSQsh8x16"); return;
989 case Iop_QandSQsh16x8: vex_printf("QandSQsh16x8"); return;
990 case Iop_QandSQsh32x4: vex_printf("QandSQsh32x4"); return;
991 case Iop_QandSQsh64x2: vex_printf("QandSQsh64x2"); return;
992 case Iop_QandUQRsh8x16: vex_printf("QandUQRsh8x16"); return;
993 case Iop_QandUQRsh16x8: vex_printf("QandUQRsh16x8"); return;
994 case Iop_QandUQRsh32x4: vex_printf("QandUQRsh32x4"); return;
995 case Iop_QandUQRsh64x2: vex_printf("QandUQRsh64x2"); return;
996 case Iop_QandSQRsh8x16: vex_printf("QandSQRsh8x16"); return;
997 case Iop_QandSQRsh16x8: vex_printf("QandSQRsh16x8"); return;
998 case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return;
999 case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return;
1000
1001 case Iop_Sh8Sx16: vex_printf("Sh8Sx16"); return;
1002 case Iop_Sh16Sx8: vex_printf("Sh16Sx8"); return;
1003 case Iop_Sh32Sx4: vex_printf("Sh32Sx4"); return;
1004 case Iop_Sh64Sx2: vex_printf("Sh64Sx2"); return;
1005 case Iop_Sh8Ux16: vex_printf("Sh8Ux16"); return;
1006 case Iop_Sh16Ux8: vex_printf("Sh16Ux8"); return;
1007 case Iop_Sh32Ux4: vex_printf("Sh32Ux4"); return;
1008 case Iop_Sh64Ux2: vex_printf("Sh64Ux2"); return;
1009 case Iop_Rsh8Sx16: vex_printf("Rsh8Sx16"); return;
1010 case Iop_Rsh16Sx8: vex_printf("Rsh16Sx8"); return;
1011 case Iop_Rsh32Sx4: vex_printf("Rsh32Sx4"); return;
1012 case Iop_Rsh64Sx2: vex_printf("Rsh64Sx2"); return;
1013 case Iop_Rsh8Ux16: vex_printf("Rsh8Ux16"); return;
1014 case Iop_Rsh16Ux8: vex_printf("Rsh16Ux8"); return;
1015 case Iop_Rsh32Ux4: vex_printf("Rsh32Ux4"); return;
1016 case Iop_Rsh64Ux2: vex_printf("Rsh64Ux2"); return;
1017
1018 case Iop_QandQShrNnarrow16Uto8Ux8:
1019 vex_printf("QandQShrNnarrow16Uto8Ux8"); return;
1020 case Iop_QandQShrNnarrow32Uto16Ux4:
1021 vex_printf("QandQShrNnarrow32Uto16Ux4"); return;
1022 case Iop_QandQShrNnarrow64Uto32Ux2:
1023 vex_printf("QandQShrNnarrow64Uto32Ux2"); return;
1024 case Iop_QandQSarNnarrow16Sto8Sx8:
1025 vex_printf("QandQSarNnarrow16Sto8Sx8"); return;
1026 case Iop_QandQSarNnarrow32Sto16Sx4:
1027 vex_printf("QandQSarNnarrow32Sto16Sx4"); return;
1028 case Iop_QandQSarNnarrow64Sto32Sx2:
1029 vex_printf("QandQSarNnarrow64Sto32Sx2"); return;
1030 case Iop_QandQSarNnarrow16Sto8Ux8:
1031 vex_printf("QandQSarNnarrow16Sto8Ux8"); return;
1032 case Iop_QandQSarNnarrow32Sto16Ux4:
1033 vex_printf("QandQSarNnarrow32Sto16Ux4"); return;
1034 case Iop_QandQSarNnarrow64Sto32Ux2:
1035 vex_printf("QandQSarNnarrow64Sto32Ux2"); return;
1036 case Iop_QandQRShrNnarrow16Uto8Ux8:
1037 vex_printf("QandQRShrNnarrow16Uto8Ux8"); return;
1038 case Iop_QandQRShrNnarrow32Uto16Ux4:
1039 vex_printf("QandQRShrNnarrow32Uto16Ux4"); return;
1040 case Iop_QandQRShrNnarrow64Uto32Ux2:
1041 vex_printf("QandQRShrNnarrow64Uto32Ux2"); return;
1042 case Iop_QandQRSarNnarrow16Sto8Sx8:
1043 vex_printf("QandQRSarNnarrow16Sto8Sx8"); return;
1044 case Iop_QandQRSarNnarrow32Sto16Sx4:
1045 vex_printf("QandQRSarNnarrow32Sto16Sx4"); return;
1046 case Iop_QandQRSarNnarrow64Sto32Sx2:
1047 vex_printf("QandQRSarNnarrow64Sto32Sx2"); return;
1048 case Iop_QandQRSarNnarrow16Sto8Ux8:
1049 vex_printf("QandQRSarNnarrow16Sto8Ux8"); return;
1050 case Iop_QandQRSarNnarrow32Sto16Ux4:
1051 vex_printf("QandQRSarNnarrow32Sto16Ux4"); return;
1052 case Iop_QandQRSarNnarrow64Sto32Ux2:
1053 vex_printf("QandQRSarNnarrow64Sto32Ux2"); return;
1054
1055 case Iop_NarrowBin16to8x16: vex_printf("NarrowBin16to8x16"); return;
1056 case Iop_NarrowBin32to16x8: vex_printf("NarrowBin32to16x8"); return;
1057 case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return;
1058 case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return;
1059 case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return;
1060 case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return;
1061 case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return;
1062 case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return;
1063 case Iop_NarrowUn16to8x8: vex_printf("NarrowUn16to8x8"); return;
1064 case Iop_NarrowUn32to16x4: vex_printf("NarrowUn32to16x4"); return;
1065 case Iop_NarrowUn64to32x2: vex_printf("NarrowUn64to32x2"); return;
1066 case Iop_QNarrowUn16Uto8Ux8: vex_printf("QNarrowUn16Uto8Ux8"); return;
1067 case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return;
1068 case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return;
1069 case Iop_QNarrowUn16Sto8Sx8: vex_printf("QNarrowUn16Sto8Sx8"); return;
1070 case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return;
1071 case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return;
1072 case Iop_QNarrowUn16Sto8Ux8: vex_printf("QNarrowUn16Sto8Ux8"); return;
1073 case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return;
1074 case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return;
1075 case Iop_Widen8Uto16x8: vex_printf("Widen8Uto16x8"); return;
1076 case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return;
1077 case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return;
1078 case Iop_Widen8Sto16x8: vex_printf("Widen8Sto16x8"); return;
1079 case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return;
1080 case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return;
1081
1082 case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return;
1083 case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return;
1084 case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return;
1085 case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return;
1086 case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return;
1087 case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return;
1088 case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return;
1089 case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return;
1090
1091 case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return;
1092 case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return;
1093 case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return;
1094 case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return;
1095 case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return;
1096 case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return;
1097
1098 case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return;
1099 case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return;
1100 case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return;
1101 case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return;
1102 case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return;
1103 case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return;
1104 case Iop_PackOddLanes8x16: vex_printf("InterleavePackOddLanes8x16"); return;
1105 case Iop_PackOddLanes16x8: vex_printf("InterleavePackOddLanes16x8"); return;
1106 case Iop_PackOddLanes32x4: vex_printf("InterleavePackOddLanes32x4"); return;
1107 case Iop_PackEvenLanes8x16: vex_printf("InterleavePackEvenLanes8x16"); return;
1108 case Iop_PackEvenLanes16x8: vex_printf("InterleavePackEvenLanes16x8"); return;
1109 case Iop_PackEvenLanes32x4: vex_printf("InterleavePackEvenLanes32x4"); return;
1110
1111 case Iop_GetElem8x16: vex_printf("GetElem8x16"); return;
1112 case Iop_GetElem16x8: vex_printf("GetElem16x8"); return;
1113 case Iop_GetElem32x4: vex_printf("GetElem32x4"); return;
1114 case Iop_GetElem64x2: vex_printf("GetElem64x2"); return;
1115
1116 case Iop_SetElem8x16: vex_printf("SetElem8x16"); return;
1117 case Iop_SetElem16x8: vex_printf("SetElem16x8"); return;
1118 case Iop_SetElem32x4: vex_printf("SetElem32x4"); return;
1119 case Iop_SetElem64x2: vex_printf("SetElem64x2"); return;
1120
1121 case Iop_GetElem8x8: vex_printf("GetElem8x8"); return;
1122 case Iop_GetElem16x4: vex_printf("GetElem16x4"); return;
1123 case Iop_GetElem32x2: vex_printf("GetElem32x2"); return;
1124 case Iop_SetElem8x8: vex_printf("SetElem8x8"); return;
1125 case Iop_SetElem16x4: vex_printf("SetElem16x4"); return;
1126 case Iop_SetElem32x2: vex_printf("SetElem32x2"); return;
1127
1128 case Iop_Slice64: vex_printf("Slice64"); return;
1129 case Iop_SliceV128: vex_printf("SliceV128"); return;
1130
1131 case Iop_Perm8x16: vex_printf("Perm8x16"); return;
1132 case Iop_PermOrZero8x16: vex_printf("PermOrZero8x16"); return;
1133 case Iop_Perm32x4: vex_printf("Perm32x4"); return;
1134 case Iop_Perm8x16x2: vex_printf("Perm8x16x2"); return;
1135 case Iop_Reverse8sIn16_x8: vex_printf("Reverse8sIn16_x8"); return;
1136 case Iop_Reverse8sIn32_x4: vex_printf("Reverse8sIn32_x4"); return;
1137 case Iop_Reverse16sIn32_x4: vex_printf("Reverse16sIn32_x4"); return;
1138 case Iop_Reverse8sIn64_x2: vex_printf("Reverse8sIn64_x2"); return;
1139 case Iop_Reverse16sIn64_x2: vex_printf("Reverse16sIn64_x2"); return;
1140 case Iop_Reverse32sIn64_x2: vex_printf("Reverse32sIn64_x2"); return;
1141 case Iop_Reverse1sIn8_x16: vex_printf("Reverse1sIn8_x16"); return;
1142
1143 case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return;
1144 case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return;
1145 case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return;
1146 case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return;
1147 case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return;
1148 case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return;
1149 case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return;
1150 case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return;
1151
1152 case Iop_D32toD64: vex_printf("D32toD64"); return;
1153 case Iop_D64toD32: vex_printf("D64toD32"); return;
1154 case Iop_AddD64: vex_printf("AddD64"); return;
1155 case Iop_SubD64: vex_printf("SubD64"); return;
1156 case Iop_MulD64: vex_printf("MulD64"); return;
1157 case Iop_DivD64: vex_printf("DivD64"); return;
1158 case Iop_ShlD64: vex_printf("ShlD64"); return;
1159 case Iop_ShrD64: vex_printf("ShrD64"); return;
1160 case Iop_D64toI32S: vex_printf("D64toI32S"); return;
1161 case Iop_D64toI32U: vex_printf("D64toI32U"); return;
1162 case Iop_D64toI64S: vex_printf("D64toI64S"); return;
1163 case Iop_D64toI64U: vex_printf("D64toI64U"); return;
1164 case Iop_I32StoD64: vex_printf("I32StoD64"); return;
1165 case Iop_I32UtoD64: vex_printf("I32UtoD64"); return;
1166 case Iop_I64StoD64: vex_printf("I64StoD64"); return;
1167 case Iop_I64UtoD64: vex_printf("I64UtoD64"); return;
1168 case Iop_I32StoD128: vex_printf("I32StoD128"); return;
1169 case Iop_I32UtoD128: vex_printf("I32UtoD128"); return;
1170 case Iop_I64StoD128: vex_printf("I64StoD128"); return;
1171 case Iop_I64UtoD128: vex_printf("I64UtoD128"); return;
1172 case Iop_D64toD128: vex_printf("D64toD128"); return;
1173 case Iop_D128toD64: vex_printf("D128toD64"); return;
1174 case Iop_D128toI32S: vex_printf("D128toI32S"); return;
1175 case Iop_D128toI32U: vex_printf("D128toI32U"); return;
1176 case Iop_D128toI64S: vex_printf("D128toI64S"); return;
1177 case Iop_D128toI64U: vex_printf("D128toI64U"); return;
1178 case Iop_F32toD32: vex_printf("F32toD32"); return;
1179 case Iop_F32toD64: vex_printf("F32toD64"); return;
1180 case Iop_F32toD128: vex_printf("F32toD128"); return;
1181 case Iop_F64toD32: vex_printf("F64toD32"); return;
1182 case Iop_F64toD64: vex_printf("F64toD64"); return;
1183 case Iop_F64toD128: vex_printf("F64toD128"); return;
1184 case Iop_F128toD32: vex_printf("F128toD32"); return;
1185 case Iop_F128toD64: vex_printf("F128toD64"); return;
1186 case Iop_F128toD128: vex_printf("F128toD128"); return;
1187 case Iop_D32toF32: vex_printf("D32toF32"); return;
1188 case Iop_D32toF64: vex_printf("D32toF64"); return;
1189 case Iop_D32toF128: vex_printf("D32toF128"); return;
1190 case Iop_D64toF32: vex_printf("D64toF32"); return;
1191 case Iop_D64toF64: vex_printf("D64toF64"); return;
1192 case Iop_D64toF128: vex_printf("D64toF128"); return;
1193 case Iop_D128toF32: vex_printf("D128toF32"); return;
1194 case Iop_D128toF64: vex_printf("D128toF64"); return;
1195 case Iop_D128toF128: vex_printf("D128toF128"); return;
1196 case Iop_AddD128: vex_printf("AddD128"); return;
1197 case Iop_SubD128: vex_printf("SubD128"); return;
1198 case Iop_MulD128: vex_printf("MulD128"); return;
1199 case Iop_DivD128: vex_printf("DivD128"); return;
1200 case Iop_ShlD128: vex_printf("ShlD128"); return;
1201 case Iop_ShrD128: vex_printf("ShrD128"); return;
1202 case Iop_RoundD64toInt: vex_printf("RoundD64toInt"); return;
1203 case Iop_RoundD128toInt: vex_printf("RoundD128toInt"); return;
1204 case Iop_QuantizeD64: vex_printf("QuantizeD64"); return;
1205 case Iop_QuantizeD128: vex_printf("QuantizeD128"); return;
1206 case Iop_ExtractExpD64: vex_printf("ExtractExpD64"); return;
1207 case Iop_ExtractExpD128: vex_printf("ExtractExpD128"); return;
1208 case Iop_ExtractSigD64: vex_printf("ExtractSigD64"); return;
1209 case Iop_ExtractSigD128: vex_printf("ExtractSigD128"); return;
1210 case Iop_InsertExpD64: vex_printf("InsertExpD64"); return;
1211 case Iop_InsertExpD128: vex_printf("InsertExpD128"); return;
1212 case Iop_CmpD64: vex_printf("CmpD64"); return;
1213 case Iop_CmpD128: vex_printf("CmpD128"); return;
1214 case Iop_CmpExpD64: vex_printf("CmpExpD64"); return;
1215 case Iop_CmpExpD128: vex_printf("CmpExpD128"); return;
1216 case Iop_D64HLtoD128: vex_printf("D64HLtoD128"); return;
1217 case Iop_D128HItoD64: vex_printf("D128HItoD64"); return;
1218 case Iop_D128LOtoD64: vex_printf("D128LOtoD64"); return;
1219 case Iop_SignificanceRoundD64: vex_printf("SignificanceRoundD64");
1220 return;
1221 case Iop_SignificanceRoundD128: vex_printf("SignificanceRoundD128");
1222 return;
1223 case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return;
1224 case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return;
1225 case Iop_V256to64_0: vex_printf("V256to64_0"); return;
1226 case Iop_V256to64_1: vex_printf("V256to64_1"); return;
1227 case Iop_V256to64_2: vex_printf("V256to64_2"); return;
1228 case Iop_V256to64_3: vex_printf("V256to64_3"); return;
1229 case Iop_64x4toV256: vex_printf("64x4toV256"); return;
1230 case Iop_V256toV128_0: vex_printf("V256toV128_0"); return;
1231 case Iop_V256toV128_1: vex_printf("V256toV128_1"); return;
1232 case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return;
1233 case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return;
1234 case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return;
1235 case Iop_Add64Fx4: vex_printf("Add64Fx4"); return;
1236 case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return;
1237 case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return;
1238 case Iop_Div64Fx4: vex_printf("Div64Fx4"); return;
1239 case Iop_Add32Fx8: vex_printf("Add32Fx8"); return;
1240 case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return;
1241 case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return;
1242 case Iop_Div32Fx8: vex_printf("Div32Fx8"); return;
1243 case Iop_I32StoF32x8: vex_printf("I32StoF32x8"); return;
1244 case Iop_F32toI32Sx8: vex_printf("F32toI32Sx8"); return;
1245 case Iop_AndV256: vex_printf("AndV256"); return;
1246 case Iop_OrV256: vex_printf("OrV256"); return;
1247 case Iop_XorV256: vex_printf("XorV256"); return;
1248 case Iop_NotV256: vex_printf("NotV256"); return;
1249 case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return;
1250 case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return;
1251 case Iop_CmpNEZ16x16: vex_printf("CmpNEZ16x16"); return;
1252 case Iop_CmpNEZ8x32: vex_printf("CmpNEZ8x32"); return;
1253
1254 case Iop_Add8x32: vex_printf("Add8x32"); return;
1255 case Iop_Add16x16: vex_printf("Add16x16"); return;
1256 case Iop_Add32x8: vex_printf("Add32x8"); return;
1257 case Iop_Add64x4: vex_printf("Add64x4"); return;
1258 case Iop_Sub8x32: vex_printf("Sub8x32"); return;
1259 case Iop_Sub16x16: vex_printf("Sub16x16"); return;
1260 case Iop_Sub32x8: vex_printf("Sub32x8"); return;
1261 case Iop_Sub64x4: vex_printf("Sub64x4"); return;
1262 case Iop_QAdd8Ux32: vex_printf("QAdd8Ux32"); return;
1263 case Iop_QAdd16Ux16: vex_printf("QAdd16Ux16"); return;
1264 case Iop_QAdd8Sx32: vex_printf("QAdd8Sx32"); return;
1265 case Iop_QAdd16Sx16: vex_printf("QAdd16Sx16"); return;
1266 case Iop_QSub8Ux32: vex_printf("QSub8Ux32"); return;
1267 case Iop_QSub16Ux16: vex_printf("QSub16Ux16"); return;
1268 case Iop_QSub8Sx32: vex_printf("QSub8Sx32"); return;
1269 case Iop_QSub16Sx16: vex_printf("QSub16Sx16"); return;
1270
1271 case Iop_Mul16x16: vex_printf("Mul16x16"); return;
1272 case Iop_Mul32x8: vex_printf("Mul32x8"); return;
1273 case Iop_MulHi16Ux16: vex_printf("MulHi16Ux16"); return;
1274 case Iop_MulHi16Sx16: vex_printf("MulHi16Sx16"); return;
1275
1276 case Iop_Avg8Ux32: vex_printf("Avg8Ux32"); return;
1277 case Iop_Avg16Ux16: vex_printf("Avg16Ux16"); return;
1278
1279 case Iop_Max8Sx32: vex_printf("Max8Sx32"); return;
1280 case Iop_Max16Sx16: vex_printf("Max16Sx16"); return;
1281 case Iop_Max32Sx8: vex_printf("Max32Sx8"); return;
1282 case Iop_Max8Ux32: vex_printf("Max8Ux32"); return;
1283 case Iop_Max16Ux16: vex_printf("Max16Ux16"); return;
1284 case Iop_Max32Ux8: vex_printf("Max32Ux8"); return;
1285
1286 case Iop_Min8Sx32: vex_printf("Min8Sx32"); return;
1287 case Iop_Min16Sx16: vex_printf("Min16Sx16"); return;
1288 case Iop_Min32Sx8: vex_printf("Min32Sx8"); return;
1289 case Iop_Min8Ux32: vex_printf("Min8Ux32"); return;
1290 case Iop_Min16Ux16: vex_printf("Min16Ux16"); return;
1291 case Iop_Min32Ux8: vex_printf("Min32Ux8"); return;
1292
1293 case Iop_CmpEQ8x32: vex_printf("CmpEQ8x32"); return;
1294 case Iop_CmpEQ16x16: vex_printf("CmpEQ16x16"); return;
1295 case Iop_CmpEQ32x8: vex_printf("CmpEQ32x8"); return;
1296 case Iop_CmpEQ64x4: vex_printf("CmpEQ64x4"); return;
1297 case Iop_CmpGT8Sx32: vex_printf("CmpGT8Sx32"); return;
1298 case Iop_CmpGT16Sx16: vex_printf("CmpGT16Sx16"); return;
1299 case Iop_CmpGT32Sx8: vex_printf("CmpGT32Sx8"); return;
1300 case Iop_CmpGT64Sx4: vex_printf("CmpGT64Sx4"); return;
1301
1302 case Iop_ShlN16x16: vex_printf("ShlN16x16"); return;
1303 case Iop_ShlN32x8: vex_printf("ShlN32x8"); return;
1304 case Iop_ShlN64x4: vex_printf("ShlN64x4"); return;
1305 case Iop_ShrN16x16: vex_printf("ShrN16x16"); return;
1306 case Iop_ShrN32x8: vex_printf("ShrN32x8"); return;
1307 case Iop_ShrN64x4: vex_printf("ShrN64x4"); return;
1308 case Iop_SarN16x16: vex_printf("SarN16x16"); return;
1309 case Iop_SarN32x8: vex_printf("SarN32x8"); return;
1310
1311 case Iop_Perm32x8: vex_printf("Perm32x8"); return;
1312
1313 case Iop_CipherV128: vex_printf("CipherV128"); return;
1314 case Iop_CipherLV128: vex_printf("CipherLV128"); return;
1315 case Iop_NCipherV128: vex_printf("NCipherV128"); return;
1316 case Iop_NCipherLV128: vex_printf("NCipherLV128"); return;
1317 case Iop_CipherSV128: vex_printf("CipherSV128"); return;
1318
1319 case Iop_SHA256: vex_printf("SHA256"); return;
1320 case Iop_SHA512: vex_printf("SHA512"); return;
1321 case Iop_BCDAdd: vex_printf("BCDAdd"); return;
1322 case Iop_BCDSub: vex_printf("BCDSub"); return;
1323 case Iop_I128StoBCD128: vex_printf("bcdcfsq."); return;
1324 case Iop_BCD128toI128S: vex_printf("bcdctsq."); return;
1325 case Iop_Rotx32: vex_printf("bitswap"); return;
1326 case Iop_Rotx64: vex_printf("dbitswap"); return;
1327
1328 case Iop_PwBitMtxXpose64x2: vex_printf("BitMatrixTranspose64x2"); return;
1329
1330 default: vpanic("ppIROp(1)");
1331 }
1332
1333 vassert(str);
1334 switch (op - base) {
1335 case 0: vex_printf("%s",str); vex_printf("8"); break;
1336 case 1: vex_printf("%s",str); vex_printf("16"); break;
1337 case 2: vex_printf("%s",str); vex_printf("32"); break;
1338 case 3: vex_printf("%s",str); vex_printf("64"); break;
1339 default: vpanic("ppIROp(2)");
1340 }
1341 }
1342
ppIRExpr(const IRExpr * e)1343 void ppIRExpr ( const IRExpr* e )
1344 {
1345 Int i;
1346 switch (e->tag) {
1347 case Iex_Binder:
1348 vex_printf("BIND-%d", e->Iex.Binder.binder);
1349 break;
1350 case Iex_Get:
1351 vex_printf( "GET:" );
1352 ppIRType(e->Iex.Get.ty);
1353 vex_printf("(%d)", e->Iex.Get.offset);
1354 break;
1355 case Iex_GetI:
1356 vex_printf( "GETI" );
1357 ppIRRegArray(e->Iex.GetI.descr);
1358 vex_printf("[");
1359 ppIRExpr(e->Iex.GetI.ix);
1360 vex_printf(",%d]", e->Iex.GetI.bias);
1361 break;
1362 case Iex_RdTmp:
1363 ppIRTemp(e->Iex.RdTmp.tmp);
1364 break;
1365 case Iex_Qop: {
1366 const IRQop *qop = e->Iex.Qop.details;
1367 ppIROp(qop->op);
1368 vex_printf( "(" );
1369 ppIRExpr(qop->arg1);
1370 vex_printf( "," );
1371 ppIRExpr(qop->arg2);
1372 vex_printf( "," );
1373 ppIRExpr(qop->arg3);
1374 vex_printf( "," );
1375 ppIRExpr(qop->arg4);
1376 vex_printf( ")" );
1377 break;
1378 }
1379 case Iex_Triop: {
1380 const IRTriop *triop = e->Iex.Triop.details;
1381 ppIROp(triop->op);
1382 vex_printf( "(" );
1383 ppIRExpr(triop->arg1);
1384 vex_printf( "," );
1385 ppIRExpr(triop->arg2);
1386 vex_printf( "," );
1387 ppIRExpr(triop->arg3);
1388 vex_printf( ")" );
1389 break;
1390 }
1391 case Iex_Binop:
1392 ppIROp(e->Iex.Binop.op);
1393 vex_printf( "(" );
1394 ppIRExpr(e->Iex.Binop.arg1);
1395 vex_printf( "," );
1396 ppIRExpr(e->Iex.Binop.arg2);
1397 vex_printf( ")" );
1398 break;
1399 case Iex_Unop:
1400 ppIROp(e->Iex.Unop.op);
1401 vex_printf( "(" );
1402 ppIRExpr(e->Iex.Unop.arg);
1403 vex_printf( ")" );
1404 break;
1405 case Iex_Load:
1406 vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" );
1407 ppIRType(e->Iex.Load.ty);
1408 vex_printf( "(" );
1409 ppIRExpr(e->Iex.Load.addr);
1410 vex_printf( ")" );
1411 break;
1412 case Iex_Const:
1413 ppIRConst(e->Iex.Const.con);
1414 break;
1415 case Iex_CCall:
1416 ppIRCallee(e->Iex.CCall.cee);
1417 vex_printf("(");
1418 for (i = 0; e->Iex.CCall.args[i] != NULL; i++) {
1419 IRExpr* arg = e->Iex.CCall.args[i];
1420 ppIRExpr(arg);
1421
1422 if (e->Iex.CCall.args[i+1] != NULL) {
1423 vex_printf(",");
1424 }
1425 }
1426 vex_printf("):");
1427 ppIRType(e->Iex.CCall.retty);
1428 break;
1429 case Iex_ITE:
1430 vex_printf("ITE(");
1431 ppIRExpr(e->Iex.ITE.cond);
1432 vex_printf(",");
1433 ppIRExpr(e->Iex.ITE.iftrue);
1434 vex_printf(",");
1435 ppIRExpr(e->Iex.ITE.iffalse);
1436 vex_printf(")");
1437 break;
1438 case Iex_VECRET:
1439 vex_printf("VECRET");
1440 break;
1441 case Iex_GSPTR:
1442 vex_printf("GSPTR");
1443 break;
1444 default:
1445 vpanic("ppIRExpr");
1446 }
1447 }
1448
ppIREffect(IREffect fx)1449 void ppIREffect ( IREffect fx )
1450 {
1451 switch (fx) {
1452 case Ifx_None: vex_printf("noFX"); return;
1453 case Ifx_Read: vex_printf("RdFX"); return;
1454 case Ifx_Write: vex_printf("WrFX"); return;
1455 case Ifx_Modify: vex_printf("MoFX"); return;
1456 default: vpanic("ppIREffect");
1457 }
1458 }
1459
ppIRDirty(const IRDirty * d)1460 void ppIRDirty ( const IRDirty* d )
1461 {
1462 Int i;
1463 if (d->tmp != IRTemp_INVALID) {
1464 ppIRTemp(d->tmp);
1465 vex_printf(" = ");
1466 }
1467 vex_printf("DIRTY ");
1468 ppIRExpr(d->guard);
1469 if (d->mFx != Ifx_None) {
1470 vex_printf(" ");
1471 ppIREffect(d->mFx);
1472 vex_printf("-mem(");
1473 ppIRExpr(d->mAddr);
1474 vex_printf(",%d)", d->mSize);
1475 }
1476 for (i = 0; i < d->nFxState; i++) {
1477 vex_printf(" ");
1478 ppIREffect(d->fxState[i].fx);
1479 vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset,
1480 (UInt)d->fxState[i].size);
1481 if (d->fxState[i].nRepeats > 0) {
1482 vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats,
1483 (UInt)d->fxState[i].repeatLen);
1484 }
1485 vex_printf(")");
1486 }
1487 vex_printf(" ::: ");
1488 ppIRCallee(d->cee);
1489 vex_printf("(");
1490 for (i = 0; d->args[i] != NULL; i++) {
1491 IRExpr* arg = d->args[i];
1492 ppIRExpr(arg);
1493
1494 if (d->args[i+1] != NULL) {
1495 vex_printf(",");
1496 }
1497 }
1498 vex_printf(")");
1499 }
1500
ppIRCAS(const IRCAS * cas)1501 void ppIRCAS ( const IRCAS* cas )
1502 {
1503 /* Print even structurally invalid constructions, as an aid to
1504 debugging. */
1505 if (cas->oldHi != IRTemp_INVALID) {
1506 ppIRTemp(cas->oldHi);
1507 vex_printf(",");
1508 }
1509 ppIRTemp(cas->oldLo);
1510 vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" );
1511 ppIRExpr(cas->addr);
1512 vex_printf("::");
1513 if (cas->expdHi) {
1514 ppIRExpr(cas->expdHi);
1515 vex_printf(",");
1516 }
1517 ppIRExpr(cas->expdLo);
1518 vex_printf("->");
1519 if (cas->dataHi) {
1520 ppIRExpr(cas->dataHi);
1521 vex_printf(",");
1522 }
1523 ppIRExpr(cas->dataLo);
1524 vex_printf(")");
1525 }
1526
ppIRPutI(const IRPutI * puti)1527 void ppIRPutI ( const IRPutI* puti )
1528 {
1529 vex_printf( "PUTI" );
1530 ppIRRegArray(puti->descr);
1531 vex_printf("[");
1532 ppIRExpr(puti->ix);
1533 vex_printf(",%d] = ", puti->bias);
1534 ppIRExpr(puti->data);
1535 }
1536
ppIRStoreG(const IRStoreG * sg)1537 void ppIRStoreG ( const IRStoreG* sg )
1538 {
1539 vex_printf("if (");
1540 ppIRExpr(sg->guard);
1541 vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be");
1542 ppIRExpr(sg->addr);
1543 vex_printf(") = ");
1544 ppIRExpr(sg->data);
1545 vex_printf(" }");
1546 }
1547
ppIRLoadGOp(IRLoadGOp cvt)1548 void ppIRLoadGOp ( IRLoadGOp cvt )
1549 {
1550 switch (cvt) {
1551 case ILGop_INVALID: vex_printf("ILGop_INVALID"); break;
1552 case ILGop_IdentV128: vex_printf("IdentV128"); break;
1553 case ILGop_Ident64: vex_printf("Ident64"); break;
1554 case ILGop_Ident32: vex_printf("Ident32"); break;
1555 case ILGop_16Uto32: vex_printf("16Uto32"); break;
1556 case ILGop_16Sto32: vex_printf("16Sto32"); break;
1557 case ILGop_8Uto32: vex_printf("8Uto32"); break;
1558 case ILGop_8Sto32: vex_printf("8Sto32"); break;
1559 default: vpanic("ppIRLoadGOp");
1560 }
1561 }
1562
ppIRLoadG(const IRLoadG * lg)1563 void ppIRLoadG ( const IRLoadG* lg )
1564 {
1565 ppIRTemp(lg->dst);
1566 vex_printf(" = if-strict (");
1567 ppIRExpr(lg->guard);
1568 vex_printf(") ");
1569 ppIRLoadGOp(lg->cvt);
1570 vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be");
1571 ppIRExpr(lg->addr);
1572 vex_printf(")) else ");
1573 ppIRExpr(lg->alt);
1574 }
1575
ppIRJumpKind(IRJumpKind kind)1576 void ppIRJumpKind ( IRJumpKind kind )
1577 {
1578 switch (kind) {
1579 case Ijk_Boring: vex_printf("Boring"); break;
1580 case Ijk_Call: vex_printf("Call"); break;
1581 case Ijk_Ret: vex_printf("Return"); break;
1582 case Ijk_ClientReq: vex_printf("ClientReq"); break;
1583 case Ijk_Yield: vex_printf("Yield"); break;
1584 case Ijk_EmWarn: vex_printf("EmWarn"); break;
1585 case Ijk_EmFail: vex_printf("EmFail"); break;
1586 case Ijk_NoDecode: vex_printf("NoDecode"); break;
1587 case Ijk_MapFail: vex_printf("MapFail"); break;
1588 case Ijk_InvalICache: vex_printf("InvalICache"); break;
1589 case Ijk_FlushDCache: vex_printf("FlushDCache"); break;
1590 case Ijk_NoRedir: vex_printf("NoRedir"); break;
1591 case Ijk_SigILL: vex_printf("SigILL"); break;
1592 case Ijk_SigTRAP: vex_printf("SigTRAP"); break;
1593 case Ijk_SigSEGV: vex_printf("SigSEGV"); break;
1594 case Ijk_SigBUS: vex_printf("SigBUS"); break;
1595 case Ijk_SigFPE: vex_printf("SigFPE"); break;
1596 case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break;
1597 case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break;
1598 case Ijk_Sys_syscall: vex_printf("Sys_syscall"); break;
1599 case Ijk_Sys_int32: vex_printf("Sys_int32"); break;
1600 case Ijk_Sys_int128: vex_printf("Sys_int128"); break;
1601 case Ijk_Sys_int129: vex_printf("Sys_int129"); break;
1602 case Ijk_Sys_int130: vex_printf("Sys_int130"); break;
1603 case Ijk_Sys_int145: vex_printf("Sys_int145"); break;
1604 case Ijk_Sys_int210: vex_printf("Sys_int210"); break;
1605 case Ijk_Sys_sysenter: vex_printf("Sys_sysenter"); break;
1606 default: vpanic("ppIRJumpKind");
1607 }
1608 }
1609
ppIRMBusEvent(IRMBusEvent event)1610 void ppIRMBusEvent ( IRMBusEvent event )
1611 {
1612 switch (event) {
1613 case Imbe_Fence:
1614 vex_printf("Fence"); break;
1615 case Imbe_CancelReservation:
1616 vex_printf("CancelReservation"); break;
1617 default:
1618 vpanic("ppIRMBusEvent");
1619 }
1620 }
1621
ppIRStmt(const IRStmt * s)1622 void ppIRStmt ( const IRStmt* s )
1623 {
1624 if (!s) {
1625 vex_printf("!!! IRStmt* which is NULL !!!");
1626 return;
1627 }
1628 switch (s->tag) {
1629 case Ist_NoOp:
1630 vex_printf("IR-NoOp");
1631 break;
1632 case Ist_IMark:
1633 vex_printf( "------ IMark(0x%lx, %u, %u) ------",
1634 s->Ist.IMark.addr, s->Ist.IMark.len,
1635 (UInt)s->Ist.IMark.delta);
1636 break;
1637 case Ist_AbiHint:
1638 vex_printf("====== AbiHint(");
1639 ppIRExpr(s->Ist.AbiHint.base);
1640 vex_printf(", %d, ", s->Ist.AbiHint.len);
1641 ppIRExpr(s->Ist.AbiHint.nia);
1642 vex_printf(") ======");
1643 break;
1644 case Ist_Put:
1645 vex_printf( "PUT(%d) = ", s->Ist.Put.offset);
1646 ppIRExpr(s->Ist.Put.data);
1647 break;
1648 case Ist_PutI:
1649 ppIRPutI(s->Ist.PutI.details);
1650 break;
1651 case Ist_WrTmp:
1652 ppIRTemp(s->Ist.WrTmp.tmp);
1653 vex_printf( " = " );
1654 ppIRExpr(s->Ist.WrTmp.data);
1655 break;
1656 case Ist_Store:
1657 vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" );
1658 ppIRExpr(s->Ist.Store.addr);
1659 vex_printf( ") = ");
1660 ppIRExpr(s->Ist.Store.data);
1661 break;
1662 case Ist_StoreG:
1663 ppIRStoreG(s->Ist.StoreG.details);
1664 break;
1665 case Ist_LoadG:
1666 ppIRLoadG(s->Ist.LoadG.details);
1667 break;
1668 case Ist_CAS:
1669 ppIRCAS(s->Ist.CAS.details);
1670 break;
1671 case Ist_LLSC:
1672 if (s->Ist.LLSC.storedata == NULL) {
1673 ppIRTemp(s->Ist.LLSC.result);
1674 vex_printf(" = LD%s-Linked(",
1675 s->Ist.LLSC.end==Iend_LE ? "le" : "be");
1676 ppIRExpr(s->Ist.LLSC.addr);
1677 vex_printf(")");
1678 } else {
1679 ppIRTemp(s->Ist.LLSC.result);
1680 vex_printf(" = ( ST%s-Cond(",
1681 s->Ist.LLSC.end==Iend_LE ? "le" : "be");
1682 ppIRExpr(s->Ist.LLSC.addr);
1683 vex_printf(") = ");
1684 ppIRExpr(s->Ist.LLSC.storedata);
1685 vex_printf(" )");
1686 }
1687 break;
1688 case Ist_Dirty:
1689 ppIRDirty(s->Ist.Dirty.details);
1690 break;
1691 case Ist_MBE:
1692 vex_printf("IR-");
1693 ppIRMBusEvent(s->Ist.MBE.event);
1694 break;
1695 case Ist_Exit:
1696 vex_printf( "if (" );
1697 ppIRExpr(s->Ist.Exit.guard);
1698 vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP);
1699 ppIRConst(s->Ist.Exit.dst);
1700 vex_printf("; exit-");
1701 ppIRJumpKind(s->Ist.Exit.jk);
1702 vex_printf(" } ");
1703 break;
1704 default:
1705 vpanic("ppIRStmt");
1706 }
1707 }
1708
ppIRTypeEnv(const IRTypeEnv * env)1709 void ppIRTypeEnv ( const IRTypeEnv* env )
1710 {
1711 UInt i;
1712 for (i = 0; i < env->types_used; i++) {
1713 if (i % 8 == 0)
1714 vex_printf( " ");
1715 ppIRTemp(i);
1716 vex_printf( ":");
1717 ppIRType(env->types[i]);
1718 if (i % 8 == 7)
1719 vex_printf( "\n");
1720 else
1721 vex_printf( " ");
1722 }
1723 if (env->types_used > 0 && env->types_used % 8 != 7)
1724 vex_printf( "\n");
1725 }
1726
ppIRSB(const IRSB * bb)1727 void ppIRSB ( const IRSB* bb )
1728 {
1729 Int i;
1730 vex_printf("IRSB {\n");
1731 ppIRTypeEnv(bb->tyenv);
1732 vex_printf("\n");
1733 for (i = 0; i < bb->stmts_used; i++) {
1734 vex_printf( " ");
1735 ppIRStmt(bb->stmts[i]);
1736 vex_printf( "\n");
1737 }
1738 vex_printf( " PUT(%d) = ", bb->offsIP );
1739 ppIRExpr( bb->next );
1740 vex_printf( "; exit-");
1741 ppIRJumpKind(bb->jumpkind);
1742 vex_printf( "\n}\n");
1743 }
1744
1745
1746 /*---------------------------------------------------------------*/
1747 /*--- Constructors ---*/
1748 /*---------------------------------------------------------------*/
1749
1750
1751 /* Constructors -- IRConst */
1752
IRConst_U1(Bool bit)1753 IRConst* IRConst_U1 ( Bool bit )
1754 {
1755 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1756 c->tag = Ico_U1;
1757 c->Ico.U1 = bit;
1758 /* call me paranoid; I don't care :-) */
1759 vassert(bit == False || bit == True);
1760 return c;
1761 }
IRConst_U8(UChar u8)1762 IRConst* IRConst_U8 ( UChar u8 )
1763 {
1764 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1765 c->tag = Ico_U8;
1766 c->Ico.U8 = u8;
1767 return c;
1768 }
IRConst_U16(UShort u16)1769 IRConst* IRConst_U16 ( UShort u16 )
1770 {
1771 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1772 c->tag = Ico_U16;
1773 c->Ico.U16 = u16;
1774 return c;
1775 }
IRConst_U32(UInt u32)1776 IRConst* IRConst_U32 ( UInt u32 )
1777 {
1778 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1779 c->tag = Ico_U32;
1780 c->Ico.U32 = u32;
1781 return c;
1782 }
IRConst_U64(ULong u64)1783 IRConst* IRConst_U64 ( ULong u64 )
1784 {
1785 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1786 c->tag = Ico_U64;
1787 c->Ico.U64 = u64;
1788 return c;
1789 }
IRConst_F32(Float f32)1790 IRConst* IRConst_F32 ( Float f32 )
1791 {
1792 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1793 c->tag = Ico_F32;
1794 c->Ico.F32 = f32;
1795 return c;
1796 }
IRConst_F32i(UInt f32i)1797 IRConst* IRConst_F32i ( UInt f32i )
1798 {
1799 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1800 c->tag = Ico_F32i;
1801 c->Ico.F32i = f32i;
1802 return c;
1803 }
IRConst_F64(Double f64)1804 IRConst* IRConst_F64 ( Double f64 )
1805 {
1806 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1807 c->tag = Ico_F64;
1808 c->Ico.F64 = f64;
1809 return c;
1810 }
IRConst_F64i(ULong f64i)1811 IRConst* IRConst_F64i ( ULong f64i )
1812 {
1813 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1814 c->tag = Ico_F64i;
1815 c->Ico.F64i = f64i;
1816 return c;
1817 }
IRConst_V128(UShort con)1818 IRConst* IRConst_V128 ( UShort con )
1819 {
1820 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1821 c->tag = Ico_V128;
1822 c->Ico.V128 = con;
1823 return c;
1824 }
IRConst_V256(UInt con)1825 IRConst* IRConst_V256 ( UInt con )
1826 {
1827 IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
1828 c->tag = Ico_V256;
1829 c->Ico.V256 = con;
1830 return c;
1831 }
1832
1833 /* Constructors -- IRCallee */
1834
mkIRCallee(Int regparms,const HChar * name,void * addr)1835 IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr )
1836 {
1837 IRCallee* ce = LibVEX_Alloc_inline(sizeof(IRCallee));
1838 ce->regparms = regparms;
1839 ce->name = name;
1840 ce->addr = addr;
1841 ce->mcx_mask = 0;
1842 vassert(regparms >= 0 && regparms <= 3);
1843 vassert(name != NULL);
1844 vassert(addr != 0);
1845 return ce;
1846 }
1847
1848
1849 /* Constructors -- IRRegArray */
1850
mkIRRegArray(Int base,IRType elemTy,Int nElems)1851 IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems )
1852 {
1853 IRRegArray* arr = LibVEX_Alloc_inline(sizeof(IRRegArray));
1854 arr->base = base;
1855 arr->elemTy = elemTy;
1856 arr->nElems = nElems;
1857 vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */));
1858 vassert(!(arr->elemTy == Ity_I1));
1859 vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */));
1860 return arr;
1861 }
1862
1863
1864 /* Constructors -- IRExpr */
1865
IRExpr_Binder(Int binder)1866 IRExpr* IRExpr_Binder ( Int binder ) {
1867 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1868 e->tag = Iex_Binder;
1869 e->Iex.Binder.binder = binder;
1870 return e;
1871 }
IRExpr_Get(Int off,IRType ty)1872 IRExpr* IRExpr_Get ( Int off, IRType ty ) {
1873 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1874 e->tag = Iex_Get;
1875 e->Iex.Get.offset = off;
1876 e->Iex.Get.ty = ty;
1877 return e;
1878 }
IRExpr_GetI(IRRegArray * descr,IRExpr * ix,Int bias)1879 IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) {
1880 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1881 e->tag = Iex_GetI;
1882 e->Iex.GetI.descr = descr;
1883 e->Iex.GetI.ix = ix;
1884 e->Iex.GetI.bias = bias;
1885 return e;
1886 }
IRExpr_RdTmp(IRTemp tmp)1887 IRExpr* IRExpr_RdTmp ( IRTemp tmp ) {
1888 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1889 e->tag = Iex_RdTmp;
1890 e->Iex.RdTmp.tmp = tmp;
1891 return e;
1892 }
IRExpr_Qop(IROp op,IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4)1893 IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,
1894 IRExpr* arg3, IRExpr* arg4 ) {
1895 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1896 IRQop* qop = LibVEX_Alloc_inline(sizeof(IRQop));
1897 qop->op = op;
1898 qop->arg1 = arg1;
1899 qop->arg2 = arg2;
1900 qop->arg3 = arg3;
1901 qop->arg4 = arg4;
1902 e->tag = Iex_Qop;
1903 e->Iex.Qop.details = qop;
1904 return e;
1905 }
IRExpr_Triop(IROp op,IRExpr * arg1,IRExpr * arg2,IRExpr * arg3)1906 IRExpr* IRExpr_Triop ( IROp op, IRExpr* arg1,
1907 IRExpr* arg2, IRExpr* arg3 ) {
1908 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1909 IRTriop* triop = LibVEX_Alloc_inline(sizeof(IRTriop));
1910 triop->op = op;
1911 triop->arg1 = arg1;
1912 triop->arg2 = arg2;
1913 triop->arg3 = arg3;
1914 e->tag = Iex_Triop;
1915 e->Iex.Triop.details = triop;
1916 return e;
1917 }
IRExpr_Binop(IROp op,IRExpr * arg1,IRExpr * arg2)1918 IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) {
1919 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1920 e->tag = Iex_Binop;
1921 e->Iex.Binop.op = op;
1922 e->Iex.Binop.arg1 = arg1;
1923 e->Iex.Binop.arg2 = arg2;
1924 return e;
1925 }
IRExpr_Unop(IROp op,IRExpr * arg)1926 IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) {
1927 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1928 e->tag = Iex_Unop;
1929 e->Iex.Unop.op = op;
1930 e->Iex.Unop.arg = arg;
1931 return e;
1932 }
IRExpr_Load(IREndness end,IRType ty,IRExpr * addr)1933 IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) {
1934 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1935 e->tag = Iex_Load;
1936 e->Iex.Load.end = end;
1937 e->Iex.Load.ty = ty;
1938 e->Iex.Load.addr = addr;
1939 vassert(end == Iend_LE || end == Iend_BE);
1940 return e;
1941 }
IRExpr_Const(IRConst * con)1942 IRExpr* IRExpr_Const ( IRConst* con ) {
1943 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1944 e->tag = Iex_Const;
1945 e->Iex.Const.con = con;
1946 return e;
1947 }
IRExpr_CCall(IRCallee * cee,IRType retty,IRExpr ** args)1948 IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) {
1949 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1950 e->tag = Iex_CCall;
1951 e->Iex.CCall.cee = cee;
1952 e->Iex.CCall.retty = retty;
1953 e->Iex.CCall.args = args;
1954 return e;
1955 }
IRExpr_ITE(IRExpr * cond,IRExpr * iftrue,IRExpr * iffalse)1956 IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse ) {
1957 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1958 e->tag = Iex_ITE;
1959 e->Iex.ITE.cond = cond;
1960 e->Iex.ITE.iftrue = iftrue;
1961 e->Iex.ITE.iffalse = iffalse;
1962 return e;
1963 }
IRExpr_VECRET(void)1964 IRExpr* IRExpr_VECRET ( void ) {
1965 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1966 e->tag = Iex_VECRET;
1967 return e;
1968 }
IRExpr_GSPTR(void)1969 IRExpr* IRExpr_GSPTR ( void ) {
1970 IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
1971 e->tag = Iex_GSPTR;
1972 return e;
1973 }
1974
1975
1976 /* Constructors for NULL-terminated IRExpr expression vectors,
1977 suitable for use as arg lists in clean/dirty helper calls. */
1978
mkIRExprVec_0(void)1979 IRExpr** mkIRExprVec_0 ( void ) {
1980 IRExpr** vec = LibVEX_Alloc_inline(1 * sizeof(IRExpr*));
1981 vec[0] = NULL;
1982 return vec;
1983 }
mkIRExprVec_1(IRExpr * arg1)1984 IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) {
1985 IRExpr** vec = LibVEX_Alloc_inline(2 * sizeof(IRExpr*));
1986 vec[0] = arg1;
1987 vec[1] = NULL;
1988 return vec;
1989 }
mkIRExprVec_2(IRExpr * arg1,IRExpr * arg2)1990 IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) {
1991 IRExpr** vec = LibVEX_Alloc_inline(3 * sizeof(IRExpr*));
1992 vec[0] = arg1;
1993 vec[1] = arg2;
1994 vec[2] = NULL;
1995 return vec;
1996 }
mkIRExprVec_3(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3)1997 IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) {
1998 IRExpr** vec = LibVEX_Alloc_inline(4 * sizeof(IRExpr*));
1999 vec[0] = arg1;
2000 vec[1] = arg2;
2001 vec[2] = arg3;
2002 vec[3] = NULL;
2003 return vec;
2004 }
mkIRExprVec_4(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4)2005 IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2006 IRExpr* arg4 ) {
2007 IRExpr** vec = LibVEX_Alloc_inline(5 * sizeof(IRExpr*));
2008 vec[0] = arg1;
2009 vec[1] = arg2;
2010 vec[2] = arg3;
2011 vec[3] = arg4;
2012 vec[4] = NULL;
2013 return vec;
2014 }
mkIRExprVec_5(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4,IRExpr * arg5)2015 IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2016 IRExpr* arg4, IRExpr* arg5 ) {
2017 IRExpr** vec = LibVEX_Alloc_inline(6 * sizeof(IRExpr*));
2018 vec[0] = arg1;
2019 vec[1] = arg2;
2020 vec[2] = arg3;
2021 vec[3] = arg4;
2022 vec[4] = arg5;
2023 vec[5] = NULL;
2024 return vec;
2025 }
mkIRExprVec_6(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4,IRExpr * arg5,IRExpr * arg6)2026 IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2027 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) {
2028 IRExpr** vec = LibVEX_Alloc_inline(7 * sizeof(IRExpr*));
2029 vec[0] = arg1;
2030 vec[1] = arg2;
2031 vec[2] = arg3;
2032 vec[3] = arg4;
2033 vec[4] = arg5;
2034 vec[5] = arg6;
2035 vec[6] = NULL;
2036 return vec;
2037 }
mkIRExprVec_7(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4,IRExpr * arg5,IRExpr * arg6,IRExpr * arg7)2038 IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2039 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2040 IRExpr* arg7 ) {
2041 IRExpr** vec = LibVEX_Alloc_inline(8 * sizeof(IRExpr*));
2042 vec[0] = arg1;
2043 vec[1] = arg2;
2044 vec[2] = arg3;
2045 vec[3] = arg4;
2046 vec[4] = arg5;
2047 vec[5] = arg6;
2048 vec[6] = arg7;
2049 vec[7] = NULL;
2050 return vec;
2051 }
mkIRExprVec_8(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4,IRExpr * arg5,IRExpr * arg6,IRExpr * arg7,IRExpr * arg8)2052 IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2053 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2054 IRExpr* arg7, IRExpr* arg8 ) {
2055 IRExpr** vec = LibVEX_Alloc_inline(9 * sizeof(IRExpr*));
2056 vec[0] = arg1;
2057 vec[1] = arg2;
2058 vec[2] = arg3;
2059 vec[3] = arg4;
2060 vec[4] = arg5;
2061 vec[5] = arg6;
2062 vec[6] = arg7;
2063 vec[7] = arg8;
2064 vec[8] = NULL;
2065 return vec;
2066 }
mkIRExprVec_9(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4,IRExpr * arg5,IRExpr * arg6,IRExpr * arg7,IRExpr * arg8,IRExpr * arg9)2067 IRExpr** mkIRExprVec_9 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2068 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2069 IRExpr* arg7, IRExpr* arg8, IRExpr* arg9 ) {
2070 IRExpr** vec = LibVEX_Alloc_inline(10 * sizeof(IRExpr*));
2071 vec[0] = arg1;
2072 vec[1] = arg2;
2073 vec[2] = arg3;
2074 vec[3] = arg4;
2075 vec[4] = arg5;
2076 vec[5] = arg6;
2077 vec[6] = arg7;
2078 vec[7] = arg8;
2079 vec[8] = arg9;
2080 vec[9] = NULL;
2081 return vec;
2082 }
mkIRExprVec_13(IRExpr * arg1,IRExpr * arg2,IRExpr * arg3,IRExpr * arg4,IRExpr * arg5,IRExpr * arg6,IRExpr * arg7,IRExpr * arg8,IRExpr * arg9,IRExpr * arg10,IRExpr * arg11,IRExpr * arg12,IRExpr * arg13)2083 IRExpr** mkIRExprVec_13 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2084 IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2085 IRExpr* arg7, IRExpr* arg8, IRExpr* arg9,
2086 IRExpr* arg10, IRExpr* arg11, IRExpr* arg12,
2087 IRExpr* arg13
2088 ) {
2089 IRExpr** vec = LibVEX_Alloc_inline(14 * sizeof(IRExpr*));
2090 vec[0] = arg1;
2091 vec[1] = arg2;
2092 vec[2] = arg3;
2093 vec[3] = arg4;
2094 vec[4] = arg5;
2095 vec[5] = arg6;
2096 vec[6] = arg7;
2097 vec[7] = arg8;
2098 vec[8] = arg9;
2099 vec[9] = arg10;
2100 vec[10] = arg11;
2101 vec[11] = arg12;
2102 vec[12] = arg13;
2103 vec[13] = NULL;
2104 return vec;
2105 }
2106
2107
2108 /* Constructors -- IRDirty */
2109
emptyIRDirty(void)2110 IRDirty* emptyIRDirty ( void ) {
2111 IRDirty* d = LibVEX_Alloc_inline(sizeof(IRDirty));
2112 d->cee = NULL;
2113 d->guard = NULL;
2114 d->args = NULL;
2115 d->tmp = IRTemp_INVALID;
2116 d->mFx = Ifx_None;
2117 d->mAddr = NULL;
2118 d->mSize = 0;
2119 d->nFxState = 0;
2120 return d;
2121 }
2122
2123
2124 /* Constructors -- IRCAS */
2125
mkIRCAS(IRTemp oldHi,IRTemp oldLo,IREndness end,IRExpr * addr,IRExpr * expdHi,IRExpr * expdLo,IRExpr * dataHi,IRExpr * dataLo)2126 IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo,
2127 IREndness end, IRExpr* addr,
2128 IRExpr* expdHi, IRExpr* expdLo,
2129 IRExpr* dataHi, IRExpr* dataLo ) {
2130 IRCAS* cas = LibVEX_Alloc_inline(sizeof(IRCAS));
2131 cas->oldHi = oldHi;
2132 cas->oldLo = oldLo;
2133 cas->end = end;
2134 cas->addr = addr;
2135 cas->expdHi = expdHi;
2136 cas->expdLo = expdLo;
2137 cas->dataHi = dataHi;
2138 cas->dataLo = dataLo;
2139 return cas;
2140 }
2141
2142
2143 /* Constructors -- IRPutI */
2144
mkIRPutI(IRRegArray * descr,IRExpr * ix,Int bias,IRExpr * data)2145 IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix,
2146 Int bias, IRExpr* data )
2147 {
2148 IRPutI* puti = LibVEX_Alloc_inline(sizeof(IRPutI));
2149 puti->descr = descr;
2150 puti->ix = ix;
2151 puti->bias = bias;
2152 puti->data = data;
2153 return puti;
2154 }
2155
2156
2157 /* Constructors -- IRStoreG and IRLoadG */
2158
mkIRStoreG(IREndness end,IRExpr * addr,IRExpr * data,IRExpr * guard)2159 IRStoreG* mkIRStoreG ( IREndness end,
2160 IRExpr* addr, IRExpr* data, IRExpr* guard )
2161 {
2162 IRStoreG* sg = LibVEX_Alloc_inline(sizeof(IRStoreG));
2163 sg->end = end;
2164 sg->addr = addr;
2165 sg->data = data;
2166 sg->guard = guard;
2167 return sg;
2168 }
2169
mkIRLoadG(IREndness end,IRLoadGOp cvt,IRTemp dst,IRExpr * addr,IRExpr * alt,IRExpr * guard)2170 IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt,
2171 IRTemp dst, IRExpr* addr, IRExpr* alt, IRExpr* guard )
2172 {
2173 IRLoadG* lg = LibVEX_Alloc_inline(sizeof(IRLoadG));
2174 lg->end = end;
2175 lg->cvt = cvt;
2176 lg->dst = dst;
2177 lg->addr = addr;
2178 lg->alt = alt;
2179 lg->guard = guard;
2180 return lg;
2181 }
2182
2183
2184 /* Constructors -- IRStmt */
2185
IRStmt_NoOp(void)2186 IRStmt* IRStmt_NoOp ( void )
2187 {
2188 /* Just use a single static closure. */
2189 static IRStmt static_closure;
2190 static_closure.tag = Ist_NoOp;
2191 return &static_closure;
2192 }
IRStmt_IMark(Addr addr,UInt len,UChar delta)2193 IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ) {
2194 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2195 s->tag = Ist_IMark;
2196 s->Ist.IMark.addr = addr;
2197 s->Ist.IMark.len = len;
2198 s->Ist.IMark.delta = delta;
2199 return s;
2200 }
IRStmt_AbiHint(IRExpr * base,Int len,IRExpr * nia)2201 IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) {
2202 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2203 s->tag = Ist_AbiHint;
2204 s->Ist.AbiHint.base = base;
2205 s->Ist.AbiHint.len = len;
2206 s->Ist.AbiHint.nia = nia;
2207 return s;
2208 }
IRStmt_Put(Int off,IRExpr * data)2209 IRStmt* IRStmt_Put ( Int off, IRExpr* data ) {
2210 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2211 s->tag = Ist_Put;
2212 s->Ist.Put.offset = off;
2213 s->Ist.Put.data = data;
2214 return s;
2215 }
IRStmt_PutI(IRPutI * details)2216 IRStmt* IRStmt_PutI ( IRPutI* details ) {
2217 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2218 s->tag = Ist_PutI;
2219 s->Ist.PutI.details = details;
2220 return s;
2221 }
IRStmt_WrTmp(IRTemp tmp,IRExpr * data)2222 IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) {
2223 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2224 s->tag = Ist_WrTmp;
2225 s->Ist.WrTmp.tmp = tmp;
2226 s->Ist.WrTmp.data = data;
2227 return s;
2228 }
IRStmt_Store(IREndness end,IRExpr * addr,IRExpr * data)2229 IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) {
2230 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2231 s->tag = Ist_Store;
2232 s->Ist.Store.end = end;
2233 s->Ist.Store.addr = addr;
2234 s->Ist.Store.data = data;
2235 vassert(end == Iend_LE || end == Iend_BE);
2236 return s;
2237 }
IRStmt_StoreG(IREndness end,IRExpr * addr,IRExpr * data,IRExpr * guard)2238 IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data,
2239 IRExpr* guard ) {
2240 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2241 s->tag = Ist_StoreG;
2242 s->Ist.StoreG.details = mkIRStoreG(end, addr, data, guard);
2243 vassert(end == Iend_LE || end == Iend_BE);
2244 return s;
2245 }
IRStmt_LoadG(IREndness end,IRLoadGOp cvt,IRTemp dst,IRExpr * addr,IRExpr * alt,IRExpr * guard)2246 IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst,
2247 IRExpr* addr, IRExpr* alt, IRExpr* guard ) {
2248 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2249 s->tag = Ist_LoadG;
2250 s->Ist.LoadG.details = mkIRLoadG(end, cvt, dst, addr, alt, guard);
2251 return s;
2252 }
IRStmt_CAS(IRCAS * cas)2253 IRStmt* IRStmt_CAS ( IRCAS* cas ) {
2254 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2255 s->tag = Ist_CAS;
2256 s->Ist.CAS.details = cas;
2257 return s;
2258 }
IRStmt_LLSC(IREndness end,IRTemp result,IRExpr * addr,IRExpr * storedata)2259 IRStmt* IRStmt_LLSC ( IREndness end,
2260 IRTemp result, IRExpr* addr, IRExpr* storedata ) {
2261 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2262 s->tag = Ist_LLSC;
2263 s->Ist.LLSC.end = end;
2264 s->Ist.LLSC.result = result;
2265 s->Ist.LLSC.addr = addr;
2266 s->Ist.LLSC.storedata = storedata;
2267 return s;
2268 }
IRStmt_Dirty(IRDirty * d)2269 IRStmt* IRStmt_Dirty ( IRDirty* d )
2270 {
2271 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2272 s->tag = Ist_Dirty;
2273 s->Ist.Dirty.details = d;
2274 return s;
2275 }
IRStmt_MBE(IRMBusEvent event)2276 IRStmt* IRStmt_MBE ( IRMBusEvent event )
2277 {
2278 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2279 s->tag = Ist_MBE;
2280 s->Ist.MBE.event = event;
2281 return s;
2282 }
IRStmt_Exit(IRExpr * guard,IRJumpKind jk,IRConst * dst,Int offsIP)2283 IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst,
2284 Int offsIP ) {
2285 IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2286 s->tag = Ist_Exit;
2287 s->Ist.Exit.guard = guard;
2288 s->Ist.Exit.jk = jk;
2289 s->Ist.Exit.dst = dst;
2290 s->Ist.Exit.offsIP = offsIP;
2291 return s;
2292 }
2293
2294
2295 /* Constructors -- IRTypeEnv */
2296
emptyIRTypeEnv(void)2297 IRTypeEnv* emptyIRTypeEnv ( void )
2298 {
2299 IRTypeEnv* env = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
2300 env->types = LibVEX_Alloc_inline(8 * sizeof(IRType));
2301 env->types_size = 8;
2302 env->types_used = 0;
2303 return env;
2304 }
2305
2306
2307 /* Constructors -- IRSB */
2308
emptyIRSB(void)2309 IRSB* emptyIRSB ( void )
2310 {
2311 IRSB* bb = LibVEX_Alloc_inline(sizeof(IRSB));
2312 bb->tyenv = emptyIRTypeEnv();
2313 bb->stmts_used = 0;
2314 bb->stmts_size = 8;
2315 bb->stmts = LibVEX_Alloc_inline(bb->stmts_size * sizeof(IRStmt*));
2316 bb->next = NULL;
2317 bb->jumpkind = Ijk_Boring;
2318 bb->offsIP = 0;
2319 return bb;
2320 }
2321
2322
2323 /*---------------------------------------------------------------*/
2324 /*--- (Deep) copy constructors. These make complete copies ---*/
2325 /*--- the original, which can be modified without affecting ---*/
2326 /*--- the original. ---*/
2327 /*---------------------------------------------------------------*/
2328
2329 /* Copying IR Expr vectors (for call args). */
2330
2331 /* Shallow copy of an IRExpr vector */
2332
shallowCopyIRExprVec(IRExpr ** vec)2333 IRExpr** shallowCopyIRExprVec ( IRExpr** vec )
2334 {
2335 Int i;
2336 IRExpr** newvec;
2337 for (i = 0; vec[i]; i++)
2338 ;
2339 newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2340 for (i = 0; vec[i]; i++)
2341 newvec[i] = vec[i];
2342 newvec[i] = NULL;
2343 return newvec;
2344 }
2345
2346 /* Deep copy of an IRExpr vector */
2347
deepCopyIRExprVec(IRExpr * const * vec)2348 IRExpr** deepCopyIRExprVec ( IRExpr *const * vec )
2349 {
2350 Int i;
2351 IRExpr** newvec;
2352 for (i = 0; vec[i]; i++)
2353 ;
2354 newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2355 for (i = 0; vec[i]; i++)
2356 newvec[i] = deepCopyIRExpr(vec[i]);
2357 newvec[i] = NULL;
2358 return newvec;
2359 }
2360
2361 /* Deep copy constructors for all heap-allocated IR types follow. */
2362
deepCopyIRConst(const IRConst * c)2363 IRConst* deepCopyIRConst ( const IRConst* c )
2364 {
2365 switch (c->tag) {
2366 case Ico_U1: return IRConst_U1(c->Ico.U1);
2367 case Ico_U8: return IRConst_U8(c->Ico.U8);
2368 case Ico_U16: return IRConst_U16(c->Ico.U16);
2369 case Ico_U32: return IRConst_U32(c->Ico.U32);
2370 case Ico_U64: return IRConst_U64(c->Ico.U64);
2371 case Ico_F32: return IRConst_F32(c->Ico.F32);
2372 case Ico_F32i: return IRConst_F32i(c->Ico.F32i);
2373 case Ico_F64: return IRConst_F64(c->Ico.F64);
2374 case Ico_F64i: return IRConst_F64i(c->Ico.F64i);
2375 case Ico_V128: return IRConst_V128(c->Ico.V128);
2376 case Ico_V256: return IRConst_V256(c->Ico.V256);
2377 default: vpanic("deepCopyIRConst");
2378 }
2379 }
2380
deepCopyIRCallee(const IRCallee * ce)2381 IRCallee* deepCopyIRCallee ( const IRCallee* ce )
2382 {
2383 IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr);
2384 ce2->mcx_mask = ce->mcx_mask;
2385 return ce2;
2386 }
2387
deepCopyIRRegArray(const IRRegArray * d)2388 IRRegArray* deepCopyIRRegArray ( const IRRegArray* d )
2389 {
2390 return mkIRRegArray(d->base, d->elemTy, d->nElems);
2391 }
2392
deepCopyIRExpr(const IRExpr * e)2393 IRExpr* deepCopyIRExpr ( const IRExpr* e )
2394 {
2395 switch (e->tag) {
2396 case Iex_Get:
2397 return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty);
2398 case Iex_GetI:
2399 return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr),
2400 deepCopyIRExpr(e->Iex.GetI.ix),
2401 e->Iex.GetI.bias);
2402 case Iex_RdTmp:
2403 return IRExpr_RdTmp(e->Iex.RdTmp.tmp);
2404 case Iex_Qop: {
2405 const IRQop* qop = e->Iex.Qop.details;
2406
2407 return IRExpr_Qop(qop->op,
2408 deepCopyIRExpr(qop->arg1),
2409 deepCopyIRExpr(qop->arg2),
2410 deepCopyIRExpr(qop->arg3),
2411 deepCopyIRExpr(qop->arg4));
2412 }
2413 case Iex_Triop: {
2414 const IRTriop *triop = e->Iex.Triop.details;
2415
2416 return IRExpr_Triop(triop->op,
2417 deepCopyIRExpr(triop->arg1),
2418 deepCopyIRExpr(triop->arg2),
2419 deepCopyIRExpr(triop->arg3));
2420 }
2421 case Iex_Binop:
2422 return IRExpr_Binop(e->Iex.Binop.op,
2423 deepCopyIRExpr(e->Iex.Binop.arg1),
2424 deepCopyIRExpr(e->Iex.Binop.arg2));
2425 case Iex_Unop:
2426 return IRExpr_Unop(e->Iex.Unop.op,
2427 deepCopyIRExpr(e->Iex.Unop.arg));
2428 case Iex_Load:
2429 return IRExpr_Load(e->Iex.Load.end,
2430 e->Iex.Load.ty,
2431 deepCopyIRExpr(e->Iex.Load.addr));
2432 case Iex_Const:
2433 return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con));
2434 case Iex_CCall:
2435 return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee),
2436 e->Iex.CCall.retty,
2437 deepCopyIRExprVec(e->Iex.CCall.args));
2438
2439 case Iex_ITE:
2440 return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond),
2441 deepCopyIRExpr(e->Iex.ITE.iftrue),
2442 deepCopyIRExpr(e->Iex.ITE.iffalse));
2443 case Iex_VECRET:
2444 return IRExpr_VECRET();
2445
2446 case Iex_GSPTR:
2447 return IRExpr_GSPTR();
2448
2449 case Iex_Binder:
2450 return IRExpr_Binder(e->Iex.Binder.binder);
2451
2452 default:
2453 vpanic("deepCopyIRExpr");
2454 }
2455 }
2456
deepCopyIRDirty(const IRDirty * d)2457 IRDirty* deepCopyIRDirty ( const IRDirty* d )
2458 {
2459 Int i;
2460 IRDirty* d2 = emptyIRDirty();
2461 d2->cee = deepCopyIRCallee(d->cee);
2462 d2->guard = deepCopyIRExpr(d->guard);
2463 d2->args = deepCopyIRExprVec(d->args);
2464 d2->tmp = d->tmp;
2465 d2->mFx = d->mFx;
2466 d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr);
2467 d2->mSize = d->mSize;
2468 d2->nFxState = d->nFxState;
2469 for (i = 0; i < d2->nFxState; i++)
2470 d2->fxState[i] = d->fxState[i];
2471 return d2;
2472 }
2473
deepCopyIRCAS(const IRCAS * cas)2474 IRCAS* deepCopyIRCAS ( const IRCAS* cas )
2475 {
2476 return mkIRCAS( cas->oldHi, cas->oldLo, cas->end,
2477 deepCopyIRExpr(cas->addr),
2478 cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi),
2479 deepCopyIRExpr(cas->expdLo),
2480 cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi),
2481 deepCopyIRExpr(cas->dataLo) );
2482 }
2483
deepCopyIRPutI(const IRPutI * puti)2484 IRPutI* deepCopyIRPutI ( const IRPutI * puti )
2485 {
2486 return mkIRPutI( deepCopyIRRegArray(puti->descr),
2487 deepCopyIRExpr(puti->ix),
2488 puti->bias,
2489 deepCopyIRExpr(puti->data));
2490 }
2491
deepCopyIRStmt(const IRStmt * s)2492 IRStmt* deepCopyIRStmt ( const IRStmt* s )
2493 {
2494 switch (s->tag) {
2495 case Ist_NoOp:
2496 return IRStmt_NoOp();
2497 case Ist_AbiHint:
2498 return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base),
2499 s->Ist.AbiHint.len,
2500 deepCopyIRExpr(s->Ist.AbiHint.nia));
2501 case Ist_IMark:
2502 return IRStmt_IMark(s->Ist.IMark.addr,
2503 s->Ist.IMark.len,
2504 s->Ist.IMark.delta);
2505 case Ist_Put:
2506 return IRStmt_Put(s->Ist.Put.offset,
2507 deepCopyIRExpr(s->Ist.Put.data));
2508 case Ist_PutI:
2509 return IRStmt_PutI(deepCopyIRPutI(s->Ist.PutI.details));
2510 case Ist_WrTmp:
2511 return IRStmt_WrTmp(s->Ist.WrTmp.tmp,
2512 deepCopyIRExpr(s->Ist.WrTmp.data));
2513 case Ist_Store:
2514 return IRStmt_Store(s->Ist.Store.end,
2515 deepCopyIRExpr(s->Ist.Store.addr),
2516 deepCopyIRExpr(s->Ist.Store.data));
2517 case Ist_StoreG: {
2518 const IRStoreG* sg = s->Ist.StoreG.details;
2519 return IRStmt_StoreG(sg->end,
2520 deepCopyIRExpr(sg->addr),
2521 deepCopyIRExpr(sg->data),
2522 deepCopyIRExpr(sg->guard));
2523 }
2524 case Ist_LoadG: {
2525 const IRLoadG* lg = s->Ist.LoadG.details;
2526 return IRStmt_LoadG(lg->end, lg->cvt, lg->dst,
2527 deepCopyIRExpr(lg->addr),
2528 deepCopyIRExpr(lg->alt),
2529 deepCopyIRExpr(lg->guard));
2530 }
2531 case Ist_CAS:
2532 return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details));
2533 case Ist_LLSC:
2534 return IRStmt_LLSC(s->Ist.LLSC.end,
2535 s->Ist.LLSC.result,
2536 deepCopyIRExpr(s->Ist.LLSC.addr),
2537 s->Ist.LLSC.storedata
2538 ? deepCopyIRExpr(s->Ist.LLSC.storedata)
2539 : NULL);
2540 case Ist_Dirty:
2541 return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details));
2542 case Ist_MBE:
2543 return IRStmt_MBE(s->Ist.MBE.event);
2544 case Ist_Exit:
2545 return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard),
2546 s->Ist.Exit.jk,
2547 deepCopyIRConst(s->Ist.Exit.dst),
2548 s->Ist.Exit.offsIP);
2549 default:
2550 vpanic("deepCopyIRStmt");
2551 }
2552 }
2553
deepCopyIRTypeEnv(const IRTypeEnv * src)2554 IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* src )
2555 {
2556 Int i;
2557 IRTypeEnv* dst = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
2558 dst->types_size = src->types_size;
2559 dst->types_used = src->types_used;
2560 dst->types = LibVEX_Alloc_inline(dst->types_size * sizeof(IRType));
2561 for (i = 0; i < src->types_used; i++)
2562 dst->types[i] = src->types[i];
2563 return dst;
2564 }
2565
deepCopyIRSB(const IRSB * bb)2566 IRSB* deepCopyIRSB ( const IRSB* bb )
2567 {
2568 Int i;
2569 IRStmt** sts2;
2570 IRSB* bb2 = deepCopyIRSBExceptStmts(bb);
2571 bb2->stmts_used = bb2->stmts_size = bb->stmts_used;
2572 sts2 = LibVEX_Alloc_inline(bb2->stmts_used * sizeof(IRStmt*));
2573 for (i = 0; i < bb2->stmts_used; i++)
2574 sts2[i] = deepCopyIRStmt(bb->stmts[i]);
2575 bb2->stmts = sts2;
2576 return bb2;
2577 }
2578
deepCopyIRSBExceptStmts(const IRSB * bb)2579 IRSB* deepCopyIRSBExceptStmts ( const IRSB* bb )
2580 {
2581 IRSB* bb2 = emptyIRSB();
2582 bb2->tyenv = deepCopyIRTypeEnv(bb->tyenv);
2583 bb2->next = deepCopyIRExpr(bb->next);
2584 bb2->jumpkind = bb->jumpkind;
2585 bb2->offsIP = bb->offsIP;
2586 return bb2;
2587 }
2588
2589
2590 /*---------------------------------------------------------------*/
2591 /*--- Primop types ---*/
2592 /*---------------------------------------------------------------*/
2593
typeOfPrimop(IROp op,IRType * t_dst,IRType * t_arg1,IRType * t_arg2,IRType * t_arg3,IRType * t_arg4)2594 void typeOfPrimop ( IROp op,
2595 /*OUTs*/
2596 IRType* t_dst,
2597 IRType* t_arg1, IRType* t_arg2,
2598 IRType* t_arg3, IRType* t_arg4 )
2599 {
2600 # define UNARY(_ta1,_td) \
2601 *t_dst = (_td); *t_arg1 = (_ta1); break
2602 # define BINARY(_ta1,_ta2,_td) \
2603 *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break
2604 # define TERNARY(_ta1,_ta2,_ta3,_td) \
2605 *t_dst = (_td); *t_arg1 = (_ta1); \
2606 *t_arg2 = (_ta2); *t_arg3 = (_ta3); break
2607 # define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td) \
2608 *t_dst = (_td); *t_arg1 = (_ta1); \
2609 *t_arg2 = (_ta2); *t_arg3 = (_ta3); \
2610 *t_arg4 = (_ta4); break
2611 # define COMPARISON(_ta) \
2612 *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break;
2613 # define UNARY_COMPARISON(_ta) \
2614 *t_dst = Ity_I1; *t_arg1 = (_ta); break;
2615
2616 /* Rounding mode values are always Ity_I32, encoded as per
2617 IRRoundingMode */
2618 const IRType ity_RMode = Ity_I32;
2619
2620 *t_dst = Ity_INVALID;
2621 *t_arg1 = Ity_INVALID;
2622 *t_arg2 = Ity_INVALID;
2623 *t_arg3 = Ity_INVALID;
2624 *t_arg4 = Ity_INVALID;
2625 switch (op) {
2626 case Iop_Add8: case Iop_Sub8: case Iop_Mul8:
2627 case Iop_Or8: case Iop_And8: case Iop_Xor8:
2628 BINARY(Ity_I8,Ity_I8, Ity_I8);
2629
2630 case Iop_Add16: case Iop_Sub16: case Iop_Mul16:
2631 case Iop_Or16: case Iop_And16: case Iop_Xor16:
2632 BINARY(Ity_I16,Ity_I16, Ity_I16);
2633
2634 case Iop_CmpORD32U:
2635 case Iop_CmpORD32S:
2636 case Iop_Add32: case Iop_Sub32: case Iop_Mul32:
2637 case Iop_Or32: case Iop_And32: case Iop_Xor32:
2638 case Iop_Max32U:
2639 case Iop_QAdd32S: case Iop_QSub32S:
2640 case Iop_Add16x2: case Iop_Sub16x2:
2641 case Iop_QAdd16Sx2: case Iop_QAdd16Ux2:
2642 case Iop_QSub16Sx2: case Iop_QSub16Ux2:
2643 case Iop_HAdd16Ux2: case Iop_HAdd16Sx2:
2644 case Iop_HSub16Ux2: case Iop_HSub16Sx2:
2645 case Iop_Add8x4: case Iop_Sub8x4:
2646 case Iop_QAdd8Sx4: case Iop_QAdd8Ux4:
2647 case Iop_QSub8Sx4: case Iop_QSub8Ux4:
2648 case Iop_HAdd8Ux4: case Iop_HAdd8Sx4:
2649 case Iop_HSub8Ux4: case Iop_HSub8Sx4:
2650 case Iop_Sad8Ux4:
2651 BINARY(Ity_I32,Ity_I32, Ity_I32);
2652
2653 case Iop_Add64: case Iop_Sub64: case Iop_Mul64:
2654 case Iop_Or64: case Iop_And64: case Iop_Xor64:
2655 case Iop_CmpORD64U:
2656 case Iop_CmpORD64S:
2657 case Iop_Avg8Ux8: case Iop_Avg16Ux4:
2658 case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2:
2659 case Iop_Add32Fx2: case Iop_Sub32Fx2:
2660 case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2:
2661 case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2:
2662 case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2:
2663 case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2:
2664 case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8:
2665 case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4:
2666 case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2:
2667 case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8:
2668 case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4:
2669 case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8:
2670 case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4:
2671 case Iop_Perm8x8: case Iop_PermOrZero8x8:
2672 case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2:
2673 case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2:
2674 case Iop_Max32Fx2: case Iop_Min32Fx2:
2675 case Iop_PwMax32Fx2: case Iop_PwMin32Fx2:
2676 case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2:
2677 case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2:
2678 case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2:
2679 case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2:
2680 case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2:
2681 case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2:
2682 case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2:
2683 case Iop_Mul32Fx2:
2684 case Iop_PolynomialMul8x8:
2685 case Iop_MulHi16Sx4: case Iop_MulHi16Ux4:
2686 case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2:
2687 case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2:
2688 case Iop_QAdd8Sx8: case Iop_QAdd16Sx4:
2689 case Iop_QAdd32Sx2: case Iop_QAdd64Sx1:
2690 case Iop_QAdd8Ux8: case Iop_QAdd16Ux4:
2691 case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
2692 case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
2693 case Iop_PwAdd32Fx2:
2694 case Iop_QNarrowBin32Sto16Sx4:
2695 case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8:
2696 case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4:
2697 case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
2698 case Iop_QSub8Sx8: case Iop_QSub16Sx4:
2699 case Iop_QSub32Sx2: case Iop_QSub64Sx1:
2700 case Iop_QSub8Ux8: case Iop_QSub16Ux4:
2701 case Iop_QSub32Ux2: case Iop_QSub64Ux1:
2702 case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2:
2703 case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2:
2704 case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2:
2705 case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1:
2706 case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1:
2707 case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1:
2708 case Iop_RecipStep32Fx2:
2709 case Iop_RSqrtStep32Fx2:
2710 BINARY(Ity_I64,Ity_I64, Ity_I64);
2711
2712 case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8:
2713 case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8:
2714 case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8:
2715 case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4:
2716 case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
2717 case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4:
2718 case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
2719 case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4:
2720 case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
2721 BINARY(Ity_I64,Ity_I8, Ity_I64);
2722
2723 case Iop_Shl8: case Iop_Shr8: case Iop_Sar8:
2724 BINARY(Ity_I8,Ity_I8, Ity_I8);
2725 case Iop_Shl16: case Iop_Shr16: case Iop_Sar16:
2726 BINARY(Ity_I16,Ity_I8, Ity_I16);
2727 case Iop_Shl32: case Iop_Shr32: case Iop_Sar32:
2728 BINARY(Ity_I32,Ity_I8, Ity_I32);
2729 case Iop_Shl64: case Iop_Shr64: case Iop_Sar64:
2730 BINARY(Ity_I64,Ity_I8, Ity_I64);
2731
2732 case Iop_Not8:
2733 UNARY(Ity_I8, Ity_I8);
2734 case Iop_Not16:
2735 UNARY(Ity_I16, Ity_I16);
2736 case Iop_Not32:
2737 case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4:
2738 case Iop_Reverse8sIn32_x1:
2739 UNARY(Ity_I32, Ity_I32);
2740
2741 case Iop_Not64:
2742 case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8:
2743 case Iop_Cnt8x8:
2744 case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2:
2745 case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2:
2746 case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2:
2747 case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2:
2748 case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1:
2749 case Iop_Reverse32sIn64_x1:
2750 case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2:
2751 case Iop_Reverse8sIn16_x4:
2752 case Iop_FtoI32Sx2_RZ: case Iop_FtoI32Ux2_RZ:
2753 case Iop_I32StoFx2: case Iop_I32UtoFx2:
2754 case Iop_RecipEst32Ux2: case Iop_RecipEst32Fx2:
2755 case Iop_Abs32Fx2:
2756 case Iop_RSqrtEst32Fx2:
2757 case Iop_RSqrtEst32Ux2:
2758 case Iop_Neg32Fx2:
2759 case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2:
2760 UNARY(Ity_I64, Ity_I64);
2761
2762 case Iop_CmpEQ8: case Iop_CmpNE8:
2763 case Iop_CasCmpEQ8: case Iop_CasCmpNE8: case Iop_ExpCmpNE8:
2764 COMPARISON(Ity_I8);
2765 case Iop_CmpEQ16: case Iop_CmpNE16:
2766 case Iop_CasCmpEQ16: case Iop_CasCmpNE16: case Iop_ExpCmpNE16:
2767 COMPARISON(Ity_I16);
2768 case Iop_CmpEQ32: case Iop_CmpNE32:
2769 case Iop_CasCmpEQ32: case Iop_CasCmpNE32: case Iop_ExpCmpNE32:
2770 case Iop_CmpLT32S: case Iop_CmpLE32S:
2771 case Iop_CmpLT32U: case Iop_CmpLE32U:
2772 COMPARISON(Ity_I32);
2773 case Iop_CmpEQ64: case Iop_CmpNE64:
2774 case Iop_CasCmpEQ64: case Iop_CasCmpNE64: case Iop_ExpCmpNE64:
2775 case Iop_CmpLT64S: case Iop_CmpLE64S:
2776 case Iop_CmpLT64U: case Iop_CmpLE64U:
2777 COMPARISON(Ity_I64);
2778
2779 case Iop_CmpNEZ8: UNARY_COMPARISON(Ity_I8);
2780 case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16);
2781 case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32);
2782 case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64);
2783
2784 case Iop_Left8: UNARY(Ity_I8, Ity_I8);
2785 case Iop_Left16: UNARY(Ity_I16,Ity_I16);
2786 case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32);
2787 case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64);
2788
2789 case Iop_GetMSBs8x8: UNARY(Ity_I64, Ity_I8);
2790 case Iop_GetMSBs8x16: UNARY(Ity_V128, Ity_I16);
2791
2792 case Iop_MullU8: case Iop_MullS8:
2793 BINARY(Ity_I8,Ity_I8, Ity_I16);
2794 case Iop_MullU16: case Iop_MullS16:
2795 BINARY(Ity_I16,Ity_I16, Ity_I32);
2796 case Iop_MullU32: case Iop_MullS32:
2797 BINARY(Ity_I32,Ity_I32, Ity_I64);
2798 case Iop_MullU64: case Iop_MullS64:
2799 BINARY(Ity_I64,Ity_I64, Ity_I128);
2800
2801 case Iop_Clz32: case Iop_Ctz32:
2802 case Iop_ClzNat32: case Iop_CtzNat32:
2803 case Iop_PopCount32:
2804 UNARY(Ity_I32, Ity_I32);
2805
2806 case Iop_Clz64: case Iop_Ctz64:
2807 case Iop_ClzNat64: case Iop_CtzNat64:
2808 case Iop_PopCount64:
2809 UNARY(Ity_I64, Ity_I64);
2810
2811 case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E:
2812 BINARY(Ity_I32,Ity_I32, Ity_I32);
2813
2814 case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E:
2815 BINARY(Ity_I64,Ity_I64, Ity_I64);
2816
2817 case Iop_DivModU64to32: case Iop_DivModS64to32:
2818 BINARY(Ity_I64, Ity_I32, Ity_I64);
2819
2820 case Iop_DivModU32to32: case Iop_DivModS32to32:
2821 BINARY(Ity_I32, Ity_I32, Ity_I64);
2822
2823 case Iop_DivModU128to64: case Iop_DivModS128to64:
2824 BINARY(Ity_I128,Ity_I64, Ity_I128);
2825
2826 case Iop_DivModU64to64: case Iop_DivModS64to64:
2827 BINARY(Ity_I64,Ity_I64, Ity_I128);
2828
2829 case Iop_16HIto8: case Iop_16to8:
2830 UNARY(Ity_I16, Ity_I8);
2831 case Iop_8HLto16:
2832 BINARY(Ity_I8,Ity_I8, Ity_I16);
2833
2834 case Iop_32HIto16: case Iop_32to16:
2835 UNARY(Ity_I32, Ity_I16);
2836 case Iop_16HLto32:
2837 BINARY(Ity_I16,Ity_I16, Ity_I32);
2838
2839 case Iop_64HIto32: case Iop_64to32:
2840 UNARY(Ity_I64, Ity_I32);
2841 case Iop_32HLto64:
2842 BINARY(Ity_I32,Ity_I32, Ity_I64);
2843
2844 case Iop_128HIto64: case Iop_128to64:
2845 UNARY(Ity_I128, Ity_I64);
2846 case Iop_64HLto128:
2847 BINARY(Ity_I64,Ity_I64, Ity_I128);
2848
2849 case Iop_Not1: UNARY(Ity_I1, Ity_I1);
2850 case Iop_1Uto8: UNARY(Ity_I1, Ity_I8);
2851 case Iop_1Sto8: UNARY(Ity_I1, Ity_I8);
2852 case Iop_1Sto16: UNARY(Ity_I1, Ity_I16);
2853 case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32);
2854 case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64);
2855 case Iop_32to1: UNARY(Ity_I32, Ity_I1);
2856 case Iop_64to1: UNARY(Ity_I64, Ity_I1);
2857
2858 case Iop_8Uto32: case Iop_8Sto32:
2859 UNARY(Ity_I8, Ity_I32);
2860
2861 case Iop_8Uto16: case Iop_8Sto16:
2862 UNARY(Ity_I8, Ity_I16);
2863
2864 case Iop_16Uto32: case Iop_16Sto32:
2865 UNARY(Ity_I16, Ity_I32);
2866
2867 case Iop_32Sto64: case Iop_32Uto64:
2868 UNARY(Ity_I32, Ity_I64);
2869
2870 case Iop_8Uto64: case Iop_8Sto64:
2871 UNARY(Ity_I8, Ity_I64);
2872
2873 case Iop_16Uto64: case Iop_16Sto64:
2874 UNARY(Ity_I16, Ity_I64);
2875 case Iop_64to16:
2876 UNARY(Ity_I64, Ity_I16);
2877
2878 case Iop_32to8: UNARY(Ity_I32, Ity_I8);
2879 case Iop_64to8: UNARY(Ity_I64, Ity_I8);
2880
2881 case Iop_AddF64: case Iop_SubF64:
2882 case Iop_MulF64: case Iop_DivF64:
2883 case Iop_AddF64r32: case Iop_SubF64r32:
2884 case Iop_MulF64r32: case Iop_DivF64r32:
2885 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
2886
2887 case Iop_AddF32: case Iop_SubF32:
2888 case Iop_MulF32: case Iop_DivF32:
2889 TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32);
2890
2891 case Iop_NegF64: case Iop_AbsF64:
2892 UNARY(Ity_F64, Ity_F64);
2893
2894 case Iop_NegF32: case Iop_AbsF32:
2895 UNARY(Ity_F32, Ity_F32);
2896
2897 case Iop_SqrtF64:
2898 case Iop_RecpExpF64:
2899 BINARY(ity_RMode,Ity_F64, Ity_F64);
2900
2901 case Iop_SqrtF32:
2902 case Iop_RoundF32toInt:
2903 case Iop_RecpExpF32:
2904 BINARY(ity_RMode,Ity_F32, Ity_F32);
2905
2906 case Iop_MaxNumF64: case Iop_MinNumF64:
2907 BINARY(Ity_F64,Ity_F64, Ity_F64);
2908
2909 case Iop_MaxNumF32: case Iop_MinNumF32:
2910 BINARY(Ity_F32,Ity_F32, Ity_F32);
2911
2912 case Iop_CmpF32:
2913 BINARY(Ity_F32,Ity_F32, Ity_I32);
2914
2915 case Iop_CmpF64:
2916 BINARY(Ity_F64,Ity_F64, Ity_I32);
2917
2918 case Iop_CmpF128:
2919 BINARY(Ity_F128,Ity_F128, Ity_I32);
2920
2921 case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16);
2922 case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32);
2923 case Iop_F64toI64S: case Iop_F64toI64U:
2924 BINARY(ity_RMode,Ity_F64, Ity_I64);
2925
2926 case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32);
2927
2928 case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64);
2929 case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
2930 case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
2931 case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
2932
2933 case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64);
2934
2935 case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32);
2936 case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64);
2937 case Iop_F32toI32U: BINARY(ity_RMode,Ity_F32, Ity_I32);
2938 case Iop_F32toI64U: BINARY(ity_RMode,Ity_F32, Ity_I64);
2939
2940 case Iop_I32UtoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
2941 case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
2942 case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
2943
2944 case Iop_F32toF64: UNARY(Ity_F32, Ity_F64);
2945 case Iop_F16toF64: UNARY(Ity_F16, Ity_F64);
2946 case Iop_F16toF32: UNARY(Ity_F16, Ity_F32);
2947
2948 case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32);
2949 case Iop_F64toF16: BINARY(ity_RMode,Ity_F64, Ity_F16);
2950 case Iop_F32toF16: BINARY(ity_RMode,Ity_F32, Ity_F16);
2951
2952 case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64);
2953 case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64);
2954 case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32);
2955 case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32);
2956
2957 case Iop_AtanF64: case Iop_Yl2xF64: case Iop_Yl2xp1F64:
2958 case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64:
2959 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
2960
2961 case Iop_PRemC3210F64: case Iop_PRem1C3210F64:
2962 TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32);
2963
2964 case Iop_SinF64: case Iop_CosF64: case Iop_TanF64:
2965 case Iop_2xm1F64:
2966 case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64);
2967
2968 case Iop_MAddF64: case Iop_MSubF64:
2969 case Iop_MAddF64r32: case Iop_MSubF64r32:
2970 QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64);
2971
2972 case Iop_RSqrtEst5GoodF64:
2973 case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF:
2974 case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO:
2975 UNARY(Ity_F64, Ity_F64);
2976 case Iop_RoundF64toF32:
2977 BINARY(ity_RMode,Ity_F64, Ity_F64);
2978 case Iop_TruncF64asF32:
2979 UNARY(Ity_F64, Ity_F32);
2980
2981 case Iop_I32UtoFx4:
2982 case Iop_I32StoFx4:
2983 case Iop_QFtoI32Ux4_RZ:
2984 case Iop_QFtoI32Sx4_RZ:
2985 case Iop_FtoI32Ux4_RZ:
2986 case Iop_FtoI32Sx4_RZ:
2987 case Iop_RoundF32x4_RM:
2988 case Iop_RoundF32x4_RP:
2989 case Iop_RoundF32x4_RN:
2990 case Iop_RoundF32x4_RZ:
2991 case Iop_Abs64Fx2: case Iop_Abs32Fx4:
2992 case Iop_RSqrtEst32Fx4:
2993 case Iop_RSqrtEst32Ux4:
2994 UNARY(Ity_V128, Ity_V128);
2995
2996 case Iop_Sqrt64Fx2:
2997 case Iop_Sqrt32Fx4:
2998 case Iop_I32StoF32x4:
2999 case Iop_F32toI32Sx4:
3000 BINARY(ity_RMode,Ity_V128, Ity_V128);
3001
3002 case Iop_64HLtoV128:
3003 BINARY(Ity_I64,Ity_I64, Ity_V128);
3004
3005 case Iop_Scale2_32Fx4:
3006 case Iop_Scale2_64Fx2:
3007 TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
3008 case Iop_Log2_32Fx4:
3009 case Iop_Log2_64Fx2:
3010 UNARY(Ity_V128, Ity_V128);
3011
3012 case Iop_V128to64: case Iop_V128HIto64:
3013 case Iop_NarrowUn16to8x8:
3014 case Iop_NarrowUn32to16x4:
3015 case Iop_NarrowUn64to32x2:
3016 case Iop_QNarrowUn16Uto8Ux8:
3017 case Iop_QNarrowUn32Uto16Ux4:
3018 case Iop_QNarrowUn64Uto32Ux2:
3019 case Iop_QNarrowUn16Sto8Sx8:
3020 case Iop_QNarrowUn32Sto16Sx4:
3021 case Iop_QNarrowUn64Sto32Sx2:
3022 case Iop_QNarrowUn16Sto8Ux8:
3023 case Iop_QNarrowUn32Sto16Ux4:
3024 case Iop_QNarrowUn64Sto32Ux2:
3025 case Iop_F32toF16x4:
3026 UNARY(Ity_V128, Ity_I64);
3027
3028 case Iop_Widen8Uto16x8:
3029 case Iop_Widen16Uto32x4:
3030 case Iop_Widen32Uto64x2:
3031 case Iop_Widen8Sto16x8:
3032 case Iop_Widen16Sto32x4:
3033 case Iop_Widen32Sto64x2:
3034 case Iop_F16toF32x4:
3035 UNARY(Ity_I64, Ity_V128);
3036
3037 case Iop_V128to32: UNARY(Ity_V128, Ity_I32);
3038 case Iop_32UtoV128: UNARY(Ity_I32, Ity_V128);
3039 case Iop_64UtoV128: UNARY(Ity_I64, Ity_V128);
3040 case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128);
3041 case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128);
3042
3043 case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128);
3044 case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128);
3045 case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128);
3046 case Iop_Dup8x8: UNARY(Ity_I8, Ity_I64);
3047 case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64);
3048 case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64);
3049
3050 case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
3051 case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2:
3052 case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
3053 case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2:
3054 case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4:
3055 case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4:
3056 case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2:
3057 case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4:
3058 case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2:
3059 case Iop_Add32F0x4:
3060 case Iop_Add64F0x2:
3061 case Iop_Div32F0x4:
3062 case Iop_Div64F0x2:
3063 case Iop_Max32Fx4: case Iop_Max32F0x4:
3064 case Iop_PwMax32Fx4: case Iop_PwMin32Fx4:
3065 case Iop_Max64Fx2: case Iop_Max64F0x2:
3066 case Iop_Min32Fx4: case Iop_Min32F0x4:
3067 case Iop_Min64Fx2: case Iop_Min64F0x2:
3068 case Iop_Mul32F0x4:
3069 case Iop_Mul64F0x2:
3070 case Iop_Sub32F0x4:
3071 case Iop_Sub64F0x2:
3072 case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
3073 case Iop_Add8x16: case Iop_Add16x8:
3074 case Iop_Add32x4: case Iop_Add64x2: case Iop_Add128x1:
3075 case Iop_QAdd8Ux16: case Iop_QAdd16Ux8:
3076 case Iop_QAdd32Ux4: case Iop_QAdd64Ux2:
3077 case Iop_QAdd8Sx16: case Iop_QAdd16Sx8:
3078 case Iop_QAdd32Sx4: case Iop_QAdd64Sx2:
3079 case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8:
3080 case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2:
3081 case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8:
3082 case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2:
3083 case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
3084 case Iop_Sub8x16: case Iop_Sub16x8:
3085 case Iop_Sub32x4: case Iop_Sub64x2: case Iop_Sub128x1:
3086 case Iop_QSub8Ux16: case Iop_QSub16Ux8:
3087 case Iop_QSub32Ux4: case Iop_QSub64Ux2:
3088 case Iop_QSub8Sx16: case Iop_QSub16Sx8:
3089 case Iop_QSub32Sx4: case Iop_QSub64Sx2:
3090 case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4:
3091 case Iop_PolynomialMul8x16:
3092 case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8:
3093 case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2:
3094 case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
3095 case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
3096 case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
3097 case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
3098 case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4:
3099 case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4:
3100 case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2:
3101 case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2:
3102 case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4:
3103 case Iop_Max64Sx2:
3104 case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4:
3105 case Iop_Max64Ux2:
3106 case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4:
3107 case Iop_Min64Sx2:
3108 case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4:
3109 case Iop_Min64Ux2:
3110 case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4:
3111 case Iop_CmpEQ64x2:
3112 case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
3113 case Iop_CmpGT64Sx2:
3114 case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
3115 case Iop_CmpGT64Ux2:
3116 case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
3117 case Iop_QShl8x16: case Iop_QShl16x8:
3118 case Iop_QShl32x4: case Iop_QShl64x2:
3119 case Iop_QSal8x16: case Iop_QSal16x8:
3120 case Iop_QSal32x4: case Iop_QSal64x2:
3121 case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
3122 case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
3123 case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
3124 case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:case Iop_Rol64x2:
3125 case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8:
3126 case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8:
3127 case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8:
3128 case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4:
3129 case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8:
3130 case Iop_NarrowBin64to32x4:
3131 case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
3132 case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
3133 case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
3134 case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
3135 case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16:
3136 case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8:
3137 case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4:
3138 case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16:
3139 case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8:
3140 case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4:
3141 case Iop_PackOddLanes8x16: case Iop_PackEvenLanes8x16:
3142 case Iop_PackOddLanes16x8: case Iop_PackEvenLanes16x8:
3143 case Iop_PackOddLanes32x4: case Iop_PackEvenLanes32x4:
3144 case Iop_Perm8x16: case Iop_PermOrZero8x16:
3145 case Iop_Perm32x4:
3146 case Iop_RecipStep32Fx4: case Iop_RecipStep64Fx2:
3147 case Iop_RSqrtStep32Fx4: case Iop_RSqrtStep64Fx2:
3148 case Iop_CipherV128:
3149 case Iop_CipherLV128:
3150 case Iop_NCipherV128:
3151 case Iop_NCipherLV128:
3152 case Iop_Sh8Sx16: case Iop_Sh16Sx8:
3153 case Iop_Sh32Sx4: case Iop_Sh64Sx2:
3154 case Iop_Sh8Ux16: case Iop_Sh16Ux8:
3155 case Iop_Sh32Ux4: case Iop_Sh64Ux2:
3156 case Iop_Rsh8Sx16: case Iop_Rsh16Sx8:
3157 case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
3158 case Iop_Rsh8Ux16: case Iop_Rsh16Ux8:
3159 case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
3160 case Iop_MulI128by10E:
3161 case Iop_MulI128by10ECarry:
3162 BINARY(Ity_V128,Ity_V128, Ity_V128);
3163
3164 case Iop_Perm8x16x2:
3165 TERNARY(Ity_V128, Ity_V128, Ity_V128, Ity_V128);
3166
3167 case Iop_PolynomialMull8x8:
3168 case Iop_Mull8Ux8: case Iop_Mull8Sx8:
3169 case Iop_Mull16Ux4: case Iop_Mull16Sx4:
3170 case Iop_Mull32Ux2: case Iop_Mull32Sx2:
3171 BINARY(Ity_I64, Ity_I64, Ity_V128);
3172
3173 case Iop_NotV128:
3174 case Iop_RecipEst32Fx4: case Iop_RecipEst32F0x4:
3175 case Iop_RecipEst64Fx2: case Iop_RSqrtEst64Fx2:
3176 case Iop_RecipEst32Ux4:
3177 case Iop_RSqrtEst32F0x4:
3178 case Iop_Sqrt32F0x4:
3179 case Iop_Sqrt64F0x2:
3180 case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8:
3181 case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: case Iop_CmpNEZ128x1:
3182 case Iop_Cnt8x16:
3183 case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: case Iop_Clz64x2:
3184 case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4:
3185 case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4:
3186 case Iop_PwAddL64Ux2:
3187 case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
3188 case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2:
3189 case Iop_Reverse32sIn64_x2:
3190 case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4:
3191 case Iop_Reverse8sIn16_x8:
3192 case Iop_Reverse1sIn8_x16:
3193 case Iop_Neg64Fx2: case Iop_Neg32Fx4:
3194 case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2:
3195 case Iop_CipherSV128:
3196 case Iop_PwBitMtxXpose64x2:
3197 case Iop_ZeroHI64ofV128: case Iop_ZeroHI96ofV128:
3198 case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128:
3199 case Iop_F16toF64x2:
3200 case Iop_F64toF16x2:
3201 case Iop_MulI128by10:
3202 case Iop_MulI128by10Carry:
3203 case Iop_Ctz8x16: case Iop_Ctz16x8:
3204 case Iop_Ctz32x4: case Iop_Ctz64x2:
3205 case Iop_BCD128toI128S:
3206 UNARY(Ity_V128, Ity_V128);
3207
3208 case Iop_ShlV128: case Iop_ShrV128: case Iop_SarV128:
3209 case Iop_ShlN8x16: case Iop_ShlN16x8:
3210 case Iop_ShlN32x4: case Iop_ShlN64x2:
3211 case Iop_ShrN8x16: case Iop_ShrN16x8:
3212 case Iop_ShrN32x4: case Iop_ShrN64x2:
3213 case Iop_SarN8x16: case Iop_SarN16x8:
3214 case Iop_SarN32x4: case Iop_SarN64x2:
3215 case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
3216 case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
3217 case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
3218 case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
3219 case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
3220 case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
3221 case Iop_SHA256: case Iop_SHA512:
3222 case Iop_QandQShrNnarrow16Uto8Ux8:
3223 case Iop_QandQShrNnarrow32Uto16Ux4:
3224 case Iop_QandQShrNnarrow64Uto32Ux2:
3225 case Iop_QandQSarNnarrow16Sto8Sx8:
3226 case Iop_QandQSarNnarrow32Sto16Sx4:
3227 case Iop_QandQSarNnarrow64Sto32Sx2:
3228 case Iop_QandQSarNnarrow16Sto8Ux8:
3229 case Iop_QandQSarNnarrow32Sto16Ux4:
3230 case Iop_QandQSarNnarrow64Sto32Ux2:
3231 case Iop_QandQRShrNnarrow16Uto8Ux8:
3232 case Iop_QandQRShrNnarrow32Uto16Ux4:
3233 case Iop_QandQRShrNnarrow64Uto32Ux2:
3234 case Iop_QandQRSarNnarrow16Sto8Sx8:
3235 case Iop_QandQRSarNnarrow32Sto16Sx4:
3236 case Iop_QandQRSarNnarrow64Sto32Sx2:
3237 case Iop_QandQRSarNnarrow16Sto8Ux8:
3238 case Iop_QandQRSarNnarrow32Sto16Ux4:
3239 case Iop_QandQRSarNnarrow64Sto32Ux2:
3240 case Iop_I128StoBCD128:
3241 BINARY(Ity_V128, Ity_I8, Ity_V128);
3242
3243 case Iop_F32ToFixed32Ux4_RZ:
3244 case Iop_F32ToFixed32Sx4_RZ:
3245 case Iop_Fixed32UToF32x4_RN:
3246 case Iop_Fixed32SToF32x4_RN:
3247 BINARY(Ity_V128, Ity_I8, Ity_V128);
3248
3249 case Iop_F32ToFixed32Ux2_RZ:
3250 case Iop_F32ToFixed32Sx2_RZ:
3251 case Iop_Fixed32UToF32x2_RN:
3252 case Iop_Fixed32SToF32x2_RN:
3253 BINARY(Ity_I64, Ity_I8, Ity_I64);
3254
3255 case Iop_GetElem8x16:
3256 BINARY(Ity_V128, Ity_I8, Ity_I8);
3257 case Iop_GetElem16x8:
3258 BINARY(Ity_V128, Ity_I8, Ity_I16);
3259 case Iop_GetElem32x4:
3260 BINARY(Ity_V128, Ity_I8, Ity_I32);
3261 case Iop_GetElem64x2:
3262 BINARY(Ity_V128, Ity_I8, Ity_I64);
3263 case Iop_SetElem8x16:
3264 TERNARY(Ity_V128, Ity_I8, Ity_I8, Ity_V128);
3265 case Iop_SetElem16x8:
3266 TERNARY(Ity_V128, Ity_I8, Ity_I16, Ity_V128);
3267 case Iop_SetElem32x4:
3268 TERNARY(Ity_V128, Ity_I8, Ity_I32, Ity_V128);
3269 case Iop_SetElem64x2:
3270 TERNARY(Ity_V128, Ity_I8, Ity_I64, Ity_V128);
3271 case Iop_GetElem8x8:
3272 BINARY(Ity_I64, Ity_I8, Ity_I8);
3273 case Iop_GetElem16x4:
3274 BINARY(Ity_I64, Ity_I8, Ity_I16);
3275 case Iop_GetElem32x2:
3276 BINARY(Ity_I64, Ity_I8, Ity_I32);
3277 case Iop_SetElem8x8:
3278 TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64);
3279 case Iop_SetElem16x4:
3280 TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64);
3281 case Iop_SetElem32x2:
3282 TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64);
3283
3284 case Iop_Slice64:
3285 TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64);
3286 case Iop_SliceV128:
3287 TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128);
3288
3289 case Iop_BCDAdd:
3290 case Iop_BCDSub:
3291 BINARY(Ity_V128, Ity_V128, Ity_V128);
3292
3293 case Iop_QDMull16Sx4: case Iop_QDMull32Sx2:
3294 BINARY(Ity_I64, Ity_I64, Ity_V128);
3295
3296 /* s390 specific */
3297 case Iop_MAddF32:
3298 case Iop_MSubF32:
3299 QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32);
3300
3301 case Iop_F64HLtoF128:
3302 BINARY(Ity_F64,Ity_F64, Ity_F128);
3303
3304 case Iop_F128HItoF64:
3305 case Iop_F128LOtoF64:
3306 UNARY(Ity_F128, Ity_F64);
3307
3308 case Iop_AddF128:
3309 case Iop_SubF128:
3310 case Iop_MulF128:
3311 case Iop_DivF128:
3312 TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128);
3313
3314 case Iop_MAddF128:
3315 case Iop_MSubF128:
3316 case Iop_NegMAddF128:
3317 case Iop_NegMSubF128:
3318 QUATERNARY(ity_RMode,Ity_F128,Ity_F128,Ity_F128, Ity_F128);
3319
3320 case Iop_Add64Fx2: case Iop_Sub64Fx2:
3321 case Iop_Mul64Fx2: case Iop_Div64Fx2:
3322 case Iop_Add32Fx4: case Iop_Sub32Fx4:
3323 case Iop_Mul32Fx4: case Iop_Div32Fx4:
3324 case Iop_F64x2_2toQ32x4: case Iop_F32x4_2toQ16x8:
3325 TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
3326
3327 case Iop_Add64Fx4: case Iop_Sub64Fx4:
3328 case Iop_Mul64Fx4: case Iop_Div64Fx4:
3329 case Iop_Add32Fx8: case Iop_Sub32Fx8:
3330 case Iop_Mul32Fx8: case Iop_Div32Fx8:
3331 TERNARY(ity_RMode,Ity_V256,Ity_V256, Ity_V256);
3332
3333 case Iop_NegF128:
3334 case Iop_AbsF128:
3335 UNARY(Ity_F128, Ity_F128);
3336
3337 case Iop_SqrtF128:
3338 case Iop_RoundF128toInt:
3339 BINARY(ity_RMode,Ity_F128, Ity_F128);
3340
3341 case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128);
3342 case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128);
3343
3344 case Iop_I32UtoF128: UNARY(Ity_I32, Ity_F128);
3345 case Iop_I64UtoF128: UNARY(Ity_I64, Ity_F128);
3346
3347 case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32);
3348 case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64);
3349
3350 case Iop_F128toI32U: BINARY(ity_RMode,Ity_F128, Ity_I32);
3351 case Iop_F128toI64U: BINARY(ity_RMode,Ity_F128, Ity_I64);
3352
3353 case Iop_F32toF128: UNARY(Ity_F32, Ity_F128);
3354 case Iop_F64toF128: UNARY(Ity_F64, Ity_F128);
3355
3356 case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32);
3357 case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64);
3358
3359 case Iop_TruncF128toI32S:
3360 case Iop_TruncF128toI64S:
3361 case Iop_TruncF128toI32U:
3362 case Iop_TruncF128toI64U:
3363 UNARY(Ity_F128, Ity_F128);
3364
3365 case Iop_F128toI128S:
3366 case Iop_RndF128:
3367 BINARY(ity_RMode,Ity_F128, Ity_F128);
3368
3369 case Iop_D32toD64:
3370 UNARY(Ity_D32, Ity_D64);
3371
3372 case Iop_ExtractExpD64:
3373 UNARY(Ity_D64, Ity_I64);
3374
3375 case Iop_ExtractSigD64:
3376 UNARY(Ity_D64, Ity_I64);
3377
3378 case Iop_InsertExpD64:
3379 BINARY(Ity_I64,Ity_D64, Ity_D64);
3380
3381 case Iop_ExtractExpD128:
3382 UNARY(Ity_D128, Ity_I64);
3383
3384 case Iop_ExtractSigD128:
3385 UNARY(Ity_D128, Ity_I64);
3386
3387 case Iop_InsertExpD128:
3388 BINARY(Ity_I64,Ity_D128, Ity_D128);
3389
3390 case Iop_D64toD128:
3391 UNARY(Ity_D64, Ity_D128);
3392
3393 case Iop_ReinterpD64asI64:
3394 UNARY(Ity_D64, Ity_I64);
3395
3396 case Iop_ReinterpI64asD64:
3397 UNARY(Ity_I64, Ity_D64);
3398
3399 case Iop_RoundD64toInt:
3400 BINARY(ity_RMode,Ity_D64, Ity_D64);
3401
3402 case Iop_RoundD128toInt:
3403 BINARY(ity_RMode,Ity_D128, Ity_D128);
3404
3405 case Iop_I32StoD128:
3406 case Iop_I32UtoD128:
3407 UNARY(Ity_I32, Ity_D128);
3408
3409 case Iop_I64StoD128:
3410 UNARY(Ity_I64, Ity_D128);
3411
3412 case Iop_I64UtoD128:
3413 UNARY(Ity_I64, Ity_D128);
3414
3415 case Iop_DPBtoBCD:
3416 case Iop_BCDtoDPB:
3417 UNARY(Ity_I64, Ity_I64);
3418
3419 case Iop_D128HItoD64:
3420 case Iop_D128LOtoD64:
3421 UNARY(Ity_D128, Ity_D64);
3422
3423 case Iop_D128toI64S:
3424 BINARY(ity_RMode, Ity_D128, Ity_I64);
3425
3426 case Iop_D128toI64U:
3427 BINARY(ity_RMode, Ity_D128, Ity_I64);
3428
3429 case Iop_D128toI32S:
3430 case Iop_D128toI32U:
3431 BINARY(ity_RMode, Ity_D128, Ity_I32);
3432
3433 case Iop_D64HLtoD128:
3434 BINARY(Ity_D64, Ity_D64, Ity_D128);
3435
3436 case Iop_ShlD64:
3437 case Iop_ShrD64:
3438 BINARY(Ity_D64, Ity_I8, Ity_D64 );
3439
3440 case Iop_D64toD32:
3441 BINARY(ity_RMode, Ity_D64, Ity_D32);
3442
3443 case Iop_D64toI32S:
3444 case Iop_D64toI32U:
3445 BINARY(ity_RMode, Ity_D64, Ity_I32);
3446
3447 case Iop_D64toI64S:
3448 BINARY(ity_RMode, Ity_D64, Ity_I64);
3449
3450 case Iop_D64toI64U:
3451 BINARY(ity_RMode, Ity_D64, Ity_I64);
3452
3453 case Iop_I32StoD64:
3454 case Iop_I32UtoD64:
3455 UNARY(Ity_I32, Ity_D64);
3456
3457 case Iop_I64StoD64:
3458 BINARY(ity_RMode, Ity_I64, Ity_D64);
3459
3460 case Iop_I64UtoD64:
3461 BINARY(ity_RMode, Ity_I64, Ity_D64);
3462
3463 case Iop_F32toD32:
3464 BINARY(ity_RMode, Ity_F32, Ity_D32);
3465
3466 case Iop_F32toD64:
3467 BINARY(ity_RMode, Ity_F32, Ity_D64);
3468
3469 case Iop_F32toD128:
3470 BINARY(ity_RMode, Ity_F32, Ity_D128);
3471
3472 case Iop_F64toD32:
3473 BINARY(ity_RMode, Ity_F64, Ity_D32);
3474
3475 case Iop_F64toD64:
3476 BINARY(ity_RMode, Ity_F64, Ity_D64);
3477
3478 case Iop_F64toD128:
3479 BINARY(ity_RMode, Ity_F64, Ity_D128);
3480
3481 case Iop_F128toD32:
3482 BINARY(ity_RMode, Ity_F128, Ity_D32);
3483
3484 case Iop_F128toD64:
3485 BINARY(ity_RMode, Ity_F128, Ity_D64);
3486
3487 case Iop_F128toD128:
3488 BINARY(ity_RMode, Ity_F128, Ity_D128);
3489
3490 case Iop_D32toF32:
3491 BINARY(ity_RMode, Ity_D32, Ity_F32);
3492
3493 case Iop_D32toF64:
3494 BINARY(ity_RMode, Ity_D32, Ity_F64);
3495
3496 case Iop_D32toF128:
3497 BINARY(ity_RMode, Ity_D32, Ity_F128);
3498
3499 case Iop_D64toF32:
3500 BINARY(ity_RMode, Ity_D64, Ity_F32);
3501
3502 case Iop_D64toF64:
3503 BINARY(ity_RMode, Ity_D64, Ity_F64);
3504
3505 case Iop_D64toF128:
3506 BINARY(ity_RMode, Ity_D64, Ity_F128);
3507
3508 case Iop_D128toF32:
3509 BINARY(ity_RMode, Ity_D128, Ity_F32);
3510
3511 case Iop_D128toF64:
3512 BINARY(ity_RMode, Ity_D128, Ity_F64);
3513
3514 case Iop_D128toF128:
3515 BINARY(ity_RMode, Ity_D128, Ity_F128);
3516
3517 case Iop_CmpD64:
3518 case Iop_CmpExpD64:
3519 BINARY(Ity_D64,Ity_D64, Ity_I32);
3520
3521 case Iop_CmpD128:
3522 case Iop_CmpExpD128:
3523 BINARY(Ity_D128,Ity_D128, Ity_I32);
3524
3525 case Iop_QuantizeD64:
3526 TERNARY(ity_RMode,Ity_D64,Ity_D64, Ity_D64);
3527
3528 case Iop_SignificanceRoundD64:
3529 TERNARY(ity_RMode, Ity_I8,Ity_D64, Ity_D64);
3530
3531 case Iop_QuantizeD128:
3532 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
3533
3534 case Iop_SignificanceRoundD128:
3535 TERNARY(ity_RMode, Ity_I8,Ity_D128, Ity_D128);
3536
3537 case Iop_ShlD128:
3538 case Iop_ShrD128:
3539 BINARY(Ity_D128, Ity_I8, Ity_D128 );
3540
3541 case Iop_AddD64:
3542 case Iop_SubD64:
3543 case Iop_MulD64:
3544 case Iop_DivD64:
3545 TERNARY( ity_RMode, Ity_D64, Ity_D64, Ity_D64 );
3546
3547 case Iop_D128toD64:
3548 BINARY( ity_RMode, Ity_D128, Ity_D64 );
3549
3550 case Iop_AddD128:
3551 case Iop_SubD128:
3552 case Iop_MulD128:
3553 case Iop_DivD128:
3554 TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
3555
3556 case Iop_V256to64_0: case Iop_V256to64_1:
3557 case Iop_V256to64_2: case Iop_V256to64_3:
3558 UNARY(Ity_V256, Ity_I64);
3559
3560 case Iop_64x4toV256:
3561 QUATERNARY(Ity_I64, Ity_I64, Ity_I64, Ity_I64, Ity_V256);
3562
3563 case Iop_AndV256: case Iop_OrV256:
3564 case Iop_XorV256:
3565 case Iop_Max32Fx8: case Iop_Min32Fx8:
3566 case Iop_Max64Fx4: case Iop_Min64Fx4:
3567 case Iop_Add8x32: case Iop_Add16x16:
3568 case Iop_Add32x8: case Iop_Add64x4:
3569 case Iop_Sub8x32: case Iop_Sub16x16:
3570 case Iop_Sub32x8: case Iop_Sub64x4:
3571 case Iop_Mul16x16: case Iop_Mul32x8:
3572 case Iop_MulHi16Ux16: case Iop_MulHi16Sx16:
3573 case Iop_Avg8Ux32: case Iop_Avg16Ux16:
3574 case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8:
3575 case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8:
3576 case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8:
3577 case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8:
3578 case Iop_CmpEQ8x32: case Iop_CmpEQ16x16:
3579 case Iop_CmpEQ32x8: case Iop_CmpEQ64x4:
3580 case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16:
3581 case Iop_CmpGT32Sx8: case Iop_CmpGT64Sx4:
3582 case Iop_QAdd8Ux32: case Iop_QAdd16Ux16:
3583 case Iop_QAdd8Sx32: case Iop_QAdd16Sx16:
3584 case Iop_QSub8Ux32: case Iop_QSub16Ux16:
3585 case Iop_QSub8Sx32: case Iop_QSub16Sx16:
3586 case Iop_Perm32x8:
3587 BINARY(Ity_V256,Ity_V256, Ity_V256);
3588
3589 case Iop_I32StoF32x8:
3590 case Iop_F32toI32Sx8:
3591 BINARY(ity_RMode,Ity_V256, Ity_V256);
3592
3593 case Iop_V256toV128_1: case Iop_V256toV128_0:
3594 UNARY(Ity_V256, Ity_V128);
3595
3596 case Iop_QandUQsh8x16: case Iop_QandUQsh16x8:
3597 case Iop_QandUQsh32x4: case Iop_QandUQsh64x2:
3598 case Iop_QandSQsh8x16: case Iop_QandSQsh16x8:
3599 case Iop_QandSQsh32x4: case Iop_QandSQsh64x2:
3600 case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8:
3601 case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2:
3602 case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8:
3603 case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2:
3604 case Iop_V128HLtoV256:
3605 BINARY(Ity_V128,Ity_V128, Ity_V256);
3606
3607 case Iop_NotV256:
3608 case Iop_RSqrtEst32Fx8:
3609 case Iop_Sqrt32Fx8:
3610 case Iop_Sqrt64Fx4:
3611 case Iop_RecipEst32Fx8:
3612 case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16:
3613 case Iop_CmpNEZ64x4: case Iop_CmpNEZ32x8:
3614 UNARY(Ity_V256, Ity_V256);
3615
3616 case Iop_ShlN16x16: case Iop_ShlN32x8:
3617 case Iop_ShlN64x4:
3618 case Iop_ShrN16x16: case Iop_ShrN32x8:
3619 case Iop_ShrN64x4:
3620 case Iop_SarN16x16: case Iop_SarN32x8:
3621 BINARY(Ity_V256,Ity_I8, Ity_V256);
3622 case Iop_Rotx32:
3623 QUATERNARY(Ity_I32, Ity_I8, Ity_I8, Ity_I8, Ity_I32);
3624 case Iop_Rotx64:
3625 QUATERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I8, Ity_I64);
3626
3627 default:
3628 ppIROp(op);
3629 vpanic("typeOfPrimop");
3630 }
3631 # undef UNARY
3632 # undef BINARY
3633 # undef TERNARY
3634 # undef COMPARISON
3635 # undef UNARY_COMPARISON
3636 }
3637
3638
3639 /*---------------------------------------------------------------*/
3640 /*--- Helper functions for the IR -- IR Basic Blocks ---*/
3641 /*---------------------------------------------------------------*/
3642
addStmtToIRSB(IRSB * bb,IRStmt * st)3643 void addStmtToIRSB ( IRSB* bb, IRStmt* st )
3644 {
3645 Int i;
3646 if (bb->stmts_used == bb->stmts_size) {
3647 IRStmt** stmts2 = LibVEX_Alloc_inline(2 * bb->stmts_size * sizeof(IRStmt*));
3648 for (i = 0; i < bb->stmts_size; i++)
3649 stmts2[i] = bb->stmts[i];
3650 bb->stmts = stmts2;
3651 bb->stmts_size *= 2;
3652 }
3653 vassert(bb->stmts_used < bb->stmts_size);
3654 bb->stmts[bb->stmts_used] = st;
3655 bb->stmts_used++;
3656 }
3657
3658
3659 /*---------------------------------------------------------------*/
3660 /*--- Helper functions for the IR -- IR Type Environments ---*/
3661 /*---------------------------------------------------------------*/
3662
3663 /* Allocate a new IRTemp, given its type. */
3664
newIRTemp(IRTypeEnv * env,IRType ty)3665 IRTemp newIRTemp ( IRTypeEnv* env, IRType ty )
3666 {
3667 vassert(env);
3668 vassert(env->types_used >= 0);
3669 vassert(env->types_size >= 0);
3670 vassert(env->types_used <= env->types_size);
3671 if (env->types_used < env->types_size) {
3672 env->types[env->types_used] = ty;
3673 return env->types_used++;
3674 } else {
3675 Int i;
3676 Int new_size = env->types_size==0 ? 8 : 2*env->types_size;
3677 IRType* new_types
3678 = LibVEX_Alloc_inline(new_size * sizeof(IRType));
3679 for (i = 0; i < env->types_used; i++)
3680 new_types[i] = env->types[i];
3681 env->types = new_types;
3682 env->types_size = new_size;
3683 return newIRTemp(env, ty);
3684 }
3685 }
3686
3687
3688 /*---------------------------------------------------------------*/
3689 /*--- Helper functions for the IR -- finding types of exprs ---*/
3690 /*---------------------------------------------------------------*/
3691
3692 inline
typeOfIRTemp(const IRTypeEnv * env,IRTemp tmp)3693 IRType typeOfIRTemp ( const IRTypeEnv* env, IRTemp tmp )
3694 {
3695 vassert(tmp >= 0);
3696 vassert(tmp < env->types_used);
3697 return env->types[tmp];
3698 }
3699
typeOfIRConst(const IRConst * con)3700 IRType typeOfIRConst ( const IRConst* con )
3701 {
3702 switch (con->tag) {
3703 case Ico_U1: return Ity_I1;
3704 case Ico_U8: return Ity_I8;
3705 case Ico_U16: return Ity_I16;
3706 case Ico_U32: return Ity_I32;
3707 case Ico_U64: return Ity_I64;
3708 case Ico_F32: return Ity_F32;
3709 case Ico_F32i: return Ity_F32;
3710 case Ico_F64: return Ity_F64;
3711 case Ico_F64i: return Ity_F64;
3712 case Ico_V128: return Ity_V128;
3713 case Ico_V256: return Ity_V256;
3714 default: vpanic("typeOfIRConst");
3715 }
3716 }
3717
typeOfIRLoadGOp(IRLoadGOp cvt,IRType * t_res,IRType * t_arg)3718 void typeOfIRLoadGOp ( IRLoadGOp cvt,
3719 /*OUT*/IRType* t_res, /*OUT*/IRType* t_arg )
3720 {
3721 switch (cvt) {
3722 case ILGop_IdentV128:
3723 *t_res = Ity_V128; *t_arg = Ity_V128; break;
3724 case ILGop_Ident64:
3725 *t_res = Ity_I64; *t_arg = Ity_I64; break;
3726 case ILGop_Ident32:
3727 *t_res = Ity_I32; *t_arg = Ity_I32; break;
3728 case ILGop_16Uto32: case ILGop_16Sto32:
3729 *t_res = Ity_I32; *t_arg = Ity_I16; break;
3730 case ILGop_8Uto32: case ILGop_8Sto32:
3731 *t_res = Ity_I32; *t_arg = Ity_I8; break;
3732 default:
3733 vpanic("typeOfIRLoadGOp");
3734 }
3735 }
3736
typeOfIRExpr(const IRTypeEnv * tyenv,const IRExpr * e)3737 IRType typeOfIRExpr ( const IRTypeEnv* tyenv, const IRExpr* e )
3738 {
3739 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
3740 start:
3741 switch (e->tag) {
3742 case Iex_Load:
3743 return e->Iex.Load.ty;
3744 case Iex_Get:
3745 return e->Iex.Get.ty;
3746 case Iex_GetI:
3747 return e->Iex.GetI.descr->elemTy;
3748 case Iex_RdTmp:
3749 return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp);
3750 case Iex_Const:
3751 return typeOfIRConst(e->Iex.Const.con);
3752 case Iex_Qop:
3753 typeOfPrimop(e->Iex.Qop.details->op,
3754 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3755 return t_dst;
3756 case Iex_Triop:
3757 typeOfPrimop(e->Iex.Triop.details->op,
3758 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3759 return t_dst;
3760 case Iex_Binop:
3761 typeOfPrimop(e->Iex.Binop.op,
3762 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3763 return t_dst;
3764 case Iex_Unop:
3765 typeOfPrimop(e->Iex.Unop.op,
3766 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
3767 return t_dst;
3768 case Iex_CCall:
3769 return e->Iex.CCall.retty;
3770 case Iex_ITE:
3771 e = e->Iex.ITE.iffalse;
3772 goto start;
3773 /* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */
3774 case Iex_Binder:
3775 vpanic("typeOfIRExpr: Binder is not a valid expression");
3776 case Iex_VECRET:
3777 vpanic("typeOfIRExpr: VECRET is not a valid expression");
3778 case Iex_GSPTR:
3779 vpanic("typeOfIRExpr: GSPTR is not a valid expression");
3780 default:
3781 ppIRExpr(e);
3782 vpanic("typeOfIRExpr");
3783 }
3784 }
3785
3786 /* Is this any value actually in the enumeration 'IRType' ? */
isPlausibleIRType(IRType ty)3787 Bool isPlausibleIRType ( IRType ty )
3788 {
3789 switch (ty) {
3790 case Ity_INVALID: case Ity_I1:
3791 case Ity_I8: case Ity_I16: case Ity_I32:
3792 case Ity_I64: case Ity_I128:
3793 case Ity_F16: case Ity_F32: case Ity_F64: case Ity_F128:
3794 case Ity_D32: case Ity_D64: case Ity_D128:
3795 case Ity_V128: case Ity_V256:
3796 return True;
3797 default:
3798 return False;
3799 }
3800 }
3801
3802
3803 /*---------------------------------------------------------------*/
3804 /*--- Sanity checking -- FLATNESS ---*/
3805 /*---------------------------------------------------------------*/
3806
3807 /* Check that the canonical flatness constraints hold on an
3808 IRStmt. The only place where any expression is allowed to be
3809 non-atomic is the RHS of IRStmt_Tmp. */
3810
3811 /* Relies on:
3812 inline static Bool isAtom ( IRExpr* e ) {
3813 return e->tag == Iex_RdTmp || e->tag == Iex_Const;
3814 }
3815 */
3816
isIRAtom_or_VECRET_or_GSPTR(const IRExpr * e)3817 static inline Bool isIRAtom_or_VECRET_or_GSPTR ( const IRExpr* e )
3818 {
3819 if (isIRAtom(e)) {
3820 return True;
3821 }
3822
3823 return UNLIKELY(is_IRExpr_VECRET_or_GSPTR(e));
3824 }
3825
isFlatIRStmt(const IRStmt * st)3826 Bool isFlatIRStmt ( const IRStmt* st )
3827 {
3828 Int i;
3829 const IRExpr* e;
3830 const IRQop* qop;
3831 const IRTriop* triop;
3832
3833 switch (st->tag) {
3834 case Ist_AbiHint:
3835 return isIRAtom(st->Ist.AbiHint.base)
3836 && isIRAtom(st->Ist.AbiHint.nia);
3837 case Ist_Put:
3838 return isIRAtom(st->Ist.Put.data);
3839 case Ist_PutI: {
3840 const IRPutI *puti = st->Ist.PutI.details;
3841 return toBool( isIRAtom(puti->ix)
3842 && isIRAtom(puti->data) );
3843 }
3844 case Ist_WrTmp:
3845 /* This is the only interesting case. The RHS can be any
3846 expression, *but* all its subexpressions *must* be
3847 atoms. */
3848 e = st->Ist.WrTmp.data;
3849 switch (e->tag) {
3850 case Iex_Binder: return True;
3851 case Iex_Get: return True;
3852 case Iex_GetI: return isIRAtom(e->Iex.GetI.ix);
3853 case Iex_RdTmp: return True;
3854 case Iex_Qop: qop = e->Iex.Qop.details;
3855 return toBool(
3856 isIRAtom(qop->arg1)
3857 && isIRAtom(qop->arg2)
3858 && isIRAtom(qop->arg3)
3859 && isIRAtom(qop->arg4));
3860 case Iex_Triop: triop = e->Iex.Triop.details;
3861 return toBool(
3862 isIRAtom(triop->arg1)
3863 && isIRAtom(triop->arg2)
3864 && isIRAtom(triop->arg3));
3865 case Iex_Binop: return toBool(
3866 isIRAtom(e->Iex.Binop.arg1)
3867 && isIRAtom(e->Iex.Binop.arg2));
3868 case Iex_Unop: return isIRAtom(e->Iex.Unop.arg);
3869 case Iex_Load: return isIRAtom(e->Iex.Load.addr);
3870 case Iex_Const: return True;
3871 case Iex_CCall: for (i = 0; e->Iex.CCall.args[i]; i++)
3872 if (!isIRAtom(e->Iex.CCall.args[i]))
3873 return False;
3874 return True;
3875 case Iex_ITE: return toBool (
3876 isIRAtom(e->Iex.ITE.cond)
3877 && isIRAtom(e->Iex.ITE.iftrue)
3878 && isIRAtom(e->Iex.ITE.iffalse));
3879 default: vpanic("isFlatIRStmt(e)");
3880 }
3881 /*notreached*/
3882 vassert(0);
3883 case Ist_Store:
3884 return toBool( isIRAtom(st->Ist.Store.addr)
3885 && isIRAtom(st->Ist.Store.data) );
3886 case Ist_StoreG: {
3887 const IRStoreG* sg = st->Ist.StoreG.details;
3888 return toBool( isIRAtom(sg->addr)
3889 && isIRAtom(sg->data) && isIRAtom(sg->guard) );
3890 }
3891 case Ist_LoadG: {
3892 const IRLoadG* lg = st->Ist.LoadG.details;
3893 return toBool( isIRAtom(lg->addr)
3894 && isIRAtom(lg->alt) && isIRAtom(lg->guard) );
3895 }
3896 case Ist_CAS: {
3897 const IRCAS* cas = st->Ist.CAS.details;
3898 return toBool( isIRAtom(cas->addr)
3899 && (cas->expdHi ? isIRAtom(cas->expdHi) : True)
3900 && isIRAtom(cas->expdLo)
3901 && (cas->dataHi ? isIRAtom(cas->dataHi) : True)
3902 && isIRAtom(cas->dataLo) );
3903 }
3904 case Ist_LLSC:
3905 return toBool( isIRAtom(st->Ist.LLSC.addr)
3906 && (st->Ist.LLSC.storedata
3907 ? isIRAtom(st->Ist.LLSC.storedata) : True) );
3908 case Ist_Dirty: {
3909 const IRDirty* di = st->Ist.Dirty.details;
3910 if (!isIRAtom(di->guard))
3911 return False;
3912 for (i = 0; di->args[i]; i++)
3913 if (!isIRAtom_or_VECRET_or_GSPTR(di->args[i]))
3914 return False;
3915 if (di->mAddr && !isIRAtom(di->mAddr))
3916 return False;
3917 return True;
3918 }
3919 case Ist_NoOp:
3920 case Ist_IMark:
3921 case Ist_MBE:
3922 return True;
3923 case Ist_Exit:
3924 return isIRAtom(st->Ist.Exit.guard);
3925 default:
3926 vpanic("isFlatIRStmt(st)");
3927 }
3928 }
3929
3930
3931 /*---------------------------------------------------------------*/
3932 /*--- Sanity checking ---*/
3933 /*---------------------------------------------------------------*/
3934
3935 /* Checks:
3936
3937 Everything is type-consistent. No ill-typed anything.
3938 The target address at the end of the BB is a 32- or 64-
3939 bit expression, depending on the guest's word size.
3940
3941 Each temp is assigned only once, before its uses.
3942 */
3943
countArgs(IRExpr ** args)3944 static inline Int countArgs ( IRExpr** args )
3945 {
3946 Int i;
3947 for (i = 0; args[i]; i++)
3948 ;
3949 return i;
3950 }
3951
3952 static
3953 __attribute((noreturn))
sanityCheckFail(const IRSB * bb,const IRStmt * stmt,const HChar * what)3954 void sanityCheckFail ( const IRSB* bb, const IRStmt* stmt, const HChar* what )
3955 {
3956 vex_printf("\nIR SANITY CHECK FAILURE\n\n");
3957 ppIRSB(bb);
3958 if (stmt) {
3959 vex_printf("\nIN STATEMENT:\n\n");
3960 ppIRStmt(stmt);
3961 }
3962 vex_printf("\n\nERROR = %s\n\n", what );
3963 vpanic("sanityCheckFail: exiting due to bad IR");
3964 }
3965
saneIRRegArray(const IRRegArray * arr)3966 static Bool saneIRRegArray ( const IRRegArray* arr )
3967 {
3968 if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)
3969 return False;
3970 if (arr->elemTy == Ity_I1)
3971 return False;
3972 if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)
3973 return False;
3974 return True;
3975 }
3976
saneIRCallee(const IRCallee * cee)3977 static Bool saneIRCallee ( const IRCallee* cee )
3978 {
3979 if (cee->name == NULL)
3980 return False;
3981 if (cee->addr == 0)
3982 return False;
3983 if (cee->regparms < 0 || cee->regparms > 3)
3984 return False;
3985 return True;
3986 }
3987
saneIRConst(const IRConst * con)3988 static Bool saneIRConst ( const IRConst* con )
3989 {
3990 switch (con->tag) {
3991 case Ico_U1:
3992 return toBool( con->Ico.U1 == True || con->Ico.U1 == False );
3993 default:
3994 /* Is there anything we can meaningfully check? I don't
3995 think so. */
3996 return True;
3997 }
3998 }
3999
4000 /* Traverse a Stmt/Expr, inspecting IRTemp uses. Report any out of
4001 range ones. Report any which are read and for which the current
4002 def_count is zero. */
4003
4004 static
useBeforeDef_Temp(const IRSB * bb,const IRStmt * stmt,IRTemp tmp,Int * def_counts)4005 void useBeforeDef_Temp ( const IRSB* bb, const IRStmt* stmt, IRTemp tmp,
4006 Int* def_counts )
4007 {
4008 if (tmp < 0 || tmp >= bb->tyenv->types_used)
4009 sanityCheckFail(bb,stmt, "out of range Temp in IRExpr");
4010 if (def_counts[tmp] < 1)
4011 sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr");
4012 }
4013
4014 static
assignedOnce_Temp(const IRSB * bb,const IRStmt * stmt,IRTemp tmp,Int * def_counts,UInt n_def_counts,const HChar * err_msg_out_of_range,const HChar * err_msg_assigned_more_than_once)4015 void assignedOnce_Temp(const IRSB *bb, const IRStmt *stmt, IRTemp tmp,
4016 Int *def_counts, UInt n_def_counts,
4017 const HChar *err_msg_out_of_range,
4018 const HChar *err_msg_assigned_more_than_once)
4019 {
4020 if (tmp < 0 || tmp >= n_def_counts) {
4021 sanityCheckFail(bb, stmt, err_msg_out_of_range);
4022 }
4023
4024 def_counts[tmp]++;
4025 if (def_counts[tmp] > 1) {
4026 sanityCheckFail(bb, stmt, err_msg_assigned_more_than_once);
4027 }
4028 }
4029
4030 static
useBeforeDef_Expr(const IRSB * bb,const IRStmt * stmt,const IRExpr * expr,Int * def_counts)4031 void useBeforeDef_Expr ( const IRSB* bb, const IRStmt* stmt,
4032 const IRExpr* expr, Int* def_counts )
4033 {
4034 Int i;
4035 switch (expr->tag) {
4036 case Iex_Get:
4037 break;
4038 case Iex_GetI:
4039 useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts);
4040 break;
4041 case Iex_RdTmp:
4042 useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts);
4043 break;
4044 case Iex_Qop: {
4045 const IRQop* qop = expr->Iex.Qop.details;
4046 useBeforeDef_Expr(bb,stmt,qop->arg1,def_counts);
4047 useBeforeDef_Expr(bb,stmt,qop->arg2,def_counts);
4048 useBeforeDef_Expr(bb,stmt,qop->arg3,def_counts);
4049 useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts);
4050 break;
4051 }
4052 case Iex_Triop: {
4053 const IRTriop* triop = expr->Iex.Triop.details;
4054 useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts);
4055 useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts);
4056 useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts);
4057 break;
4058 }
4059 case Iex_Binop:
4060 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts);
4061 useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts);
4062 break;
4063 case Iex_Unop:
4064 useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts);
4065 break;
4066 case Iex_Load:
4067 useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts);
4068 break;
4069 case Iex_Const:
4070 break;
4071 case Iex_CCall:
4072 for (i = 0; expr->Iex.CCall.args[i]; i++) {
4073 const IRExpr* arg = expr->Iex.CCall.args[i];
4074 if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4075 /* These aren't allowed in CCall lists. Let's detect
4076 and throw them out here, though, rather than
4077 segfaulting a bit later on. */
4078 sanityCheckFail(bb,stmt, "IRExprP__* value in CCall arg list");
4079 } else {
4080 useBeforeDef_Expr(bb,stmt,arg,def_counts);
4081 }
4082 }
4083 break;
4084 case Iex_ITE:
4085 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.cond,def_counts);
4086 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iftrue,def_counts);
4087 useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iffalse,def_counts);
4088 break;
4089 default:
4090 vpanic("useBeforeDef_Expr");
4091 }
4092 }
4093
4094 static
useBeforeDef_Stmt(const IRSB * bb,const IRStmt * stmt,Int * def_counts)4095 void useBeforeDef_Stmt ( const IRSB* bb, const IRStmt* stmt, Int* def_counts )
4096 {
4097 Int i;
4098 const IRDirty* d;
4099 const IRCAS* cas;
4100 const IRPutI* puti;
4101 const IRLoadG* lg;
4102 const IRStoreG* sg;
4103 switch (stmt->tag) {
4104 case Ist_IMark:
4105 break;
4106 case Ist_AbiHint:
4107 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts);
4108 useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts);
4109 break;
4110 case Ist_Put:
4111 useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts);
4112 break;
4113 case Ist_PutI:
4114 puti = stmt->Ist.PutI.details;
4115 useBeforeDef_Expr(bb,stmt,puti->ix,def_counts);
4116 useBeforeDef_Expr(bb,stmt,puti->data,def_counts);
4117 break;
4118 case Ist_WrTmp:
4119 useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts);
4120 break;
4121 case Ist_Store:
4122 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts);
4123 useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts);
4124 break;
4125 case Ist_StoreG:
4126 sg = stmt->Ist.StoreG.details;
4127 useBeforeDef_Expr(bb,stmt,sg->addr,def_counts);
4128 useBeforeDef_Expr(bb,stmt,sg->data,def_counts);
4129 useBeforeDef_Expr(bb,stmt,sg->guard,def_counts);
4130 break;
4131 case Ist_LoadG:
4132 lg = stmt->Ist.LoadG.details;
4133 useBeforeDef_Expr(bb,stmt,lg->addr,def_counts);
4134 useBeforeDef_Expr(bb,stmt,lg->alt,def_counts);
4135 useBeforeDef_Expr(bb,stmt,lg->guard,def_counts);
4136 break;
4137 case Ist_CAS:
4138 cas = stmt->Ist.CAS.details;
4139 useBeforeDef_Expr(bb,stmt,cas->addr,def_counts);
4140 if (cas->expdHi)
4141 useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts);
4142 useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts);
4143 if (cas->dataHi)
4144 useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts);
4145 useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts);
4146 break;
4147 case Ist_LLSC:
4148 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts);
4149 if (stmt->Ist.LLSC.storedata != NULL)
4150 useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts);
4151 break;
4152 case Ist_Dirty:
4153 d = stmt->Ist.Dirty.details;
4154 for (i = 0; d->args[i] != NULL; i++) {
4155 IRExpr* arg = d->args[i];
4156 if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4157 /* This is ensured by isFlatIRStmt */
4158 ;
4159 } else {
4160 useBeforeDef_Expr(bb,stmt,arg,def_counts);
4161 }
4162 }
4163 if (d->mFx != Ifx_None)
4164 useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts);
4165 break;
4166 case Ist_NoOp:
4167 case Ist_MBE:
4168 break;
4169 case Ist_Exit:
4170 useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts);
4171 break;
4172 default:
4173 vpanic("useBeforeDef_Stmt");
4174 }
4175 }
4176
4177 static
assignedOnce_Stmt(const IRSB * bb,const IRStmt * stmt,Int * def_counts,UInt n_def_counts)4178 void assignedOnce_Stmt(const IRSB *bb, const IRStmt *stmt,
4179 Int *def_counts, UInt n_def_counts)
4180 {
4181 switch (stmt->tag) {
4182 case Ist_WrTmp:
4183 assignedOnce_Temp(
4184 bb, stmt, stmt->Ist.WrTmp.tmp, def_counts, n_def_counts,
4185 "IRStmt.Tmp: destination tmp is out of range",
4186 "IRStmt.Tmp: destination tmp is assigned more than once");
4187 break;
4188 case Ist_LoadG:
4189 assignedOnce_Temp(
4190 bb, stmt, stmt->Ist.LoadG.details->dst, def_counts, n_def_counts,
4191 "IRStmt.LoadG: destination tmp is out of range",
4192 "IRStmt.LoadG: destination tmp is assigned more than once");
4193 break;
4194 case Ist_Dirty:
4195 if (stmt->Ist.Dirty.details->tmp != IRTemp_INVALID) {
4196 assignedOnce_Temp(
4197 bb, stmt, stmt->Ist.Dirty.details->tmp, def_counts, n_def_counts,
4198 "IRStmt.Dirty: destination tmp is out of range",
4199 "IRStmt.Dirty: destination tmp is assigned more than once");
4200 }
4201 break;
4202 case Ist_CAS:
4203 if (stmt->Ist.CAS.details->oldHi != IRTemp_INVALID) {
4204 assignedOnce_Temp(
4205 bb, stmt, stmt->Ist.CAS.details->oldHi, def_counts, n_def_counts,
4206 "IRStmt.CAS: destination tmpHi is out of range",
4207 "IRStmt.CAS: destination tmpHi is assigned more than once");
4208 }
4209 assignedOnce_Temp(
4210 bb, stmt, stmt->Ist.CAS.details->oldLo, def_counts, n_def_counts,
4211 "IRStmt.CAS: destination tmpLo is out of range",
4212 "IRStmt.CAS: destination tmpLo is assigned more than once");
4213 break;
4214 case Ist_LLSC:
4215 assignedOnce_Temp(
4216 bb, stmt, stmt->Ist.LLSC.result, def_counts, n_def_counts,
4217 "IRStmt.LLSC: destination tmp is out of range",
4218 "IRStmt.LLSC: destination tmp is assigned more than once");
4219 break;
4220 // Ignore all other cases
4221 case Ist_NoOp: case Ist_IMark: case Ist_AbiHint: case Ist_Put: case Ist_PutI:
4222 case Ist_Store: case Ist_StoreG: case Ist_MBE: case Ist_Exit:
4223 break;
4224 default:
4225 vassert(0);
4226 }
4227 }
4228
4229 static
tcExpr(const IRSB * bb,const IRStmt * stmt,const IRExpr * expr,IRType gWordTy)4230 void tcExpr ( const IRSB* bb, const IRStmt* stmt, const IRExpr* expr,
4231 IRType gWordTy )
4232 {
4233 Int i;
4234 IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
4235 const IRTypeEnv* tyenv = bb->tyenv;
4236 switch (expr->tag) {
4237 case Iex_Get:
4238 case Iex_RdTmp:
4239 break;
4240 case Iex_GetI:
4241 tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy );
4242 if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32)
4243 sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32");
4244 if (!saneIRRegArray(expr->Iex.GetI.descr))
4245 sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr");
4246 break;
4247 case Iex_Qop: {
4248 IRType ttarg1, ttarg2, ttarg3, ttarg4;
4249 const IRQop* qop = expr->Iex.Qop.details;
4250 tcExpr(bb,stmt, qop->arg1, gWordTy );
4251 tcExpr(bb,stmt, qop->arg2, gWordTy );
4252 tcExpr(bb,stmt, qop->arg3, gWordTy );
4253 tcExpr(bb,stmt, qop->arg4, gWordTy );
4254 typeOfPrimop(qop->op,
4255 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4256 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4257 || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) {
4258 vex_printf(" op name: " );
4259 ppIROp(qop->op);
4260 vex_printf("\n");
4261 sanityCheckFail(bb,stmt,
4262 "Iex.Qop: wrong arity op\n"
4263 "... name of op precedes BB printout\n");
4264 }
4265 ttarg1 = typeOfIRExpr(tyenv, qop->arg1);
4266 ttarg2 = typeOfIRExpr(tyenv, qop->arg2);
4267 ttarg3 = typeOfIRExpr(tyenv, qop->arg3);
4268 ttarg4 = typeOfIRExpr(tyenv, qop->arg4);
4269 if (t_arg1 != ttarg1 || t_arg2 != ttarg2
4270 || t_arg3 != ttarg3 || t_arg4 != ttarg4) {
4271 vex_printf(" op name: ");
4272 ppIROp(qop->op);
4273 vex_printf("\n");
4274 vex_printf(" op type is (");
4275 ppIRType(t_arg1);
4276 vex_printf(",");
4277 ppIRType(t_arg2);
4278 vex_printf(",");
4279 ppIRType(t_arg3);
4280 vex_printf(",");
4281 ppIRType(t_arg4);
4282 vex_printf(") -> ");
4283 ppIRType (t_dst);
4284 vex_printf("\narg tys are (");
4285 ppIRType(ttarg1);
4286 vex_printf(",");
4287 ppIRType(ttarg2);
4288 vex_printf(",");
4289 ppIRType(ttarg3);
4290 vex_printf(",");
4291 ppIRType(ttarg4);
4292 vex_printf(")\n");
4293 sanityCheckFail(bb,stmt,
4294 "Iex.Qop: arg tys don't match op tys\n"
4295 "... additional details precede BB printout\n");
4296 }
4297 break;
4298 }
4299 case Iex_Triop: {
4300 IRType ttarg1, ttarg2, ttarg3;
4301 const IRTriop *triop = expr->Iex.Triop.details;
4302 tcExpr(bb,stmt, triop->arg1, gWordTy );
4303 tcExpr(bb,stmt, triop->arg2, gWordTy );
4304 tcExpr(bb,stmt, triop->arg3, gWordTy );
4305 typeOfPrimop(triop->op,
4306 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4307 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4308 || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) {
4309 vex_printf(" op name: " );
4310 ppIROp(triop->op);
4311 vex_printf("\n");
4312 sanityCheckFail(bb,stmt,
4313 "Iex.Triop: wrong arity op\n"
4314 "... name of op precedes BB printout\n");
4315 }
4316 ttarg1 = typeOfIRExpr(tyenv, triop->arg1);
4317 ttarg2 = typeOfIRExpr(tyenv, triop->arg2);
4318 ttarg3 = typeOfIRExpr(tyenv, triop->arg3);
4319 if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) {
4320 vex_printf(" op name: ");
4321 ppIROp(triop->op);
4322 vex_printf("\n");
4323 vex_printf(" op type is (");
4324 ppIRType(t_arg1);
4325 vex_printf(",");
4326 ppIRType(t_arg2);
4327 vex_printf(",");
4328 ppIRType(t_arg3);
4329 vex_printf(") -> ");
4330 ppIRType (t_dst);
4331 vex_printf("\narg tys are (");
4332 ppIRType(ttarg1);
4333 vex_printf(",");
4334 ppIRType(ttarg2);
4335 vex_printf(",");
4336 ppIRType(ttarg3);
4337 vex_printf(")\n");
4338 sanityCheckFail(bb,stmt,
4339 "Iex.Triop: arg tys don't match op tys\n"
4340 "... additional details precede BB printout\n");
4341 }
4342 break;
4343 }
4344 case Iex_Binop: {
4345 IRType ttarg1, ttarg2;
4346 tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy );
4347 tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy );
4348 typeOfPrimop(expr->Iex.Binop.op,
4349 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4350 if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4351 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) {
4352 vex_printf(" op name: " );
4353 ppIROp(expr->Iex.Binop.op);
4354 vex_printf("\n");
4355 sanityCheckFail(bb,stmt,
4356 "Iex.Binop: wrong arity op\n"
4357 "... name of op precedes BB printout\n");
4358 }
4359 ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1);
4360 ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2);
4361 if (t_arg1 != ttarg1 || t_arg2 != ttarg2) {
4362 vex_printf(" op name: ");
4363 ppIROp(expr->Iex.Binop.op);
4364 vex_printf("\n");
4365 vex_printf(" op type is (");
4366 ppIRType(t_arg1);
4367 vex_printf(",");
4368 ppIRType(t_arg2);
4369 vex_printf(") -> ");
4370 ppIRType (t_dst);
4371 vex_printf("\narg tys are (");
4372 ppIRType(ttarg1);
4373 vex_printf(",");
4374 ppIRType(ttarg2);
4375 vex_printf(")\n");
4376 sanityCheckFail(bb,stmt,
4377 "Iex.Binop: arg tys don't match op tys\n"
4378 "... additional details precede BB printout\n");
4379 }
4380 break;
4381 }
4382 case Iex_Unop:
4383 tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy );
4384 typeOfPrimop(expr->Iex.Unop.op,
4385 &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4386 if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID
4387 || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID)
4388 sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op");
4389 if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg))
4390 sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty");
4391 break;
4392 case Iex_Load:
4393 tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy);
4394 if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy)
4395 sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type");
4396 if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE)
4397 sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness");
4398 break;
4399 case Iex_CCall:
4400 if (!saneIRCallee(expr->Iex.CCall.cee))
4401 sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee");
4402 if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args))
4403 sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args");
4404 for (i = 0; expr->Iex.CCall.args[i]; i++) {
4405 if (i >= 32)
4406 sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args");
4407 IRExpr* arg = expr->Iex.CCall.args[i];
4408 if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg)))
4409 sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/GSPTR");
4410 tcExpr(bb,stmt, arg, gWordTy);
4411 }
4412 if (expr->Iex.CCall.retty == Ity_I1)
4413 sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1");
4414 for (i = 0; expr->Iex.CCall.args[i]; i++)
4415 if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1)
4416 sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1");
4417 break;
4418 case Iex_Const:
4419 if (!saneIRConst(expr->Iex.Const.con))
4420 sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const");
4421 break;
4422 case Iex_ITE:
4423 tcExpr(bb,stmt, expr->Iex.ITE.cond, gWordTy);
4424 tcExpr(bb,stmt, expr->Iex.ITE.iftrue, gWordTy);
4425 tcExpr(bb,stmt, expr->Iex.ITE.iffalse, gWordTy);
4426 if (typeOfIRExpr(tyenv, expr->Iex.ITE.cond) != Ity_I1)
4427 sanityCheckFail(bb,stmt,"Iex.ITE.cond: cond :: Ity_I1");
4428 if (typeOfIRExpr(tyenv, expr->Iex.ITE.iftrue)
4429 != typeOfIRExpr(tyenv, expr->Iex.ITE.iffalse))
4430 sanityCheckFail(bb,stmt,"Iex.ITE: iftrue/iffalse mismatch");
4431 break;
4432 default:
4433 vpanic("tcExpr");
4434 }
4435 }
4436
4437
4438 static
tcStmt(const IRSB * bb,const IRStmt * stmt,IRType gWordTy)4439 void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy )
4440 {
4441 Int i;
4442 IRType tyExpd, tyData;
4443 const IRTypeEnv* tyenv = bb->tyenv;
4444 switch (stmt->tag) {
4445 case Ist_IMark:
4446 /* Somewhat heuristic, but rule out totally implausible
4447 instruction sizes and deltas. */
4448 if (stmt->Ist.IMark.len > 24)
4449 sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible");
4450 if (stmt->Ist.IMark.delta > 1)
4451 sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible");
4452 break;
4453 case Ist_AbiHint:
4454 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy)
4455 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: "
4456 "not :: guest word type");
4457 if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy)
4458 sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: "
4459 "not :: guest word type");
4460 break;
4461 case Ist_Put:
4462 tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy );
4463 if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1)
4464 sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1");
4465 break;
4466 case Ist_PutI:{
4467 const IRPutI* puti = stmt->Ist.PutI.details;
4468 tcExpr( bb, stmt, puti->data, gWordTy );
4469 tcExpr( bb, stmt, puti->ix, gWordTy );
4470 if (typeOfIRExpr(tyenv,puti->data) == Ity_I1)
4471 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1");
4472 if (typeOfIRExpr(tyenv,puti->data)
4473 != puti->descr->elemTy)
4474 sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty");
4475 if (typeOfIRExpr(tyenv,puti->ix) != Ity_I32)
4476 sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32");
4477 if (!saneIRRegArray(puti->descr))
4478 sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr");
4479 break;
4480 }
4481 case Ist_WrTmp:
4482 tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy );
4483 if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp)
4484 != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data))
4485 sanityCheckFail(bb,stmt,
4486 "IRStmt.Put.Tmp: tmp and expr do not match");
4487 break;
4488 case Ist_Store:
4489 tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy );
4490 tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy );
4491 if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy)
4492 sanityCheckFail(bb,stmt,
4493 "IRStmt.Store.addr: not :: guest word type");
4494 if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1)
4495 sanityCheckFail(bb,stmt,
4496 "IRStmt.Store.data: cannot Store :: Ity_I1");
4497 if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE)
4498 sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness");
4499 break;
4500 case Ist_StoreG: {
4501 const IRStoreG* sg = stmt->Ist.StoreG.details;
4502 tcExpr( bb, stmt, sg->addr, gWordTy );
4503 tcExpr( bb, stmt, sg->data, gWordTy );
4504 tcExpr( bb, stmt, sg->guard, gWordTy );
4505 if (typeOfIRExpr(tyenv, sg->addr) != gWordTy)
4506 sanityCheckFail(bb,stmt,"IRStmtG...addr: not :: guest word type");
4507 if (typeOfIRExpr(tyenv, sg->data) == Ity_I1)
4508 sanityCheckFail(bb,stmt,"IRStmtG...data: cannot Store :: Ity_I1");
4509 if (typeOfIRExpr(tyenv, sg->guard) != Ity_I1)
4510 sanityCheckFail(bb,stmt,"IRStmtG...guard: not :: Ity_I1");
4511 if (sg->end != Iend_LE && sg->end != Iend_BE)
4512 sanityCheckFail(bb,stmt,"IRStmtG...end: bogus endianness");
4513 break;
4514 }
4515 case Ist_LoadG: {
4516 const IRLoadG* lg = stmt->Ist.LoadG.details;
4517 tcExpr( bb, stmt, lg->addr, gWordTy );
4518 tcExpr( bb, stmt, lg->alt, gWordTy );
4519 tcExpr( bb, stmt, lg->guard, gWordTy );
4520 if (typeOfIRExpr(tyenv, lg->guard) != Ity_I1)
4521 sanityCheckFail(bb,stmt,"IRStmt.LoadG.guard: not :: Ity_I1");
4522 if (typeOfIRExpr(tyenv, lg->addr) != gWordTy)
4523 sanityCheckFail(bb,stmt,"IRStmt.LoadG.addr: not "
4524 ":: guest word type");
4525 if (typeOfIRExpr(tyenv, lg->alt) != typeOfIRTemp(tyenv, lg->dst))
4526 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/alt type mismatch");
4527 IRType cvtRes = Ity_INVALID, cvtArg = Ity_INVALID;
4528 typeOfIRLoadGOp(lg->cvt, &cvtRes, &cvtArg);
4529 if (cvtRes != typeOfIRTemp(tyenv, lg->dst))
4530 sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/loaded type mismatch");
4531 break;
4532 }
4533 case Ist_CAS: {
4534 const IRCAS* cas = stmt->Ist.CAS.details;
4535 /* make sure it's definitely either a CAS or a DCAS */
4536 if (cas->oldHi == IRTemp_INVALID
4537 && cas->expdHi == NULL && cas->dataHi == NULL) {
4538 /* fine; it's a single cas */
4539 }
4540 else
4541 if (cas->oldHi != IRTemp_INVALID
4542 && cas->expdHi != NULL && cas->dataHi != NULL) {
4543 /* fine; it's a double cas */
4544 }
4545 else {
4546 /* it's some el-mutanto hybrid */
4547 goto bad_cas;
4548 }
4549 /* check the address type */
4550 tcExpr( bb, stmt, cas->addr, gWordTy );
4551 if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas;
4552 /* check types on the {old,expd,data}Lo components agree */
4553 tyExpd = typeOfIRExpr(tyenv, cas->expdLo);
4554 tyData = typeOfIRExpr(tyenv, cas->dataLo);
4555 if (tyExpd != tyData) goto bad_cas;
4556 if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo))
4557 goto bad_cas;
4558 /* check the base element type is sane */
4559 if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32
4560 || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) {
4561 /* fine */
4562 } else {
4563 goto bad_cas;
4564 }
4565 /* If it's a DCAS, check types on the {old,expd,data}Hi
4566 components too */
4567 if (cas->oldHi != IRTemp_INVALID) {
4568 tyExpd = typeOfIRExpr(tyenv, cas->expdHi);
4569 tyData = typeOfIRExpr(tyenv, cas->dataHi);
4570 if (tyExpd != tyData) goto bad_cas;
4571 if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi))
4572 goto bad_cas;
4573 /* and finally check that oldLo and oldHi have the same
4574 type. This forces equivalence amongst all 6 types. */
4575 if (typeOfIRTemp(tyenv, cas->oldHi)
4576 != typeOfIRTemp(tyenv, cas->oldLo))
4577 goto bad_cas;
4578 }
4579 break;
4580 bad_cas:
4581 sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed");
4582 break;
4583 }
4584 case Ist_LLSC: {
4585 IRType tyRes;
4586 if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy)
4587 sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type");
4588 if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE)
4589 sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness");
4590 tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result);
4591 if (stmt->Ist.LLSC.storedata == NULL) {
4592 /* it's a LL */
4593 if (tyRes != Ity_I64 && tyRes != Ity_I32
4594 && tyRes != Ity_I16 && tyRes != Ity_I8)
4595 sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus");
4596 } else {
4597 /* it's a SC */
4598 if (tyRes != Ity_I1)
4599 sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1");
4600 tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata);
4601 if (tyData != Ity_I64 && tyData != Ity_I32
4602 && tyData != Ity_I16 && tyData != Ity_I8)
4603 sanityCheckFail(bb,stmt,
4604 "Ist.LLSC(SC).result :: storedata bogus");
4605 }
4606 break;
4607 }
4608 case Ist_Dirty: {
4609 /* Mostly check for various kinds of ill-formed dirty calls. */
4610 const IRDirty* d = stmt->Ist.Dirty.details;
4611 if (d->cee == NULL) goto bad_dirty;
4612 if (!saneIRCallee(d->cee)) goto bad_dirty;
4613 if (d->cee->regparms > countArgs(d->args)) goto bad_dirty;
4614 if (d->mFx == Ifx_None) {
4615 if (d->mAddr != NULL || d->mSize != 0)
4616 goto bad_dirty;
4617 } else {
4618 if (d->mAddr == NULL || d->mSize == 0)
4619 goto bad_dirty;
4620 }
4621 if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE)
4622 goto bad_dirty;
4623 for (i = 0; i < d->nFxState; i++) {
4624 if (d->fxState[i].fx == Ifx_None) goto bad_dirty;
4625 if (d->fxState[i].size <= 0) goto bad_dirty;
4626 if (d->fxState[i].nRepeats == 0) {
4627 if (d->fxState[i].repeatLen != 0) goto bad_dirty;
4628 } else {
4629 if (d->fxState[i].repeatLen <= d->fxState[i].size)
4630 goto bad_dirty;
4631 /* the % is safe because of the .size check above */
4632 if ((d->fxState[i].repeatLen % d->fxState[i].size) != 0)
4633 goto bad_dirty;
4634 }
4635 }
4636 /* check guard */
4637 if (d->guard == NULL) goto bad_dirty;
4638 tcExpr( bb, stmt, d->guard, gWordTy );
4639 if (typeOfIRExpr(tyenv, d->guard) != Ity_I1)
4640 sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1");
4641 /* check types, minimally */
4642 IRType retTy = Ity_INVALID;
4643 if (d->tmp != IRTemp_INVALID) {
4644 retTy = typeOfIRTemp(tyenv, d->tmp);
4645 if (retTy == Ity_I1)
4646 sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1");
4647 }
4648 UInt nVECRETs = 0, nGSPTRs = 0;
4649 for (i = 0; d->args[i] != NULL; i++) {
4650 if (i >= 32)
4651 sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args");
4652 const IRExpr* arg = d->args[i];
4653 if (UNLIKELY(arg->tag == Iex_VECRET)) {
4654 nVECRETs++;
4655 } else if (UNLIKELY(arg->tag == Iex_GSPTR)) {
4656 nGSPTRs++;
4657 } else {
4658 if (typeOfIRExpr(tyenv, arg) == Ity_I1)
4659 sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1");
4660 }
4661 if (nGSPTRs > 1) {
4662 sanityCheckFail(bb,stmt,"IRStmt.Dirty.args: > 1 GSPTR arg");
4663 }
4664 if (nVECRETs == 1) {
4665 /* Fn must return V128 or V256. */
4666 if (retTy != Ity_V128 && retTy != Ity_V256)
4667 sanityCheckFail(bb,stmt,
4668 "IRStmt.Dirty.args: VECRET present, "
4669 "but fn does not return V128 or V256");
4670 } else if (nVECRETs == 0) {
4671 /* Fn must not return V128 or V256 */
4672 if (retTy == Ity_V128 || retTy == Ity_V256)
4673 sanityCheckFail(bb,stmt,
4674 "IRStmt.Dirty.args: VECRET not present, "
4675 "but fn returns V128 or V256");
4676 } else {
4677 sanityCheckFail(bb,stmt,
4678 "IRStmt.Dirty.args: > 1 VECRET present");
4679 }
4680 }
4681 if (nGSPTRs > 1) {
4682 sanityCheckFail(bb,stmt,
4683 "IRStmt.Dirty.args: > 1 GSPTR present");
4684 }
4685 /* If you ask for the baseblock pointer, you have to make
4686 some declaration about access to the guest state too. */
4687 if (d->nFxState == 0 && nGSPTRs != 0) {
4688 sanityCheckFail(bb,stmt,
4689 "IRStmt.Dirty.args: GSPTR requested, "
4690 "but no fxState declared");
4691 }
4692 break;
4693 bad_dirty:
4694 sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed");
4695 break;
4696 }
4697 case Ist_NoOp:
4698 break;
4699 case Ist_MBE:
4700 switch (stmt->Ist.MBE.event) {
4701 case Imbe_Fence: case Imbe_CancelReservation:
4702 break;
4703 default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown");
4704 break;
4705 }
4706 break;
4707 case Ist_Exit:
4708 tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy );
4709 if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1)
4710 sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1");
4711 if (!saneIRConst(stmt->Ist.Exit.dst))
4712 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst");
4713 if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy)
4714 sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type");
4715 /* because it would intersect with host_EvC_* */
4716 if (stmt->Ist.Exit.offsIP < 16)
4717 sanityCheckFail(bb,stmt,"IRStmt.Exit.offsIP: too low");
4718 break;
4719 default:
4720 vpanic("tcStmt");
4721 }
4722 }
4723
sanityCheckIRSB(const IRSB * bb,const HChar * caller,Bool require_flat,IRType guest_word_size)4724 void sanityCheckIRSB ( const IRSB* bb, const HChar* caller,
4725 Bool require_flat, IRType guest_word_size )
4726 {
4727 Int i;
4728 Int n_temps = bb->tyenv->types_used;
4729 Int* def_counts = LibVEX_Alloc_inline(n_temps * sizeof(Int));
4730
4731 if (0)
4732 vex_printf("sanityCheck: %s\n", caller);
4733
4734 vassert(guest_word_size == Ity_I32
4735 || guest_word_size == Ity_I64);
4736
4737 if (bb->stmts_used < 0 || bb->stmts_size < 8
4738 || bb->stmts_used > bb->stmts_size)
4739 /* this BB is so strange we can't even print it */
4740 vpanic("sanityCheckIRSB: stmts array limits wierd");
4741
4742 /* Ensure each temp has a plausible type. */
4743 for (i = 0; i < n_temps; i++) {
4744 IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i);
4745 if (!isPlausibleIRType(ty)) {
4746 vex_printf("Temp t%d declared with implausible type 0x%x\n",
4747 i, (UInt)ty);
4748 sanityCheckFail(bb,NULL,"Temp declared with implausible type");
4749 }
4750 }
4751
4752 const IRStmt* stmt;
4753
4754 /* Check for flatness, if required. */
4755 if (require_flat) {
4756 for (i = 0; i < bb->stmts_used; i++) {
4757 stmt = bb->stmts[i];
4758 if (!stmt)
4759 sanityCheckFail(bb, stmt, "IRStmt: is NULL");
4760 if (!isFlatIRStmt(stmt))
4761 sanityCheckFail(bb, stmt, "IRStmt: is not flat");
4762 }
4763 if (!isIRAtom(bb->next))
4764 sanityCheckFail(bb, NULL, "bb->next is not an atom");
4765 }
4766
4767 /* Count the defs of each temp. Only one def is allowed.
4768 Also, check that each used temp has already been defd. */
4769
4770 for (i = 0; i < n_temps; i++)
4771 def_counts[i] = 0;
4772
4773 for (i = 0; i < bb->stmts_used; i++) {
4774 stmt = bb->stmts[i];
4775 /* Check any temps used by this statement. */
4776 useBeforeDef_Stmt(bb,stmt,def_counts);
4777
4778 /* Now make note of any temps defd by this statement. */
4779 assignedOnce_Stmt(bb, stmt, def_counts, n_temps);
4780 }
4781
4782 /* Typecheck everything. */
4783 for (i = 0; i < bb->stmts_used; i++)
4784 tcStmt(bb, bb->stmts[i], guest_word_size);
4785 if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size)
4786 sanityCheckFail(bb, NULL, "bb->next field has wrong type");
4787 /* because it would intersect with host_EvC_* */
4788 if (bb->offsIP < 16)
4789 sanityCheckFail(bb, NULL, "bb->offsIP: too low");
4790 }
4791
4792 /*---------------------------------------------------------------*/
4793 /*--- Misc helper functions ---*/
4794 /*---------------------------------------------------------------*/
4795
eqIRConst(const IRConst * c1,const IRConst * c2)4796 Bool eqIRConst ( const IRConst* c1, const IRConst* c2 )
4797 {
4798 if (c1->tag != c2->tag)
4799 return False;
4800
4801 switch (c1->tag) {
4802 case Ico_U1: return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) );
4803 case Ico_U8: return toBool( c1->Ico.U8 == c2->Ico.U8 );
4804 case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 );
4805 case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 );
4806 case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 );
4807 case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 );
4808 case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i );
4809 case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 );
4810 case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i );
4811 case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 );
4812 case Ico_V256: return toBool( c1->Ico.V256 == c2->Ico.V256 );
4813 default: vpanic("eqIRConst");
4814 }
4815 }
4816
eqIRRegArray(const IRRegArray * descr1,const IRRegArray * descr2)4817 Bool eqIRRegArray ( const IRRegArray* descr1, const IRRegArray* descr2 )
4818 {
4819 return toBool( descr1->base == descr2->base
4820 && descr1->elemTy == descr2->elemTy
4821 && descr1->nElems == descr2->nElems );
4822 }
4823
sizeofIRType(IRType ty)4824 Int sizeofIRType ( IRType ty )
4825 {
4826 switch (ty) {
4827 case Ity_I8: return 1;
4828 case Ity_I16: return 2;
4829 case Ity_I32: return 4;
4830 case Ity_I64: return 8;
4831 case Ity_I128: return 16;
4832 case Ity_F16: return 2;
4833 case Ity_F32: return 4;
4834 case Ity_F64: return 8;
4835 case Ity_F128: return 16;
4836 case Ity_D32: return 4;
4837 case Ity_D64: return 8;
4838 case Ity_D128: return 16;
4839 case Ity_V128: return 16;
4840 case Ity_V256: return 32;
4841 default: vex_printf("\n"); ppIRType(ty); vex_printf("\n");
4842 vpanic("sizeofIRType");
4843 }
4844 }
4845
integerIRTypeOfSize(Int szB)4846 IRType integerIRTypeOfSize ( Int szB )
4847 {
4848 switch (szB) {
4849 case 8: return Ity_I64;
4850 case 4: return Ity_I32;
4851 case 2: return Ity_I16;
4852 case 1: return Ity_I8;
4853 default: vpanic("integerIRTypeOfSize");
4854 }
4855 }
4856
mkIRExpr_HWord(HWord hw)4857 IRExpr* mkIRExpr_HWord ( HWord hw )
4858 {
4859 vassert(sizeof(void*) == sizeof(HWord));
4860 if (sizeof(RegWord) == 4)
4861 return IRExpr_Const(IRConst_U32((UInt)hw));
4862 if (sizeof(RegWord) == 8)
4863 return IRExpr_Const(IRConst_U64((ULong)hw));
4864 vpanic("mkIRExpr_HWord");
4865 }
4866
unsafeIRDirty_0_N(Int regparms,const HChar * name,void * addr,IRExpr ** args)4867 IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr,
4868 IRExpr** args )
4869 {
4870 IRDirty* d = emptyIRDirty();
4871 d->cee = mkIRCallee ( regparms, name, addr );
4872 d->guard = IRExpr_Const(IRConst_U1(True));
4873 d->args = args;
4874 return d;
4875 }
4876
unsafeIRDirty_1_N(IRTemp dst,Int regparms,const HChar * name,void * addr,IRExpr ** args)4877 IRDirty* unsafeIRDirty_1_N ( IRTemp dst,
4878 Int regparms, const HChar* name, void* addr,
4879 IRExpr** args )
4880 {
4881 IRDirty* d = emptyIRDirty();
4882 d->cee = mkIRCallee ( regparms, name, addr );
4883 d->guard = IRExpr_Const(IRConst_U1(True));
4884 d->args = args;
4885 d->tmp = dst;
4886 return d;
4887 }
4888
mkIRExprCCall(IRType retty,Int regparms,const HChar * name,void * addr,IRExpr ** args)4889 IRExpr* mkIRExprCCall ( IRType retty,
4890 Int regparms, const HChar* name, void* addr,
4891 IRExpr** args )
4892 {
4893 return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ),
4894 retty, args );
4895 }
4896
eqIRAtom(const IRExpr * a1,const IRExpr * a2)4897 Bool eqIRAtom ( const IRExpr* a1, const IRExpr* a2 )
4898 {
4899 vassert(isIRAtom(a1));
4900 vassert(isIRAtom(a2));
4901 if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp)
4902 return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp);
4903 if (a1->tag == Iex_Const && a2->tag == Iex_Const)
4904 return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con);
4905 return False;
4906 }
4907
4908 /*---------------------------------------------------------------*/
4909 /*--- end ir_defs.c ---*/
4910 /*---------------------------------------------------------------*/
4911