1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9 %s 3; RUN: llc -global-isel -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s 4 5define amdgpu_ps <4 x float> @getresinfo_1d(<8 x i32> inreg %rsrc, i16 %mip) { 6; GFX9-LABEL: getresinfo_1d: 7; GFX9: ; %bb.0: ; %main_body 8; GFX9-NEXT: s_mov_b32 s0, s2 9; GFX9-NEXT: s_mov_b32 s1, s3 10; GFX9-NEXT: s_mov_b32 s2, s4 11; GFX9-NEXT: s_mov_b32 s3, s5 12; GFX9-NEXT: s_mov_b32 s4, s6 13; GFX9-NEXT: s_mov_b32 s5, s7 14; GFX9-NEXT: s_mov_b32 s6, s8 15; GFX9-NEXT: s_mov_b32 s7, s9 16; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 17; GFX9-NEXT: s_waitcnt vmcnt(0) 18; GFX9-NEXT: ; return to shader part epilog 19; 20; GFX10-LABEL: getresinfo_1d: 21; GFX10: ; %bb.0: ; %main_body 22; GFX10-NEXT: s_mov_b32 s0, s2 23; GFX10-NEXT: s_mov_b32 s1, s3 24; GFX10-NEXT: s_mov_b32 s2, s4 25; GFX10-NEXT: s_mov_b32 s3, s5 26; GFX10-NEXT: s_mov_b32 s4, s6 27; GFX10-NEXT: s_mov_b32 s5, s7 28; GFX10-NEXT: s_mov_b32 s6, s8 29; GFX10-NEXT: s_mov_b32 s7, s9 30; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D unorm a16 31; GFX10-NEXT: s_waitcnt vmcnt(0) 32; GFX10-NEXT: ; return to shader part epilog 33main_body: 34 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 35 ret <4 x float> %v 36} 37 38define amdgpu_ps <4 x float> @getresinfo_2d(<8 x i32> inreg %rsrc, i16 %mip) { 39; GFX9-LABEL: getresinfo_2d: 40; GFX9: ; %bb.0: ; %main_body 41; GFX9-NEXT: s_mov_b32 s0, s2 42; GFX9-NEXT: s_mov_b32 s1, s3 43; GFX9-NEXT: s_mov_b32 s2, s4 44; GFX9-NEXT: s_mov_b32 s3, s5 45; GFX9-NEXT: s_mov_b32 s4, s6 46; GFX9-NEXT: s_mov_b32 s5, s7 47; GFX9-NEXT: s_mov_b32 s6, s8 48; GFX9-NEXT: s_mov_b32 s7, s9 49; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 50; GFX9-NEXT: s_waitcnt vmcnt(0) 51; GFX9-NEXT: ; return to shader part epilog 52; 53; GFX10-LABEL: getresinfo_2d: 54; GFX10: ; %bb.0: ; %main_body 55; GFX10-NEXT: s_mov_b32 s0, s2 56; GFX10-NEXT: s_mov_b32 s1, s3 57; GFX10-NEXT: s_mov_b32 s2, s4 58; GFX10-NEXT: s_mov_b32 s3, s5 59; GFX10-NEXT: s_mov_b32 s4, s6 60; GFX10-NEXT: s_mov_b32 s5, s7 61; GFX10-NEXT: s_mov_b32 s6, s8 62; GFX10-NEXT: s_mov_b32 s7, s9 63; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D unorm a16 64; GFX10-NEXT: s_waitcnt vmcnt(0) 65; GFX10-NEXT: ; return to shader part epilog 66main_body: 67 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 68 ret <4 x float> %v 69} 70 71define amdgpu_ps <4 x float> @getresinfo_3d(<8 x i32> inreg %rsrc, i16 %mip) { 72; GFX9-LABEL: getresinfo_3d: 73; GFX9: ; %bb.0: ; %main_body 74; GFX9-NEXT: s_mov_b32 s0, s2 75; GFX9-NEXT: s_mov_b32 s1, s3 76; GFX9-NEXT: s_mov_b32 s2, s4 77; GFX9-NEXT: s_mov_b32 s3, s5 78; GFX9-NEXT: s_mov_b32 s4, s6 79; GFX9-NEXT: s_mov_b32 s5, s7 80; GFX9-NEXT: s_mov_b32 s6, s8 81; GFX9-NEXT: s_mov_b32 s7, s9 82; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 83; GFX9-NEXT: s_waitcnt vmcnt(0) 84; GFX9-NEXT: ; return to shader part epilog 85; 86; GFX10-LABEL: getresinfo_3d: 87; GFX10: ; %bb.0: ; %main_body 88; GFX10-NEXT: s_mov_b32 s0, s2 89; GFX10-NEXT: s_mov_b32 s1, s3 90; GFX10-NEXT: s_mov_b32 s2, s4 91; GFX10-NEXT: s_mov_b32 s3, s5 92; GFX10-NEXT: s_mov_b32 s4, s6 93; GFX10-NEXT: s_mov_b32 s5, s7 94; GFX10-NEXT: s_mov_b32 s6, s8 95; GFX10-NEXT: s_mov_b32 s7, s9 96; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_3D unorm a16 97; GFX10-NEXT: s_waitcnt vmcnt(0) 98; GFX10-NEXT: ; return to shader part epilog 99main_body: 100 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 101 ret <4 x float> %v 102} 103 104define amdgpu_ps <4 x float> @getresinfo_cube(<8 x i32> inreg %rsrc, i16 %mip) { 105; GFX9-LABEL: getresinfo_cube: 106; GFX9: ; %bb.0: ; %main_body 107; GFX9-NEXT: s_mov_b32 s0, s2 108; GFX9-NEXT: s_mov_b32 s1, s3 109; GFX9-NEXT: s_mov_b32 s2, s4 110; GFX9-NEXT: s_mov_b32 s3, s5 111; GFX9-NEXT: s_mov_b32 s4, s6 112; GFX9-NEXT: s_mov_b32 s5, s7 113; GFX9-NEXT: s_mov_b32 s6, s8 114; GFX9-NEXT: s_mov_b32 s7, s9 115; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 116; GFX9-NEXT: s_waitcnt vmcnt(0) 117; GFX9-NEXT: ; return to shader part epilog 118; 119; GFX10-LABEL: getresinfo_cube: 120; GFX10: ; %bb.0: ; %main_body 121; GFX10-NEXT: s_mov_b32 s0, s2 122; GFX10-NEXT: s_mov_b32 s1, s3 123; GFX10-NEXT: s_mov_b32 s2, s4 124; GFX10-NEXT: s_mov_b32 s3, s5 125; GFX10-NEXT: s_mov_b32 s4, s6 126; GFX10-NEXT: s_mov_b32 s5, s7 127; GFX10-NEXT: s_mov_b32 s6, s8 128; GFX10-NEXT: s_mov_b32 s7, s9 129; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_CUBE unorm a16 130; GFX10-NEXT: s_waitcnt vmcnt(0) 131; GFX10-NEXT: ; return to shader part epilog 132main_body: 133 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 134 ret <4 x float> %v 135} 136 137define amdgpu_ps <4 x float> @getresinfo_1darray(<8 x i32> inreg %rsrc, i16 %mip) { 138; GFX9-LABEL: getresinfo_1darray: 139; GFX9: ; %bb.0: ; %main_body 140; GFX9-NEXT: s_mov_b32 s0, s2 141; GFX9-NEXT: s_mov_b32 s1, s3 142; GFX9-NEXT: s_mov_b32 s2, s4 143; GFX9-NEXT: s_mov_b32 s3, s5 144; GFX9-NEXT: s_mov_b32 s4, s6 145; GFX9-NEXT: s_mov_b32 s5, s7 146; GFX9-NEXT: s_mov_b32 s6, s8 147; GFX9-NEXT: s_mov_b32 s7, s9 148; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 149; GFX9-NEXT: s_waitcnt vmcnt(0) 150; GFX9-NEXT: ; return to shader part epilog 151; 152; GFX10-LABEL: getresinfo_1darray: 153; GFX10: ; %bb.0: ; %main_body 154; GFX10-NEXT: s_mov_b32 s0, s2 155; GFX10-NEXT: s_mov_b32 s1, s3 156; GFX10-NEXT: s_mov_b32 s2, s4 157; GFX10-NEXT: s_mov_b32 s3, s5 158; GFX10-NEXT: s_mov_b32 s4, s6 159; GFX10-NEXT: s_mov_b32 s5, s7 160; GFX10-NEXT: s_mov_b32 s6, s8 161; GFX10-NEXT: s_mov_b32 s7, s9 162; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_1D_ARRAY unorm a16 163; GFX10-NEXT: s_waitcnt vmcnt(0) 164; GFX10-NEXT: ; return to shader part epilog 165main_body: 166 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 167 ret <4 x float> %v 168} 169 170define amdgpu_ps <4 x float> @getresinfo_2darray(<8 x i32> inreg %rsrc, i16 %mip) { 171; GFX9-LABEL: getresinfo_2darray: 172; GFX9: ; %bb.0: ; %main_body 173; GFX9-NEXT: s_mov_b32 s0, s2 174; GFX9-NEXT: s_mov_b32 s1, s3 175; GFX9-NEXT: s_mov_b32 s2, s4 176; GFX9-NEXT: s_mov_b32 s3, s5 177; GFX9-NEXT: s_mov_b32 s4, s6 178; GFX9-NEXT: s_mov_b32 s5, s7 179; GFX9-NEXT: s_mov_b32 s6, s8 180; GFX9-NEXT: s_mov_b32 s7, s9 181; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 182; GFX9-NEXT: s_waitcnt vmcnt(0) 183; GFX9-NEXT: ; return to shader part epilog 184; 185; GFX10-LABEL: getresinfo_2darray: 186; GFX10: ; %bb.0: ; %main_body 187; GFX10-NEXT: s_mov_b32 s0, s2 188; GFX10-NEXT: s_mov_b32 s1, s3 189; GFX10-NEXT: s_mov_b32 s2, s4 190; GFX10-NEXT: s_mov_b32 s3, s5 191; GFX10-NEXT: s_mov_b32 s4, s6 192; GFX10-NEXT: s_mov_b32 s5, s7 193; GFX10-NEXT: s_mov_b32 s6, s8 194; GFX10-NEXT: s_mov_b32 s7, s9 195; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_ARRAY unorm a16 196; GFX10-NEXT: s_waitcnt vmcnt(0) 197; GFX10-NEXT: ; return to shader part epilog 198main_body: 199 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 200 ret <4 x float> %v 201} 202 203define amdgpu_ps <4 x float> @getresinfo_2dmsaa(<8 x i32> inreg %rsrc, i16 %mip) { 204; GFX9-LABEL: getresinfo_2dmsaa: 205; GFX9: ; %bb.0: ; %main_body 206; GFX9-NEXT: s_mov_b32 s0, s2 207; GFX9-NEXT: s_mov_b32 s1, s3 208; GFX9-NEXT: s_mov_b32 s2, s4 209; GFX9-NEXT: s_mov_b32 s3, s5 210; GFX9-NEXT: s_mov_b32 s4, s6 211; GFX9-NEXT: s_mov_b32 s5, s7 212; GFX9-NEXT: s_mov_b32 s6, s8 213; GFX9-NEXT: s_mov_b32 s7, s9 214; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 215; GFX9-NEXT: s_waitcnt vmcnt(0) 216; GFX9-NEXT: ; return to shader part epilog 217; 218; GFX10-LABEL: getresinfo_2dmsaa: 219; GFX10: ; %bb.0: ; %main_body 220; GFX10-NEXT: s_mov_b32 s0, s2 221; GFX10-NEXT: s_mov_b32 s1, s3 222; GFX10-NEXT: s_mov_b32 s2, s4 223; GFX10-NEXT: s_mov_b32 s3, s5 224; GFX10-NEXT: s_mov_b32 s4, s6 225; GFX10-NEXT: s_mov_b32 s5, s7 226; GFX10-NEXT: s_mov_b32 s6, s8 227; GFX10-NEXT: s_mov_b32 s7, s9 228; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA unorm a16 229; GFX10-NEXT: s_waitcnt vmcnt(0) 230; GFX10-NEXT: ; return to shader part epilog 231main_body: 232 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 233 ret <4 x float> %v 234} 235 236define amdgpu_ps <4 x float> @getresinfo_2darraymsaa(<8 x i32> inreg %rsrc, i16 %mip) { 237; GFX9-LABEL: getresinfo_2darraymsaa: 238; GFX9: ; %bb.0: ; %main_body 239; GFX9-NEXT: s_mov_b32 s0, s2 240; GFX9-NEXT: s_mov_b32 s1, s3 241; GFX9-NEXT: s_mov_b32 s2, s4 242; GFX9-NEXT: s_mov_b32 s3, s5 243; GFX9-NEXT: s_mov_b32 s4, s6 244; GFX9-NEXT: s_mov_b32 s5, s7 245; GFX9-NEXT: s_mov_b32 s6, s8 246; GFX9-NEXT: s_mov_b32 s7, s9 247; GFX9-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf unorm a16 da 248; GFX9-NEXT: s_waitcnt vmcnt(0) 249; GFX9-NEXT: ; return to shader part epilog 250; 251; GFX10-LABEL: getresinfo_2darraymsaa: 252; GFX10: ; %bb.0: ; %main_body 253; GFX10-NEXT: s_mov_b32 s0, s2 254; GFX10-NEXT: s_mov_b32 s1, s3 255; GFX10-NEXT: s_mov_b32 s2, s4 256; GFX10-NEXT: s_mov_b32 s3, s5 257; GFX10-NEXT: s_mov_b32 s4, s6 258; GFX10-NEXT: s_mov_b32 s5, s7 259; GFX10-NEXT: s_mov_b32 s6, s8 260; GFX10-NEXT: s_mov_b32 s7, s9 261; GFX10-NEXT: image_get_resinfo v[0:3], v0, s[0:7] dmask:0xf dim:SQ_RSRC_IMG_2D_MSAA_ARRAY unorm a16 262; GFX10-NEXT: s_waitcnt vmcnt(0) 263; GFX10-NEXT: ; return to shader part epilog 264main_body: 265 %v = call <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 15, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 266 ret <4 x float> %v 267} 268 269define amdgpu_ps <4 x float> @getresinfo_dmask0(<8 x i32> inreg %rsrc, <4 x float> %vdata, i16 %mip) { 270; GFX9-LABEL: getresinfo_dmask0: 271; GFX9: ; %bb.0: ; %main_body 272; GFX9-NEXT: ; return to shader part epilog 273; 274; GFX10-LABEL: getresinfo_dmask0: 275; GFX10: ; %bb.0: ; %main_body 276; GFX10-NEXT: ; return to shader part epilog 277main_body: 278 %r = call <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 0, i16 %mip, <8 x i32> %rsrc, i32 0, i32 0) 279 ret <4 x float> %r 280} 281 282declare <4 x float> @llvm.amdgcn.image.getresinfo.1d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 283declare <4 x float> @llvm.amdgcn.image.getresinfo.2d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 284declare <4 x float> @llvm.amdgcn.image.getresinfo.3d.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 285declare <4 x float> @llvm.amdgcn.image.getresinfo.cube.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 286declare <4 x float> @llvm.amdgcn.image.getresinfo.1darray.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 287declare <4 x float> @llvm.amdgcn.image.getresinfo.2darray.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 288declare <4 x float> @llvm.amdgcn.image.getresinfo.2dmsaa.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 289declare <4 x float> @llvm.amdgcn.image.getresinfo.2darraymsaa.v4f32.i16(i32 immarg, i16, <8 x i32>, i32 immarg, i32 immarg) #1 290 291attributes #0 = { nounwind } 292attributes #1 = { nounwind readnone } 293