1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s -check-prefix=PPC64LE 3 4define i8 @test0(i8* %ptr) { 5; PPC64LE-LABEL: test0: 6; PPC64LE: # %bb.0: 7; PPC64LE-NEXT: lbz 3, 0(3) 8; PPC64LE-NEXT: blr 9 %val = load atomic i8, i8* %ptr unordered, align 1 10 ret i8 %val 11} 12 13define i8 @test1(i8* %ptr) { 14; PPC64LE-LABEL: test1: 15; PPC64LE: # %bb.0: 16; PPC64LE-NEXT: lbz 3, 0(3) 17; PPC64LE-NEXT: blr 18 %val = load atomic i8, i8* %ptr monotonic, align 1 19 ret i8 %val 20} 21 22define i8 @test2(i8* %ptr) { 23; PPC64LE-LABEL: test2: 24; PPC64LE: # %bb.0: 25; PPC64LE-NEXT: lbz 3, 0(3) 26; PPC64LE-NEXT: cmpd 7, 3, 3 27; PPC64LE-NEXT: bne- 7, .+4 28; PPC64LE-NEXT: isync 29; PPC64LE-NEXT: blr 30 %val = load atomic i8, i8* %ptr acquire, align 1 31 ret i8 %val 32} 33 34define i8 @test3(i8* %ptr) { 35; PPC64LE-LABEL: test3: 36; PPC64LE: # %bb.0: 37; PPC64LE-NEXT: sync 38; PPC64LE-NEXT: lbz 3, 0(3) 39; PPC64LE-NEXT: cmpd 7, 3, 3 40; PPC64LE-NEXT: bne- 7, .+4 41; PPC64LE-NEXT: isync 42; PPC64LE-NEXT: blr 43 %val = load atomic i8, i8* %ptr seq_cst, align 1 44 ret i8 %val 45} 46 47define i16 @test4(i16* %ptr) { 48; PPC64LE-LABEL: test4: 49; PPC64LE: # %bb.0: 50; PPC64LE-NEXT: lhz 3, 0(3) 51; PPC64LE-NEXT: blr 52 %val = load atomic i16, i16* %ptr unordered, align 2 53 ret i16 %val 54} 55 56define i16 @test5(i16* %ptr) { 57; PPC64LE-LABEL: test5: 58; PPC64LE: # %bb.0: 59; PPC64LE-NEXT: lhz 3, 0(3) 60; PPC64LE-NEXT: blr 61 %val = load atomic i16, i16* %ptr monotonic, align 2 62 ret i16 %val 63} 64 65define i16 @test6(i16* %ptr) { 66; PPC64LE-LABEL: test6: 67; PPC64LE: # %bb.0: 68; PPC64LE-NEXT: lhz 3, 0(3) 69; PPC64LE-NEXT: cmpd 7, 3, 3 70; PPC64LE-NEXT: bne- 7, .+4 71; PPC64LE-NEXT: isync 72; PPC64LE-NEXT: blr 73 %val = load atomic i16, i16* %ptr acquire, align 2 74 ret i16 %val 75} 76 77define i16 @test7(i16* %ptr) { 78; PPC64LE-LABEL: test7: 79; PPC64LE: # %bb.0: 80; PPC64LE-NEXT: sync 81; PPC64LE-NEXT: lhz 3, 0(3) 82; PPC64LE-NEXT: cmpd 7, 3, 3 83; PPC64LE-NEXT: bne- 7, .+4 84; PPC64LE-NEXT: isync 85; PPC64LE-NEXT: blr 86 %val = load atomic i16, i16* %ptr seq_cst, align 2 87 ret i16 %val 88} 89 90define i32 @test8(i32* %ptr) { 91; PPC64LE-LABEL: test8: 92; PPC64LE: # %bb.0: 93; PPC64LE-NEXT: lwz 3, 0(3) 94; PPC64LE-NEXT: blr 95 %val = load atomic i32, i32* %ptr unordered, align 4 96 ret i32 %val 97} 98 99define i32 @test9(i32* %ptr) { 100; PPC64LE-LABEL: test9: 101; PPC64LE: # %bb.0: 102; PPC64LE-NEXT: lwz 3, 0(3) 103; PPC64LE-NEXT: blr 104 %val = load atomic i32, i32* %ptr monotonic, align 4 105 ret i32 %val 106} 107 108define i32 @test10(i32* %ptr) { 109; PPC64LE-LABEL: test10: 110; PPC64LE: # %bb.0: 111; PPC64LE-NEXT: lwz 3, 0(3) 112; PPC64LE-NEXT: cmpd 7, 3, 3 113; PPC64LE-NEXT: bne- 7, .+4 114; PPC64LE-NEXT: isync 115; PPC64LE-NEXT: blr 116 %val = load atomic i32, i32* %ptr acquire, align 4 117 ret i32 %val 118} 119 120define i32 @test11(i32* %ptr) { 121; PPC64LE-LABEL: test11: 122; PPC64LE: # %bb.0: 123; PPC64LE-NEXT: sync 124; PPC64LE-NEXT: lwz 3, 0(3) 125; PPC64LE-NEXT: cmpd 7, 3, 3 126; PPC64LE-NEXT: bne- 7, .+4 127; PPC64LE-NEXT: isync 128; PPC64LE-NEXT: blr 129 %val = load atomic i32, i32* %ptr seq_cst, align 4 130 ret i32 %val 131} 132 133define i64 @test12(i64* %ptr) { 134; PPC64LE-LABEL: test12: 135; PPC64LE: # %bb.0: 136; PPC64LE-NEXT: ld 3, 0(3) 137; PPC64LE-NEXT: blr 138 %val = load atomic i64, i64* %ptr unordered, align 8 139 ret i64 %val 140} 141 142define i64 @test13(i64* %ptr) { 143; PPC64LE-LABEL: test13: 144; PPC64LE: # %bb.0: 145; PPC64LE-NEXT: ld 3, 0(3) 146; PPC64LE-NEXT: blr 147 %val = load atomic i64, i64* %ptr monotonic, align 8 148 ret i64 %val 149} 150 151define i64 @test14(i64* %ptr) { 152; PPC64LE-LABEL: test14: 153; PPC64LE: # %bb.0: 154; PPC64LE-NEXT: ld 3, 0(3) 155; PPC64LE-NEXT: cmpd 7, 3, 3 156; PPC64LE-NEXT: bne- 7, .+4 157; PPC64LE-NEXT: isync 158; PPC64LE-NEXT: blr 159 %val = load atomic i64, i64* %ptr acquire, align 8 160 ret i64 %val 161} 162 163define i64 @test15(i64* %ptr) { 164; PPC64LE-LABEL: test15: 165; PPC64LE: # %bb.0: 166; PPC64LE-NEXT: sync 167; PPC64LE-NEXT: ld 3, 0(3) 168; PPC64LE-NEXT: cmpd 7, 3, 3 169; PPC64LE-NEXT: bne- 7, .+4 170; PPC64LE-NEXT: isync 171; PPC64LE-NEXT: blr 172 %val = load atomic i64, i64* %ptr seq_cst, align 8 173 ret i64 %val 174} 175 176define void @test16(i8* %ptr, i8 %val) { 177; PPC64LE-LABEL: test16: 178; PPC64LE: # %bb.0: 179; PPC64LE-NEXT: stb 4, 0(3) 180; PPC64LE-NEXT: blr 181 store atomic i8 %val, i8* %ptr unordered, align 1 182 ret void 183} 184 185define void @test17(i8* %ptr, i8 %val) { 186; PPC64LE-LABEL: test17: 187; PPC64LE: # %bb.0: 188; PPC64LE-NEXT: stb 4, 0(3) 189; PPC64LE-NEXT: blr 190 store atomic i8 %val, i8* %ptr monotonic, align 1 191 ret void 192} 193 194define void @test18(i8* %ptr, i8 %val) { 195; PPC64LE-LABEL: test18: 196; PPC64LE: # %bb.0: 197; PPC64LE-NEXT: lwsync 198; PPC64LE-NEXT: stb 4, 0(3) 199; PPC64LE-NEXT: blr 200 store atomic i8 %val, i8* %ptr release, align 1 201 ret void 202} 203 204define void @test19(i8* %ptr, i8 %val) { 205; PPC64LE-LABEL: test19: 206; PPC64LE: # %bb.0: 207; PPC64LE-NEXT: sync 208; PPC64LE-NEXT: stb 4, 0(3) 209; PPC64LE-NEXT: blr 210 store atomic i8 %val, i8* %ptr seq_cst, align 1 211 ret void 212} 213 214define void @test20(i16* %ptr, i16 %val) { 215; PPC64LE-LABEL: test20: 216; PPC64LE: # %bb.0: 217; PPC64LE-NEXT: sth 4, 0(3) 218; PPC64LE-NEXT: blr 219 store atomic i16 %val, i16* %ptr unordered, align 2 220 ret void 221} 222 223define void @test21(i16* %ptr, i16 %val) { 224; PPC64LE-LABEL: test21: 225; PPC64LE: # %bb.0: 226; PPC64LE-NEXT: sth 4, 0(3) 227; PPC64LE-NEXT: blr 228 store atomic i16 %val, i16* %ptr monotonic, align 2 229 ret void 230} 231 232define void @test22(i16* %ptr, i16 %val) { 233; PPC64LE-LABEL: test22: 234; PPC64LE: # %bb.0: 235; PPC64LE-NEXT: lwsync 236; PPC64LE-NEXT: sth 4, 0(3) 237; PPC64LE-NEXT: blr 238 store atomic i16 %val, i16* %ptr release, align 2 239 ret void 240} 241 242define void @test23(i16* %ptr, i16 %val) { 243; PPC64LE-LABEL: test23: 244; PPC64LE: # %bb.0: 245; PPC64LE-NEXT: sync 246; PPC64LE-NEXT: sth 4, 0(3) 247; PPC64LE-NEXT: blr 248 store atomic i16 %val, i16* %ptr seq_cst, align 2 249 ret void 250} 251 252define void @test24(i32* %ptr, i32 %val) { 253; PPC64LE-LABEL: test24: 254; PPC64LE: # %bb.0: 255; PPC64LE-NEXT: stw 4, 0(3) 256; PPC64LE-NEXT: blr 257 store atomic i32 %val, i32* %ptr unordered, align 4 258 ret void 259} 260 261define void @test25(i32* %ptr, i32 %val) { 262; PPC64LE-LABEL: test25: 263; PPC64LE: # %bb.0: 264; PPC64LE-NEXT: stw 4, 0(3) 265; PPC64LE-NEXT: blr 266 store atomic i32 %val, i32* %ptr monotonic, align 4 267 ret void 268} 269 270define void @test26(i32* %ptr, i32 %val) { 271; PPC64LE-LABEL: test26: 272; PPC64LE: # %bb.0: 273; PPC64LE-NEXT: lwsync 274; PPC64LE-NEXT: stw 4, 0(3) 275; PPC64LE-NEXT: blr 276 store atomic i32 %val, i32* %ptr release, align 4 277 ret void 278} 279 280define void @test27(i32* %ptr, i32 %val) { 281; PPC64LE-LABEL: test27: 282; PPC64LE: # %bb.0: 283; PPC64LE-NEXT: sync 284; PPC64LE-NEXT: stw 4, 0(3) 285; PPC64LE-NEXT: blr 286 store atomic i32 %val, i32* %ptr seq_cst, align 4 287 ret void 288} 289 290define void @test28(i64* %ptr, i64 %val) { 291; PPC64LE-LABEL: test28: 292; PPC64LE: # %bb.0: 293; PPC64LE-NEXT: std 4, 0(3) 294; PPC64LE-NEXT: blr 295 store atomic i64 %val, i64* %ptr unordered, align 8 296 ret void 297} 298 299define void @test29(i64* %ptr, i64 %val) { 300; PPC64LE-LABEL: test29: 301; PPC64LE: # %bb.0: 302; PPC64LE-NEXT: std 4, 0(3) 303; PPC64LE-NEXT: blr 304 store atomic i64 %val, i64* %ptr monotonic, align 8 305 ret void 306} 307 308define void @test30(i64* %ptr, i64 %val) { 309; PPC64LE-LABEL: test30: 310; PPC64LE: # %bb.0: 311; PPC64LE-NEXT: lwsync 312; PPC64LE-NEXT: std 4, 0(3) 313; PPC64LE-NEXT: blr 314 store atomic i64 %val, i64* %ptr release, align 8 315 ret void 316} 317 318define void @test31(i64* %ptr, i64 %val) { 319; PPC64LE-LABEL: test31: 320; PPC64LE: # %bb.0: 321; PPC64LE-NEXT: sync 322; PPC64LE-NEXT: std 4, 0(3) 323; PPC64LE-NEXT: blr 324 store atomic i64 %val, i64* %ptr seq_cst, align 8 325 ret void 326} 327 328define void @test32() { 329; PPC64LE-LABEL: test32: 330; PPC64LE: # %bb.0: 331; PPC64LE-NEXT: lwsync 332; PPC64LE-NEXT: blr 333 fence acquire 334 ret void 335} 336 337define void @test33() { 338; PPC64LE-LABEL: test33: 339; PPC64LE: # %bb.0: 340; PPC64LE-NEXT: lwsync 341; PPC64LE-NEXT: blr 342 fence release 343 ret void 344} 345 346define void @test34() { 347; PPC64LE-LABEL: test34: 348; PPC64LE: # %bb.0: 349; PPC64LE-NEXT: lwsync 350; PPC64LE-NEXT: blr 351 fence acq_rel 352 ret void 353} 354 355define void @test35() { 356; PPC64LE-LABEL: test35: 357; PPC64LE: # %bb.0: 358; PPC64LE-NEXT: sync 359; PPC64LE-NEXT: blr 360 fence seq_cst 361 ret void 362} 363 364define void @test36() { 365; PPC64LE-LABEL: test36: 366; PPC64LE: # %bb.0: 367; PPC64LE-NEXT: lwsync 368; PPC64LE-NEXT: blr 369 fence syncscope("singlethread") acquire 370 ret void 371} 372 373define void @test37() { 374; PPC64LE-LABEL: test37: 375; PPC64LE: # %bb.0: 376; PPC64LE-NEXT: lwsync 377; PPC64LE-NEXT: blr 378 fence syncscope("singlethread") release 379 ret void 380} 381 382define void @test38() { 383; PPC64LE-LABEL: test38: 384; PPC64LE: # %bb.0: 385; PPC64LE-NEXT: lwsync 386; PPC64LE-NEXT: blr 387 fence syncscope("singlethread") acq_rel 388 ret void 389} 390 391define void @test39() { 392; PPC64LE-LABEL: test39: 393; PPC64LE: # %bb.0: 394; PPC64LE-NEXT: sync 395; PPC64LE-NEXT: blr 396 fence syncscope("singlethread") seq_cst 397 ret void 398} 399 400define void @test40(i8* %ptr, i8 %cmp, i8 %val) { 401; PPC64LE-LABEL: test40: 402; PPC64LE: # %bb.0: 403; PPC64LE-NEXT: clrlwi 4, 4, 24 404; PPC64LE-NEXT: .LBB40_1: 405; PPC64LE-NEXT: lbarx 6, 0, 3 406; PPC64LE-NEXT: cmpw 4, 6 407; PPC64LE-NEXT: bne 0, .LBB40_3 408; PPC64LE-NEXT: # %bb.2: 409; PPC64LE-NEXT: stbcx. 5, 0, 3 410; PPC64LE-NEXT: beqlr 0 411; PPC64LE-NEXT: b .LBB40_1 412; PPC64LE-NEXT: .LBB40_3: 413; PPC64LE-NEXT: stbcx. 6, 0, 3 414; PPC64LE-NEXT: blr 415 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val monotonic monotonic 416 ret void 417} 418 419define void @test41(i8* %ptr, i8 %cmp, i8 %val) { 420; PPC64LE-LABEL: test41: 421; PPC64LE: # %bb.0: 422; PPC64LE-NEXT: clrlwi 4, 4, 24 423; PPC64LE-NEXT: .LBB41_1: 424; PPC64LE-NEXT: lbarx 6, 0, 3 425; PPC64LE-NEXT: cmpw 4, 6 426; PPC64LE-NEXT: bne 0, .LBB41_4 427; PPC64LE-NEXT: # %bb.2: 428; PPC64LE-NEXT: stbcx. 5, 0, 3 429; PPC64LE-NEXT: bne 0, .LBB41_1 430; PPC64LE-NEXT: # %bb.3: 431; PPC64LE-NEXT: lwsync 432; PPC64LE-NEXT: blr 433; PPC64LE-NEXT: .LBB41_4: 434; PPC64LE-NEXT: stbcx. 6, 0, 3 435; PPC64LE-NEXT: lwsync 436; PPC64LE-NEXT: blr 437 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire monotonic 438 ret void 439} 440 441define void @test42(i8* %ptr, i8 %cmp, i8 %val) { 442; PPC64LE-LABEL: test42: 443; PPC64LE: # %bb.0: 444; PPC64LE-NEXT: clrlwi 4, 4, 24 445; PPC64LE-NEXT: .LBB42_1: 446; PPC64LE-NEXT: lbarx 6, 0, 3 447; PPC64LE-NEXT: cmpw 4, 6 448; PPC64LE-NEXT: bne 0, .LBB42_4 449; PPC64LE-NEXT: # %bb.2: 450; PPC64LE-NEXT: stbcx. 5, 0, 3 451; PPC64LE-NEXT: bne 0, .LBB42_1 452; PPC64LE-NEXT: # %bb.3: 453; PPC64LE-NEXT: lwsync 454; PPC64LE-NEXT: blr 455; PPC64LE-NEXT: .LBB42_4: 456; PPC64LE-NEXT: stbcx. 6, 0, 3 457; PPC64LE-NEXT: lwsync 458; PPC64LE-NEXT: blr 459 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acquire acquire 460 ret void 461} 462 463define void @test43(i8* %ptr, i8 %cmp, i8 %val) { 464; PPC64LE-LABEL: test43: 465; PPC64LE: # %bb.0: 466; PPC64LE-NEXT: clrlwi 4, 4, 24 467; PPC64LE-NEXT: lwsync 468; PPC64LE-NEXT: .LBB43_1: 469; PPC64LE-NEXT: lbarx 6, 0, 3 470; PPC64LE-NEXT: cmpw 4, 6 471; PPC64LE-NEXT: bne 0, .LBB43_3 472; PPC64LE-NEXT: # %bb.2: 473; PPC64LE-NEXT: stbcx. 5, 0, 3 474; PPC64LE-NEXT: beqlr 0 475; PPC64LE-NEXT: b .LBB43_1 476; PPC64LE-NEXT: .LBB43_3: 477; PPC64LE-NEXT: stbcx. 6, 0, 3 478; PPC64LE-NEXT: blr 479 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release monotonic 480 ret void 481} 482 483define void @test44(i8* %ptr, i8 %cmp, i8 %val) { 484; PPC64LE-LABEL: test44: 485; PPC64LE: # %bb.0: 486; PPC64LE-NEXT: clrlwi 4, 4, 24 487; PPC64LE-NEXT: lwsync 488; PPC64LE-NEXT: .LBB44_1: 489; PPC64LE-NEXT: lbarx 6, 0, 3 490; PPC64LE-NEXT: cmpw 4, 6 491; PPC64LE-NEXT: bne 0, .LBB44_3 492; PPC64LE-NEXT: # %bb.2: 493; PPC64LE-NEXT: stbcx. 5, 0, 3 494; PPC64LE-NEXT: beqlr 0 495; PPC64LE-NEXT: b .LBB44_1 496; PPC64LE-NEXT: .LBB44_3: 497; PPC64LE-NEXT: stbcx. 6, 0, 3 498; PPC64LE-NEXT: blr 499 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val release acquire 500 ret void 501} 502 503define void @test45(i8* %ptr, i8 %cmp, i8 %val) { 504; PPC64LE-LABEL: test45: 505; PPC64LE: # %bb.0: 506; PPC64LE-NEXT: clrlwi 4, 4, 24 507; PPC64LE-NEXT: lwsync 508; PPC64LE-NEXT: .LBB45_1: 509; PPC64LE-NEXT: lbarx 6, 0, 3 510; PPC64LE-NEXT: cmpw 4, 6 511; PPC64LE-NEXT: bne 0, .LBB45_4 512; PPC64LE-NEXT: # %bb.2: 513; PPC64LE-NEXT: stbcx. 5, 0, 3 514; PPC64LE-NEXT: bne 0, .LBB45_1 515; PPC64LE-NEXT: # %bb.3: 516; PPC64LE-NEXT: lwsync 517; PPC64LE-NEXT: blr 518; PPC64LE-NEXT: .LBB45_4: 519; PPC64LE-NEXT: stbcx. 6, 0, 3 520; PPC64LE-NEXT: lwsync 521; PPC64LE-NEXT: blr 522 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel monotonic 523 ret void 524} 525 526define void @test46(i8* %ptr, i8 %cmp, i8 %val) { 527; PPC64LE-LABEL: test46: 528; PPC64LE: # %bb.0: 529; PPC64LE-NEXT: clrlwi 4, 4, 24 530; PPC64LE-NEXT: lwsync 531; PPC64LE-NEXT: .LBB46_1: 532; PPC64LE-NEXT: lbarx 6, 0, 3 533; PPC64LE-NEXT: cmpw 4, 6 534; PPC64LE-NEXT: bne 0, .LBB46_4 535; PPC64LE-NEXT: # %bb.2: 536; PPC64LE-NEXT: stbcx. 5, 0, 3 537; PPC64LE-NEXT: bne 0, .LBB46_1 538; PPC64LE-NEXT: # %bb.3: 539; PPC64LE-NEXT: lwsync 540; PPC64LE-NEXT: blr 541; PPC64LE-NEXT: .LBB46_4: 542; PPC64LE-NEXT: stbcx. 6, 0, 3 543; PPC64LE-NEXT: lwsync 544; PPC64LE-NEXT: blr 545 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val acq_rel acquire 546 ret void 547} 548 549define void @test47(i8* %ptr, i8 %cmp, i8 %val) { 550; PPC64LE-LABEL: test47: 551; PPC64LE: # %bb.0: 552; PPC64LE-NEXT: clrlwi 4, 4, 24 553; PPC64LE-NEXT: sync 554; PPC64LE-NEXT: .LBB47_1: 555; PPC64LE-NEXT: lbarx 6, 0, 3 556; PPC64LE-NEXT: cmpw 4, 6 557; PPC64LE-NEXT: bne 0, .LBB47_4 558; PPC64LE-NEXT: # %bb.2: 559; PPC64LE-NEXT: stbcx. 5, 0, 3 560; PPC64LE-NEXT: bne 0, .LBB47_1 561; PPC64LE-NEXT: # %bb.3: 562; PPC64LE-NEXT: lwsync 563; PPC64LE-NEXT: blr 564; PPC64LE-NEXT: .LBB47_4: 565; PPC64LE-NEXT: stbcx. 6, 0, 3 566; PPC64LE-NEXT: lwsync 567; PPC64LE-NEXT: blr 568 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst monotonic 569 ret void 570} 571 572define void @test48(i8* %ptr, i8 %cmp, i8 %val) { 573; PPC64LE-LABEL: test48: 574; PPC64LE: # %bb.0: 575; PPC64LE-NEXT: clrlwi 4, 4, 24 576; PPC64LE-NEXT: sync 577; PPC64LE-NEXT: .LBB48_1: 578; PPC64LE-NEXT: lbarx 6, 0, 3 579; PPC64LE-NEXT: cmpw 4, 6 580; PPC64LE-NEXT: bne 0, .LBB48_4 581; PPC64LE-NEXT: # %bb.2: 582; PPC64LE-NEXT: stbcx. 5, 0, 3 583; PPC64LE-NEXT: bne 0, .LBB48_1 584; PPC64LE-NEXT: # %bb.3: 585; PPC64LE-NEXT: lwsync 586; PPC64LE-NEXT: blr 587; PPC64LE-NEXT: .LBB48_4: 588; PPC64LE-NEXT: stbcx. 6, 0, 3 589; PPC64LE-NEXT: lwsync 590; PPC64LE-NEXT: blr 591 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst acquire 592 ret void 593} 594 595define void @test49(i8* %ptr, i8 %cmp, i8 %val) { 596; PPC64LE-LABEL: test49: 597; PPC64LE: # %bb.0: 598; PPC64LE-NEXT: clrlwi 4, 4, 24 599; PPC64LE-NEXT: sync 600; PPC64LE-NEXT: .LBB49_1: 601; PPC64LE-NEXT: lbarx 6, 0, 3 602; PPC64LE-NEXT: cmpw 4, 6 603; PPC64LE-NEXT: bne 0, .LBB49_4 604; PPC64LE-NEXT: # %bb.2: 605; PPC64LE-NEXT: stbcx. 5, 0, 3 606; PPC64LE-NEXT: bne 0, .LBB49_1 607; PPC64LE-NEXT: # %bb.3: 608; PPC64LE-NEXT: lwsync 609; PPC64LE-NEXT: blr 610; PPC64LE-NEXT: .LBB49_4: 611; PPC64LE-NEXT: stbcx. 6, 0, 3 612; PPC64LE-NEXT: lwsync 613; PPC64LE-NEXT: blr 614 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val seq_cst seq_cst 615 ret void 616} 617 618define void @test50(i16* %ptr, i16 %cmp, i16 %val) { 619; PPC64LE-LABEL: test50: 620; PPC64LE: # %bb.0: 621; PPC64LE-NEXT: clrlwi 4, 4, 16 622; PPC64LE-NEXT: .LBB50_1: 623; PPC64LE-NEXT: lharx 6, 0, 3 624; PPC64LE-NEXT: cmpw 4, 6 625; PPC64LE-NEXT: bne 0, .LBB50_3 626; PPC64LE-NEXT: # %bb.2: 627; PPC64LE-NEXT: sthcx. 5, 0, 3 628; PPC64LE-NEXT: beqlr 0 629; PPC64LE-NEXT: b .LBB50_1 630; PPC64LE-NEXT: .LBB50_3: 631; PPC64LE-NEXT: sthcx. 6, 0, 3 632; PPC64LE-NEXT: blr 633 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val monotonic monotonic 634 ret void 635} 636 637define void @test51(i16* %ptr, i16 %cmp, i16 %val) { 638; PPC64LE-LABEL: test51: 639; PPC64LE: # %bb.0: 640; PPC64LE-NEXT: clrlwi 4, 4, 16 641; PPC64LE-NEXT: .LBB51_1: 642; PPC64LE-NEXT: lharx 6, 0, 3 643; PPC64LE-NEXT: cmpw 4, 6 644; PPC64LE-NEXT: bne 0, .LBB51_4 645; PPC64LE-NEXT: # %bb.2: 646; PPC64LE-NEXT: sthcx. 5, 0, 3 647; PPC64LE-NEXT: bne 0, .LBB51_1 648; PPC64LE-NEXT: # %bb.3: 649; PPC64LE-NEXT: lwsync 650; PPC64LE-NEXT: blr 651; PPC64LE-NEXT: .LBB51_4: 652; PPC64LE-NEXT: sthcx. 6, 0, 3 653; PPC64LE-NEXT: lwsync 654; PPC64LE-NEXT: blr 655 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire monotonic 656 ret void 657} 658 659define void @test52(i16* %ptr, i16 %cmp, i16 %val) { 660; PPC64LE-LABEL: test52: 661; PPC64LE: # %bb.0: 662; PPC64LE-NEXT: clrlwi 4, 4, 16 663; PPC64LE-NEXT: .LBB52_1: 664; PPC64LE-NEXT: lharx 6, 0, 3 665; PPC64LE-NEXT: cmpw 4, 6 666; PPC64LE-NEXT: bne 0, .LBB52_4 667; PPC64LE-NEXT: # %bb.2: 668; PPC64LE-NEXT: sthcx. 5, 0, 3 669; PPC64LE-NEXT: bne 0, .LBB52_1 670; PPC64LE-NEXT: # %bb.3: 671; PPC64LE-NEXT: lwsync 672; PPC64LE-NEXT: blr 673; PPC64LE-NEXT: .LBB52_4: 674; PPC64LE-NEXT: sthcx. 6, 0, 3 675; PPC64LE-NEXT: lwsync 676; PPC64LE-NEXT: blr 677 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acquire acquire 678 ret void 679} 680 681define void @test53(i16* %ptr, i16 %cmp, i16 %val) { 682; PPC64LE-LABEL: test53: 683; PPC64LE: # %bb.0: 684; PPC64LE-NEXT: clrlwi 4, 4, 16 685; PPC64LE-NEXT: lwsync 686; PPC64LE-NEXT: .LBB53_1: 687; PPC64LE-NEXT: lharx 6, 0, 3 688; PPC64LE-NEXT: cmpw 4, 6 689; PPC64LE-NEXT: bne 0, .LBB53_3 690; PPC64LE-NEXT: # %bb.2: 691; PPC64LE-NEXT: sthcx. 5, 0, 3 692; PPC64LE-NEXT: beqlr 0 693; PPC64LE-NEXT: b .LBB53_1 694; PPC64LE-NEXT: .LBB53_3: 695; PPC64LE-NEXT: sthcx. 6, 0, 3 696; PPC64LE-NEXT: blr 697 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release monotonic 698 ret void 699} 700 701define void @test54(i16* %ptr, i16 %cmp, i16 %val) { 702; PPC64LE-LABEL: test54: 703; PPC64LE: # %bb.0: 704; PPC64LE-NEXT: clrlwi 4, 4, 16 705; PPC64LE-NEXT: lwsync 706; PPC64LE-NEXT: .LBB54_1: 707; PPC64LE-NEXT: lharx 6, 0, 3 708; PPC64LE-NEXT: cmpw 4, 6 709; PPC64LE-NEXT: bne 0, .LBB54_3 710; PPC64LE-NEXT: # %bb.2: 711; PPC64LE-NEXT: sthcx. 5, 0, 3 712; PPC64LE-NEXT: beqlr 0 713; PPC64LE-NEXT: b .LBB54_1 714; PPC64LE-NEXT: .LBB54_3: 715; PPC64LE-NEXT: sthcx. 6, 0, 3 716; PPC64LE-NEXT: blr 717 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val release acquire 718 ret void 719} 720 721define void @test55(i16* %ptr, i16 %cmp, i16 %val) { 722; PPC64LE-LABEL: test55: 723; PPC64LE: # %bb.0: 724; PPC64LE-NEXT: clrlwi 4, 4, 16 725; PPC64LE-NEXT: lwsync 726; PPC64LE-NEXT: .LBB55_1: 727; PPC64LE-NEXT: lharx 6, 0, 3 728; PPC64LE-NEXT: cmpw 4, 6 729; PPC64LE-NEXT: bne 0, .LBB55_4 730; PPC64LE-NEXT: # %bb.2: 731; PPC64LE-NEXT: sthcx. 5, 0, 3 732; PPC64LE-NEXT: bne 0, .LBB55_1 733; PPC64LE-NEXT: # %bb.3: 734; PPC64LE-NEXT: lwsync 735; PPC64LE-NEXT: blr 736; PPC64LE-NEXT: .LBB55_4: 737; PPC64LE-NEXT: sthcx. 6, 0, 3 738; PPC64LE-NEXT: lwsync 739; PPC64LE-NEXT: blr 740 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel monotonic 741 ret void 742} 743 744define void @test56(i16* %ptr, i16 %cmp, i16 %val) { 745; PPC64LE-LABEL: test56: 746; PPC64LE: # %bb.0: 747; PPC64LE-NEXT: clrlwi 4, 4, 16 748; PPC64LE-NEXT: lwsync 749; PPC64LE-NEXT: .LBB56_1: 750; PPC64LE-NEXT: lharx 6, 0, 3 751; PPC64LE-NEXT: cmpw 4, 6 752; PPC64LE-NEXT: bne 0, .LBB56_4 753; PPC64LE-NEXT: # %bb.2: 754; PPC64LE-NEXT: sthcx. 5, 0, 3 755; PPC64LE-NEXT: bne 0, .LBB56_1 756; PPC64LE-NEXT: # %bb.3: 757; PPC64LE-NEXT: lwsync 758; PPC64LE-NEXT: blr 759; PPC64LE-NEXT: .LBB56_4: 760; PPC64LE-NEXT: sthcx. 6, 0, 3 761; PPC64LE-NEXT: lwsync 762; PPC64LE-NEXT: blr 763 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val acq_rel acquire 764 ret void 765} 766 767define void @test57(i16* %ptr, i16 %cmp, i16 %val) { 768; PPC64LE-LABEL: test57: 769; PPC64LE: # %bb.0: 770; PPC64LE-NEXT: clrlwi 4, 4, 16 771; PPC64LE-NEXT: sync 772; PPC64LE-NEXT: .LBB57_1: 773; PPC64LE-NEXT: lharx 6, 0, 3 774; PPC64LE-NEXT: cmpw 4, 6 775; PPC64LE-NEXT: bne 0, .LBB57_4 776; PPC64LE-NEXT: # %bb.2: 777; PPC64LE-NEXT: sthcx. 5, 0, 3 778; PPC64LE-NEXT: bne 0, .LBB57_1 779; PPC64LE-NEXT: # %bb.3: 780; PPC64LE-NEXT: lwsync 781; PPC64LE-NEXT: blr 782; PPC64LE-NEXT: .LBB57_4: 783; PPC64LE-NEXT: sthcx. 6, 0, 3 784; PPC64LE-NEXT: lwsync 785; PPC64LE-NEXT: blr 786 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst monotonic 787 ret void 788} 789 790define void @test58(i16* %ptr, i16 %cmp, i16 %val) { 791; PPC64LE-LABEL: test58: 792; PPC64LE: # %bb.0: 793; PPC64LE-NEXT: clrlwi 4, 4, 16 794; PPC64LE-NEXT: sync 795; PPC64LE-NEXT: .LBB58_1: 796; PPC64LE-NEXT: lharx 6, 0, 3 797; PPC64LE-NEXT: cmpw 4, 6 798; PPC64LE-NEXT: bne 0, .LBB58_4 799; PPC64LE-NEXT: # %bb.2: 800; PPC64LE-NEXT: sthcx. 5, 0, 3 801; PPC64LE-NEXT: bne 0, .LBB58_1 802; PPC64LE-NEXT: # %bb.3: 803; PPC64LE-NEXT: lwsync 804; PPC64LE-NEXT: blr 805; PPC64LE-NEXT: .LBB58_4: 806; PPC64LE-NEXT: sthcx. 6, 0, 3 807; PPC64LE-NEXT: lwsync 808; PPC64LE-NEXT: blr 809 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst acquire 810 ret void 811} 812 813define void @test59(i16* %ptr, i16 %cmp, i16 %val) { 814; PPC64LE-LABEL: test59: 815; PPC64LE: # %bb.0: 816; PPC64LE-NEXT: clrlwi 4, 4, 16 817; PPC64LE-NEXT: sync 818; PPC64LE-NEXT: .LBB59_1: 819; PPC64LE-NEXT: lharx 6, 0, 3 820; PPC64LE-NEXT: cmpw 4, 6 821; PPC64LE-NEXT: bne 0, .LBB59_4 822; PPC64LE-NEXT: # %bb.2: 823; PPC64LE-NEXT: sthcx. 5, 0, 3 824; PPC64LE-NEXT: bne 0, .LBB59_1 825; PPC64LE-NEXT: # %bb.3: 826; PPC64LE-NEXT: lwsync 827; PPC64LE-NEXT: blr 828; PPC64LE-NEXT: .LBB59_4: 829; PPC64LE-NEXT: sthcx. 6, 0, 3 830; PPC64LE-NEXT: lwsync 831; PPC64LE-NEXT: blr 832 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val seq_cst seq_cst 833 ret void 834} 835 836define void @test60(i32* %ptr, i32 %cmp, i32 %val) { 837; PPC64LE-LABEL: test60: 838; PPC64LE: # %bb.0: 839; PPC64LE-NEXT: .LBB60_1: 840; PPC64LE-NEXT: lwarx 6, 0, 3 841; PPC64LE-NEXT: cmpw 4, 6 842; PPC64LE-NEXT: bne 0, .LBB60_3 843; PPC64LE-NEXT: # %bb.2: 844; PPC64LE-NEXT: stwcx. 5, 0, 3 845; PPC64LE-NEXT: beqlr 0 846; PPC64LE-NEXT: b .LBB60_1 847; PPC64LE-NEXT: .LBB60_3: 848; PPC64LE-NEXT: stwcx. 6, 0, 3 849; PPC64LE-NEXT: blr 850 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val monotonic monotonic 851 ret void 852} 853 854define void @test61(i32* %ptr, i32 %cmp, i32 %val) { 855; PPC64LE-LABEL: test61: 856; PPC64LE: # %bb.0: 857; PPC64LE-NEXT: .LBB61_1: 858; PPC64LE-NEXT: lwarx 6, 0, 3 859; PPC64LE-NEXT: cmpw 4, 6 860; PPC64LE-NEXT: bne 0, .LBB61_4 861; PPC64LE-NEXT: # %bb.2: 862; PPC64LE-NEXT: stwcx. 5, 0, 3 863; PPC64LE-NEXT: bne 0, .LBB61_1 864; PPC64LE-NEXT: # %bb.3: 865; PPC64LE-NEXT: lwsync 866; PPC64LE-NEXT: blr 867; PPC64LE-NEXT: .LBB61_4: 868; PPC64LE-NEXT: stwcx. 6, 0, 3 869; PPC64LE-NEXT: lwsync 870; PPC64LE-NEXT: blr 871 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire monotonic 872 ret void 873} 874 875define void @test62(i32* %ptr, i32 %cmp, i32 %val) { 876; PPC64LE-LABEL: test62: 877; PPC64LE: # %bb.0: 878; PPC64LE-NEXT: .LBB62_1: 879; PPC64LE-NEXT: lwarx 6, 0, 3 880; PPC64LE-NEXT: cmpw 4, 6 881; PPC64LE-NEXT: bne 0, .LBB62_4 882; PPC64LE-NEXT: # %bb.2: 883; PPC64LE-NEXT: stwcx. 5, 0, 3 884; PPC64LE-NEXT: bne 0, .LBB62_1 885; PPC64LE-NEXT: # %bb.3: 886; PPC64LE-NEXT: lwsync 887; PPC64LE-NEXT: blr 888; PPC64LE-NEXT: .LBB62_4: 889; PPC64LE-NEXT: stwcx. 6, 0, 3 890; PPC64LE-NEXT: lwsync 891; PPC64LE-NEXT: blr 892 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acquire acquire 893 ret void 894} 895 896define void @test63(i32* %ptr, i32 %cmp, i32 %val) { 897; PPC64LE-LABEL: test63: 898; PPC64LE: # %bb.0: 899; PPC64LE-NEXT: lwsync 900; PPC64LE-NEXT: .LBB63_1: 901; PPC64LE-NEXT: lwarx 6, 0, 3 902; PPC64LE-NEXT: cmpw 4, 6 903; PPC64LE-NEXT: bne 0, .LBB63_3 904; PPC64LE-NEXT: # %bb.2: 905; PPC64LE-NEXT: stwcx. 5, 0, 3 906; PPC64LE-NEXT: beqlr 0 907; PPC64LE-NEXT: b .LBB63_1 908; PPC64LE-NEXT: .LBB63_3: 909; PPC64LE-NEXT: stwcx. 6, 0, 3 910; PPC64LE-NEXT: blr 911 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release monotonic 912 ret void 913} 914 915define void @test64(i32* %ptr, i32 %cmp, i32 %val) { 916; PPC64LE-LABEL: test64: 917; PPC64LE: # %bb.0: 918; PPC64LE-NEXT: lwsync 919; PPC64LE-NEXT: .LBB64_1: 920; PPC64LE-NEXT: lwarx 6, 0, 3 921; PPC64LE-NEXT: cmpw 4, 6 922; PPC64LE-NEXT: bne 0, .LBB64_3 923; PPC64LE-NEXT: # %bb.2: 924; PPC64LE-NEXT: stwcx. 5, 0, 3 925; PPC64LE-NEXT: beqlr 0 926; PPC64LE-NEXT: b .LBB64_1 927; PPC64LE-NEXT: .LBB64_3: 928; PPC64LE-NEXT: stwcx. 6, 0, 3 929; PPC64LE-NEXT: blr 930 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val release acquire 931 ret void 932} 933 934define void @test65(i32* %ptr, i32 %cmp, i32 %val) { 935; PPC64LE-LABEL: test65: 936; PPC64LE: # %bb.0: 937; PPC64LE-NEXT: lwsync 938; PPC64LE-NEXT: .LBB65_1: 939; PPC64LE-NEXT: lwarx 6, 0, 3 940; PPC64LE-NEXT: cmpw 4, 6 941; PPC64LE-NEXT: bne 0, .LBB65_4 942; PPC64LE-NEXT: # %bb.2: 943; PPC64LE-NEXT: stwcx. 5, 0, 3 944; PPC64LE-NEXT: bne 0, .LBB65_1 945; PPC64LE-NEXT: # %bb.3: 946; PPC64LE-NEXT: lwsync 947; PPC64LE-NEXT: blr 948; PPC64LE-NEXT: .LBB65_4: 949; PPC64LE-NEXT: stwcx. 6, 0, 3 950; PPC64LE-NEXT: lwsync 951; PPC64LE-NEXT: blr 952 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel monotonic 953 ret void 954} 955 956define void @test66(i32* %ptr, i32 %cmp, i32 %val) { 957; PPC64LE-LABEL: test66: 958; PPC64LE: # %bb.0: 959; PPC64LE-NEXT: lwsync 960; PPC64LE-NEXT: .LBB66_1: 961; PPC64LE-NEXT: lwarx 6, 0, 3 962; PPC64LE-NEXT: cmpw 4, 6 963; PPC64LE-NEXT: bne 0, .LBB66_4 964; PPC64LE-NEXT: # %bb.2: 965; PPC64LE-NEXT: stwcx. 5, 0, 3 966; PPC64LE-NEXT: bne 0, .LBB66_1 967; PPC64LE-NEXT: # %bb.3: 968; PPC64LE-NEXT: lwsync 969; PPC64LE-NEXT: blr 970; PPC64LE-NEXT: .LBB66_4: 971; PPC64LE-NEXT: stwcx. 6, 0, 3 972; PPC64LE-NEXT: lwsync 973; PPC64LE-NEXT: blr 974 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val acq_rel acquire 975 ret void 976} 977 978define void @test67(i32* %ptr, i32 %cmp, i32 %val) { 979; PPC64LE-LABEL: test67: 980; PPC64LE: # %bb.0: 981; PPC64LE-NEXT: sync 982; PPC64LE-NEXT: .LBB67_1: 983; PPC64LE-NEXT: lwarx 6, 0, 3 984; PPC64LE-NEXT: cmpw 4, 6 985; PPC64LE-NEXT: bne 0, .LBB67_4 986; PPC64LE-NEXT: # %bb.2: 987; PPC64LE-NEXT: stwcx. 5, 0, 3 988; PPC64LE-NEXT: bne 0, .LBB67_1 989; PPC64LE-NEXT: # %bb.3: 990; PPC64LE-NEXT: lwsync 991; PPC64LE-NEXT: blr 992; PPC64LE-NEXT: .LBB67_4: 993; PPC64LE-NEXT: stwcx. 6, 0, 3 994; PPC64LE-NEXT: lwsync 995; PPC64LE-NEXT: blr 996 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst monotonic 997 ret void 998} 999 1000define void @test68(i32* %ptr, i32 %cmp, i32 %val) { 1001; PPC64LE-LABEL: test68: 1002; PPC64LE: # %bb.0: 1003; PPC64LE-NEXT: sync 1004; PPC64LE-NEXT: .LBB68_1: 1005; PPC64LE-NEXT: lwarx 6, 0, 3 1006; PPC64LE-NEXT: cmpw 4, 6 1007; PPC64LE-NEXT: bne 0, .LBB68_4 1008; PPC64LE-NEXT: # %bb.2: 1009; PPC64LE-NEXT: stwcx. 5, 0, 3 1010; PPC64LE-NEXT: bne 0, .LBB68_1 1011; PPC64LE-NEXT: # %bb.3: 1012; PPC64LE-NEXT: lwsync 1013; PPC64LE-NEXT: blr 1014; PPC64LE-NEXT: .LBB68_4: 1015; PPC64LE-NEXT: stwcx. 6, 0, 3 1016; PPC64LE-NEXT: lwsync 1017; PPC64LE-NEXT: blr 1018 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst acquire 1019 ret void 1020} 1021 1022define void @test69(i32* %ptr, i32 %cmp, i32 %val) { 1023; PPC64LE-LABEL: test69: 1024; PPC64LE: # %bb.0: 1025; PPC64LE-NEXT: sync 1026; PPC64LE-NEXT: .LBB69_1: 1027; PPC64LE-NEXT: lwarx 6, 0, 3 1028; PPC64LE-NEXT: cmpw 4, 6 1029; PPC64LE-NEXT: bne 0, .LBB69_4 1030; PPC64LE-NEXT: # %bb.2: 1031; PPC64LE-NEXT: stwcx. 5, 0, 3 1032; PPC64LE-NEXT: bne 0, .LBB69_1 1033; PPC64LE-NEXT: # %bb.3: 1034; PPC64LE-NEXT: lwsync 1035; PPC64LE-NEXT: blr 1036; PPC64LE-NEXT: .LBB69_4: 1037; PPC64LE-NEXT: stwcx. 6, 0, 3 1038; PPC64LE-NEXT: lwsync 1039; PPC64LE-NEXT: blr 1040 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val seq_cst seq_cst 1041 ret void 1042} 1043 1044define void @test70(i64* %ptr, i64 %cmp, i64 %val) { 1045; PPC64LE-LABEL: test70: 1046; PPC64LE: # %bb.0: 1047; PPC64LE-NEXT: .LBB70_1: 1048; PPC64LE-NEXT: ldarx 6, 0, 3 1049; PPC64LE-NEXT: cmpd 4, 6 1050; PPC64LE-NEXT: bne 0, .LBB70_3 1051; PPC64LE-NEXT: # %bb.2: 1052; PPC64LE-NEXT: stdcx. 5, 0, 3 1053; PPC64LE-NEXT: beqlr 0 1054; PPC64LE-NEXT: b .LBB70_1 1055; PPC64LE-NEXT: .LBB70_3: 1056; PPC64LE-NEXT: stdcx. 6, 0, 3 1057; PPC64LE-NEXT: blr 1058 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val monotonic monotonic 1059 ret void 1060} 1061 1062define void @test71(i64* %ptr, i64 %cmp, i64 %val) { 1063; PPC64LE-LABEL: test71: 1064; PPC64LE: # %bb.0: 1065; PPC64LE-NEXT: .LBB71_1: 1066; PPC64LE-NEXT: ldarx 6, 0, 3 1067; PPC64LE-NEXT: cmpd 4, 6 1068; PPC64LE-NEXT: bne 0, .LBB71_4 1069; PPC64LE-NEXT: # %bb.2: 1070; PPC64LE-NEXT: stdcx. 5, 0, 3 1071; PPC64LE-NEXT: bne 0, .LBB71_1 1072; PPC64LE-NEXT: # %bb.3: 1073; PPC64LE-NEXT: lwsync 1074; PPC64LE-NEXT: blr 1075; PPC64LE-NEXT: .LBB71_4: 1076; PPC64LE-NEXT: stdcx. 6, 0, 3 1077; PPC64LE-NEXT: lwsync 1078; PPC64LE-NEXT: blr 1079 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire monotonic 1080 ret void 1081} 1082 1083define void @test72(i64* %ptr, i64 %cmp, i64 %val) { 1084; PPC64LE-LABEL: test72: 1085; PPC64LE: # %bb.0: 1086; PPC64LE-NEXT: .LBB72_1: 1087; PPC64LE-NEXT: ldarx 6, 0, 3 1088; PPC64LE-NEXT: cmpd 4, 6 1089; PPC64LE-NEXT: bne 0, .LBB72_4 1090; PPC64LE-NEXT: # %bb.2: 1091; PPC64LE-NEXT: stdcx. 5, 0, 3 1092; PPC64LE-NEXT: bne 0, .LBB72_1 1093; PPC64LE-NEXT: # %bb.3: 1094; PPC64LE-NEXT: lwsync 1095; PPC64LE-NEXT: blr 1096; PPC64LE-NEXT: .LBB72_4: 1097; PPC64LE-NEXT: stdcx. 6, 0, 3 1098; PPC64LE-NEXT: lwsync 1099; PPC64LE-NEXT: blr 1100 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acquire acquire 1101 ret void 1102} 1103 1104define void @test73(i64* %ptr, i64 %cmp, i64 %val) { 1105; PPC64LE-LABEL: test73: 1106; PPC64LE: # %bb.0: 1107; PPC64LE-NEXT: lwsync 1108; PPC64LE-NEXT: .LBB73_1: 1109; PPC64LE-NEXT: ldarx 6, 0, 3 1110; PPC64LE-NEXT: cmpd 4, 6 1111; PPC64LE-NEXT: bne 0, .LBB73_3 1112; PPC64LE-NEXT: # %bb.2: 1113; PPC64LE-NEXT: stdcx. 5, 0, 3 1114; PPC64LE-NEXT: beqlr 0 1115; PPC64LE-NEXT: b .LBB73_1 1116; PPC64LE-NEXT: .LBB73_3: 1117; PPC64LE-NEXT: stdcx. 6, 0, 3 1118; PPC64LE-NEXT: blr 1119 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release monotonic 1120 ret void 1121} 1122 1123define void @test74(i64* %ptr, i64 %cmp, i64 %val) { 1124; PPC64LE-LABEL: test74: 1125; PPC64LE: # %bb.0: 1126; PPC64LE-NEXT: lwsync 1127; PPC64LE-NEXT: .LBB74_1: 1128; PPC64LE-NEXT: ldarx 6, 0, 3 1129; PPC64LE-NEXT: cmpd 4, 6 1130; PPC64LE-NEXT: bne 0, .LBB74_3 1131; PPC64LE-NEXT: # %bb.2: 1132; PPC64LE-NEXT: stdcx. 5, 0, 3 1133; PPC64LE-NEXT: beqlr 0 1134; PPC64LE-NEXT: b .LBB74_1 1135; PPC64LE-NEXT: .LBB74_3: 1136; PPC64LE-NEXT: stdcx. 6, 0, 3 1137; PPC64LE-NEXT: blr 1138 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val release acquire 1139 ret void 1140} 1141 1142define void @test75(i64* %ptr, i64 %cmp, i64 %val) { 1143; PPC64LE-LABEL: test75: 1144; PPC64LE: # %bb.0: 1145; PPC64LE-NEXT: lwsync 1146; PPC64LE-NEXT: .LBB75_1: 1147; PPC64LE-NEXT: ldarx 6, 0, 3 1148; PPC64LE-NEXT: cmpd 4, 6 1149; PPC64LE-NEXT: bne 0, .LBB75_4 1150; PPC64LE-NEXT: # %bb.2: 1151; PPC64LE-NEXT: stdcx. 5, 0, 3 1152; PPC64LE-NEXT: bne 0, .LBB75_1 1153; PPC64LE-NEXT: # %bb.3: 1154; PPC64LE-NEXT: lwsync 1155; PPC64LE-NEXT: blr 1156; PPC64LE-NEXT: .LBB75_4: 1157; PPC64LE-NEXT: stdcx. 6, 0, 3 1158; PPC64LE-NEXT: lwsync 1159; PPC64LE-NEXT: blr 1160 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel monotonic 1161 ret void 1162} 1163 1164define void @test76(i64* %ptr, i64 %cmp, i64 %val) { 1165; PPC64LE-LABEL: test76: 1166; PPC64LE: # %bb.0: 1167; PPC64LE-NEXT: lwsync 1168; PPC64LE-NEXT: .LBB76_1: 1169; PPC64LE-NEXT: ldarx 6, 0, 3 1170; PPC64LE-NEXT: cmpd 4, 6 1171; PPC64LE-NEXT: bne 0, .LBB76_4 1172; PPC64LE-NEXT: # %bb.2: 1173; PPC64LE-NEXT: stdcx. 5, 0, 3 1174; PPC64LE-NEXT: bne 0, .LBB76_1 1175; PPC64LE-NEXT: # %bb.3: 1176; PPC64LE-NEXT: lwsync 1177; PPC64LE-NEXT: blr 1178; PPC64LE-NEXT: .LBB76_4: 1179; PPC64LE-NEXT: stdcx. 6, 0, 3 1180; PPC64LE-NEXT: lwsync 1181; PPC64LE-NEXT: blr 1182 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val acq_rel acquire 1183 ret void 1184} 1185 1186define void @test77(i64* %ptr, i64 %cmp, i64 %val) { 1187; PPC64LE-LABEL: test77: 1188; PPC64LE: # %bb.0: 1189; PPC64LE-NEXT: sync 1190; PPC64LE-NEXT: .LBB77_1: 1191; PPC64LE-NEXT: ldarx 6, 0, 3 1192; PPC64LE-NEXT: cmpd 4, 6 1193; PPC64LE-NEXT: bne 0, .LBB77_4 1194; PPC64LE-NEXT: # %bb.2: 1195; PPC64LE-NEXT: stdcx. 5, 0, 3 1196; PPC64LE-NEXT: bne 0, .LBB77_1 1197; PPC64LE-NEXT: # %bb.3: 1198; PPC64LE-NEXT: lwsync 1199; PPC64LE-NEXT: blr 1200; PPC64LE-NEXT: .LBB77_4: 1201; PPC64LE-NEXT: stdcx. 6, 0, 3 1202; PPC64LE-NEXT: lwsync 1203; PPC64LE-NEXT: blr 1204 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst monotonic 1205 ret void 1206} 1207 1208define void @test78(i64* %ptr, i64 %cmp, i64 %val) { 1209; PPC64LE-LABEL: test78: 1210; PPC64LE: # %bb.0: 1211; PPC64LE-NEXT: sync 1212; PPC64LE-NEXT: .LBB78_1: 1213; PPC64LE-NEXT: ldarx 6, 0, 3 1214; PPC64LE-NEXT: cmpd 4, 6 1215; PPC64LE-NEXT: bne 0, .LBB78_4 1216; PPC64LE-NEXT: # %bb.2: 1217; PPC64LE-NEXT: stdcx. 5, 0, 3 1218; PPC64LE-NEXT: bne 0, .LBB78_1 1219; PPC64LE-NEXT: # %bb.3: 1220; PPC64LE-NEXT: lwsync 1221; PPC64LE-NEXT: blr 1222; PPC64LE-NEXT: .LBB78_4: 1223; PPC64LE-NEXT: stdcx. 6, 0, 3 1224; PPC64LE-NEXT: lwsync 1225; PPC64LE-NEXT: blr 1226 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst acquire 1227 ret void 1228} 1229 1230define void @test79(i64* %ptr, i64 %cmp, i64 %val) { 1231; PPC64LE-LABEL: test79: 1232; PPC64LE: # %bb.0: 1233; PPC64LE-NEXT: sync 1234; PPC64LE-NEXT: .LBB79_1: 1235; PPC64LE-NEXT: ldarx 6, 0, 3 1236; PPC64LE-NEXT: cmpd 4, 6 1237; PPC64LE-NEXT: bne 0, .LBB79_4 1238; PPC64LE-NEXT: # %bb.2: 1239; PPC64LE-NEXT: stdcx. 5, 0, 3 1240; PPC64LE-NEXT: bne 0, .LBB79_1 1241; PPC64LE-NEXT: # %bb.3: 1242; PPC64LE-NEXT: lwsync 1243; PPC64LE-NEXT: blr 1244; PPC64LE-NEXT: .LBB79_4: 1245; PPC64LE-NEXT: stdcx. 6, 0, 3 1246; PPC64LE-NEXT: lwsync 1247; PPC64LE-NEXT: blr 1248 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val seq_cst seq_cst 1249 ret void 1250} 1251 1252define void @test80(i8* %ptr, i8 %cmp, i8 %val) { 1253; PPC64LE-LABEL: test80: 1254; PPC64LE: # %bb.0: 1255; PPC64LE-NEXT: clrlwi 4, 4, 24 1256; PPC64LE-NEXT: .LBB80_1: 1257; PPC64LE-NEXT: lbarx 6, 0, 3 1258; PPC64LE-NEXT: cmpw 4, 6 1259; PPC64LE-NEXT: bne 0, .LBB80_3 1260; PPC64LE-NEXT: # %bb.2: 1261; PPC64LE-NEXT: stbcx. 5, 0, 3 1262; PPC64LE-NEXT: beqlr 0 1263; PPC64LE-NEXT: b .LBB80_1 1264; PPC64LE-NEXT: .LBB80_3: 1265; PPC64LE-NEXT: stbcx. 6, 0, 3 1266; PPC64LE-NEXT: blr 1267 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") monotonic monotonic 1268 ret void 1269} 1270 1271define void @test81(i8* %ptr, i8 %cmp, i8 %val) { 1272; PPC64LE-LABEL: test81: 1273; PPC64LE: # %bb.0: 1274; PPC64LE-NEXT: clrlwi 4, 4, 24 1275; PPC64LE-NEXT: .LBB81_1: 1276; PPC64LE-NEXT: lbarx 6, 0, 3 1277; PPC64LE-NEXT: cmpw 4, 6 1278; PPC64LE-NEXT: bne 0, .LBB81_4 1279; PPC64LE-NEXT: # %bb.2: 1280; PPC64LE-NEXT: stbcx. 5, 0, 3 1281; PPC64LE-NEXT: bne 0, .LBB81_1 1282; PPC64LE-NEXT: # %bb.3: 1283; PPC64LE-NEXT: lwsync 1284; PPC64LE-NEXT: blr 1285; PPC64LE-NEXT: .LBB81_4: 1286; PPC64LE-NEXT: stbcx. 6, 0, 3 1287; PPC64LE-NEXT: lwsync 1288; PPC64LE-NEXT: blr 1289 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire monotonic 1290 ret void 1291} 1292 1293define void @test82(i8* %ptr, i8 %cmp, i8 %val) { 1294; PPC64LE-LABEL: test82: 1295; PPC64LE: # %bb.0: 1296; PPC64LE-NEXT: clrlwi 4, 4, 24 1297; PPC64LE-NEXT: .LBB82_1: 1298; PPC64LE-NEXT: lbarx 6, 0, 3 1299; PPC64LE-NEXT: cmpw 4, 6 1300; PPC64LE-NEXT: bne 0, .LBB82_4 1301; PPC64LE-NEXT: # %bb.2: 1302; PPC64LE-NEXT: stbcx. 5, 0, 3 1303; PPC64LE-NEXT: bne 0, .LBB82_1 1304; PPC64LE-NEXT: # %bb.3: 1305; PPC64LE-NEXT: lwsync 1306; PPC64LE-NEXT: blr 1307; PPC64LE-NEXT: .LBB82_4: 1308; PPC64LE-NEXT: stbcx. 6, 0, 3 1309; PPC64LE-NEXT: lwsync 1310; PPC64LE-NEXT: blr 1311 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acquire acquire 1312 ret void 1313} 1314 1315define void @test83(i8* %ptr, i8 %cmp, i8 %val) { 1316; PPC64LE-LABEL: test83: 1317; PPC64LE: # %bb.0: 1318; PPC64LE-NEXT: clrlwi 4, 4, 24 1319; PPC64LE-NEXT: lwsync 1320; PPC64LE-NEXT: .LBB83_1: 1321; PPC64LE-NEXT: lbarx 6, 0, 3 1322; PPC64LE-NEXT: cmpw 4, 6 1323; PPC64LE-NEXT: bne 0, .LBB83_3 1324; PPC64LE-NEXT: # %bb.2: 1325; PPC64LE-NEXT: stbcx. 5, 0, 3 1326; PPC64LE-NEXT: beqlr 0 1327; PPC64LE-NEXT: b .LBB83_1 1328; PPC64LE-NEXT: .LBB83_3: 1329; PPC64LE-NEXT: stbcx. 6, 0, 3 1330; PPC64LE-NEXT: blr 1331 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") release monotonic 1332 ret void 1333} 1334 1335define void @test84(i8* %ptr, i8 %cmp, i8 %val) { 1336; PPC64LE-LABEL: test84: 1337; PPC64LE: # %bb.0: 1338; PPC64LE-NEXT: clrlwi 4, 4, 24 1339; PPC64LE-NEXT: lwsync 1340; PPC64LE-NEXT: .LBB84_1: 1341; PPC64LE-NEXT: lbarx 6, 0, 3 1342; PPC64LE-NEXT: cmpw 4, 6 1343; PPC64LE-NEXT: bne 0, .LBB84_3 1344; PPC64LE-NEXT: # %bb.2: 1345; PPC64LE-NEXT: stbcx. 5, 0, 3 1346; PPC64LE-NEXT: beqlr 0 1347; PPC64LE-NEXT: b .LBB84_1 1348; PPC64LE-NEXT: .LBB84_3: 1349; PPC64LE-NEXT: stbcx. 6, 0, 3 1350; PPC64LE-NEXT: blr 1351 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") release acquire 1352 ret void 1353} 1354 1355define void @test85(i8* %ptr, i8 %cmp, i8 %val) { 1356; PPC64LE-LABEL: test85: 1357; PPC64LE: # %bb.0: 1358; PPC64LE-NEXT: clrlwi 4, 4, 24 1359; PPC64LE-NEXT: lwsync 1360; PPC64LE-NEXT: .LBB85_1: 1361; PPC64LE-NEXT: lbarx 6, 0, 3 1362; PPC64LE-NEXT: cmpw 4, 6 1363; PPC64LE-NEXT: bne 0, .LBB85_4 1364; PPC64LE-NEXT: # %bb.2: 1365; PPC64LE-NEXT: stbcx. 5, 0, 3 1366; PPC64LE-NEXT: bne 0, .LBB85_1 1367; PPC64LE-NEXT: # %bb.3: 1368; PPC64LE-NEXT: lwsync 1369; PPC64LE-NEXT: blr 1370; PPC64LE-NEXT: .LBB85_4: 1371; PPC64LE-NEXT: stbcx. 6, 0, 3 1372; PPC64LE-NEXT: lwsync 1373; PPC64LE-NEXT: blr 1374 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel monotonic 1375 ret void 1376} 1377 1378define void @test86(i8* %ptr, i8 %cmp, i8 %val) { 1379; PPC64LE-LABEL: test86: 1380; PPC64LE: # %bb.0: 1381; PPC64LE-NEXT: clrlwi 4, 4, 24 1382; PPC64LE-NEXT: lwsync 1383; PPC64LE-NEXT: .LBB86_1: 1384; PPC64LE-NEXT: lbarx 6, 0, 3 1385; PPC64LE-NEXT: cmpw 4, 6 1386; PPC64LE-NEXT: bne 0, .LBB86_4 1387; PPC64LE-NEXT: # %bb.2: 1388; PPC64LE-NEXT: stbcx. 5, 0, 3 1389; PPC64LE-NEXT: bne 0, .LBB86_1 1390; PPC64LE-NEXT: # %bb.3: 1391; PPC64LE-NEXT: lwsync 1392; PPC64LE-NEXT: blr 1393; PPC64LE-NEXT: .LBB86_4: 1394; PPC64LE-NEXT: stbcx. 6, 0, 3 1395; PPC64LE-NEXT: lwsync 1396; PPC64LE-NEXT: blr 1397 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") acq_rel acquire 1398 ret void 1399} 1400 1401define void @test87(i8* %ptr, i8 %cmp, i8 %val) { 1402; PPC64LE-LABEL: test87: 1403; PPC64LE: # %bb.0: 1404; PPC64LE-NEXT: clrlwi 4, 4, 24 1405; PPC64LE-NEXT: sync 1406; PPC64LE-NEXT: .LBB87_1: 1407; PPC64LE-NEXT: lbarx 6, 0, 3 1408; PPC64LE-NEXT: cmpw 4, 6 1409; PPC64LE-NEXT: bne 0, .LBB87_4 1410; PPC64LE-NEXT: # %bb.2: 1411; PPC64LE-NEXT: stbcx. 5, 0, 3 1412; PPC64LE-NEXT: bne 0, .LBB87_1 1413; PPC64LE-NEXT: # %bb.3: 1414; PPC64LE-NEXT: lwsync 1415; PPC64LE-NEXT: blr 1416; PPC64LE-NEXT: .LBB87_4: 1417; PPC64LE-NEXT: stbcx. 6, 0, 3 1418; PPC64LE-NEXT: lwsync 1419; PPC64LE-NEXT: blr 1420 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst monotonic 1421 ret void 1422} 1423 1424define void @test88(i8* %ptr, i8 %cmp, i8 %val) { 1425; PPC64LE-LABEL: test88: 1426; PPC64LE: # %bb.0: 1427; PPC64LE-NEXT: clrlwi 4, 4, 24 1428; PPC64LE-NEXT: sync 1429; PPC64LE-NEXT: .LBB88_1: 1430; PPC64LE-NEXT: lbarx 6, 0, 3 1431; PPC64LE-NEXT: cmpw 4, 6 1432; PPC64LE-NEXT: bne 0, .LBB88_4 1433; PPC64LE-NEXT: # %bb.2: 1434; PPC64LE-NEXT: stbcx. 5, 0, 3 1435; PPC64LE-NEXT: bne 0, .LBB88_1 1436; PPC64LE-NEXT: # %bb.3: 1437; PPC64LE-NEXT: lwsync 1438; PPC64LE-NEXT: blr 1439; PPC64LE-NEXT: .LBB88_4: 1440; PPC64LE-NEXT: stbcx. 6, 0, 3 1441; PPC64LE-NEXT: lwsync 1442; PPC64LE-NEXT: blr 1443 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst acquire 1444 ret void 1445} 1446 1447define void @test89(i8* %ptr, i8 %cmp, i8 %val) { 1448; PPC64LE-LABEL: test89: 1449; PPC64LE: # %bb.0: 1450; PPC64LE-NEXT: clrlwi 4, 4, 24 1451; PPC64LE-NEXT: sync 1452; PPC64LE-NEXT: .LBB89_1: 1453; PPC64LE-NEXT: lbarx 6, 0, 3 1454; PPC64LE-NEXT: cmpw 4, 6 1455; PPC64LE-NEXT: bne 0, .LBB89_4 1456; PPC64LE-NEXT: # %bb.2: 1457; PPC64LE-NEXT: stbcx. 5, 0, 3 1458; PPC64LE-NEXT: bne 0, .LBB89_1 1459; PPC64LE-NEXT: # %bb.3: 1460; PPC64LE-NEXT: lwsync 1461; PPC64LE-NEXT: blr 1462; PPC64LE-NEXT: .LBB89_4: 1463; PPC64LE-NEXT: stbcx. 6, 0, 3 1464; PPC64LE-NEXT: lwsync 1465; PPC64LE-NEXT: blr 1466 %res = cmpxchg i8* %ptr, i8 %cmp, i8 %val syncscope("singlethread") seq_cst seq_cst 1467 ret void 1468} 1469 1470define void @test90(i16* %ptr, i16 %cmp, i16 %val) { 1471; PPC64LE-LABEL: test90: 1472; PPC64LE: # %bb.0: 1473; PPC64LE-NEXT: clrlwi 4, 4, 16 1474; PPC64LE-NEXT: .LBB90_1: 1475; PPC64LE-NEXT: lharx 6, 0, 3 1476; PPC64LE-NEXT: cmpw 4, 6 1477; PPC64LE-NEXT: bne 0, .LBB90_3 1478; PPC64LE-NEXT: # %bb.2: 1479; PPC64LE-NEXT: sthcx. 5, 0, 3 1480; PPC64LE-NEXT: beqlr 0 1481; PPC64LE-NEXT: b .LBB90_1 1482; PPC64LE-NEXT: .LBB90_3: 1483; PPC64LE-NEXT: sthcx. 6, 0, 3 1484; PPC64LE-NEXT: blr 1485 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") monotonic monotonic 1486 ret void 1487} 1488 1489define void @test91(i16* %ptr, i16 %cmp, i16 %val) { 1490; PPC64LE-LABEL: test91: 1491; PPC64LE: # %bb.0: 1492; PPC64LE-NEXT: clrlwi 4, 4, 16 1493; PPC64LE-NEXT: .LBB91_1: 1494; PPC64LE-NEXT: lharx 6, 0, 3 1495; PPC64LE-NEXT: cmpw 4, 6 1496; PPC64LE-NEXT: bne 0, .LBB91_4 1497; PPC64LE-NEXT: # %bb.2: 1498; PPC64LE-NEXT: sthcx. 5, 0, 3 1499; PPC64LE-NEXT: bne 0, .LBB91_1 1500; PPC64LE-NEXT: # %bb.3: 1501; PPC64LE-NEXT: lwsync 1502; PPC64LE-NEXT: blr 1503; PPC64LE-NEXT: .LBB91_4: 1504; PPC64LE-NEXT: sthcx. 6, 0, 3 1505; PPC64LE-NEXT: lwsync 1506; PPC64LE-NEXT: blr 1507 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire monotonic 1508 ret void 1509} 1510 1511define void @test92(i16* %ptr, i16 %cmp, i16 %val) { 1512; PPC64LE-LABEL: test92: 1513; PPC64LE: # %bb.0: 1514; PPC64LE-NEXT: clrlwi 4, 4, 16 1515; PPC64LE-NEXT: .LBB92_1: 1516; PPC64LE-NEXT: lharx 6, 0, 3 1517; PPC64LE-NEXT: cmpw 4, 6 1518; PPC64LE-NEXT: bne 0, .LBB92_4 1519; PPC64LE-NEXT: # %bb.2: 1520; PPC64LE-NEXT: sthcx. 5, 0, 3 1521; PPC64LE-NEXT: bne 0, .LBB92_1 1522; PPC64LE-NEXT: # %bb.3: 1523; PPC64LE-NEXT: lwsync 1524; PPC64LE-NEXT: blr 1525; PPC64LE-NEXT: .LBB92_4: 1526; PPC64LE-NEXT: sthcx. 6, 0, 3 1527; PPC64LE-NEXT: lwsync 1528; PPC64LE-NEXT: blr 1529 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acquire acquire 1530 ret void 1531} 1532 1533define void @test93(i16* %ptr, i16 %cmp, i16 %val) { 1534; PPC64LE-LABEL: test93: 1535; PPC64LE: # %bb.0: 1536; PPC64LE-NEXT: clrlwi 4, 4, 16 1537; PPC64LE-NEXT: lwsync 1538; PPC64LE-NEXT: .LBB93_1: 1539; PPC64LE-NEXT: lharx 6, 0, 3 1540; PPC64LE-NEXT: cmpw 4, 6 1541; PPC64LE-NEXT: bne 0, .LBB93_3 1542; PPC64LE-NEXT: # %bb.2: 1543; PPC64LE-NEXT: sthcx. 5, 0, 3 1544; PPC64LE-NEXT: beqlr 0 1545; PPC64LE-NEXT: b .LBB93_1 1546; PPC64LE-NEXT: .LBB93_3: 1547; PPC64LE-NEXT: sthcx. 6, 0, 3 1548; PPC64LE-NEXT: blr 1549 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") release monotonic 1550 ret void 1551} 1552 1553define void @test94(i16* %ptr, i16 %cmp, i16 %val) { 1554; PPC64LE-LABEL: test94: 1555; PPC64LE: # %bb.0: 1556; PPC64LE-NEXT: clrlwi 4, 4, 16 1557; PPC64LE-NEXT: lwsync 1558; PPC64LE-NEXT: .LBB94_1: 1559; PPC64LE-NEXT: lharx 6, 0, 3 1560; PPC64LE-NEXT: cmpw 4, 6 1561; PPC64LE-NEXT: bne 0, .LBB94_3 1562; PPC64LE-NEXT: # %bb.2: 1563; PPC64LE-NEXT: sthcx. 5, 0, 3 1564; PPC64LE-NEXT: beqlr 0 1565; PPC64LE-NEXT: b .LBB94_1 1566; PPC64LE-NEXT: .LBB94_3: 1567; PPC64LE-NEXT: sthcx. 6, 0, 3 1568; PPC64LE-NEXT: blr 1569 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") release acquire 1570 ret void 1571} 1572 1573define void @test95(i16* %ptr, i16 %cmp, i16 %val) { 1574; PPC64LE-LABEL: test95: 1575; PPC64LE: # %bb.0: 1576; PPC64LE-NEXT: clrlwi 4, 4, 16 1577; PPC64LE-NEXT: lwsync 1578; PPC64LE-NEXT: .LBB95_1: 1579; PPC64LE-NEXT: lharx 6, 0, 3 1580; PPC64LE-NEXT: cmpw 4, 6 1581; PPC64LE-NEXT: bne 0, .LBB95_4 1582; PPC64LE-NEXT: # %bb.2: 1583; PPC64LE-NEXT: sthcx. 5, 0, 3 1584; PPC64LE-NEXT: bne 0, .LBB95_1 1585; PPC64LE-NEXT: # %bb.3: 1586; PPC64LE-NEXT: lwsync 1587; PPC64LE-NEXT: blr 1588; PPC64LE-NEXT: .LBB95_4: 1589; PPC64LE-NEXT: sthcx. 6, 0, 3 1590; PPC64LE-NEXT: lwsync 1591; PPC64LE-NEXT: blr 1592 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel monotonic 1593 ret void 1594} 1595 1596define void @test96(i16* %ptr, i16 %cmp, i16 %val) { 1597; PPC64LE-LABEL: test96: 1598; PPC64LE: # %bb.0: 1599; PPC64LE-NEXT: clrlwi 4, 4, 16 1600; PPC64LE-NEXT: lwsync 1601; PPC64LE-NEXT: .LBB96_1: 1602; PPC64LE-NEXT: lharx 6, 0, 3 1603; PPC64LE-NEXT: cmpw 4, 6 1604; PPC64LE-NEXT: bne 0, .LBB96_4 1605; PPC64LE-NEXT: # %bb.2: 1606; PPC64LE-NEXT: sthcx. 5, 0, 3 1607; PPC64LE-NEXT: bne 0, .LBB96_1 1608; PPC64LE-NEXT: # %bb.3: 1609; PPC64LE-NEXT: lwsync 1610; PPC64LE-NEXT: blr 1611; PPC64LE-NEXT: .LBB96_4: 1612; PPC64LE-NEXT: sthcx. 6, 0, 3 1613; PPC64LE-NEXT: lwsync 1614; PPC64LE-NEXT: blr 1615 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") acq_rel acquire 1616 ret void 1617} 1618 1619define void @test97(i16* %ptr, i16 %cmp, i16 %val) { 1620; PPC64LE-LABEL: test97: 1621; PPC64LE: # %bb.0: 1622; PPC64LE-NEXT: clrlwi 4, 4, 16 1623; PPC64LE-NEXT: sync 1624; PPC64LE-NEXT: .LBB97_1: 1625; PPC64LE-NEXT: lharx 6, 0, 3 1626; PPC64LE-NEXT: cmpw 4, 6 1627; PPC64LE-NEXT: bne 0, .LBB97_4 1628; PPC64LE-NEXT: # %bb.2: 1629; PPC64LE-NEXT: sthcx. 5, 0, 3 1630; PPC64LE-NEXT: bne 0, .LBB97_1 1631; PPC64LE-NEXT: # %bb.3: 1632; PPC64LE-NEXT: lwsync 1633; PPC64LE-NEXT: blr 1634; PPC64LE-NEXT: .LBB97_4: 1635; PPC64LE-NEXT: sthcx. 6, 0, 3 1636; PPC64LE-NEXT: lwsync 1637; PPC64LE-NEXT: blr 1638 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst monotonic 1639 ret void 1640} 1641 1642define void @test98(i16* %ptr, i16 %cmp, i16 %val) { 1643; PPC64LE-LABEL: test98: 1644; PPC64LE: # %bb.0: 1645; PPC64LE-NEXT: clrlwi 4, 4, 16 1646; PPC64LE-NEXT: sync 1647; PPC64LE-NEXT: .LBB98_1: 1648; PPC64LE-NEXT: lharx 6, 0, 3 1649; PPC64LE-NEXT: cmpw 4, 6 1650; PPC64LE-NEXT: bne 0, .LBB98_4 1651; PPC64LE-NEXT: # %bb.2: 1652; PPC64LE-NEXT: sthcx. 5, 0, 3 1653; PPC64LE-NEXT: bne 0, .LBB98_1 1654; PPC64LE-NEXT: # %bb.3: 1655; PPC64LE-NEXT: lwsync 1656; PPC64LE-NEXT: blr 1657; PPC64LE-NEXT: .LBB98_4: 1658; PPC64LE-NEXT: sthcx. 6, 0, 3 1659; PPC64LE-NEXT: lwsync 1660; PPC64LE-NEXT: blr 1661 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst acquire 1662 ret void 1663} 1664 1665define void @test99(i16* %ptr, i16 %cmp, i16 %val) { 1666; PPC64LE-LABEL: test99: 1667; PPC64LE: # %bb.0: 1668; PPC64LE-NEXT: clrlwi 4, 4, 16 1669; PPC64LE-NEXT: sync 1670; PPC64LE-NEXT: .LBB99_1: 1671; PPC64LE-NEXT: lharx 6, 0, 3 1672; PPC64LE-NEXT: cmpw 4, 6 1673; PPC64LE-NEXT: bne 0, .LBB99_4 1674; PPC64LE-NEXT: # %bb.2: 1675; PPC64LE-NEXT: sthcx. 5, 0, 3 1676; PPC64LE-NEXT: bne 0, .LBB99_1 1677; PPC64LE-NEXT: # %bb.3: 1678; PPC64LE-NEXT: lwsync 1679; PPC64LE-NEXT: blr 1680; PPC64LE-NEXT: .LBB99_4: 1681; PPC64LE-NEXT: sthcx. 6, 0, 3 1682; PPC64LE-NEXT: lwsync 1683; PPC64LE-NEXT: blr 1684 %res = cmpxchg i16* %ptr, i16 %cmp, i16 %val syncscope("singlethread") seq_cst seq_cst 1685 ret void 1686} 1687 1688define void @test100(i32* %ptr, i32 %cmp, i32 %val) { 1689; PPC64LE-LABEL: test100: 1690; PPC64LE: # %bb.0: 1691; PPC64LE-NEXT: .LBB100_1: 1692; PPC64LE-NEXT: lwarx 6, 0, 3 1693; PPC64LE-NEXT: cmpw 4, 6 1694; PPC64LE-NEXT: bne 0, .LBB100_3 1695; PPC64LE-NEXT: # %bb.2: 1696; PPC64LE-NEXT: stwcx. 5, 0, 3 1697; PPC64LE-NEXT: beqlr 0 1698; PPC64LE-NEXT: b .LBB100_1 1699; PPC64LE-NEXT: .LBB100_3: 1700; PPC64LE-NEXT: stwcx. 6, 0, 3 1701; PPC64LE-NEXT: blr 1702 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") monotonic monotonic 1703 ret void 1704} 1705 1706define void @test101(i32* %ptr, i32 %cmp, i32 %val) { 1707; PPC64LE-LABEL: test101: 1708; PPC64LE: # %bb.0: 1709; PPC64LE-NEXT: .LBB101_1: 1710; PPC64LE-NEXT: lwarx 6, 0, 3 1711; PPC64LE-NEXT: cmpw 4, 6 1712; PPC64LE-NEXT: bne 0, .LBB101_4 1713; PPC64LE-NEXT: # %bb.2: 1714; PPC64LE-NEXT: stwcx. 5, 0, 3 1715; PPC64LE-NEXT: bne 0, .LBB101_1 1716; PPC64LE-NEXT: # %bb.3: 1717; PPC64LE-NEXT: lwsync 1718; PPC64LE-NEXT: blr 1719; PPC64LE-NEXT: .LBB101_4: 1720; PPC64LE-NEXT: stwcx. 6, 0, 3 1721; PPC64LE-NEXT: lwsync 1722; PPC64LE-NEXT: blr 1723 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire monotonic 1724 ret void 1725} 1726 1727define void @test102(i32* %ptr, i32 %cmp, i32 %val) { 1728; PPC64LE-LABEL: test102: 1729; PPC64LE: # %bb.0: 1730; PPC64LE-NEXT: .LBB102_1: 1731; PPC64LE-NEXT: lwarx 6, 0, 3 1732; PPC64LE-NEXT: cmpw 4, 6 1733; PPC64LE-NEXT: bne 0, .LBB102_4 1734; PPC64LE-NEXT: # %bb.2: 1735; PPC64LE-NEXT: stwcx. 5, 0, 3 1736; PPC64LE-NEXT: bne 0, .LBB102_1 1737; PPC64LE-NEXT: # %bb.3: 1738; PPC64LE-NEXT: lwsync 1739; PPC64LE-NEXT: blr 1740; PPC64LE-NEXT: .LBB102_4: 1741; PPC64LE-NEXT: stwcx. 6, 0, 3 1742; PPC64LE-NEXT: lwsync 1743; PPC64LE-NEXT: blr 1744 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acquire acquire 1745 ret void 1746} 1747 1748define void @test103(i32* %ptr, i32 %cmp, i32 %val) { 1749; PPC64LE-LABEL: test103: 1750; PPC64LE: # %bb.0: 1751; PPC64LE-NEXT: lwsync 1752; PPC64LE-NEXT: .LBB103_1: 1753; PPC64LE-NEXT: lwarx 6, 0, 3 1754; PPC64LE-NEXT: cmpw 4, 6 1755; PPC64LE-NEXT: bne 0, .LBB103_3 1756; PPC64LE-NEXT: # %bb.2: 1757; PPC64LE-NEXT: stwcx. 5, 0, 3 1758; PPC64LE-NEXT: beqlr 0 1759; PPC64LE-NEXT: b .LBB103_1 1760; PPC64LE-NEXT: .LBB103_3: 1761; PPC64LE-NEXT: stwcx. 6, 0, 3 1762; PPC64LE-NEXT: blr 1763 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") release monotonic 1764 ret void 1765} 1766 1767define void @test104(i32* %ptr, i32 %cmp, i32 %val) { 1768; PPC64LE-LABEL: test104: 1769; PPC64LE: # %bb.0: 1770; PPC64LE-NEXT: lwsync 1771; PPC64LE-NEXT: .LBB104_1: 1772; PPC64LE-NEXT: lwarx 6, 0, 3 1773; PPC64LE-NEXT: cmpw 4, 6 1774; PPC64LE-NEXT: bne 0, .LBB104_3 1775; PPC64LE-NEXT: # %bb.2: 1776; PPC64LE-NEXT: stwcx. 5, 0, 3 1777; PPC64LE-NEXT: beqlr 0 1778; PPC64LE-NEXT: b .LBB104_1 1779; PPC64LE-NEXT: .LBB104_3: 1780; PPC64LE-NEXT: stwcx. 6, 0, 3 1781; PPC64LE-NEXT: blr 1782 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") release acquire 1783 ret void 1784} 1785 1786define void @test105(i32* %ptr, i32 %cmp, i32 %val) { 1787; PPC64LE-LABEL: test105: 1788; PPC64LE: # %bb.0: 1789; PPC64LE-NEXT: lwsync 1790; PPC64LE-NEXT: .LBB105_1: 1791; PPC64LE-NEXT: lwarx 6, 0, 3 1792; PPC64LE-NEXT: cmpw 4, 6 1793; PPC64LE-NEXT: bne 0, .LBB105_4 1794; PPC64LE-NEXT: # %bb.2: 1795; PPC64LE-NEXT: stwcx. 5, 0, 3 1796; PPC64LE-NEXT: bne 0, .LBB105_1 1797; PPC64LE-NEXT: # %bb.3: 1798; PPC64LE-NEXT: lwsync 1799; PPC64LE-NEXT: blr 1800; PPC64LE-NEXT: .LBB105_4: 1801; PPC64LE-NEXT: stwcx. 6, 0, 3 1802; PPC64LE-NEXT: lwsync 1803; PPC64LE-NEXT: blr 1804 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel monotonic 1805 ret void 1806} 1807 1808define void @test106(i32* %ptr, i32 %cmp, i32 %val) { 1809; PPC64LE-LABEL: test106: 1810; PPC64LE: # %bb.0: 1811; PPC64LE-NEXT: lwsync 1812; PPC64LE-NEXT: .LBB106_1: 1813; PPC64LE-NEXT: lwarx 6, 0, 3 1814; PPC64LE-NEXT: cmpw 4, 6 1815; PPC64LE-NEXT: bne 0, .LBB106_4 1816; PPC64LE-NEXT: # %bb.2: 1817; PPC64LE-NEXT: stwcx. 5, 0, 3 1818; PPC64LE-NEXT: bne 0, .LBB106_1 1819; PPC64LE-NEXT: # %bb.3: 1820; PPC64LE-NEXT: lwsync 1821; PPC64LE-NEXT: blr 1822; PPC64LE-NEXT: .LBB106_4: 1823; PPC64LE-NEXT: stwcx. 6, 0, 3 1824; PPC64LE-NEXT: lwsync 1825; PPC64LE-NEXT: blr 1826 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") acq_rel acquire 1827 ret void 1828} 1829 1830define void @test107(i32* %ptr, i32 %cmp, i32 %val) { 1831; PPC64LE-LABEL: test107: 1832; PPC64LE: # %bb.0: 1833; PPC64LE-NEXT: sync 1834; PPC64LE-NEXT: .LBB107_1: 1835; PPC64LE-NEXT: lwarx 6, 0, 3 1836; PPC64LE-NEXT: cmpw 4, 6 1837; PPC64LE-NEXT: bne 0, .LBB107_4 1838; PPC64LE-NEXT: # %bb.2: 1839; PPC64LE-NEXT: stwcx. 5, 0, 3 1840; PPC64LE-NEXT: bne 0, .LBB107_1 1841; PPC64LE-NEXT: # %bb.3: 1842; PPC64LE-NEXT: lwsync 1843; PPC64LE-NEXT: blr 1844; PPC64LE-NEXT: .LBB107_4: 1845; PPC64LE-NEXT: stwcx. 6, 0, 3 1846; PPC64LE-NEXT: lwsync 1847; PPC64LE-NEXT: blr 1848 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst monotonic 1849 ret void 1850} 1851 1852define void @test108(i32* %ptr, i32 %cmp, i32 %val) { 1853; PPC64LE-LABEL: test108: 1854; PPC64LE: # %bb.0: 1855; PPC64LE-NEXT: sync 1856; PPC64LE-NEXT: .LBB108_1: 1857; PPC64LE-NEXT: lwarx 6, 0, 3 1858; PPC64LE-NEXT: cmpw 4, 6 1859; PPC64LE-NEXT: bne 0, .LBB108_4 1860; PPC64LE-NEXT: # %bb.2: 1861; PPC64LE-NEXT: stwcx. 5, 0, 3 1862; PPC64LE-NEXT: bne 0, .LBB108_1 1863; PPC64LE-NEXT: # %bb.3: 1864; PPC64LE-NEXT: lwsync 1865; PPC64LE-NEXT: blr 1866; PPC64LE-NEXT: .LBB108_4: 1867; PPC64LE-NEXT: stwcx. 6, 0, 3 1868; PPC64LE-NEXT: lwsync 1869; PPC64LE-NEXT: blr 1870 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst acquire 1871 ret void 1872} 1873 1874define void @test109(i32* %ptr, i32 %cmp, i32 %val) { 1875; PPC64LE-LABEL: test109: 1876; PPC64LE: # %bb.0: 1877; PPC64LE-NEXT: sync 1878; PPC64LE-NEXT: .LBB109_1: 1879; PPC64LE-NEXT: lwarx 6, 0, 3 1880; PPC64LE-NEXT: cmpw 4, 6 1881; PPC64LE-NEXT: bne 0, .LBB109_4 1882; PPC64LE-NEXT: # %bb.2: 1883; PPC64LE-NEXT: stwcx. 5, 0, 3 1884; PPC64LE-NEXT: bne 0, .LBB109_1 1885; PPC64LE-NEXT: # %bb.3: 1886; PPC64LE-NEXT: lwsync 1887; PPC64LE-NEXT: blr 1888; PPC64LE-NEXT: .LBB109_4: 1889; PPC64LE-NEXT: stwcx. 6, 0, 3 1890; PPC64LE-NEXT: lwsync 1891; PPC64LE-NEXT: blr 1892 %res = cmpxchg i32* %ptr, i32 %cmp, i32 %val syncscope("singlethread") seq_cst seq_cst 1893 ret void 1894} 1895 1896define void @test110(i64* %ptr, i64 %cmp, i64 %val) { 1897; PPC64LE-LABEL: test110: 1898; PPC64LE: # %bb.0: 1899; PPC64LE-NEXT: .LBB110_1: 1900; PPC64LE-NEXT: ldarx 6, 0, 3 1901; PPC64LE-NEXT: cmpd 4, 6 1902; PPC64LE-NEXT: bne 0, .LBB110_3 1903; PPC64LE-NEXT: # %bb.2: 1904; PPC64LE-NEXT: stdcx. 5, 0, 3 1905; PPC64LE-NEXT: beqlr 0 1906; PPC64LE-NEXT: b .LBB110_1 1907; PPC64LE-NEXT: .LBB110_3: 1908; PPC64LE-NEXT: stdcx. 6, 0, 3 1909; PPC64LE-NEXT: blr 1910 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") monotonic monotonic 1911 ret void 1912} 1913 1914define void @test111(i64* %ptr, i64 %cmp, i64 %val) { 1915; PPC64LE-LABEL: test111: 1916; PPC64LE: # %bb.0: 1917; PPC64LE-NEXT: .LBB111_1: 1918; PPC64LE-NEXT: ldarx 6, 0, 3 1919; PPC64LE-NEXT: cmpd 4, 6 1920; PPC64LE-NEXT: bne 0, .LBB111_4 1921; PPC64LE-NEXT: # %bb.2: 1922; PPC64LE-NEXT: stdcx. 5, 0, 3 1923; PPC64LE-NEXT: bne 0, .LBB111_1 1924; PPC64LE-NEXT: # %bb.3: 1925; PPC64LE-NEXT: lwsync 1926; PPC64LE-NEXT: blr 1927; PPC64LE-NEXT: .LBB111_4: 1928; PPC64LE-NEXT: stdcx. 6, 0, 3 1929; PPC64LE-NEXT: lwsync 1930; PPC64LE-NEXT: blr 1931 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire monotonic 1932 ret void 1933} 1934 1935define void @test112(i64* %ptr, i64 %cmp, i64 %val) { 1936; PPC64LE-LABEL: test112: 1937; PPC64LE: # %bb.0: 1938; PPC64LE-NEXT: .LBB112_1: 1939; PPC64LE-NEXT: ldarx 6, 0, 3 1940; PPC64LE-NEXT: cmpd 4, 6 1941; PPC64LE-NEXT: bne 0, .LBB112_4 1942; PPC64LE-NEXT: # %bb.2: 1943; PPC64LE-NEXT: stdcx. 5, 0, 3 1944; PPC64LE-NEXT: bne 0, .LBB112_1 1945; PPC64LE-NEXT: # %bb.3: 1946; PPC64LE-NEXT: lwsync 1947; PPC64LE-NEXT: blr 1948; PPC64LE-NEXT: .LBB112_4: 1949; PPC64LE-NEXT: stdcx. 6, 0, 3 1950; PPC64LE-NEXT: lwsync 1951; PPC64LE-NEXT: blr 1952 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acquire acquire 1953 ret void 1954} 1955 1956define void @test113(i64* %ptr, i64 %cmp, i64 %val) { 1957; PPC64LE-LABEL: test113: 1958; PPC64LE: # %bb.0: 1959; PPC64LE-NEXT: lwsync 1960; PPC64LE-NEXT: .LBB113_1: 1961; PPC64LE-NEXT: ldarx 6, 0, 3 1962; PPC64LE-NEXT: cmpd 4, 6 1963; PPC64LE-NEXT: bne 0, .LBB113_3 1964; PPC64LE-NEXT: # %bb.2: 1965; PPC64LE-NEXT: stdcx. 5, 0, 3 1966; PPC64LE-NEXT: beqlr 0 1967; PPC64LE-NEXT: b .LBB113_1 1968; PPC64LE-NEXT: .LBB113_3: 1969; PPC64LE-NEXT: stdcx. 6, 0, 3 1970; PPC64LE-NEXT: blr 1971 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") release monotonic 1972 ret void 1973} 1974 1975define void @test114(i64* %ptr, i64 %cmp, i64 %val) { 1976; PPC64LE-LABEL: test114: 1977; PPC64LE: # %bb.0: 1978; PPC64LE-NEXT: lwsync 1979; PPC64LE-NEXT: .LBB114_1: 1980; PPC64LE-NEXT: ldarx 6, 0, 3 1981; PPC64LE-NEXT: cmpd 4, 6 1982; PPC64LE-NEXT: bne 0, .LBB114_3 1983; PPC64LE-NEXT: # %bb.2: 1984; PPC64LE-NEXT: stdcx. 5, 0, 3 1985; PPC64LE-NEXT: beqlr 0 1986; PPC64LE-NEXT: b .LBB114_1 1987; PPC64LE-NEXT: .LBB114_3: 1988; PPC64LE-NEXT: stdcx. 6, 0, 3 1989; PPC64LE-NEXT: blr 1990 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") release acquire 1991 ret void 1992} 1993 1994define void @test115(i64* %ptr, i64 %cmp, i64 %val) { 1995; PPC64LE-LABEL: test115: 1996; PPC64LE: # %bb.0: 1997; PPC64LE-NEXT: lwsync 1998; PPC64LE-NEXT: .LBB115_1: 1999; PPC64LE-NEXT: ldarx 6, 0, 3 2000; PPC64LE-NEXT: cmpd 4, 6 2001; PPC64LE-NEXT: bne 0, .LBB115_4 2002; PPC64LE-NEXT: # %bb.2: 2003; PPC64LE-NEXT: stdcx. 5, 0, 3 2004; PPC64LE-NEXT: bne 0, .LBB115_1 2005; PPC64LE-NEXT: # %bb.3: 2006; PPC64LE-NEXT: lwsync 2007; PPC64LE-NEXT: blr 2008; PPC64LE-NEXT: .LBB115_4: 2009; PPC64LE-NEXT: stdcx. 6, 0, 3 2010; PPC64LE-NEXT: lwsync 2011; PPC64LE-NEXT: blr 2012 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel monotonic 2013 ret void 2014} 2015 2016define void @test116(i64* %ptr, i64 %cmp, i64 %val) { 2017; PPC64LE-LABEL: test116: 2018; PPC64LE: # %bb.0: 2019; PPC64LE-NEXT: lwsync 2020; PPC64LE-NEXT: .LBB116_1: 2021; PPC64LE-NEXT: ldarx 6, 0, 3 2022; PPC64LE-NEXT: cmpd 4, 6 2023; PPC64LE-NEXT: bne 0, .LBB116_4 2024; PPC64LE-NEXT: # %bb.2: 2025; PPC64LE-NEXT: stdcx. 5, 0, 3 2026; PPC64LE-NEXT: bne 0, .LBB116_1 2027; PPC64LE-NEXT: # %bb.3: 2028; PPC64LE-NEXT: lwsync 2029; PPC64LE-NEXT: blr 2030; PPC64LE-NEXT: .LBB116_4: 2031; PPC64LE-NEXT: stdcx. 6, 0, 3 2032; PPC64LE-NEXT: lwsync 2033; PPC64LE-NEXT: blr 2034 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") acq_rel acquire 2035 ret void 2036} 2037 2038define void @test117(i64* %ptr, i64 %cmp, i64 %val) { 2039; PPC64LE-LABEL: test117: 2040; PPC64LE: # %bb.0: 2041; PPC64LE-NEXT: sync 2042; PPC64LE-NEXT: .LBB117_1: 2043; PPC64LE-NEXT: ldarx 6, 0, 3 2044; PPC64LE-NEXT: cmpd 4, 6 2045; PPC64LE-NEXT: bne 0, .LBB117_4 2046; PPC64LE-NEXT: # %bb.2: 2047; PPC64LE-NEXT: stdcx. 5, 0, 3 2048; PPC64LE-NEXT: bne 0, .LBB117_1 2049; PPC64LE-NEXT: # %bb.3: 2050; PPC64LE-NEXT: lwsync 2051; PPC64LE-NEXT: blr 2052; PPC64LE-NEXT: .LBB117_4: 2053; PPC64LE-NEXT: stdcx. 6, 0, 3 2054; PPC64LE-NEXT: lwsync 2055; PPC64LE-NEXT: blr 2056 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst monotonic 2057 ret void 2058} 2059 2060define void @test118(i64* %ptr, i64 %cmp, i64 %val) { 2061; PPC64LE-LABEL: test118: 2062; PPC64LE: # %bb.0: 2063; PPC64LE-NEXT: sync 2064; PPC64LE-NEXT: .LBB118_1: 2065; PPC64LE-NEXT: ldarx 6, 0, 3 2066; PPC64LE-NEXT: cmpd 4, 6 2067; PPC64LE-NEXT: bne 0, .LBB118_4 2068; PPC64LE-NEXT: # %bb.2: 2069; PPC64LE-NEXT: stdcx. 5, 0, 3 2070; PPC64LE-NEXT: bne 0, .LBB118_1 2071; PPC64LE-NEXT: # %bb.3: 2072; PPC64LE-NEXT: lwsync 2073; PPC64LE-NEXT: blr 2074; PPC64LE-NEXT: .LBB118_4: 2075; PPC64LE-NEXT: stdcx. 6, 0, 3 2076; PPC64LE-NEXT: lwsync 2077; PPC64LE-NEXT: blr 2078 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst acquire 2079 ret void 2080} 2081 2082define void @test119(i64* %ptr, i64 %cmp, i64 %val) { 2083; PPC64LE-LABEL: test119: 2084; PPC64LE: # %bb.0: 2085; PPC64LE-NEXT: sync 2086; PPC64LE-NEXT: .LBB119_1: 2087; PPC64LE-NEXT: ldarx 6, 0, 3 2088; PPC64LE-NEXT: cmpd 4, 6 2089; PPC64LE-NEXT: bne 0, .LBB119_4 2090; PPC64LE-NEXT: # %bb.2: 2091; PPC64LE-NEXT: stdcx. 5, 0, 3 2092; PPC64LE-NEXT: bne 0, .LBB119_1 2093; PPC64LE-NEXT: # %bb.3: 2094; PPC64LE-NEXT: lwsync 2095; PPC64LE-NEXT: blr 2096; PPC64LE-NEXT: .LBB119_4: 2097; PPC64LE-NEXT: stdcx. 6, 0, 3 2098; PPC64LE-NEXT: lwsync 2099; PPC64LE-NEXT: blr 2100 %res = cmpxchg i64* %ptr, i64 %cmp, i64 %val syncscope("singlethread") seq_cst seq_cst 2101 ret void 2102} 2103 2104define i8 @test120(i8* %ptr, i8 %val) { 2105; PPC64LE-LABEL: test120: 2106; PPC64LE: # %bb.0: 2107; PPC64LE-NEXT: .LBB120_1: 2108; PPC64LE-NEXT: lbarx 5, 0, 3 2109; PPC64LE-NEXT: stbcx. 4, 0, 3 2110; PPC64LE-NEXT: bne 0, .LBB120_1 2111; PPC64LE-NEXT: # %bb.2: 2112; PPC64LE-NEXT: mr 3, 5 2113; PPC64LE-NEXT: blr 2114 %ret = atomicrmw xchg i8* %ptr, i8 %val monotonic 2115 ret i8 %ret 2116} 2117 2118define i8 @test121(i8* %ptr, i8 %val) { 2119; PPC64LE-LABEL: test121: 2120; PPC64LE: # %bb.0: 2121; PPC64LE-NEXT: mr 5, 3 2122; PPC64LE-NEXT: .LBB121_1: 2123; PPC64LE-NEXT: lbarx 3, 0, 5 2124; PPC64LE-NEXT: stbcx. 4, 0, 5 2125; PPC64LE-NEXT: bne 0, .LBB121_1 2126; PPC64LE-NEXT: # %bb.2: 2127; PPC64LE-NEXT: lwsync 2128; PPC64LE-NEXT: blr 2129 %ret = atomicrmw xchg i8* %ptr, i8 %val acquire 2130 ret i8 %ret 2131} 2132 2133define i8 @test122(i8* %ptr, i8 %val) { 2134; PPC64LE-LABEL: test122: 2135; PPC64LE: # %bb.0: 2136; PPC64LE-NEXT: lwsync 2137; PPC64LE-NEXT: .LBB122_1: 2138; PPC64LE-NEXT: lbarx 5, 0, 3 2139; PPC64LE-NEXT: stbcx. 4, 0, 3 2140; PPC64LE-NEXT: bne 0, .LBB122_1 2141; PPC64LE-NEXT: # %bb.2: 2142; PPC64LE-NEXT: mr 3, 5 2143; PPC64LE-NEXT: blr 2144 %ret = atomicrmw xchg i8* %ptr, i8 %val release 2145 ret i8 %ret 2146} 2147 2148define i8 @test123(i8* %ptr, i8 %val) { 2149; PPC64LE-LABEL: test123: 2150; PPC64LE: # %bb.0: 2151; PPC64LE-NEXT: lwsync 2152; PPC64LE-NEXT: .LBB123_1: 2153; PPC64LE-NEXT: lbarx 5, 0, 3 2154; PPC64LE-NEXT: stbcx. 4, 0, 3 2155; PPC64LE-NEXT: bne 0, .LBB123_1 2156; PPC64LE-NEXT: # %bb.2: 2157; PPC64LE-NEXT: mr 3, 5 2158; PPC64LE-NEXT: lwsync 2159; PPC64LE-NEXT: blr 2160 %ret = atomicrmw xchg i8* %ptr, i8 %val acq_rel 2161 ret i8 %ret 2162} 2163 2164define i8 @test124(i8* %ptr, i8 %val) { 2165; PPC64LE-LABEL: test124: 2166; PPC64LE: # %bb.0: 2167; PPC64LE-NEXT: sync 2168; PPC64LE-NEXT: .LBB124_1: 2169; PPC64LE-NEXT: lbarx 5, 0, 3 2170; PPC64LE-NEXT: stbcx. 4, 0, 3 2171; PPC64LE-NEXT: bne 0, .LBB124_1 2172; PPC64LE-NEXT: # %bb.2: 2173; PPC64LE-NEXT: mr 3, 5 2174; PPC64LE-NEXT: lwsync 2175; PPC64LE-NEXT: blr 2176 %ret = atomicrmw xchg i8* %ptr, i8 %val seq_cst 2177 ret i8 %ret 2178} 2179 2180define i16 @test125(i16* %ptr, i16 %val) { 2181; PPC64LE-LABEL: test125: 2182; PPC64LE: # %bb.0: 2183; PPC64LE-NEXT: .LBB125_1: 2184; PPC64LE-NEXT: lharx 5, 0, 3 2185; PPC64LE-NEXT: sthcx. 4, 0, 3 2186; PPC64LE-NEXT: bne 0, .LBB125_1 2187; PPC64LE-NEXT: # %bb.2: 2188; PPC64LE-NEXT: mr 3, 5 2189; PPC64LE-NEXT: blr 2190 %ret = atomicrmw xchg i16* %ptr, i16 %val monotonic 2191 ret i16 %ret 2192} 2193 2194define i16 @test126(i16* %ptr, i16 %val) { 2195; PPC64LE-LABEL: test126: 2196; PPC64LE: # %bb.0: 2197; PPC64LE-NEXT: mr 5, 3 2198; PPC64LE-NEXT: .LBB126_1: 2199; PPC64LE-NEXT: lharx 3, 0, 5 2200; PPC64LE-NEXT: sthcx. 4, 0, 5 2201; PPC64LE-NEXT: bne 0, .LBB126_1 2202; PPC64LE-NEXT: # %bb.2: 2203; PPC64LE-NEXT: lwsync 2204; PPC64LE-NEXT: blr 2205 %ret = atomicrmw xchg i16* %ptr, i16 %val acquire 2206 ret i16 %ret 2207} 2208 2209define i16 @test127(i16* %ptr, i16 %val) { 2210; PPC64LE-LABEL: test127: 2211; PPC64LE: # %bb.0: 2212; PPC64LE-NEXT: lwsync 2213; PPC64LE-NEXT: .LBB127_1: 2214; PPC64LE-NEXT: lharx 5, 0, 3 2215; PPC64LE-NEXT: sthcx. 4, 0, 3 2216; PPC64LE-NEXT: bne 0, .LBB127_1 2217; PPC64LE-NEXT: # %bb.2: 2218; PPC64LE-NEXT: mr 3, 5 2219; PPC64LE-NEXT: blr 2220 %ret = atomicrmw xchg i16* %ptr, i16 %val release 2221 ret i16 %ret 2222} 2223 2224define i16 @test128(i16* %ptr, i16 %val) { 2225; PPC64LE-LABEL: test128: 2226; PPC64LE: # %bb.0: 2227; PPC64LE-NEXT: lwsync 2228; PPC64LE-NEXT: .LBB128_1: 2229; PPC64LE-NEXT: lharx 5, 0, 3 2230; PPC64LE-NEXT: sthcx. 4, 0, 3 2231; PPC64LE-NEXT: bne 0, .LBB128_1 2232; PPC64LE-NEXT: # %bb.2: 2233; PPC64LE-NEXT: mr 3, 5 2234; PPC64LE-NEXT: lwsync 2235; PPC64LE-NEXT: blr 2236 %ret = atomicrmw xchg i16* %ptr, i16 %val acq_rel 2237 ret i16 %ret 2238} 2239 2240define i16 @test129(i16* %ptr, i16 %val) { 2241; PPC64LE-LABEL: test129: 2242; PPC64LE: # %bb.0: 2243; PPC64LE-NEXT: sync 2244; PPC64LE-NEXT: .LBB129_1: 2245; PPC64LE-NEXT: lharx 5, 0, 3 2246; PPC64LE-NEXT: sthcx. 4, 0, 3 2247; PPC64LE-NEXT: bne 0, .LBB129_1 2248; PPC64LE-NEXT: # %bb.2: 2249; PPC64LE-NEXT: mr 3, 5 2250; PPC64LE-NEXT: lwsync 2251; PPC64LE-NEXT: blr 2252 %ret = atomicrmw xchg i16* %ptr, i16 %val seq_cst 2253 ret i16 %ret 2254} 2255 2256define i32 @test130(i32* %ptr, i32 %val) { 2257; PPC64LE-LABEL: test130: 2258; PPC64LE: # %bb.0: 2259; PPC64LE-NEXT: .LBB130_1: 2260; PPC64LE-NEXT: lwarx 5, 0, 3 2261; PPC64LE-NEXT: stwcx. 4, 0, 3 2262; PPC64LE-NEXT: bne 0, .LBB130_1 2263; PPC64LE-NEXT: # %bb.2: 2264; PPC64LE-NEXT: mr 3, 5 2265; PPC64LE-NEXT: blr 2266 %ret = atomicrmw xchg i32* %ptr, i32 %val monotonic 2267 ret i32 %ret 2268} 2269 2270define i32 @test131(i32* %ptr, i32 %val) { 2271; PPC64LE-LABEL: test131: 2272; PPC64LE: # %bb.0: 2273; PPC64LE-NEXT: mr 5, 3 2274; PPC64LE-NEXT: .LBB131_1: 2275; PPC64LE-NEXT: lwarx 3, 0, 5 2276; PPC64LE-NEXT: stwcx. 4, 0, 5 2277; PPC64LE-NEXT: bne 0, .LBB131_1 2278; PPC64LE-NEXT: # %bb.2: 2279; PPC64LE-NEXT: lwsync 2280; PPC64LE-NEXT: blr 2281 %ret = atomicrmw xchg i32* %ptr, i32 %val acquire 2282 ret i32 %ret 2283} 2284 2285define i32 @test132(i32* %ptr, i32 %val) { 2286; PPC64LE-LABEL: test132: 2287; PPC64LE: # %bb.0: 2288; PPC64LE-NEXT: lwsync 2289; PPC64LE-NEXT: .LBB132_1: 2290; PPC64LE-NEXT: lwarx 5, 0, 3 2291; PPC64LE-NEXT: stwcx. 4, 0, 3 2292; PPC64LE-NEXT: bne 0, .LBB132_1 2293; PPC64LE-NEXT: # %bb.2: 2294; PPC64LE-NEXT: mr 3, 5 2295; PPC64LE-NEXT: blr 2296 %ret = atomicrmw xchg i32* %ptr, i32 %val release 2297 ret i32 %ret 2298} 2299 2300define i32 @test133(i32* %ptr, i32 %val) { 2301; PPC64LE-LABEL: test133: 2302; PPC64LE: # %bb.0: 2303; PPC64LE-NEXT: lwsync 2304; PPC64LE-NEXT: .LBB133_1: 2305; PPC64LE-NEXT: lwarx 5, 0, 3 2306; PPC64LE-NEXT: stwcx. 4, 0, 3 2307; PPC64LE-NEXT: bne 0, .LBB133_1 2308; PPC64LE-NEXT: # %bb.2: 2309; PPC64LE-NEXT: mr 3, 5 2310; PPC64LE-NEXT: lwsync 2311; PPC64LE-NEXT: blr 2312 %ret = atomicrmw xchg i32* %ptr, i32 %val acq_rel 2313 ret i32 %ret 2314} 2315 2316define i32 @test134(i32* %ptr, i32 %val) { 2317; PPC64LE-LABEL: test134: 2318; PPC64LE: # %bb.0: 2319; PPC64LE-NEXT: sync 2320; PPC64LE-NEXT: .LBB134_1: 2321; PPC64LE-NEXT: lwarx 5, 0, 3 2322; PPC64LE-NEXT: stwcx. 4, 0, 3 2323; PPC64LE-NEXT: bne 0, .LBB134_1 2324; PPC64LE-NEXT: # %bb.2: 2325; PPC64LE-NEXT: mr 3, 5 2326; PPC64LE-NEXT: lwsync 2327; PPC64LE-NEXT: blr 2328 %ret = atomicrmw xchg i32* %ptr, i32 %val seq_cst 2329 ret i32 %ret 2330} 2331 2332define i64 @test135(i64* %ptr, i64 %val) { 2333; PPC64LE-LABEL: test135: 2334; PPC64LE: # %bb.0: 2335; PPC64LE-NEXT: .LBB135_1: 2336; PPC64LE-NEXT: ldarx 5, 0, 3 2337; PPC64LE-NEXT: stdcx. 4, 0, 3 2338; PPC64LE-NEXT: bne 0, .LBB135_1 2339; PPC64LE-NEXT: # %bb.2: 2340; PPC64LE-NEXT: mr 3, 5 2341; PPC64LE-NEXT: blr 2342 %ret = atomicrmw xchg i64* %ptr, i64 %val monotonic 2343 ret i64 %ret 2344} 2345 2346define i64 @test136(i64* %ptr, i64 %val) { 2347; PPC64LE-LABEL: test136: 2348; PPC64LE: # %bb.0: 2349; PPC64LE-NEXT: mr 5, 3 2350; PPC64LE-NEXT: .LBB136_1: 2351; PPC64LE-NEXT: ldarx 3, 0, 5 2352; PPC64LE-NEXT: stdcx. 4, 0, 5 2353; PPC64LE-NEXT: bne 0, .LBB136_1 2354; PPC64LE-NEXT: # %bb.2: 2355; PPC64LE-NEXT: lwsync 2356; PPC64LE-NEXT: blr 2357 %ret = atomicrmw xchg i64* %ptr, i64 %val acquire 2358 ret i64 %ret 2359} 2360 2361define i64 @test137(i64* %ptr, i64 %val) { 2362; PPC64LE-LABEL: test137: 2363; PPC64LE: # %bb.0: 2364; PPC64LE-NEXT: lwsync 2365; PPC64LE-NEXT: .LBB137_1: 2366; PPC64LE-NEXT: ldarx 5, 0, 3 2367; PPC64LE-NEXT: stdcx. 4, 0, 3 2368; PPC64LE-NEXT: bne 0, .LBB137_1 2369; PPC64LE-NEXT: # %bb.2: 2370; PPC64LE-NEXT: mr 3, 5 2371; PPC64LE-NEXT: blr 2372 %ret = atomicrmw xchg i64* %ptr, i64 %val release 2373 ret i64 %ret 2374} 2375 2376define i64 @test138(i64* %ptr, i64 %val) { 2377; PPC64LE-LABEL: test138: 2378; PPC64LE: # %bb.0: 2379; PPC64LE-NEXT: lwsync 2380; PPC64LE-NEXT: .LBB138_1: 2381; PPC64LE-NEXT: ldarx 5, 0, 3 2382; PPC64LE-NEXT: stdcx. 4, 0, 3 2383; PPC64LE-NEXT: bne 0, .LBB138_1 2384; PPC64LE-NEXT: # %bb.2: 2385; PPC64LE-NEXT: mr 3, 5 2386; PPC64LE-NEXT: lwsync 2387; PPC64LE-NEXT: blr 2388 %ret = atomicrmw xchg i64* %ptr, i64 %val acq_rel 2389 ret i64 %ret 2390} 2391 2392define i64 @test139(i64* %ptr, i64 %val) { 2393; PPC64LE-LABEL: test139: 2394; PPC64LE: # %bb.0: 2395; PPC64LE-NEXT: sync 2396; PPC64LE-NEXT: .LBB139_1: 2397; PPC64LE-NEXT: ldarx 5, 0, 3 2398; PPC64LE-NEXT: stdcx. 4, 0, 3 2399; PPC64LE-NEXT: bne 0, .LBB139_1 2400; PPC64LE-NEXT: # %bb.2: 2401; PPC64LE-NEXT: mr 3, 5 2402; PPC64LE-NEXT: lwsync 2403; PPC64LE-NEXT: blr 2404 %ret = atomicrmw xchg i64* %ptr, i64 %val seq_cst 2405 ret i64 %ret 2406} 2407 2408define i8 @test140(i8* %ptr, i8 %val) { 2409; PPC64LE-LABEL: test140: 2410; PPC64LE: # %bb.0: 2411; PPC64LE-NEXT: .LBB140_1: 2412; PPC64LE-NEXT: lbarx 5, 0, 3 2413; PPC64LE-NEXT: add 6, 4, 5 2414; PPC64LE-NEXT: stbcx. 6, 0, 3 2415; PPC64LE-NEXT: bne 0, .LBB140_1 2416; PPC64LE-NEXT: # %bb.2: 2417; PPC64LE-NEXT: mr 3, 5 2418; PPC64LE-NEXT: blr 2419 %ret = atomicrmw add i8* %ptr, i8 %val monotonic 2420 ret i8 %ret 2421} 2422 2423define i8 @test141(i8* %ptr, i8 %val) { 2424; PPC64LE-LABEL: test141: 2425; PPC64LE: # %bb.0: 2426; PPC64LE-NEXT: mr 5, 3 2427; PPC64LE-NEXT: .LBB141_1: 2428; PPC64LE-NEXT: lbarx 3, 0, 5 2429; PPC64LE-NEXT: add 6, 4, 3 2430; PPC64LE-NEXT: stbcx. 6, 0, 5 2431; PPC64LE-NEXT: bne 0, .LBB141_1 2432; PPC64LE-NEXT: # %bb.2: 2433; PPC64LE-NEXT: lwsync 2434; PPC64LE-NEXT: blr 2435 %ret = atomicrmw add i8* %ptr, i8 %val acquire 2436 ret i8 %ret 2437} 2438 2439define i8 @test142(i8* %ptr, i8 %val) { 2440; PPC64LE-LABEL: test142: 2441; PPC64LE: # %bb.0: 2442; PPC64LE-NEXT: lwsync 2443; PPC64LE-NEXT: .LBB142_1: 2444; PPC64LE-NEXT: lbarx 5, 0, 3 2445; PPC64LE-NEXT: add 6, 4, 5 2446; PPC64LE-NEXT: stbcx. 6, 0, 3 2447; PPC64LE-NEXT: bne 0, .LBB142_1 2448; PPC64LE-NEXT: # %bb.2: 2449; PPC64LE-NEXT: mr 3, 5 2450; PPC64LE-NEXT: blr 2451 %ret = atomicrmw add i8* %ptr, i8 %val release 2452 ret i8 %ret 2453} 2454 2455define i8 @test143(i8* %ptr, i8 %val) { 2456; PPC64LE-LABEL: test143: 2457; PPC64LE: # %bb.0: 2458; PPC64LE-NEXT: lwsync 2459; PPC64LE-NEXT: .LBB143_1: 2460; PPC64LE-NEXT: lbarx 5, 0, 3 2461; PPC64LE-NEXT: add 6, 4, 5 2462; PPC64LE-NEXT: stbcx. 6, 0, 3 2463; PPC64LE-NEXT: bne 0, .LBB143_1 2464; PPC64LE-NEXT: # %bb.2: 2465; PPC64LE-NEXT: mr 3, 5 2466; PPC64LE-NEXT: lwsync 2467; PPC64LE-NEXT: blr 2468 %ret = atomicrmw add i8* %ptr, i8 %val acq_rel 2469 ret i8 %ret 2470} 2471 2472define i8 @test144(i8* %ptr, i8 %val) { 2473; PPC64LE-LABEL: test144: 2474; PPC64LE: # %bb.0: 2475; PPC64LE-NEXT: sync 2476; PPC64LE-NEXT: .LBB144_1: 2477; PPC64LE-NEXT: lbarx 5, 0, 3 2478; PPC64LE-NEXT: add 6, 4, 5 2479; PPC64LE-NEXT: stbcx. 6, 0, 3 2480; PPC64LE-NEXT: bne 0, .LBB144_1 2481; PPC64LE-NEXT: # %bb.2: 2482; PPC64LE-NEXT: mr 3, 5 2483; PPC64LE-NEXT: lwsync 2484; PPC64LE-NEXT: blr 2485 %ret = atomicrmw add i8* %ptr, i8 %val seq_cst 2486 ret i8 %ret 2487} 2488 2489define i16 @test145(i16* %ptr, i16 %val) { 2490; PPC64LE-LABEL: test145: 2491; PPC64LE: # %bb.0: 2492; PPC64LE-NEXT: .LBB145_1: 2493; PPC64LE-NEXT: lharx 5, 0, 3 2494; PPC64LE-NEXT: add 6, 4, 5 2495; PPC64LE-NEXT: sthcx. 6, 0, 3 2496; PPC64LE-NEXT: bne 0, .LBB145_1 2497; PPC64LE-NEXT: # %bb.2: 2498; PPC64LE-NEXT: mr 3, 5 2499; PPC64LE-NEXT: blr 2500 %ret = atomicrmw add i16* %ptr, i16 %val monotonic 2501 ret i16 %ret 2502} 2503 2504define i16 @test146(i16* %ptr, i16 %val) { 2505; PPC64LE-LABEL: test146: 2506; PPC64LE: # %bb.0: 2507; PPC64LE-NEXT: mr 5, 3 2508; PPC64LE-NEXT: .LBB146_1: 2509; PPC64LE-NEXT: lharx 3, 0, 5 2510; PPC64LE-NEXT: add 6, 4, 3 2511; PPC64LE-NEXT: sthcx. 6, 0, 5 2512; PPC64LE-NEXT: bne 0, .LBB146_1 2513; PPC64LE-NEXT: # %bb.2: 2514; PPC64LE-NEXT: lwsync 2515; PPC64LE-NEXT: blr 2516 %ret = atomicrmw add i16* %ptr, i16 %val acquire 2517 ret i16 %ret 2518} 2519 2520define i16 @test147(i16* %ptr, i16 %val) { 2521; PPC64LE-LABEL: test147: 2522; PPC64LE: # %bb.0: 2523; PPC64LE-NEXT: lwsync 2524; PPC64LE-NEXT: .LBB147_1: 2525; PPC64LE-NEXT: lharx 5, 0, 3 2526; PPC64LE-NEXT: add 6, 4, 5 2527; PPC64LE-NEXT: sthcx. 6, 0, 3 2528; PPC64LE-NEXT: bne 0, .LBB147_1 2529; PPC64LE-NEXT: # %bb.2: 2530; PPC64LE-NEXT: mr 3, 5 2531; PPC64LE-NEXT: blr 2532 %ret = atomicrmw add i16* %ptr, i16 %val release 2533 ret i16 %ret 2534} 2535 2536define i16 @test148(i16* %ptr, i16 %val) { 2537; PPC64LE-LABEL: test148: 2538; PPC64LE: # %bb.0: 2539; PPC64LE-NEXT: lwsync 2540; PPC64LE-NEXT: .LBB148_1: 2541; PPC64LE-NEXT: lharx 5, 0, 3 2542; PPC64LE-NEXT: add 6, 4, 5 2543; PPC64LE-NEXT: sthcx. 6, 0, 3 2544; PPC64LE-NEXT: bne 0, .LBB148_1 2545; PPC64LE-NEXT: # %bb.2: 2546; PPC64LE-NEXT: mr 3, 5 2547; PPC64LE-NEXT: lwsync 2548; PPC64LE-NEXT: blr 2549 %ret = atomicrmw add i16* %ptr, i16 %val acq_rel 2550 ret i16 %ret 2551} 2552 2553define i16 @test149(i16* %ptr, i16 %val) { 2554; PPC64LE-LABEL: test149: 2555; PPC64LE: # %bb.0: 2556; PPC64LE-NEXT: sync 2557; PPC64LE-NEXT: .LBB149_1: 2558; PPC64LE-NEXT: lharx 5, 0, 3 2559; PPC64LE-NEXT: add 6, 4, 5 2560; PPC64LE-NEXT: sthcx. 6, 0, 3 2561; PPC64LE-NEXT: bne 0, .LBB149_1 2562; PPC64LE-NEXT: # %bb.2: 2563; PPC64LE-NEXT: mr 3, 5 2564; PPC64LE-NEXT: lwsync 2565; PPC64LE-NEXT: blr 2566 %ret = atomicrmw add i16* %ptr, i16 %val seq_cst 2567 ret i16 %ret 2568} 2569 2570define i32 @test150(i32* %ptr, i32 %val) { 2571; PPC64LE-LABEL: test150: 2572; PPC64LE: # %bb.0: 2573; PPC64LE-NEXT: .LBB150_1: 2574; PPC64LE-NEXT: lwarx 5, 0, 3 2575; PPC64LE-NEXT: add 6, 4, 5 2576; PPC64LE-NEXT: stwcx. 6, 0, 3 2577; PPC64LE-NEXT: bne 0, .LBB150_1 2578; PPC64LE-NEXT: # %bb.2: 2579; PPC64LE-NEXT: mr 3, 5 2580; PPC64LE-NEXT: blr 2581 %ret = atomicrmw add i32* %ptr, i32 %val monotonic 2582 ret i32 %ret 2583} 2584 2585define i32 @test151(i32* %ptr, i32 %val) { 2586; PPC64LE-LABEL: test151: 2587; PPC64LE: # %bb.0: 2588; PPC64LE-NEXT: mr 5, 3 2589; PPC64LE-NEXT: .LBB151_1: 2590; PPC64LE-NEXT: lwarx 3, 0, 5 2591; PPC64LE-NEXT: add 6, 4, 3 2592; PPC64LE-NEXT: stwcx. 6, 0, 5 2593; PPC64LE-NEXT: bne 0, .LBB151_1 2594; PPC64LE-NEXT: # %bb.2: 2595; PPC64LE-NEXT: lwsync 2596; PPC64LE-NEXT: blr 2597 %ret = atomicrmw add i32* %ptr, i32 %val acquire 2598 ret i32 %ret 2599} 2600 2601define i32 @test152(i32* %ptr, i32 %val) { 2602; PPC64LE-LABEL: test152: 2603; PPC64LE: # %bb.0: 2604; PPC64LE-NEXT: lwsync 2605; PPC64LE-NEXT: .LBB152_1: 2606; PPC64LE-NEXT: lwarx 5, 0, 3 2607; PPC64LE-NEXT: add 6, 4, 5 2608; PPC64LE-NEXT: stwcx. 6, 0, 3 2609; PPC64LE-NEXT: bne 0, .LBB152_1 2610; PPC64LE-NEXT: # %bb.2: 2611; PPC64LE-NEXT: mr 3, 5 2612; PPC64LE-NEXT: blr 2613 %ret = atomicrmw add i32* %ptr, i32 %val release 2614 ret i32 %ret 2615} 2616 2617define i32 @test153(i32* %ptr, i32 %val) { 2618; PPC64LE-LABEL: test153: 2619; PPC64LE: # %bb.0: 2620; PPC64LE-NEXT: lwsync 2621; PPC64LE-NEXT: .LBB153_1: 2622; PPC64LE-NEXT: lwarx 5, 0, 3 2623; PPC64LE-NEXT: add 6, 4, 5 2624; PPC64LE-NEXT: stwcx. 6, 0, 3 2625; PPC64LE-NEXT: bne 0, .LBB153_1 2626; PPC64LE-NEXT: # %bb.2: 2627; PPC64LE-NEXT: mr 3, 5 2628; PPC64LE-NEXT: lwsync 2629; PPC64LE-NEXT: blr 2630 %ret = atomicrmw add i32* %ptr, i32 %val acq_rel 2631 ret i32 %ret 2632} 2633 2634define i32 @test154(i32* %ptr, i32 %val) { 2635; PPC64LE-LABEL: test154: 2636; PPC64LE: # %bb.0: 2637; PPC64LE-NEXT: sync 2638; PPC64LE-NEXT: .LBB154_1: 2639; PPC64LE-NEXT: lwarx 5, 0, 3 2640; PPC64LE-NEXT: add 6, 4, 5 2641; PPC64LE-NEXT: stwcx. 6, 0, 3 2642; PPC64LE-NEXT: bne 0, .LBB154_1 2643; PPC64LE-NEXT: # %bb.2: 2644; PPC64LE-NEXT: mr 3, 5 2645; PPC64LE-NEXT: lwsync 2646; PPC64LE-NEXT: blr 2647 %ret = atomicrmw add i32* %ptr, i32 %val seq_cst 2648 ret i32 %ret 2649} 2650 2651define i64 @test155(i64* %ptr, i64 %val) { 2652; PPC64LE-LABEL: test155: 2653; PPC64LE: # %bb.0: 2654; PPC64LE-NEXT: .LBB155_1: 2655; PPC64LE-NEXT: ldarx 5, 0, 3 2656; PPC64LE-NEXT: add 6, 4, 5 2657; PPC64LE-NEXT: stdcx. 6, 0, 3 2658; PPC64LE-NEXT: bne 0, .LBB155_1 2659; PPC64LE-NEXT: # %bb.2: 2660; PPC64LE-NEXT: mr 3, 5 2661; PPC64LE-NEXT: blr 2662 %ret = atomicrmw add i64* %ptr, i64 %val monotonic 2663 ret i64 %ret 2664} 2665 2666define i64 @test156(i64* %ptr, i64 %val) { 2667; PPC64LE-LABEL: test156: 2668; PPC64LE: # %bb.0: 2669; PPC64LE-NEXT: mr 5, 3 2670; PPC64LE-NEXT: .LBB156_1: 2671; PPC64LE-NEXT: ldarx 3, 0, 5 2672; PPC64LE-NEXT: add 6, 4, 3 2673; PPC64LE-NEXT: stdcx. 6, 0, 5 2674; PPC64LE-NEXT: bne 0, .LBB156_1 2675; PPC64LE-NEXT: # %bb.2: 2676; PPC64LE-NEXT: lwsync 2677; PPC64LE-NEXT: blr 2678 %ret = atomicrmw add i64* %ptr, i64 %val acquire 2679 ret i64 %ret 2680} 2681 2682define i64 @test157(i64* %ptr, i64 %val) { 2683; PPC64LE-LABEL: test157: 2684; PPC64LE: # %bb.0: 2685; PPC64LE-NEXT: lwsync 2686; PPC64LE-NEXT: .LBB157_1: 2687; PPC64LE-NEXT: ldarx 5, 0, 3 2688; PPC64LE-NEXT: add 6, 4, 5 2689; PPC64LE-NEXT: stdcx. 6, 0, 3 2690; PPC64LE-NEXT: bne 0, .LBB157_1 2691; PPC64LE-NEXT: # %bb.2: 2692; PPC64LE-NEXT: mr 3, 5 2693; PPC64LE-NEXT: blr 2694 %ret = atomicrmw add i64* %ptr, i64 %val release 2695 ret i64 %ret 2696} 2697 2698define i64 @test158(i64* %ptr, i64 %val) { 2699; PPC64LE-LABEL: test158: 2700; PPC64LE: # %bb.0: 2701; PPC64LE-NEXT: lwsync 2702; PPC64LE-NEXT: .LBB158_1: 2703; PPC64LE-NEXT: ldarx 5, 0, 3 2704; PPC64LE-NEXT: add 6, 4, 5 2705; PPC64LE-NEXT: stdcx. 6, 0, 3 2706; PPC64LE-NEXT: bne 0, .LBB158_1 2707; PPC64LE-NEXT: # %bb.2: 2708; PPC64LE-NEXT: mr 3, 5 2709; PPC64LE-NEXT: lwsync 2710; PPC64LE-NEXT: blr 2711 %ret = atomicrmw add i64* %ptr, i64 %val acq_rel 2712 ret i64 %ret 2713} 2714 2715define i64 @test159(i64* %ptr, i64 %val) { 2716; PPC64LE-LABEL: test159: 2717; PPC64LE: # %bb.0: 2718; PPC64LE-NEXT: sync 2719; PPC64LE-NEXT: .LBB159_1: 2720; PPC64LE-NEXT: ldarx 5, 0, 3 2721; PPC64LE-NEXT: add 6, 4, 5 2722; PPC64LE-NEXT: stdcx. 6, 0, 3 2723; PPC64LE-NEXT: bne 0, .LBB159_1 2724; PPC64LE-NEXT: # %bb.2: 2725; PPC64LE-NEXT: mr 3, 5 2726; PPC64LE-NEXT: lwsync 2727; PPC64LE-NEXT: blr 2728 %ret = atomicrmw add i64* %ptr, i64 %val seq_cst 2729 ret i64 %ret 2730} 2731 2732define i8 @test160(i8* %ptr, i8 %val) { 2733; PPC64LE-LABEL: test160: 2734; PPC64LE: # %bb.0: 2735; PPC64LE-NEXT: .LBB160_1: 2736; PPC64LE-NEXT: lbarx 5, 0, 3 2737; PPC64LE-NEXT: sub 6, 5, 4 2738; PPC64LE-NEXT: stbcx. 6, 0, 3 2739; PPC64LE-NEXT: bne 0, .LBB160_1 2740; PPC64LE-NEXT: # %bb.2: 2741; PPC64LE-NEXT: mr 3, 5 2742; PPC64LE-NEXT: blr 2743 %ret = atomicrmw sub i8* %ptr, i8 %val monotonic 2744 ret i8 %ret 2745} 2746 2747define i8 @test161(i8* %ptr, i8 %val) { 2748; PPC64LE-LABEL: test161: 2749; PPC64LE: # %bb.0: 2750; PPC64LE-NEXT: mr 5, 3 2751; PPC64LE-NEXT: .LBB161_1: 2752; PPC64LE-NEXT: lbarx 3, 0, 5 2753; PPC64LE-NEXT: sub 6, 3, 4 2754; PPC64LE-NEXT: stbcx. 6, 0, 5 2755; PPC64LE-NEXT: bne 0, .LBB161_1 2756; PPC64LE-NEXT: # %bb.2: 2757; PPC64LE-NEXT: lwsync 2758; PPC64LE-NEXT: blr 2759 %ret = atomicrmw sub i8* %ptr, i8 %val acquire 2760 ret i8 %ret 2761} 2762 2763define i8 @test162(i8* %ptr, i8 %val) { 2764; PPC64LE-LABEL: test162: 2765; PPC64LE: # %bb.0: 2766; PPC64LE-NEXT: lwsync 2767; PPC64LE-NEXT: .LBB162_1: 2768; PPC64LE-NEXT: lbarx 5, 0, 3 2769; PPC64LE-NEXT: sub 6, 5, 4 2770; PPC64LE-NEXT: stbcx. 6, 0, 3 2771; PPC64LE-NEXT: bne 0, .LBB162_1 2772; PPC64LE-NEXT: # %bb.2: 2773; PPC64LE-NEXT: mr 3, 5 2774; PPC64LE-NEXT: blr 2775 %ret = atomicrmw sub i8* %ptr, i8 %val release 2776 ret i8 %ret 2777} 2778 2779define i8 @test163(i8* %ptr, i8 %val) { 2780; PPC64LE-LABEL: test163: 2781; PPC64LE: # %bb.0: 2782; PPC64LE-NEXT: lwsync 2783; PPC64LE-NEXT: .LBB163_1: 2784; PPC64LE-NEXT: lbarx 5, 0, 3 2785; PPC64LE-NEXT: sub 6, 5, 4 2786; PPC64LE-NEXT: stbcx. 6, 0, 3 2787; PPC64LE-NEXT: bne 0, .LBB163_1 2788; PPC64LE-NEXT: # %bb.2: 2789; PPC64LE-NEXT: mr 3, 5 2790; PPC64LE-NEXT: lwsync 2791; PPC64LE-NEXT: blr 2792 %ret = atomicrmw sub i8* %ptr, i8 %val acq_rel 2793 ret i8 %ret 2794} 2795 2796define i8 @test164(i8* %ptr, i8 %val) { 2797; PPC64LE-LABEL: test164: 2798; PPC64LE: # %bb.0: 2799; PPC64LE-NEXT: sync 2800; PPC64LE-NEXT: .LBB164_1: 2801; PPC64LE-NEXT: lbarx 5, 0, 3 2802; PPC64LE-NEXT: sub 6, 5, 4 2803; PPC64LE-NEXT: stbcx. 6, 0, 3 2804; PPC64LE-NEXT: bne 0, .LBB164_1 2805; PPC64LE-NEXT: # %bb.2: 2806; PPC64LE-NEXT: mr 3, 5 2807; PPC64LE-NEXT: lwsync 2808; PPC64LE-NEXT: blr 2809 %ret = atomicrmw sub i8* %ptr, i8 %val seq_cst 2810 ret i8 %ret 2811} 2812 2813define i16 @test165(i16* %ptr, i16 %val) { 2814; PPC64LE-LABEL: test165: 2815; PPC64LE: # %bb.0: 2816; PPC64LE-NEXT: .LBB165_1: 2817; PPC64LE-NEXT: lharx 5, 0, 3 2818; PPC64LE-NEXT: sub 6, 5, 4 2819; PPC64LE-NEXT: sthcx. 6, 0, 3 2820; PPC64LE-NEXT: bne 0, .LBB165_1 2821; PPC64LE-NEXT: # %bb.2: 2822; PPC64LE-NEXT: mr 3, 5 2823; PPC64LE-NEXT: blr 2824 %ret = atomicrmw sub i16* %ptr, i16 %val monotonic 2825 ret i16 %ret 2826} 2827 2828define i16 @test166(i16* %ptr, i16 %val) { 2829; PPC64LE-LABEL: test166: 2830; PPC64LE: # %bb.0: 2831; PPC64LE-NEXT: mr 5, 3 2832; PPC64LE-NEXT: .LBB166_1: 2833; PPC64LE-NEXT: lharx 3, 0, 5 2834; PPC64LE-NEXT: sub 6, 3, 4 2835; PPC64LE-NEXT: sthcx. 6, 0, 5 2836; PPC64LE-NEXT: bne 0, .LBB166_1 2837; PPC64LE-NEXT: # %bb.2: 2838; PPC64LE-NEXT: lwsync 2839; PPC64LE-NEXT: blr 2840 %ret = atomicrmw sub i16* %ptr, i16 %val acquire 2841 ret i16 %ret 2842} 2843 2844define i16 @test167(i16* %ptr, i16 %val) { 2845; PPC64LE-LABEL: test167: 2846; PPC64LE: # %bb.0: 2847; PPC64LE-NEXT: lwsync 2848; PPC64LE-NEXT: .LBB167_1: 2849; PPC64LE-NEXT: lharx 5, 0, 3 2850; PPC64LE-NEXT: sub 6, 5, 4 2851; PPC64LE-NEXT: sthcx. 6, 0, 3 2852; PPC64LE-NEXT: bne 0, .LBB167_1 2853; PPC64LE-NEXT: # %bb.2: 2854; PPC64LE-NEXT: mr 3, 5 2855; PPC64LE-NEXT: blr 2856 %ret = atomicrmw sub i16* %ptr, i16 %val release 2857 ret i16 %ret 2858} 2859 2860define i16 @test168(i16* %ptr, i16 %val) { 2861; PPC64LE-LABEL: test168: 2862; PPC64LE: # %bb.0: 2863; PPC64LE-NEXT: lwsync 2864; PPC64LE-NEXT: .LBB168_1: 2865; PPC64LE-NEXT: lharx 5, 0, 3 2866; PPC64LE-NEXT: sub 6, 5, 4 2867; PPC64LE-NEXT: sthcx. 6, 0, 3 2868; PPC64LE-NEXT: bne 0, .LBB168_1 2869; PPC64LE-NEXT: # %bb.2: 2870; PPC64LE-NEXT: mr 3, 5 2871; PPC64LE-NEXT: lwsync 2872; PPC64LE-NEXT: blr 2873 %ret = atomicrmw sub i16* %ptr, i16 %val acq_rel 2874 ret i16 %ret 2875} 2876 2877define i16 @test169(i16* %ptr, i16 %val) { 2878; PPC64LE-LABEL: test169: 2879; PPC64LE: # %bb.0: 2880; PPC64LE-NEXT: sync 2881; PPC64LE-NEXT: .LBB169_1: 2882; PPC64LE-NEXT: lharx 5, 0, 3 2883; PPC64LE-NEXT: sub 6, 5, 4 2884; PPC64LE-NEXT: sthcx. 6, 0, 3 2885; PPC64LE-NEXT: bne 0, .LBB169_1 2886; PPC64LE-NEXT: # %bb.2: 2887; PPC64LE-NEXT: mr 3, 5 2888; PPC64LE-NEXT: lwsync 2889; PPC64LE-NEXT: blr 2890 %ret = atomicrmw sub i16* %ptr, i16 %val seq_cst 2891 ret i16 %ret 2892} 2893 2894define i32 @test170(i32* %ptr, i32 %val) { 2895; PPC64LE-LABEL: test170: 2896; PPC64LE: # %bb.0: 2897; PPC64LE-NEXT: .LBB170_1: 2898; PPC64LE-NEXT: lwarx 5, 0, 3 2899; PPC64LE-NEXT: sub 6, 5, 4 2900; PPC64LE-NEXT: stwcx. 6, 0, 3 2901; PPC64LE-NEXT: bne 0, .LBB170_1 2902; PPC64LE-NEXT: # %bb.2: 2903; PPC64LE-NEXT: mr 3, 5 2904; PPC64LE-NEXT: blr 2905 %ret = atomicrmw sub i32* %ptr, i32 %val monotonic 2906 ret i32 %ret 2907} 2908 2909define i32 @test171(i32* %ptr, i32 %val) { 2910; PPC64LE-LABEL: test171: 2911; PPC64LE: # %bb.0: 2912; PPC64LE-NEXT: mr 5, 3 2913; PPC64LE-NEXT: .LBB171_1: 2914; PPC64LE-NEXT: lwarx 3, 0, 5 2915; PPC64LE-NEXT: sub 6, 3, 4 2916; PPC64LE-NEXT: stwcx. 6, 0, 5 2917; PPC64LE-NEXT: bne 0, .LBB171_1 2918; PPC64LE-NEXT: # %bb.2: 2919; PPC64LE-NEXT: lwsync 2920; PPC64LE-NEXT: blr 2921 %ret = atomicrmw sub i32* %ptr, i32 %val acquire 2922 ret i32 %ret 2923} 2924 2925define i32 @test172(i32* %ptr, i32 %val) { 2926; PPC64LE-LABEL: test172: 2927; PPC64LE: # %bb.0: 2928; PPC64LE-NEXT: lwsync 2929; PPC64LE-NEXT: .LBB172_1: 2930; PPC64LE-NEXT: lwarx 5, 0, 3 2931; PPC64LE-NEXT: sub 6, 5, 4 2932; PPC64LE-NEXT: stwcx. 6, 0, 3 2933; PPC64LE-NEXT: bne 0, .LBB172_1 2934; PPC64LE-NEXT: # %bb.2: 2935; PPC64LE-NEXT: mr 3, 5 2936; PPC64LE-NEXT: blr 2937 %ret = atomicrmw sub i32* %ptr, i32 %val release 2938 ret i32 %ret 2939} 2940 2941define i32 @test173(i32* %ptr, i32 %val) { 2942; PPC64LE-LABEL: test173: 2943; PPC64LE: # %bb.0: 2944; PPC64LE-NEXT: lwsync 2945; PPC64LE-NEXT: .LBB173_1: 2946; PPC64LE-NEXT: lwarx 5, 0, 3 2947; PPC64LE-NEXT: sub 6, 5, 4 2948; PPC64LE-NEXT: stwcx. 6, 0, 3 2949; PPC64LE-NEXT: bne 0, .LBB173_1 2950; PPC64LE-NEXT: # %bb.2: 2951; PPC64LE-NEXT: mr 3, 5 2952; PPC64LE-NEXT: lwsync 2953; PPC64LE-NEXT: blr 2954 %ret = atomicrmw sub i32* %ptr, i32 %val acq_rel 2955 ret i32 %ret 2956} 2957 2958define i32 @test174(i32* %ptr, i32 %val) { 2959; PPC64LE-LABEL: test174: 2960; PPC64LE: # %bb.0: 2961; PPC64LE-NEXT: sync 2962; PPC64LE-NEXT: .LBB174_1: 2963; PPC64LE-NEXT: lwarx 5, 0, 3 2964; PPC64LE-NEXT: sub 6, 5, 4 2965; PPC64LE-NEXT: stwcx. 6, 0, 3 2966; PPC64LE-NEXT: bne 0, .LBB174_1 2967; PPC64LE-NEXT: # %bb.2: 2968; PPC64LE-NEXT: mr 3, 5 2969; PPC64LE-NEXT: lwsync 2970; PPC64LE-NEXT: blr 2971 %ret = atomicrmw sub i32* %ptr, i32 %val seq_cst 2972 ret i32 %ret 2973} 2974 2975define i64 @test175(i64* %ptr, i64 %val) { 2976; PPC64LE-LABEL: test175: 2977; PPC64LE: # %bb.0: 2978; PPC64LE-NEXT: .LBB175_1: 2979; PPC64LE-NEXT: ldarx 5, 0, 3 2980; PPC64LE-NEXT: sub 6, 5, 4 2981; PPC64LE-NEXT: stdcx. 6, 0, 3 2982; PPC64LE-NEXT: bne 0, .LBB175_1 2983; PPC64LE-NEXT: # %bb.2: 2984; PPC64LE-NEXT: mr 3, 5 2985; PPC64LE-NEXT: blr 2986 %ret = atomicrmw sub i64* %ptr, i64 %val monotonic 2987 ret i64 %ret 2988} 2989 2990define i64 @test176(i64* %ptr, i64 %val) { 2991; PPC64LE-LABEL: test176: 2992; PPC64LE: # %bb.0: 2993; PPC64LE-NEXT: mr 5, 3 2994; PPC64LE-NEXT: .LBB176_1: 2995; PPC64LE-NEXT: ldarx 3, 0, 5 2996; PPC64LE-NEXT: sub 6, 3, 4 2997; PPC64LE-NEXT: stdcx. 6, 0, 5 2998; PPC64LE-NEXT: bne 0, .LBB176_1 2999; PPC64LE-NEXT: # %bb.2: 3000; PPC64LE-NEXT: lwsync 3001; PPC64LE-NEXT: blr 3002 %ret = atomicrmw sub i64* %ptr, i64 %val acquire 3003 ret i64 %ret 3004} 3005 3006define i64 @test177(i64* %ptr, i64 %val) { 3007; PPC64LE-LABEL: test177: 3008; PPC64LE: # %bb.0: 3009; PPC64LE-NEXT: lwsync 3010; PPC64LE-NEXT: .LBB177_1: 3011; PPC64LE-NEXT: ldarx 5, 0, 3 3012; PPC64LE-NEXT: sub 6, 5, 4 3013; PPC64LE-NEXT: stdcx. 6, 0, 3 3014; PPC64LE-NEXT: bne 0, .LBB177_1 3015; PPC64LE-NEXT: # %bb.2: 3016; PPC64LE-NEXT: mr 3, 5 3017; PPC64LE-NEXT: blr 3018 %ret = atomicrmw sub i64* %ptr, i64 %val release 3019 ret i64 %ret 3020} 3021 3022define i64 @test178(i64* %ptr, i64 %val) { 3023; PPC64LE-LABEL: test178: 3024; PPC64LE: # %bb.0: 3025; PPC64LE-NEXT: lwsync 3026; PPC64LE-NEXT: .LBB178_1: 3027; PPC64LE-NEXT: ldarx 5, 0, 3 3028; PPC64LE-NEXT: sub 6, 5, 4 3029; PPC64LE-NEXT: stdcx. 6, 0, 3 3030; PPC64LE-NEXT: bne 0, .LBB178_1 3031; PPC64LE-NEXT: # %bb.2: 3032; PPC64LE-NEXT: mr 3, 5 3033; PPC64LE-NEXT: lwsync 3034; PPC64LE-NEXT: blr 3035 %ret = atomicrmw sub i64* %ptr, i64 %val acq_rel 3036 ret i64 %ret 3037} 3038 3039define i64 @test179(i64* %ptr, i64 %val) { 3040; PPC64LE-LABEL: test179: 3041; PPC64LE: # %bb.0: 3042; PPC64LE-NEXT: sync 3043; PPC64LE-NEXT: .LBB179_1: 3044; PPC64LE-NEXT: ldarx 5, 0, 3 3045; PPC64LE-NEXT: sub 6, 5, 4 3046; PPC64LE-NEXT: stdcx. 6, 0, 3 3047; PPC64LE-NEXT: bne 0, .LBB179_1 3048; PPC64LE-NEXT: # %bb.2: 3049; PPC64LE-NEXT: mr 3, 5 3050; PPC64LE-NEXT: lwsync 3051; PPC64LE-NEXT: blr 3052 %ret = atomicrmw sub i64* %ptr, i64 %val seq_cst 3053 ret i64 %ret 3054} 3055 3056define i8 @test180(i8* %ptr, i8 %val) { 3057; PPC64LE-LABEL: test180: 3058; PPC64LE: # %bb.0: 3059; PPC64LE-NEXT: .LBB180_1: 3060; PPC64LE-NEXT: lbarx 5, 0, 3 3061; PPC64LE-NEXT: and 6, 4, 5 3062; PPC64LE-NEXT: stbcx. 6, 0, 3 3063; PPC64LE-NEXT: bne 0, .LBB180_1 3064; PPC64LE-NEXT: # %bb.2: 3065; PPC64LE-NEXT: mr 3, 5 3066; PPC64LE-NEXT: blr 3067 %ret = atomicrmw and i8* %ptr, i8 %val monotonic 3068 ret i8 %ret 3069} 3070 3071define i8 @test181(i8* %ptr, i8 %val) { 3072; PPC64LE-LABEL: test181: 3073; PPC64LE: # %bb.0: 3074; PPC64LE-NEXT: mr 5, 3 3075; PPC64LE-NEXT: .LBB181_1: 3076; PPC64LE-NEXT: lbarx 3, 0, 5 3077; PPC64LE-NEXT: and 6, 4, 3 3078; PPC64LE-NEXT: stbcx. 6, 0, 5 3079; PPC64LE-NEXT: bne 0, .LBB181_1 3080; PPC64LE-NEXT: # %bb.2: 3081; PPC64LE-NEXT: lwsync 3082; PPC64LE-NEXT: blr 3083 %ret = atomicrmw and i8* %ptr, i8 %val acquire 3084 ret i8 %ret 3085} 3086 3087define i8 @test182(i8* %ptr, i8 %val) { 3088; PPC64LE-LABEL: test182: 3089; PPC64LE: # %bb.0: 3090; PPC64LE-NEXT: lwsync 3091; PPC64LE-NEXT: .LBB182_1: 3092; PPC64LE-NEXT: lbarx 5, 0, 3 3093; PPC64LE-NEXT: and 6, 4, 5 3094; PPC64LE-NEXT: stbcx. 6, 0, 3 3095; PPC64LE-NEXT: bne 0, .LBB182_1 3096; PPC64LE-NEXT: # %bb.2: 3097; PPC64LE-NEXT: mr 3, 5 3098; PPC64LE-NEXT: blr 3099 %ret = atomicrmw and i8* %ptr, i8 %val release 3100 ret i8 %ret 3101} 3102 3103define i8 @test183(i8* %ptr, i8 %val) { 3104; PPC64LE-LABEL: test183: 3105; PPC64LE: # %bb.0: 3106; PPC64LE-NEXT: lwsync 3107; PPC64LE-NEXT: .LBB183_1: 3108; PPC64LE-NEXT: lbarx 5, 0, 3 3109; PPC64LE-NEXT: and 6, 4, 5 3110; PPC64LE-NEXT: stbcx. 6, 0, 3 3111; PPC64LE-NEXT: bne 0, .LBB183_1 3112; PPC64LE-NEXT: # %bb.2: 3113; PPC64LE-NEXT: mr 3, 5 3114; PPC64LE-NEXT: lwsync 3115; PPC64LE-NEXT: blr 3116 %ret = atomicrmw and i8* %ptr, i8 %val acq_rel 3117 ret i8 %ret 3118} 3119 3120define i8 @test184(i8* %ptr, i8 %val) { 3121; PPC64LE-LABEL: test184: 3122; PPC64LE: # %bb.0: 3123; PPC64LE-NEXT: sync 3124; PPC64LE-NEXT: .LBB184_1: 3125; PPC64LE-NEXT: lbarx 5, 0, 3 3126; PPC64LE-NEXT: and 6, 4, 5 3127; PPC64LE-NEXT: stbcx. 6, 0, 3 3128; PPC64LE-NEXT: bne 0, .LBB184_1 3129; PPC64LE-NEXT: # %bb.2: 3130; PPC64LE-NEXT: mr 3, 5 3131; PPC64LE-NEXT: lwsync 3132; PPC64LE-NEXT: blr 3133 %ret = atomicrmw and i8* %ptr, i8 %val seq_cst 3134 ret i8 %ret 3135} 3136 3137define i16 @test185(i16* %ptr, i16 %val) { 3138; PPC64LE-LABEL: test185: 3139; PPC64LE: # %bb.0: 3140; PPC64LE-NEXT: .LBB185_1: 3141; PPC64LE-NEXT: lharx 5, 0, 3 3142; PPC64LE-NEXT: and 6, 4, 5 3143; PPC64LE-NEXT: sthcx. 6, 0, 3 3144; PPC64LE-NEXT: bne 0, .LBB185_1 3145; PPC64LE-NEXT: # %bb.2: 3146; PPC64LE-NEXT: mr 3, 5 3147; PPC64LE-NEXT: blr 3148 %ret = atomicrmw and i16* %ptr, i16 %val monotonic 3149 ret i16 %ret 3150} 3151 3152define i16 @test186(i16* %ptr, i16 %val) { 3153; PPC64LE-LABEL: test186: 3154; PPC64LE: # %bb.0: 3155; PPC64LE-NEXT: mr 5, 3 3156; PPC64LE-NEXT: .LBB186_1: 3157; PPC64LE-NEXT: lharx 3, 0, 5 3158; PPC64LE-NEXT: and 6, 4, 3 3159; PPC64LE-NEXT: sthcx. 6, 0, 5 3160; PPC64LE-NEXT: bne 0, .LBB186_1 3161; PPC64LE-NEXT: # %bb.2: 3162; PPC64LE-NEXT: lwsync 3163; PPC64LE-NEXT: blr 3164 %ret = atomicrmw and i16* %ptr, i16 %val acquire 3165 ret i16 %ret 3166} 3167 3168define i16 @test187(i16* %ptr, i16 %val) { 3169; PPC64LE-LABEL: test187: 3170; PPC64LE: # %bb.0: 3171; PPC64LE-NEXT: lwsync 3172; PPC64LE-NEXT: .LBB187_1: 3173; PPC64LE-NEXT: lharx 5, 0, 3 3174; PPC64LE-NEXT: and 6, 4, 5 3175; PPC64LE-NEXT: sthcx. 6, 0, 3 3176; PPC64LE-NEXT: bne 0, .LBB187_1 3177; PPC64LE-NEXT: # %bb.2: 3178; PPC64LE-NEXT: mr 3, 5 3179; PPC64LE-NEXT: blr 3180 %ret = atomicrmw and i16* %ptr, i16 %val release 3181 ret i16 %ret 3182} 3183 3184define i16 @test188(i16* %ptr, i16 %val) { 3185; PPC64LE-LABEL: test188: 3186; PPC64LE: # %bb.0: 3187; PPC64LE-NEXT: lwsync 3188; PPC64LE-NEXT: .LBB188_1: 3189; PPC64LE-NEXT: lharx 5, 0, 3 3190; PPC64LE-NEXT: and 6, 4, 5 3191; PPC64LE-NEXT: sthcx. 6, 0, 3 3192; PPC64LE-NEXT: bne 0, .LBB188_1 3193; PPC64LE-NEXT: # %bb.2: 3194; PPC64LE-NEXT: mr 3, 5 3195; PPC64LE-NEXT: lwsync 3196; PPC64LE-NEXT: blr 3197 %ret = atomicrmw and i16* %ptr, i16 %val acq_rel 3198 ret i16 %ret 3199} 3200 3201define i16 @test189(i16* %ptr, i16 %val) { 3202; PPC64LE-LABEL: test189: 3203; PPC64LE: # %bb.0: 3204; PPC64LE-NEXT: sync 3205; PPC64LE-NEXT: .LBB189_1: 3206; PPC64LE-NEXT: lharx 5, 0, 3 3207; PPC64LE-NEXT: and 6, 4, 5 3208; PPC64LE-NEXT: sthcx. 6, 0, 3 3209; PPC64LE-NEXT: bne 0, .LBB189_1 3210; PPC64LE-NEXT: # %bb.2: 3211; PPC64LE-NEXT: mr 3, 5 3212; PPC64LE-NEXT: lwsync 3213; PPC64LE-NEXT: blr 3214 %ret = atomicrmw and i16* %ptr, i16 %val seq_cst 3215 ret i16 %ret 3216} 3217 3218define i32 @test190(i32* %ptr, i32 %val) { 3219; PPC64LE-LABEL: test190: 3220; PPC64LE: # %bb.0: 3221; PPC64LE-NEXT: .LBB190_1: 3222; PPC64LE-NEXT: lwarx 5, 0, 3 3223; PPC64LE-NEXT: and 6, 4, 5 3224; PPC64LE-NEXT: stwcx. 6, 0, 3 3225; PPC64LE-NEXT: bne 0, .LBB190_1 3226; PPC64LE-NEXT: # %bb.2: 3227; PPC64LE-NEXT: mr 3, 5 3228; PPC64LE-NEXT: blr 3229 %ret = atomicrmw and i32* %ptr, i32 %val monotonic 3230 ret i32 %ret 3231} 3232 3233define i32 @test191(i32* %ptr, i32 %val) { 3234; PPC64LE-LABEL: test191: 3235; PPC64LE: # %bb.0: 3236; PPC64LE-NEXT: mr 5, 3 3237; PPC64LE-NEXT: .LBB191_1: 3238; PPC64LE-NEXT: lwarx 3, 0, 5 3239; PPC64LE-NEXT: and 6, 4, 3 3240; PPC64LE-NEXT: stwcx. 6, 0, 5 3241; PPC64LE-NEXT: bne 0, .LBB191_1 3242; PPC64LE-NEXT: # %bb.2: 3243; PPC64LE-NEXT: lwsync 3244; PPC64LE-NEXT: blr 3245 %ret = atomicrmw and i32* %ptr, i32 %val acquire 3246 ret i32 %ret 3247} 3248 3249define i32 @test192(i32* %ptr, i32 %val) { 3250; PPC64LE-LABEL: test192: 3251; PPC64LE: # %bb.0: 3252; PPC64LE-NEXT: lwsync 3253; PPC64LE-NEXT: .LBB192_1: 3254; PPC64LE-NEXT: lwarx 5, 0, 3 3255; PPC64LE-NEXT: and 6, 4, 5 3256; PPC64LE-NEXT: stwcx. 6, 0, 3 3257; PPC64LE-NEXT: bne 0, .LBB192_1 3258; PPC64LE-NEXT: # %bb.2: 3259; PPC64LE-NEXT: mr 3, 5 3260; PPC64LE-NEXT: blr 3261 %ret = atomicrmw and i32* %ptr, i32 %val release 3262 ret i32 %ret 3263} 3264 3265define i32 @test193(i32* %ptr, i32 %val) { 3266; PPC64LE-LABEL: test193: 3267; PPC64LE: # %bb.0: 3268; PPC64LE-NEXT: lwsync 3269; PPC64LE-NEXT: .LBB193_1: 3270; PPC64LE-NEXT: lwarx 5, 0, 3 3271; PPC64LE-NEXT: and 6, 4, 5 3272; PPC64LE-NEXT: stwcx. 6, 0, 3 3273; PPC64LE-NEXT: bne 0, .LBB193_1 3274; PPC64LE-NEXT: # %bb.2: 3275; PPC64LE-NEXT: mr 3, 5 3276; PPC64LE-NEXT: lwsync 3277; PPC64LE-NEXT: blr 3278 %ret = atomicrmw and i32* %ptr, i32 %val acq_rel 3279 ret i32 %ret 3280} 3281 3282define i32 @test194(i32* %ptr, i32 %val) { 3283; PPC64LE-LABEL: test194: 3284; PPC64LE: # %bb.0: 3285; PPC64LE-NEXT: sync 3286; PPC64LE-NEXT: .LBB194_1: 3287; PPC64LE-NEXT: lwarx 5, 0, 3 3288; PPC64LE-NEXT: and 6, 4, 5 3289; PPC64LE-NEXT: stwcx. 6, 0, 3 3290; PPC64LE-NEXT: bne 0, .LBB194_1 3291; PPC64LE-NEXT: # %bb.2: 3292; PPC64LE-NEXT: mr 3, 5 3293; PPC64LE-NEXT: lwsync 3294; PPC64LE-NEXT: blr 3295 %ret = atomicrmw and i32* %ptr, i32 %val seq_cst 3296 ret i32 %ret 3297} 3298 3299define i64 @test195(i64* %ptr, i64 %val) { 3300; PPC64LE-LABEL: test195: 3301; PPC64LE: # %bb.0: 3302; PPC64LE-NEXT: .LBB195_1: 3303; PPC64LE-NEXT: ldarx 5, 0, 3 3304; PPC64LE-NEXT: and 6, 4, 5 3305; PPC64LE-NEXT: stdcx. 6, 0, 3 3306; PPC64LE-NEXT: bne 0, .LBB195_1 3307; PPC64LE-NEXT: # %bb.2: 3308; PPC64LE-NEXT: mr 3, 5 3309; PPC64LE-NEXT: blr 3310 %ret = atomicrmw and i64* %ptr, i64 %val monotonic 3311 ret i64 %ret 3312} 3313 3314define i64 @test196(i64* %ptr, i64 %val) { 3315; PPC64LE-LABEL: test196: 3316; PPC64LE: # %bb.0: 3317; PPC64LE-NEXT: mr 5, 3 3318; PPC64LE-NEXT: .LBB196_1: 3319; PPC64LE-NEXT: ldarx 3, 0, 5 3320; PPC64LE-NEXT: and 6, 4, 3 3321; PPC64LE-NEXT: stdcx. 6, 0, 5 3322; PPC64LE-NEXT: bne 0, .LBB196_1 3323; PPC64LE-NEXT: # %bb.2: 3324; PPC64LE-NEXT: lwsync 3325; PPC64LE-NEXT: blr 3326 %ret = atomicrmw and i64* %ptr, i64 %val acquire 3327 ret i64 %ret 3328} 3329 3330define i64 @test197(i64* %ptr, i64 %val) { 3331; PPC64LE-LABEL: test197: 3332; PPC64LE: # %bb.0: 3333; PPC64LE-NEXT: lwsync 3334; PPC64LE-NEXT: .LBB197_1: 3335; PPC64LE-NEXT: ldarx 5, 0, 3 3336; PPC64LE-NEXT: and 6, 4, 5 3337; PPC64LE-NEXT: stdcx. 6, 0, 3 3338; PPC64LE-NEXT: bne 0, .LBB197_1 3339; PPC64LE-NEXT: # %bb.2: 3340; PPC64LE-NEXT: mr 3, 5 3341; PPC64LE-NEXT: blr 3342 %ret = atomicrmw and i64* %ptr, i64 %val release 3343 ret i64 %ret 3344} 3345 3346define i64 @test198(i64* %ptr, i64 %val) { 3347; PPC64LE-LABEL: test198: 3348; PPC64LE: # %bb.0: 3349; PPC64LE-NEXT: lwsync 3350; PPC64LE-NEXT: .LBB198_1: 3351; PPC64LE-NEXT: ldarx 5, 0, 3 3352; PPC64LE-NEXT: and 6, 4, 5 3353; PPC64LE-NEXT: stdcx. 6, 0, 3 3354; PPC64LE-NEXT: bne 0, .LBB198_1 3355; PPC64LE-NEXT: # %bb.2: 3356; PPC64LE-NEXT: mr 3, 5 3357; PPC64LE-NEXT: lwsync 3358; PPC64LE-NEXT: blr 3359 %ret = atomicrmw and i64* %ptr, i64 %val acq_rel 3360 ret i64 %ret 3361} 3362 3363define i64 @test199(i64* %ptr, i64 %val) { 3364; PPC64LE-LABEL: test199: 3365; PPC64LE: # %bb.0: 3366; PPC64LE-NEXT: sync 3367; PPC64LE-NEXT: .LBB199_1: 3368; PPC64LE-NEXT: ldarx 5, 0, 3 3369; PPC64LE-NEXT: and 6, 4, 5 3370; PPC64LE-NEXT: stdcx. 6, 0, 3 3371; PPC64LE-NEXT: bne 0, .LBB199_1 3372; PPC64LE-NEXT: # %bb.2: 3373; PPC64LE-NEXT: mr 3, 5 3374; PPC64LE-NEXT: lwsync 3375; PPC64LE-NEXT: blr 3376 %ret = atomicrmw and i64* %ptr, i64 %val seq_cst 3377 ret i64 %ret 3378} 3379 3380define i8 @test200(i8* %ptr, i8 %val) { 3381; PPC64LE-LABEL: test200: 3382; PPC64LE: # %bb.0: 3383; PPC64LE-NEXT: .LBB200_1: 3384; PPC64LE-NEXT: lbarx 5, 0, 3 3385; PPC64LE-NEXT: nand 6, 4, 5 3386; PPC64LE-NEXT: stbcx. 6, 0, 3 3387; PPC64LE-NEXT: bne 0, .LBB200_1 3388; PPC64LE-NEXT: # %bb.2: 3389; PPC64LE-NEXT: mr 3, 5 3390; PPC64LE-NEXT: blr 3391 %ret = atomicrmw nand i8* %ptr, i8 %val monotonic 3392 ret i8 %ret 3393} 3394 3395define i8 @test201(i8* %ptr, i8 %val) { 3396; PPC64LE-LABEL: test201: 3397; PPC64LE: # %bb.0: 3398; PPC64LE-NEXT: mr 5, 3 3399; PPC64LE-NEXT: .LBB201_1: 3400; PPC64LE-NEXT: lbarx 3, 0, 5 3401; PPC64LE-NEXT: nand 6, 4, 3 3402; PPC64LE-NEXT: stbcx. 6, 0, 5 3403; PPC64LE-NEXT: bne 0, .LBB201_1 3404; PPC64LE-NEXT: # %bb.2: 3405; PPC64LE-NEXT: lwsync 3406; PPC64LE-NEXT: blr 3407 %ret = atomicrmw nand i8* %ptr, i8 %val acquire 3408 ret i8 %ret 3409} 3410 3411define i8 @test202(i8* %ptr, i8 %val) { 3412; PPC64LE-LABEL: test202: 3413; PPC64LE: # %bb.0: 3414; PPC64LE-NEXT: lwsync 3415; PPC64LE-NEXT: .LBB202_1: 3416; PPC64LE-NEXT: lbarx 5, 0, 3 3417; PPC64LE-NEXT: nand 6, 4, 5 3418; PPC64LE-NEXT: stbcx. 6, 0, 3 3419; PPC64LE-NEXT: bne 0, .LBB202_1 3420; PPC64LE-NEXT: # %bb.2: 3421; PPC64LE-NEXT: mr 3, 5 3422; PPC64LE-NEXT: blr 3423 %ret = atomicrmw nand i8* %ptr, i8 %val release 3424 ret i8 %ret 3425} 3426 3427define i8 @test203(i8* %ptr, i8 %val) { 3428; PPC64LE-LABEL: test203: 3429; PPC64LE: # %bb.0: 3430; PPC64LE-NEXT: lwsync 3431; PPC64LE-NEXT: .LBB203_1: 3432; PPC64LE-NEXT: lbarx 5, 0, 3 3433; PPC64LE-NEXT: nand 6, 4, 5 3434; PPC64LE-NEXT: stbcx. 6, 0, 3 3435; PPC64LE-NEXT: bne 0, .LBB203_1 3436; PPC64LE-NEXT: # %bb.2: 3437; PPC64LE-NEXT: mr 3, 5 3438; PPC64LE-NEXT: lwsync 3439; PPC64LE-NEXT: blr 3440 %ret = atomicrmw nand i8* %ptr, i8 %val acq_rel 3441 ret i8 %ret 3442} 3443 3444define i8 @test204(i8* %ptr, i8 %val) { 3445; PPC64LE-LABEL: test204: 3446; PPC64LE: # %bb.0: 3447; PPC64LE-NEXT: sync 3448; PPC64LE-NEXT: .LBB204_1: 3449; PPC64LE-NEXT: lbarx 5, 0, 3 3450; PPC64LE-NEXT: nand 6, 4, 5 3451; PPC64LE-NEXT: stbcx. 6, 0, 3 3452; PPC64LE-NEXT: bne 0, .LBB204_1 3453; PPC64LE-NEXT: # %bb.2: 3454; PPC64LE-NEXT: mr 3, 5 3455; PPC64LE-NEXT: lwsync 3456; PPC64LE-NEXT: blr 3457 %ret = atomicrmw nand i8* %ptr, i8 %val seq_cst 3458 ret i8 %ret 3459} 3460 3461define i16 @test205(i16* %ptr, i16 %val) { 3462; PPC64LE-LABEL: test205: 3463; PPC64LE: # %bb.0: 3464; PPC64LE-NEXT: .LBB205_1: 3465; PPC64LE-NEXT: lharx 5, 0, 3 3466; PPC64LE-NEXT: nand 6, 4, 5 3467; PPC64LE-NEXT: sthcx. 6, 0, 3 3468; PPC64LE-NEXT: bne 0, .LBB205_1 3469; PPC64LE-NEXT: # %bb.2: 3470; PPC64LE-NEXT: mr 3, 5 3471; PPC64LE-NEXT: blr 3472 %ret = atomicrmw nand i16* %ptr, i16 %val monotonic 3473 ret i16 %ret 3474} 3475 3476define i16 @test206(i16* %ptr, i16 %val) { 3477; PPC64LE-LABEL: test206: 3478; PPC64LE: # %bb.0: 3479; PPC64LE-NEXT: mr 5, 3 3480; PPC64LE-NEXT: .LBB206_1: 3481; PPC64LE-NEXT: lharx 3, 0, 5 3482; PPC64LE-NEXT: nand 6, 4, 3 3483; PPC64LE-NEXT: sthcx. 6, 0, 5 3484; PPC64LE-NEXT: bne 0, .LBB206_1 3485; PPC64LE-NEXT: # %bb.2: 3486; PPC64LE-NEXT: lwsync 3487; PPC64LE-NEXT: blr 3488 %ret = atomicrmw nand i16* %ptr, i16 %val acquire 3489 ret i16 %ret 3490} 3491 3492define i16 @test207(i16* %ptr, i16 %val) { 3493; PPC64LE-LABEL: test207: 3494; PPC64LE: # %bb.0: 3495; PPC64LE-NEXT: lwsync 3496; PPC64LE-NEXT: .LBB207_1: 3497; PPC64LE-NEXT: lharx 5, 0, 3 3498; PPC64LE-NEXT: nand 6, 4, 5 3499; PPC64LE-NEXT: sthcx. 6, 0, 3 3500; PPC64LE-NEXT: bne 0, .LBB207_1 3501; PPC64LE-NEXT: # %bb.2: 3502; PPC64LE-NEXT: mr 3, 5 3503; PPC64LE-NEXT: blr 3504 %ret = atomicrmw nand i16* %ptr, i16 %val release 3505 ret i16 %ret 3506} 3507 3508define i16 @test208(i16* %ptr, i16 %val) { 3509; PPC64LE-LABEL: test208: 3510; PPC64LE: # %bb.0: 3511; PPC64LE-NEXT: lwsync 3512; PPC64LE-NEXT: .LBB208_1: 3513; PPC64LE-NEXT: lharx 5, 0, 3 3514; PPC64LE-NEXT: nand 6, 4, 5 3515; PPC64LE-NEXT: sthcx. 6, 0, 3 3516; PPC64LE-NEXT: bne 0, .LBB208_1 3517; PPC64LE-NEXT: # %bb.2: 3518; PPC64LE-NEXT: mr 3, 5 3519; PPC64LE-NEXT: lwsync 3520; PPC64LE-NEXT: blr 3521 %ret = atomicrmw nand i16* %ptr, i16 %val acq_rel 3522 ret i16 %ret 3523} 3524 3525define i16 @test209(i16* %ptr, i16 %val) { 3526; PPC64LE-LABEL: test209: 3527; PPC64LE: # %bb.0: 3528; PPC64LE-NEXT: sync 3529; PPC64LE-NEXT: .LBB209_1: 3530; PPC64LE-NEXT: lharx 5, 0, 3 3531; PPC64LE-NEXT: nand 6, 4, 5 3532; PPC64LE-NEXT: sthcx. 6, 0, 3 3533; PPC64LE-NEXT: bne 0, .LBB209_1 3534; PPC64LE-NEXT: # %bb.2: 3535; PPC64LE-NEXT: mr 3, 5 3536; PPC64LE-NEXT: lwsync 3537; PPC64LE-NEXT: blr 3538 %ret = atomicrmw nand i16* %ptr, i16 %val seq_cst 3539 ret i16 %ret 3540} 3541 3542define i32 @test210(i32* %ptr, i32 %val) { 3543; PPC64LE-LABEL: test210: 3544; PPC64LE: # %bb.0: 3545; PPC64LE-NEXT: .LBB210_1: 3546; PPC64LE-NEXT: lwarx 5, 0, 3 3547; PPC64LE-NEXT: nand 6, 4, 5 3548; PPC64LE-NEXT: stwcx. 6, 0, 3 3549; PPC64LE-NEXT: bne 0, .LBB210_1 3550; PPC64LE-NEXT: # %bb.2: 3551; PPC64LE-NEXT: mr 3, 5 3552; PPC64LE-NEXT: blr 3553 %ret = atomicrmw nand i32* %ptr, i32 %val monotonic 3554 ret i32 %ret 3555} 3556 3557define i32 @test211(i32* %ptr, i32 %val) { 3558; PPC64LE-LABEL: test211: 3559; PPC64LE: # %bb.0: 3560; PPC64LE-NEXT: mr 5, 3 3561; PPC64LE-NEXT: .LBB211_1: 3562; PPC64LE-NEXT: lwarx 3, 0, 5 3563; PPC64LE-NEXT: nand 6, 4, 3 3564; PPC64LE-NEXT: stwcx. 6, 0, 5 3565; PPC64LE-NEXT: bne 0, .LBB211_1 3566; PPC64LE-NEXT: # %bb.2: 3567; PPC64LE-NEXT: lwsync 3568; PPC64LE-NEXT: blr 3569 %ret = atomicrmw nand i32* %ptr, i32 %val acquire 3570 ret i32 %ret 3571} 3572 3573define i32 @test212(i32* %ptr, i32 %val) { 3574; PPC64LE-LABEL: test212: 3575; PPC64LE: # %bb.0: 3576; PPC64LE-NEXT: lwsync 3577; PPC64LE-NEXT: .LBB212_1: 3578; PPC64LE-NEXT: lwarx 5, 0, 3 3579; PPC64LE-NEXT: nand 6, 4, 5 3580; PPC64LE-NEXT: stwcx. 6, 0, 3 3581; PPC64LE-NEXT: bne 0, .LBB212_1 3582; PPC64LE-NEXT: # %bb.2: 3583; PPC64LE-NEXT: mr 3, 5 3584; PPC64LE-NEXT: blr 3585 %ret = atomicrmw nand i32* %ptr, i32 %val release 3586 ret i32 %ret 3587} 3588 3589define i32 @test213(i32* %ptr, i32 %val) { 3590; PPC64LE-LABEL: test213: 3591; PPC64LE: # %bb.0: 3592; PPC64LE-NEXT: lwsync 3593; PPC64LE-NEXT: .LBB213_1: 3594; PPC64LE-NEXT: lwarx 5, 0, 3 3595; PPC64LE-NEXT: nand 6, 4, 5 3596; PPC64LE-NEXT: stwcx. 6, 0, 3 3597; PPC64LE-NEXT: bne 0, .LBB213_1 3598; PPC64LE-NEXT: # %bb.2: 3599; PPC64LE-NEXT: mr 3, 5 3600; PPC64LE-NEXT: lwsync 3601; PPC64LE-NEXT: blr 3602 %ret = atomicrmw nand i32* %ptr, i32 %val acq_rel 3603 ret i32 %ret 3604} 3605 3606define i32 @test214(i32* %ptr, i32 %val) { 3607; PPC64LE-LABEL: test214: 3608; PPC64LE: # %bb.0: 3609; PPC64LE-NEXT: sync 3610; PPC64LE-NEXT: .LBB214_1: 3611; PPC64LE-NEXT: lwarx 5, 0, 3 3612; PPC64LE-NEXT: nand 6, 4, 5 3613; PPC64LE-NEXT: stwcx. 6, 0, 3 3614; PPC64LE-NEXT: bne 0, .LBB214_1 3615; PPC64LE-NEXT: # %bb.2: 3616; PPC64LE-NEXT: mr 3, 5 3617; PPC64LE-NEXT: lwsync 3618; PPC64LE-NEXT: blr 3619 %ret = atomicrmw nand i32* %ptr, i32 %val seq_cst 3620 ret i32 %ret 3621} 3622 3623define i64 @test215(i64* %ptr, i64 %val) { 3624; PPC64LE-LABEL: test215: 3625; PPC64LE: # %bb.0: 3626; PPC64LE-NEXT: .LBB215_1: 3627; PPC64LE-NEXT: ldarx 5, 0, 3 3628; PPC64LE-NEXT: nand 6, 4, 5 3629; PPC64LE-NEXT: stdcx. 6, 0, 3 3630; PPC64LE-NEXT: bne 0, .LBB215_1 3631; PPC64LE-NEXT: # %bb.2: 3632; PPC64LE-NEXT: mr 3, 5 3633; PPC64LE-NEXT: blr 3634 %ret = atomicrmw nand i64* %ptr, i64 %val monotonic 3635 ret i64 %ret 3636} 3637 3638define i64 @test216(i64* %ptr, i64 %val) { 3639; PPC64LE-LABEL: test216: 3640; PPC64LE: # %bb.0: 3641; PPC64LE-NEXT: mr 5, 3 3642; PPC64LE-NEXT: .LBB216_1: 3643; PPC64LE-NEXT: ldarx 3, 0, 5 3644; PPC64LE-NEXT: nand 6, 4, 3 3645; PPC64LE-NEXT: stdcx. 6, 0, 5 3646; PPC64LE-NEXT: bne 0, .LBB216_1 3647; PPC64LE-NEXT: # %bb.2: 3648; PPC64LE-NEXT: lwsync 3649; PPC64LE-NEXT: blr 3650 %ret = atomicrmw nand i64* %ptr, i64 %val acquire 3651 ret i64 %ret 3652} 3653 3654define i64 @test217(i64* %ptr, i64 %val) { 3655; PPC64LE-LABEL: test217: 3656; PPC64LE: # %bb.0: 3657; PPC64LE-NEXT: lwsync 3658; PPC64LE-NEXT: .LBB217_1: 3659; PPC64LE-NEXT: ldarx 5, 0, 3 3660; PPC64LE-NEXT: nand 6, 4, 5 3661; PPC64LE-NEXT: stdcx. 6, 0, 3 3662; PPC64LE-NEXT: bne 0, .LBB217_1 3663; PPC64LE-NEXT: # %bb.2: 3664; PPC64LE-NEXT: mr 3, 5 3665; PPC64LE-NEXT: blr 3666 %ret = atomicrmw nand i64* %ptr, i64 %val release 3667 ret i64 %ret 3668} 3669 3670define i64 @test218(i64* %ptr, i64 %val) { 3671; PPC64LE-LABEL: test218: 3672; PPC64LE: # %bb.0: 3673; PPC64LE-NEXT: lwsync 3674; PPC64LE-NEXT: .LBB218_1: 3675; PPC64LE-NEXT: ldarx 5, 0, 3 3676; PPC64LE-NEXT: nand 6, 4, 5 3677; PPC64LE-NEXT: stdcx. 6, 0, 3 3678; PPC64LE-NEXT: bne 0, .LBB218_1 3679; PPC64LE-NEXT: # %bb.2: 3680; PPC64LE-NEXT: mr 3, 5 3681; PPC64LE-NEXT: lwsync 3682; PPC64LE-NEXT: blr 3683 %ret = atomicrmw nand i64* %ptr, i64 %val acq_rel 3684 ret i64 %ret 3685} 3686 3687define i64 @test219(i64* %ptr, i64 %val) { 3688; PPC64LE-LABEL: test219: 3689; PPC64LE: # %bb.0: 3690; PPC64LE-NEXT: sync 3691; PPC64LE-NEXT: .LBB219_1: 3692; PPC64LE-NEXT: ldarx 5, 0, 3 3693; PPC64LE-NEXT: nand 6, 4, 5 3694; PPC64LE-NEXT: stdcx. 6, 0, 3 3695; PPC64LE-NEXT: bne 0, .LBB219_1 3696; PPC64LE-NEXT: # %bb.2: 3697; PPC64LE-NEXT: mr 3, 5 3698; PPC64LE-NEXT: lwsync 3699; PPC64LE-NEXT: blr 3700 %ret = atomicrmw nand i64* %ptr, i64 %val seq_cst 3701 ret i64 %ret 3702} 3703 3704define i8 @test220(i8* %ptr, i8 %val) { 3705; PPC64LE-LABEL: test220: 3706; PPC64LE: # %bb.0: 3707; PPC64LE-NEXT: .LBB220_1: 3708; PPC64LE-NEXT: lbarx 5, 0, 3 3709; PPC64LE-NEXT: or 6, 4, 5 3710; PPC64LE-NEXT: stbcx. 6, 0, 3 3711; PPC64LE-NEXT: bne 0, .LBB220_1 3712; PPC64LE-NEXT: # %bb.2: 3713; PPC64LE-NEXT: mr 3, 5 3714; PPC64LE-NEXT: blr 3715 %ret = atomicrmw or i8* %ptr, i8 %val monotonic 3716 ret i8 %ret 3717} 3718 3719define i8 @test221(i8* %ptr, i8 %val) { 3720; PPC64LE-LABEL: test221: 3721; PPC64LE: # %bb.0: 3722; PPC64LE-NEXT: mr 5, 3 3723; PPC64LE-NEXT: .LBB221_1: 3724; PPC64LE-NEXT: lbarx 3, 0, 5 3725; PPC64LE-NEXT: or 6, 4, 3 3726; PPC64LE-NEXT: stbcx. 6, 0, 5 3727; PPC64LE-NEXT: bne 0, .LBB221_1 3728; PPC64LE-NEXT: # %bb.2: 3729; PPC64LE-NEXT: lwsync 3730; PPC64LE-NEXT: blr 3731 %ret = atomicrmw or i8* %ptr, i8 %val acquire 3732 ret i8 %ret 3733} 3734 3735define i8 @test222(i8* %ptr, i8 %val) { 3736; PPC64LE-LABEL: test222: 3737; PPC64LE: # %bb.0: 3738; PPC64LE-NEXT: lwsync 3739; PPC64LE-NEXT: .LBB222_1: 3740; PPC64LE-NEXT: lbarx 5, 0, 3 3741; PPC64LE-NEXT: or 6, 4, 5 3742; PPC64LE-NEXT: stbcx. 6, 0, 3 3743; PPC64LE-NEXT: bne 0, .LBB222_1 3744; PPC64LE-NEXT: # %bb.2: 3745; PPC64LE-NEXT: mr 3, 5 3746; PPC64LE-NEXT: blr 3747 %ret = atomicrmw or i8* %ptr, i8 %val release 3748 ret i8 %ret 3749} 3750 3751define i8 @test223(i8* %ptr, i8 %val) { 3752; PPC64LE-LABEL: test223: 3753; PPC64LE: # %bb.0: 3754; PPC64LE-NEXT: lwsync 3755; PPC64LE-NEXT: .LBB223_1: 3756; PPC64LE-NEXT: lbarx 5, 0, 3 3757; PPC64LE-NEXT: or 6, 4, 5 3758; PPC64LE-NEXT: stbcx. 6, 0, 3 3759; PPC64LE-NEXT: bne 0, .LBB223_1 3760; PPC64LE-NEXT: # %bb.2: 3761; PPC64LE-NEXT: mr 3, 5 3762; PPC64LE-NEXT: lwsync 3763; PPC64LE-NEXT: blr 3764 %ret = atomicrmw or i8* %ptr, i8 %val acq_rel 3765 ret i8 %ret 3766} 3767 3768define i8 @test224(i8* %ptr, i8 %val) { 3769; PPC64LE-LABEL: test224: 3770; PPC64LE: # %bb.0: 3771; PPC64LE-NEXT: sync 3772; PPC64LE-NEXT: .LBB224_1: 3773; PPC64LE-NEXT: lbarx 5, 0, 3 3774; PPC64LE-NEXT: or 6, 4, 5 3775; PPC64LE-NEXT: stbcx. 6, 0, 3 3776; PPC64LE-NEXT: bne 0, .LBB224_1 3777; PPC64LE-NEXT: # %bb.2: 3778; PPC64LE-NEXT: mr 3, 5 3779; PPC64LE-NEXT: lwsync 3780; PPC64LE-NEXT: blr 3781 %ret = atomicrmw or i8* %ptr, i8 %val seq_cst 3782 ret i8 %ret 3783} 3784 3785define i16 @test225(i16* %ptr, i16 %val) { 3786; PPC64LE-LABEL: test225: 3787; PPC64LE: # %bb.0: 3788; PPC64LE-NEXT: .LBB225_1: 3789; PPC64LE-NEXT: lharx 5, 0, 3 3790; PPC64LE-NEXT: or 6, 4, 5 3791; PPC64LE-NEXT: sthcx. 6, 0, 3 3792; PPC64LE-NEXT: bne 0, .LBB225_1 3793; PPC64LE-NEXT: # %bb.2: 3794; PPC64LE-NEXT: mr 3, 5 3795; PPC64LE-NEXT: blr 3796 %ret = atomicrmw or i16* %ptr, i16 %val monotonic 3797 ret i16 %ret 3798} 3799 3800define i16 @test226(i16* %ptr, i16 %val) { 3801; PPC64LE-LABEL: test226: 3802; PPC64LE: # %bb.0: 3803; PPC64LE-NEXT: mr 5, 3 3804; PPC64LE-NEXT: .LBB226_1: 3805; PPC64LE-NEXT: lharx 3, 0, 5 3806; PPC64LE-NEXT: or 6, 4, 3 3807; PPC64LE-NEXT: sthcx. 6, 0, 5 3808; PPC64LE-NEXT: bne 0, .LBB226_1 3809; PPC64LE-NEXT: # %bb.2: 3810; PPC64LE-NEXT: lwsync 3811; PPC64LE-NEXT: blr 3812 %ret = atomicrmw or i16* %ptr, i16 %val acquire 3813 ret i16 %ret 3814} 3815 3816define i16 @test227(i16* %ptr, i16 %val) { 3817; PPC64LE-LABEL: test227: 3818; PPC64LE: # %bb.0: 3819; PPC64LE-NEXT: lwsync 3820; PPC64LE-NEXT: .LBB227_1: 3821; PPC64LE-NEXT: lharx 5, 0, 3 3822; PPC64LE-NEXT: or 6, 4, 5 3823; PPC64LE-NEXT: sthcx. 6, 0, 3 3824; PPC64LE-NEXT: bne 0, .LBB227_1 3825; PPC64LE-NEXT: # %bb.2: 3826; PPC64LE-NEXT: mr 3, 5 3827; PPC64LE-NEXT: blr 3828 %ret = atomicrmw or i16* %ptr, i16 %val release 3829 ret i16 %ret 3830} 3831 3832define i16 @test228(i16* %ptr, i16 %val) { 3833; PPC64LE-LABEL: test228: 3834; PPC64LE: # %bb.0: 3835; PPC64LE-NEXT: lwsync 3836; PPC64LE-NEXT: .LBB228_1: 3837; PPC64LE-NEXT: lharx 5, 0, 3 3838; PPC64LE-NEXT: or 6, 4, 5 3839; PPC64LE-NEXT: sthcx. 6, 0, 3 3840; PPC64LE-NEXT: bne 0, .LBB228_1 3841; PPC64LE-NEXT: # %bb.2: 3842; PPC64LE-NEXT: mr 3, 5 3843; PPC64LE-NEXT: lwsync 3844; PPC64LE-NEXT: blr 3845 %ret = atomicrmw or i16* %ptr, i16 %val acq_rel 3846 ret i16 %ret 3847} 3848 3849define i16 @test229(i16* %ptr, i16 %val) { 3850; PPC64LE-LABEL: test229: 3851; PPC64LE: # %bb.0: 3852; PPC64LE-NEXT: sync 3853; PPC64LE-NEXT: .LBB229_1: 3854; PPC64LE-NEXT: lharx 5, 0, 3 3855; PPC64LE-NEXT: or 6, 4, 5 3856; PPC64LE-NEXT: sthcx. 6, 0, 3 3857; PPC64LE-NEXT: bne 0, .LBB229_1 3858; PPC64LE-NEXT: # %bb.2: 3859; PPC64LE-NEXT: mr 3, 5 3860; PPC64LE-NEXT: lwsync 3861; PPC64LE-NEXT: blr 3862 %ret = atomicrmw or i16* %ptr, i16 %val seq_cst 3863 ret i16 %ret 3864} 3865 3866define i32 @test230(i32* %ptr, i32 %val) { 3867; PPC64LE-LABEL: test230: 3868; PPC64LE: # %bb.0: 3869; PPC64LE-NEXT: .LBB230_1: 3870; PPC64LE-NEXT: lwarx 5, 0, 3 3871; PPC64LE-NEXT: or 6, 4, 5 3872; PPC64LE-NEXT: stwcx. 6, 0, 3 3873; PPC64LE-NEXT: bne 0, .LBB230_1 3874; PPC64LE-NEXT: # %bb.2: 3875; PPC64LE-NEXT: mr 3, 5 3876; PPC64LE-NEXT: blr 3877 %ret = atomicrmw or i32* %ptr, i32 %val monotonic 3878 ret i32 %ret 3879} 3880 3881define i32 @test231(i32* %ptr, i32 %val) { 3882; PPC64LE-LABEL: test231: 3883; PPC64LE: # %bb.0: 3884; PPC64LE-NEXT: mr 5, 3 3885; PPC64LE-NEXT: .LBB231_1: 3886; PPC64LE-NEXT: lwarx 3, 0, 5 3887; PPC64LE-NEXT: or 6, 4, 3 3888; PPC64LE-NEXT: stwcx. 6, 0, 5 3889; PPC64LE-NEXT: bne 0, .LBB231_1 3890; PPC64LE-NEXT: # %bb.2: 3891; PPC64LE-NEXT: lwsync 3892; PPC64LE-NEXT: blr 3893 %ret = atomicrmw or i32* %ptr, i32 %val acquire 3894 ret i32 %ret 3895} 3896 3897define i32 @test232(i32* %ptr, i32 %val) { 3898; PPC64LE-LABEL: test232: 3899; PPC64LE: # %bb.0: 3900; PPC64LE-NEXT: lwsync 3901; PPC64LE-NEXT: .LBB232_1: 3902; PPC64LE-NEXT: lwarx 5, 0, 3 3903; PPC64LE-NEXT: or 6, 4, 5 3904; PPC64LE-NEXT: stwcx. 6, 0, 3 3905; PPC64LE-NEXT: bne 0, .LBB232_1 3906; PPC64LE-NEXT: # %bb.2: 3907; PPC64LE-NEXT: mr 3, 5 3908; PPC64LE-NEXT: blr 3909 %ret = atomicrmw or i32* %ptr, i32 %val release 3910 ret i32 %ret 3911} 3912 3913define i32 @test233(i32* %ptr, i32 %val) { 3914; PPC64LE-LABEL: test233: 3915; PPC64LE: # %bb.0: 3916; PPC64LE-NEXT: lwsync 3917; PPC64LE-NEXT: .LBB233_1: 3918; PPC64LE-NEXT: lwarx 5, 0, 3 3919; PPC64LE-NEXT: or 6, 4, 5 3920; PPC64LE-NEXT: stwcx. 6, 0, 3 3921; PPC64LE-NEXT: bne 0, .LBB233_1 3922; PPC64LE-NEXT: # %bb.2: 3923; PPC64LE-NEXT: mr 3, 5 3924; PPC64LE-NEXT: lwsync 3925; PPC64LE-NEXT: blr 3926 %ret = atomicrmw or i32* %ptr, i32 %val acq_rel 3927 ret i32 %ret 3928} 3929 3930define i32 @test234(i32* %ptr, i32 %val) { 3931; PPC64LE-LABEL: test234: 3932; PPC64LE: # %bb.0: 3933; PPC64LE-NEXT: sync 3934; PPC64LE-NEXT: .LBB234_1: 3935; PPC64LE-NEXT: lwarx 5, 0, 3 3936; PPC64LE-NEXT: or 6, 4, 5 3937; PPC64LE-NEXT: stwcx. 6, 0, 3 3938; PPC64LE-NEXT: bne 0, .LBB234_1 3939; PPC64LE-NEXT: # %bb.2: 3940; PPC64LE-NEXT: mr 3, 5 3941; PPC64LE-NEXT: lwsync 3942; PPC64LE-NEXT: blr 3943 %ret = atomicrmw or i32* %ptr, i32 %val seq_cst 3944 ret i32 %ret 3945} 3946 3947define i64 @test235(i64* %ptr, i64 %val) { 3948; PPC64LE-LABEL: test235: 3949; PPC64LE: # %bb.0: 3950; PPC64LE-NEXT: .LBB235_1: 3951; PPC64LE-NEXT: ldarx 5, 0, 3 3952; PPC64LE-NEXT: or 6, 4, 5 3953; PPC64LE-NEXT: stdcx. 6, 0, 3 3954; PPC64LE-NEXT: bne 0, .LBB235_1 3955; PPC64LE-NEXT: # %bb.2: 3956; PPC64LE-NEXT: mr 3, 5 3957; PPC64LE-NEXT: blr 3958 %ret = atomicrmw or i64* %ptr, i64 %val monotonic 3959 ret i64 %ret 3960} 3961 3962define i64 @test236(i64* %ptr, i64 %val) { 3963; PPC64LE-LABEL: test236: 3964; PPC64LE: # %bb.0: 3965; PPC64LE-NEXT: mr 5, 3 3966; PPC64LE-NEXT: .LBB236_1: 3967; PPC64LE-NEXT: ldarx 3, 0, 5 3968; PPC64LE-NEXT: or 6, 4, 3 3969; PPC64LE-NEXT: stdcx. 6, 0, 5 3970; PPC64LE-NEXT: bne 0, .LBB236_1 3971; PPC64LE-NEXT: # %bb.2: 3972; PPC64LE-NEXT: lwsync 3973; PPC64LE-NEXT: blr 3974 %ret = atomicrmw or i64* %ptr, i64 %val acquire 3975 ret i64 %ret 3976} 3977 3978define i64 @test237(i64* %ptr, i64 %val) { 3979; PPC64LE-LABEL: test237: 3980; PPC64LE: # %bb.0: 3981; PPC64LE-NEXT: lwsync 3982; PPC64LE-NEXT: .LBB237_1: 3983; PPC64LE-NEXT: ldarx 5, 0, 3 3984; PPC64LE-NEXT: or 6, 4, 5 3985; PPC64LE-NEXT: stdcx. 6, 0, 3 3986; PPC64LE-NEXT: bne 0, .LBB237_1 3987; PPC64LE-NEXT: # %bb.2: 3988; PPC64LE-NEXT: mr 3, 5 3989; PPC64LE-NEXT: blr 3990 %ret = atomicrmw or i64* %ptr, i64 %val release 3991 ret i64 %ret 3992} 3993 3994define i64 @test238(i64* %ptr, i64 %val) { 3995; PPC64LE-LABEL: test238: 3996; PPC64LE: # %bb.0: 3997; PPC64LE-NEXT: lwsync 3998; PPC64LE-NEXT: .LBB238_1: 3999; PPC64LE-NEXT: ldarx 5, 0, 3 4000; PPC64LE-NEXT: or 6, 4, 5 4001; PPC64LE-NEXT: stdcx. 6, 0, 3 4002; PPC64LE-NEXT: bne 0, .LBB238_1 4003; PPC64LE-NEXT: # %bb.2: 4004; PPC64LE-NEXT: mr 3, 5 4005; PPC64LE-NEXT: lwsync 4006; PPC64LE-NEXT: blr 4007 %ret = atomicrmw or i64* %ptr, i64 %val acq_rel 4008 ret i64 %ret 4009} 4010 4011define i64 @test239(i64* %ptr, i64 %val) { 4012; PPC64LE-LABEL: test239: 4013; PPC64LE: # %bb.0: 4014; PPC64LE-NEXT: sync 4015; PPC64LE-NEXT: .LBB239_1: 4016; PPC64LE-NEXT: ldarx 5, 0, 3 4017; PPC64LE-NEXT: or 6, 4, 5 4018; PPC64LE-NEXT: stdcx. 6, 0, 3 4019; PPC64LE-NEXT: bne 0, .LBB239_1 4020; PPC64LE-NEXT: # %bb.2: 4021; PPC64LE-NEXT: mr 3, 5 4022; PPC64LE-NEXT: lwsync 4023; PPC64LE-NEXT: blr 4024 %ret = atomicrmw or i64* %ptr, i64 %val seq_cst 4025 ret i64 %ret 4026} 4027 4028define i8 @test240(i8* %ptr, i8 %val) { 4029; PPC64LE-LABEL: test240: 4030; PPC64LE: # %bb.0: 4031; PPC64LE-NEXT: .LBB240_1: 4032; PPC64LE-NEXT: lbarx 5, 0, 3 4033; PPC64LE-NEXT: xor 6, 4, 5 4034; PPC64LE-NEXT: stbcx. 6, 0, 3 4035; PPC64LE-NEXT: bne 0, .LBB240_1 4036; PPC64LE-NEXT: # %bb.2: 4037; PPC64LE-NEXT: mr 3, 5 4038; PPC64LE-NEXT: blr 4039 %ret = atomicrmw xor i8* %ptr, i8 %val monotonic 4040 ret i8 %ret 4041} 4042 4043define i8 @test241(i8* %ptr, i8 %val) { 4044; PPC64LE-LABEL: test241: 4045; PPC64LE: # %bb.0: 4046; PPC64LE-NEXT: mr 5, 3 4047; PPC64LE-NEXT: .LBB241_1: 4048; PPC64LE-NEXT: lbarx 3, 0, 5 4049; PPC64LE-NEXT: xor 6, 4, 3 4050; PPC64LE-NEXT: stbcx. 6, 0, 5 4051; PPC64LE-NEXT: bne 0, .LBB241_1 4052; PPC64LE-NEXT: # %bb.2: 4053; PPC64LE-NEXT: lwsync 4054; PPC64LE-NEXT: blr 4055 %ret = atomicrmw xor i8* %ptr, i8 %val acquire 4056 ret i8 %ret 4057} 4058 4059define i8 @test242(i8* %ptr, i8 %val) { 4060; PPC64LE-LABEL: test242: 4061; PPC64LE: # %bb.0: 4062; PPC64LE-NEXT: lwsync 4063; PPC64LE-NEXT: .LBB242_1: 4064; PPC64LE-NEXT: lbarx 5, 0, 3 4065; PPC64LE-NEXT: xor 6, 4, 5 4066; PPC64LE-NEXT: stbcx. 6, 0, 3 4067; PPC64LE-NEXT: bne 0, .LBB242_1 4068; PPC64LE-NEXT: # %bb.2: 4069; PPC64LE-NEXT: mr 3, 5 4070; PPC64LE-NEXT: blr 4071 %ret = atomicrmw xor i8* %ptr, i8 %val release 4072 ret i8 %ret 4073} 4074 4075define i8 @test243(i8* %ptr, i8 %val) { 4076; PPC64LE-LABEL: test243: 4077; PPC64LE: # %bb.0: 4078; PPC64LE-NEXT: lwsync 4079; PPC64LE-NEXT: .LBB243_1: 4080; PPC64LE-NEXT: lbarx 5, 0, 3 4081; PPC64LE-NEXT: xor 6, 4, 5 4082; PPC64LE-NEXT: stbcx. 6, 0, 3 4083; PPC64LE-NEXT: bne 0, .LBB243_1 4084; PPC64LE-NEXT: # %bb.2: 4085; PPC64LE-NEXT: mr 3, 5 4086; PPC64LE-NEXT: lwsync 4087; PPC64LE-NEXT: blr 4088 %ret = atomicrmw xor i8* %ptr, i8 %val acq_rel 4089 ret i8 %ret 4090} 4091 4092define i8 @test244(i8* %ptr, i8 %val) { 4093; PPC64LE-LABEL: test244: 4094; PPC64LE: # %bb.0: 4095; PPC64LE-NEXT: sync 4096; PPC64LE-NEXT: .LBB244_1: 4097; PPC64LE-NEXT: lbarx 5, 0, 3 4098; PPC64LE-NEXT: xor 6, 4, 5 4099; PPC64LE-NEXT: stbcx. 6, 0, 3 4100; PPC64LE-NEXT: bne 0, .LBB244_1 4101; PPC64LE-NEXT: # %bb.2: 4102; PPC64LE-NEXT: mr 3, 5 4103; PPC64LE-NEXT: lwsync 4104; PPC64LE-NEXT: blr 4105 %ret = atomicrmw xor i8* %ptr, i8 %val seq_cst 4106 ret i8 %ret 4107} 4108 4109define i16 @test245(i16* %ptr, i16 %val) { 4110; PPC64LE-LABEL: test245: 4111; PPC64LE: # %bb.0: 4112; PPC64LE-NEXT: .LBB245_1: 4113; PPC64LE-NEXT: lharx 5, 0, 3 4114; PPC64LE-NEXT: xor 6, 4, 5 4115; PPC64LE-NEXT: sthcx. 6, 0, 3 4116; PPC64LE-NEXT: bne 0, .LBB245_1 4117; PPC64LE-NEXT: # %bb.2: 4118; PPC64LE-NEXT: mr 3, 5 4119; PPC64LE-NEXT: blr 4120 %ret = atomicrmw xor i16* %ptr, i16 %val monotonic 4121 ret i16 %ret 4122} 4123 4124define i16 @test246(i16* %ptr, i16 %val) { 4125; PPC64LE-LABEL: test246: 4126; PPC64LE: # %bb.0: 4127; PPC64LE-NEXT: mr 5, 3 4128; PPC64LE-NEXT: .LBB246_1: 4129; PPC64LE-NEXT: lharx 3, 0, 5 4130; PPC64LE-NEXT: xor 6, 4, 3 4131; PPC64LE-NEXT: sthcx. 6, 0, 5 4132; PPC64LE-NEXT: bne 0, .LBB246_1 4133; PPC64LE-NEXT: # %bb.2: 4134; PPC64LE-NEXT: lwsync 4135; PPC64LE-NEXT: blr 4136 %ret = atomicrmw xor i16* %ptr, i16 %val acquire 4137 ret i16 %ret 4138} 4139 4140define i16 @test247(i16* %ptr, i16 %val) { 4141; PPC64LE-LABEL: test247: 4142; PPC64LE: # %bb.0: 4143; PPC64LE-NEXT: lwsync 4144; PPC64LE-NEXT: .LBB247_1: 4145; PPC64LE-NEXT: lharx 5, 0, 3 4146; PPC64LE-NEXT: xor 6, 4, 5 4147; PPC64LE-NEXT: sthcx. 6, 0, 3 4148; PPC64LE-NEXT: bne 0, .LBB247_1 4149; PPC64LE-NEXT: # %bb.2: 4150; PPC64LE-NEXT: mr 3, 5 4151; PPC64LE-NEXT: blr 4152 %ret = atomicrmw xor i16* %ptr, i16 %val release 4153 ret i16 %ret 4154} 4155 4156define i16 @test248(i16* %ptr, i16 %val) { 4157; PPC64LE-LABEL: test248: 4158; PPC64LE: # %bb.0: 4159; PPC64LE-NEXT: lwsync 4160; PPC64LE-NEXT: .LBB248_1: 4161; PPC64LE-NEXT: lharx 5, 0, 3 4162; PPC64LE-NEXT: xor 6, 4, 5 4163; PPC64LE-NEXT: sthcx. 6, 0, 3 4164; PPC64LE-NEXT: bne 0, .LBB248_1 4165; PPC64LE-NEXT: # %bb.2: 4166; PPC64LE-NEXT: mr 3, 5 4167; PPC64LE-NEXT: lwsync 4168; PPC64LE-NEXT: blr 4169 %ret = atomicrmw xor i16* %ptr, i16 %val acq_rel 4170 ret i16 %ret 4171} 4172 4173define i16 @test249(i16* %ptr, i16 %val) { 4174; PPC64LE-LABEL: test249: 4175; PPC64LE: # %bb.0: 4176; PPC64LE-NEXT: sync 4177; PPC64LE-NEXT: .LBB249_1: 4178; PPC64LE-NEXT: lharx 5, 0, 3 4179; PPC64LE-NEXT: xor 6, 4, 5 4180; PPC64LE-NEXT: sthcx. 6, 0, 3 4181; PPC64LE-NEXT: bne 0, .LBB249_1 4182; PPC64LE-NEXT: # %bb.2: 4183; PPC64LE-NEXT: mr 3, 5 4184; PPC64LE-NEXT: lwsync 4185; PPC64LE-NEXT: blr 4186 %ret = atomicrmw xor i16* %ptr, i16 %val seq_cst 4187 ret i16 %ret 4188} 4189 4190define i32 @test250(i32* %ptr, i32 %val) { 4191; PPC64LE-LABEL: test250: 4192; PPC64LE: # %bb.0: 4193; PPC64LE-NEXT: .LBB250_1: 4194; PPC64LE-NEXT: lwarx 5, 0, 3 4195; PPC64LE-NEXT: xor 6, 4, 5 4196; PPC64LE-NEXT: stwcx. 6, 0, 3 4197; PPC64LE-NEXT: bne 0, .LBB250_1 4198; PPC64LE-NEXT: # %bb.2: 4199; PPC64LE-NEXT: mr 3, 5 4200; PPC64LE-NEXT: blr 4201 %ret = atomicrmw xor i32* %ptr, i32 %val monotonic 4202 ret i32 %ret 4203} 4204 4205define i32 @test251(i32* %ptr, i32 %val) { 4206; PPC64LE-LABEL: test251: 4207; PPC64LE: # %bb.0: 4208; PPC64LE-NEXT: mr 5, 3 4209; PPC64LE-NEXT: .LBB251_1: 4210; PPC64LE-NEXT: lwarx 3, 0, 5 4211; PPC64LE-NEXT: xor 6, 4, 3 4212; PPC64LE-NEXT: stwcx. 6, 0, 5 4213; PPC64LE-NEXT: bne 0, .LBB251_1 4214; PPC64LE-NEXT: # %bb.2: 4215; PPC64LE-NEXT: lwsync 4216; PPC64LE-NEXT: blr 4217 %ret = atomicrmw xor i32* %ptr, i32 %val acquire 4218 ret i32 %ret 4219} 4220 4221define i32 @test252(i32* %ptr, i32 %val) { 4222; PPC64LE-LABEL: test252: 4223; PPC64LE: # %bb.0: 4224; PPC64LE-NEXT: lwsync 4225; PPC64LE-NEXT: .LBB252_1: 4226; PPC64LE-NEXT: lwarx 5, 0, 3 4227; PPC64LE-NEXT: xor 6, 4, 5 4228; PPC64LE-NEXT: stwcx. 6, 0, 3 4229; PPC64LE-NEXT: bne 0, .LBB252_1 4230; PPC64LE-NEXT: # %bb.2: 4231; PPC64LE-NEXT: mr 3, 5 4232; PPC64LE-NEXT: blr 4233 %ret = atomicrmw xor i32* %ptr, i32 %val release 4234 ret i32 %ret 4235} 4236 4237define i32 @test253(i32* %ptr, i32 %val) { 4238; PPC64LE-LABEL: test253: 4239; PPC64LE: # %bb.0: 4240; PPC64LE-NEXT: lwsync 4241; PPC64LE-NEXT: .LBB253_1: 4242; PPC64LE-NEXT: lwarx 5, 0, 3 4243; PPC64LE-NEXT: xor 6, 4, 5 4244; PPC64LE-NEXT: stwcx. 6, 0, 3 4245; PPC64LE-NEXT: bne 0, .LBB253_1 4246; PPC64LE-NEXT: # %bb.2: 4247; PPC64LE-NEXT: mr 3, 5 4248; PPC64LE-NEXT: lwsync 4249; PPC64LE-NEXT: blr 4250 %ret = atomicrmw xor i32* %ptr, i32 %val acq_rel 4251 ret i32 %ret 4252} 4253 4254define i32 @test254(i32* %ptr, i32 %val) { 4255; PPC64LE-LABEL: test254: 4256; PPC64LE: # %bb.0: 4257; PPC64LE-NEXT: sync 4258; PPC64LE-NEXT: .LBB254_1: 4259; PPC64LE-NEXT: lwarx 5, 0, 3 4260; PPC64LE-NEXT: xor 6, 4, 5 4261; PPC64LE-NEXT: stwcx. 6, 0, 3 4262; PPC64LE-NEXT: bne 0, .LBB254_1 4263; PPC64LE-NEXT: # %bb.2: 4264; PPC64LE-NEXT: mr 3, 5 4265; PPC64LE-NEXT: lwsync 4266; PPC64LE-NEXT: blr 4267 %ret = atomicrmw xor i32* %ptr, i32 %val seq_cst 4268 ret i32 %ret 4269} 4270 4271define i64 @test255(i64* %ptr, i64 %val) { 4272; PPC64LE-LABEL: test255: 4273; PPC64LE: # %bb.0: 4274; PPC64LE-NEXT: .LBB255_1: 4275; PPC64LE-NEXT: ldarx 5, 0, 3 4276; PPC64LE-NEXT: xor 6, 4, 5 4277; PPC64LE-NEXT: stdcx. 6, 0, 3 4278; PPC64LE-NEXT: bne 0, .LBB255_1 4279; PPC64LE-NEXT: # %bb.2: 4280; PPC64LE-NEXT: mr 3, 5 4281; PPC64LE-NEXT: blr 4282 %ret = atomicrmw xor i64* %ptr, i64 %val monotonic 4283 ret i64 %ret 4284} 4285 4286define i64 @test256(i64* %ptr, i64 %val) { 4287; PPC64LE-LABEL: test256: 4288; PPC64LE: # %bb.0: 4289; PPC64LE-NEXT: mr 5, 3 4290; PPC64LE-NEXT: .LBB256_1: 4291; PPC64LE-NEXT: ldarx 3, 0, 5 4292; PPC64LE-NEXT: xor 6, 4, 3 4293; PPC64LE-NEXT: stdcx. 6, 0, 5 4294; PPC64LE-NEXT: bne 0, .LBB256_1 4295; PPC64LE-NEXT: # %bb.2: 4296; PPC64LE-NEXT: lwsync 4297; PPC64LE-NEXT: blr 4298 %ret = atomicrmw xor i64* %ptr, i64 %val acquire 4299 ret i64 %ret 4300} 4301 4302define i64 @test257(i64* %ptr, i64 %val) { 4303; PPC64LE-LABEL: test257: 4304; PPC64LE: # %bb.0: 4305; PPC64LE-NEXT: lwsync 4306; PPC64LE-NEXT: .LBB257_1: 4307; PPC64LE-NEXT: ldarx 5, 0, 3 4308; PPC64LE-NEXT: xor 6, 4, 5 4309; PPC64LE-NEXT: stdcx. 6, 0, 3 4310; PPC64LE-NEXT: bne 0, .LBB257_1 4311; PPC64LE-NEXT: # %bb.2: 4312; PPC64LE-NEXT: mr 3, 5 4313; PPC64LE-NEXT: blr 4314 %ret = atomicrmw xor i64* %ptr, i64 %val release 4315 ret i64 %ret 4316} 4317 4318define i64 @test258(i64* %ptr, i64 %val) { 4319; PPC64LE-LABEL: test258: 4320; PPC64LE: # %bb.0: 4321; PPC64LE-NEXT: lwsync 4322; PPC64LE-NEXT: .LBB258_1: 4323; PPC64LE-NEXT: ldarx 5, 0, 3 4324; PPC64LE-NEXT: xor 6, 4, 5 4325; PPC64LE-NEXT: stdcx. 6, 0, 3 4326; PPC64LE-NEXT: bne 0, .LBB258_1 4327; PPC64LE-NEXT: # %bb.2: 4328; PPC64LE-NEXT: mr 3, 5 4329; PPC64LE-NEXT: lwsync 4330; PPC64LE-NEXT: blr 4331 %ret = atomicrmw xor i64* %ptr, i64 %val acq_rel 4332 ret i64 %ret 4333} 4334 4335define i64 @test259(i64* %ptr, i64 %val) { 4336; PPC64LE-LABEL: test259: 4337; PPC64LE: # %bb.0: 4338; PPC64LE-NEXT: sync 4339; PPC64LE-NEXT: .LBB259_1: 4340; PPC64LE-NEXT: ldarx 5, 0, 3 4341; PPC64LE-NEXT: xor 6, 4, 5 4342; PPC64LE-NEXT: stdcx. 6, 0, 3 4343; PPC64LE-NEXT: bne 0, .LBB259_1 4344; PPC64LE-NEXT: # %bb.2: 4345; PPC64LE-NEXT: mr 3, 5 4346; PPC64LE-NEXT: lwsync 4347; PPC64LE-NEXT: blr 4348 %ret = atomicrmw xor i64* %ptr, i64 %val seq_cst 4349 ret i64 %ret 4350} 4351 4352define i8 @test260(i8* %ptr, i8 %val) { 4353; PPC64LE-LABEL: test260: 4354; PPC64LE: # %bb.0: 4355; PPC64LE-NEXT: extsb 5, 4 4356; PPC64LE-NEXT: .LBB260_1: 4357; PPC64LE-NEXT: lbarx 4, 0, 3 4358; PPC64LE-NEXT: extsb 6, 4 4359; PPC64LE-NEXT: cmpw 5, 6 4360; PPC64LE-NEXT: ble 0, .LBB260_3 4361; PPC64LE-NEXT: # %bb.2: 4362; PPC64LE-NEXT: stbcx. 5, 0, 3 4363; PPC64LE-NEXT: bne 0, .LBB260_1 4364; PPC64LE-NEXT: .LBB260_3: 4365; PPC64LE-NEXT: mr 3, 4 4366; PPC64LE-NEXT: blr 4367 %ret = atomicrmw max i8* %ptr, i8 %val monotonic 4368 ret i8 %ret 4369} 4370 4371define i8 @test261(i8* %ptr, i8 %val) { 4372; PPC64LE-LABEL: test261: 4373; PPC64LE: # %bb.0: 4374; PPC64LE-NEXT: extsb 5, 4 4375; PPC64LE-NEXT: .LBB261_1: 4376; PPC64LE-NEXT: lbarx 4, 0, 3 4377; PPC64LE-NEXT: extsb 6, 4 4378; PPC64LE-NEXT: cmpw 5, 6 4379; PPC64LE-NEXT: ble 0, .LBB261_3 4380; PPC64LE-NEXT: # %bb.2: 4381; PPC64LE-NEXT: stbcx. 5, 0, 3 4382; PPC64LE-NEXT: bne 0, .LBB261_1 4383; PPC64LE-NEXT: .LBB261_3: 4384; PPC64LE-NEXT: mr 3, 4 4385; PPC64LE-NEXT: lwsync 4386; PPC64LE-NEXT: blr 4387 %ret = atomicrmw max i8* %ptr, i8 %val acquire 4388 ret i8 %ret 4389} 4390 4391define i8 @test262(i8* %ptr, i8 %val) { 4392; PPC64LE-LABEL: test262: 4393; PPC64LE: # %bb.0: 4394; PPC64LE-NEXT: extsb 5, 4 4395; PPC64LE-NEXT: lwsync 4396; PPC64LE-NEXT: .LBB262_1: 4397; PPC64LE-NEXT: lbarx 4, 0, 3 4398; PPC64LE-NEXT: extsb 6, 4 4399; PPC64LE-NEXT: cmpw 5, 6 4400; PPC64LE-NEXT: ble 0, .LBB262_3 4401; PPC64LE-NEXT: # %bb.2: 4402; PPC64LE-NEXT: stbcx. 5, 0, 3 4403; PPC64LE-NEXT: bne 0, .LBB262_1 4404; PPC64LE-NEXT: .LBB262_3: 4405; PPC64LE-NEXT: mr 3, 4 4406; PPC64LE-NEXT: blr 4407 %ret = atomicrmw max i8* %ptr, i8 %val release 4408 ret i8 %ret 4409} 4410 4411define i8 @test263(i8* %ptr, i8 %val) { 4412; PPC64LE-LABEL: test263: 4413; PPC64LE: # %bb.0: 4414; PPC64LE-NEXT: extsb 5, 4 4415; PPC64LE-NEXT: lwsync 4416; PPC64LE-NEXT: .LBB263_1: 4417; PPC64LE-NEXT: lbarx 4, 0, 3 4418; PPC64LE-NEXT: extsb 6, 4 4419; PPC64LE-NEXT: cmpw 5, 6 4420; PPC64LE-NEXT: ble 0, .LBB263_3 4421; PPC64LE-NEXT: # %bb.2: 4422; PPC64LE-NEXT: stbcx. 5, 0, 3 4423; PPC64LE-NEXT: bne 0, .LBB263_1 4424; PPC64LE-NEXT: .LBB263_3: 4425; PPC64LE-NEXT: mr 3, 4 4426; PPC64LE-NEXT: lwsync 4427; PPC64LE-NEXT: blr 4428 %ret = atomicrmw max i8* %ptr, i8 %val acq_rel 4429 ret i8 %ret 4430} 4431 4432define i8 @test264(i8* %ptr, i8 %val) { 4433; PPC64LE-LABEL: test264: 4434; PPC64LE: # %bb.0: 4435; PPC64LE-NEXT: extsb 5, 4 4436; PPC64LE-NEXT: sync 4437; PPC64LE-NEXT: .LBB264_1: 4438; PPC64LE-NEXT: lbarx 4, 0, 3 4439; PPC64LE-NEXT: extsb 6, 4 4440; PPC64LE-NEXT: cmpw 5, 6 4441; PPC64LE-NEXT: ble 0, .LBB264_3 4442; PPC64LE-NEXT: # %bb.2: 4443; PPC64LE-NEXT: stbcx. 5, 0, 3 4444; PPC64LE-NEXT: bne 0, .LBB264_1 4445; PPC64LE-NEXT: .LBB264_3: 4446; PPC64LE-NEXT: mr 3, 4 4447; PPC64LE-NEXT: lwsync 4448; PPC64LE-NEXT: blr 4449 %ret = atomicrmw max i8* %ptr, i8 %val seq_cst 4450 ret i8 %ret 4451} 4452 4453define i16 @test265(i16* %ptr, i16 %val) { 4454; PPC64LE-LABEL: test265: 4455; PPC64LE: # %bb.0: 4456; PPC64LE-NEXT: extsh 5, 4 4457; PPC64LE-NEXT: .LBB265_1: 4458; PPC64LE-NEXT: lharx 4, 0, 3 4459; PPC64LE-NEXT: extsh 6, 4 4460; PPC64LE-NEXT: cmpw 5, 6 4461; PPC64LE-NEXT: ble 0, .LBB265_3 4462; PPC64LE-NEXT: # %bb.2: 4463; PPC64LE-NEXT: sthcx. 5, 0, 3 4464; PPC64LE-NEXT: bne 0, .LBB265_1 4465; PPC64LE-NEXT: .LBB265_3: 4466; PPC64LE-NEXT: mr 3, 4 4467; PPC64LE-NEXT: blr 4468 %ret = atomicrmw max i16* %ptr, i16 %val monotonic 4469 ret i16 %ret 4470} 4471 4472define i16 @test266(i16* %ptr, i16 %val) { 4473; PPC64LE-LABEL: test266: 4474; PPC64LE: # %bb.0: 4475; PPC64LE-NEXT: extsh 5, 4 4476; PPC64LE-NEXT: .LBB266_1: 4477; PPC64LE-NEXT: lharx 4, 0, 3 4478; PPC64LE-NEXT: extsh 6, 4 4479; PPC64LE-NEXT: cmpw 5, 6 4480; PPC64LE-NEXT: ble 0, .LBB266_3 4481; PPC64LE-NEXT: # %bb.2: 4482; PPC64LE-NEXT: sthcx. 5, 0, 3 4483; PPC64LE-NEXT: bne 0, .LBB266_1 4484; PPC64LE-NEXT: .LBB266_3: 4485; PPC64LE-NEXT: mr 3, 4 4486; PPC64LE-NEXT: lwsync 4487; PPC64LE-NEXT: blr 4488 %ret = atomicrmw max i16* %ptr, i16 %val acquire 4489 ret i16 %ret 4490} 4491 4492define i16 @test267(i16* %ptr, i16 %val) { 4493; PPC64LE-LABEL: test267: 4494; PPC64LE: # %bb.0: 4495; PPC64LE-NEXT: extsh 5, 4 4496; PPC64LE-NEXT: lwsync 4497; PPC64LE-NEXT: .LBB267_1: 4498; PPC64LE-NEXT: lharx 4, 0, 3 4499; PPC64LE-NEXT: extsh 6, 4 4500; PPC64LE-NEXT: cmpw 5, 6 4501; PPC64LE-NEXT: ble 0, .LBB267_3 4502; PPC64LE-NEXT: # %bb.2: 4503; PPC64LE-NEXT: sthcx. 5, 0, 3 4504; PPC64LE-NEXT: bne 0, .LBB267_1 4505; PPC64LE-NEXT: .LBB267_3: 4506; PPC64LE-NEXT: mr 3, 4 4507; PPC64LE-NEXT: blr 4508 %ret = atomicrmw max i16* %ptr, i16 %val release 4509 ret i16 %ret 4510} 4511 4512define i16 @test268(i16* %ptr, i16 %val) { 4513; PPC64LE-LABEL: test268: 4514; PPC64LE: # %bb.0: 4515; PPC64LE-NEXT: extsh 5, 4 4516; PPC64LE-NEXT: lwsync 4517; PPC64LE-NEXT: .LBB268_1: 4518; PPC64LE-NEXT: lharx 4, 0, 3 4519; PPC64LE-NEXT: extsh 6, 4 4520; PPC64LE-NEXT: cmpw 5, 6 4521; PPC64LE-NEXT: ble 0, .LBB268_3 4522; PPC64LE-NEXT: # %bb.2: 4523; PPC64LE-NEXT: sthcx. 5, 0, 3 4524; PPC64LE-NEXT: bne 0, .LBB268_1 4525; PPC64LE-NEXT: .LBB268_3: 4526; PPC64LE-NEXT: mr 3, 4 4527; PPC64LE-NEXT: lwsync 4528; PPC64LE-NEXT: blr 4529 %ret = atomicrmw max i16* %ptr, i16 %val acq_rel 4530 ret i16 %ret 4531} 4532 4533define i16 @test269(i16* %ptr, i16 %val) { 4534; PPC64LE-LABEL: test269: 4535; PPC64LE: # %bb.0: 4536; PPC64LE-NEXT: extsh 5, 4 4537; PPC64LE-NEXT: sync 4538; PPC64LE-NEXT: .LBB269_1: 4539; PPC64LE-NEXT: lharx 4, 0, 3 4540; PPC64LE-NEXT: extsh 6, 4 4541; PPC64LE-NEXT: cmpw 5, 6 4542; PPC64LE-NEXT: ble 0, .LBB269_3 4543; PPC64LE-NEXT: # %bb.2: 4544; PPC64LE-NEXT: sthcx. 5, 0, 3 4545; PPC64LE-NEXT: bne 0, .LBB269_1 4546; PPC64LE-NEXT: .LBB269_3: 4547; PPC64LE-NEXT: mr 3, 4 4548; PPC64LE-NEXT: lwsync 4549; PPC64LE-NEXT: blr 4550 %ret = atomicrmw max i16* %ptr, i16 %val seq_cst 4551 ret i16 %ret 4552} 4553 4554define i32 @test270(i32* %ptr, i32 %val) { 4555; PPC64LE-LABEL: test270: 4556; PPC64LE: # %bb.0: 4557; PPC64LE-NEXT: .LBB270_1: 4558; PPC64LE-NEXT: lwarx 5, 0, 3 4559; PPC64LE-NEXT: cmpw 4, 5 4560; PPC64LE-NEXT: ble 0, .LBB270_3 4561; PPC64LE-NEXT: # %bb.2: 4562; PPC64LE-NEXT: stwcx. 4, 0, 3 4563; PPC64LE-NEXT: bne 0, .LBB270_1 4564; PPC64LE-NEXT: .LBB270_3: 4565; PPC64LE-NEXT: mr 3, 5 4566; PPC64LE-NEXT: blr 4567 %ret = atomicrmw max i32* %ptr, i32 %val monotonic 4568 ret i32 %ret 4569} 4570 4571define i32 @test271(i32* %ptr, i32 %val) { 4572; PPC64LE-LABEL: test271: 4573; PPC64LE: # %bb.0: 4574; PPC64LE-NEXT: mr 5, 3 4575; PPC64LE-NEXT: .LBB271_1: 4576; PPC64LE-NEXT: lwarx 3, 0, 5 4577; PPC64LE-NEXT: cmpw 4, 3 4578; PPC64LE-NEXT: ble 0, .LBB271_3 4579; PPC64LE-NEXT: # %bb.2: 4580; PPC64LE-NEXT: stwcx. 4, 0, 5 4581; PPC64LE-NEXT: bne 0, .LBB271_1 4582; PPC64LE-NEXT: .LBB271_3: 4583; PPC64LE-NEXT: lwsync 4584; PPC64LE-NEXT: blr 4585 %ret = atomicrmw max i32* %ptr, i32 %val acquire 4586 ret i32 %ret 4587} 4588 4589define i32 @test272(i32* %ptr, i32 %val) { 4590; PPC64LE-LABEL: test272: 4591; PPC64LE: # %bb.0: 4592; PPC64LE-NEXT: lwsync 4593; PPC64LE-NEXT: .LBB272_1: 4594; PPC64LE-NEXT: lwarx 5, 0, 3 4595; PPC64LE-NEXT: cmpw 4, 5 4596; PPC64LE-NEXT: ble 0, .LBB272_3 4597; PPC64LE-NEXT: # %bb.2: 4598; PPC64LE-NEXT: stwcx. 4, 0, 3 4599; PPC64LE-NEXT: bne 0, .LBB272_1 4600; PPC64LE-NEXT: .LBB272_3: 4601; PPC64LE-NEXT: mr 3, 5 4602; PPC64LE-NEXT: blr 4603 %ret = atomicrmw max i32* %ptr, i32 %val release 4604 ret i32 %ret 4605} 4606 4607define i32 @test273(i32* %ptr, i32 %val) { 4608; PPC64LE-LABEL: test273: 4609; PPC64LE: # %bb.0: 4610; PPC64LE-NEXT: lwsync 4611; PPC64LE-NEXT: .LBB273_1: 4612; PPC64LE-NEXT: lwarx 5, 0, 3 4613; PPC64LE-NEXT: cmpw 4, 5 4614; PPC64LE-NEXT: ble 0, .LBB273_3 4615; PPC64LE-NEXT: # %bb.2: 4616; PPC64LE-NEXT: stwcx. 4, 0, 3 4617; PPC64LE-NEXT: bne 0, .LBB273_1 4618; PPC64LE-NEXT: .LBB273_3: 4619; PPC64LE-NEXT: mr 3, 5 4620; PPC64LE-NEXT: lwsync 4621; PPC64LE-NEXT: blr 4622 %ret = atomicrmw max i32* %ptr, i32 %val acq_rel 4623 ret i32 %ret 4624} 4625 4626define i32 @test274(i32* %ptr, i32 %val) { 4627; PPC64LE-LABEL: test274: 4628; PPC64LE: # %bb.0: 4629; PPC64LE-NEXT: sync 4630; PPC64LE-NEXT: .LBB274_1: 4631; PPC64LE-NEXT: lwarx 5, 0, 3 4632; PPC64LE-NEXT: cmpw 4, 5 4633; PPC64LE-NEXT: ble 0, .LBB274_3 4634; PPC64LE-NEXT: # %bb.2: 4635; PPC64LE-NEXT: stwcx. 4, 0, 3 4636; PPC64LE-NEXT: bne 0, .LBB274_1 4637; PPC64LE-NEXT: .LBB274_3: 4638; PPC64LE-NEXT: mr 3, 5 4639; PPC64LE-NEXT: lwsync 4640; PPC64LE-NEXT: blr 4641 %ret = atomicrmw max i32* %ptr, i32 %val seq_cst 4642 ret i32 %ret 4643} 4644 4645define i64 @test275(i64* %ptr, i64 %val) { 4646; PPC64LE-LABEL: test275: 4647; PPC64LE: # %bb.0: 4648; PPC64LE-NEXT: .LBB275_1: 4649; PPC64LE-NEXT: ldarx 5, 0, 3 4650; PPC64LE-NEXT: cmpd 4, 5 4651; PPC64LE-NEXT: ble 0, .LBB275_3 4652; PPC64LE-NEXT: # %bb.2: 4653; PPC64LE-NEXT: stdcx. 4, 0, 3 4654; PPC64LE-NEXT: bne 0, .LBB275_1 4655; PPC64LE-NEXT: .LBB275_3: 4656; PPC64LE-NEXT: mr 3, 5 4657; PPC64LE-NEXT: blr 4658 %ret = atomicrmw max i64* %ptr, i64 %val monotonic 4659 ret i64 %ret 4660} 4661 4662define i64 @test276(i64* %ptr, i64 %val) { 4663; PPC64LE-LABEL: test276: 4664; PPC64LE: # %bb.0: 4665; PPC64LE-NEXT: mr 5, 3 4666; PPC64LE-NEXT: .LBB276_1: 4667; PPC64LE-NEXT: ldarx 3, 0, 5 4668; PPC64LE-NEXT: cmpd 4, 3 4669; PPC64LE-NEXT: ble 0, .LBB276_3 4670; PPC64LE-NEXT: # %bb.2: 4671; PPC64LE-NEXT: stdcx. 4, 0, 5 4672; PPC64LE-NEXT: bne 0, .LBB276_1 4673; PPC64LE-NEXT: .LBB276_3: 4674; PPC64LE-NEXT: lwsync 4675; PPC64LE-NEXT: blr 4676 %ret = atomicrmw max i64* %ptr, i64 %val acquire 4677 ret i64 %ret 4678} 4679 4680define i64 @test277(i64* %ptr, i64 %val) { 4681; PPC64LE-LABEL: test277: 4682; PPC64LE: # %bb.0: 4683; PPC64LE-NEXT: lwsync 4684; PPC64LE-NEXT: .LBB277_1: 4685; PPC64LE-NEXT: ldarx 5, 0, 3 4686; PPC64LE-NEXT: cmpd 4, 5 4687; PPC64LE-NEXT: ble 0, .LBB277_3 4688; PPC64LE-NEXT: # %bb.2: 4689; PPC64LE-NEXT: stdcx. 4, 0, 3 4690; PPC64LE-NEXT: bne 0, .LBB277_1 4691; PPC64LE-NEXT: .LBB277_3: 4692; PPC64LE-NEXT: mr 3, 5 4693; PPC64LE-NEXT: blr 4694 %ret = atomicrmw max i64* %ptr, i64 %val release 4695 ret i64 %ret 4696} 4697 4698define i64 @test278(i64* %ptr, i64 %val) { 4699; PPC64LE-LABEL: test278: 4700; PPC64LE: # %bb.0: 4701; PPC64LE-NEXT: lwsync 4702; PPC64LE-NEXT: .LBB278_1: 4703; PPC64LE-NEXT: ldarx 5, 0, 3 4704; PPC64LE-NEXT: cmpd 4, 5 4705; PPC64LE-NEXT: ble 0, .LBB278_3 4706; PPC64LE-NEXT: # %bb.2: 4707; PPC64LE-NEXT: stdcx. 4, 0, 3 4708; PPC64LE-NEXT: bne 0, .LBB278_1 4709; PPC64LE-NEXT: .LBB278_3: 4710; PPC64LE-NEXT: mr 3, 5 4711; PPC64LE-NEXT: lwsync 4712; PPC64LE-NEXT: blr 4713 %ret = atomicrmw max i64* %ptr, i64 %val acq_rel 4714 ret i64 %ret 4715} 4716 4717define i64 @test279(i64* %ptr, i64 %val) { 4718; PPC64LE-LABEL: test279: 4719; PPC64LE: # %bb.0: 4720; PPC64LE-NEXT: sync 4721; PPC64LE-NEXT: .LBB279_1: 4722; PPC64LE-NEXT: ldarx 5, 0, 3 4723; PPC64LE-NEXT: cmpd 4, 5 4724; PPC64LE-NEXT: ble 0, .LBB279_3 4725; PPC64LE-NEXT: # %bb.2: 4726; PPC64LE-NEXT: stdcx. 4, 0, 3 4727; PPC64LE-NEXT: bne 0, .LBB279_1 4728; PPC64LE-NEXT: .LBB279_3: 4729; PPC64LE-NEXT: mr 3, 5 4730; PPC64LE-NEXT: lwsync 4731; PPC64LE-NEXT: blr 4732 %ret = atomicrmw max i64* %ptr, i64 %val seq_cst 4733 ret i64 %ret 4734} 4735 4736define i8 @test280(i8* %ptr, i8 %val) { 4737; PPC64LE-LABEL: test280: 4738; PPC64LE: # %bb.0: 4739; PPC64LE-NEXT: extsb 5, 4 4740; PPC64LE-NEXT: .LBB280_1: 4741; PPC64LE-NEXT: lbarx 4, 0, 3 4742; PPC64LE-NEXT: extsb 6, 4 4743; PPC64LE-NEXT: cmpw 5, 6 4744; PPC64LE-NEXT: bge 0, .LBB280_3 4745; PPC64LE-NEXT: # %bb.2: 4746; PPC64LE-NEXT: stbcx. 5, 0, 3 4747; PPC64LE-NEXT: bne 0, .LBB280_1 4748; PPC64LE-NEXT: .LBB280_3: 4749; PPC64LE-NEXT: mr 3, 4 4750; PPC64LE-NEXT: blr 4751 %ret = atomicrmw min i8* %ptr, i8 %val monotonic 4752 ret i8 %ret 4753} 4754 4755define i8 @test281(i8* %ptr, i8 %val) { 4756; PPC64LE-LABEL: test281: 4757; PPC64LE: # %bb.0: 4758; PPC64LE-NEXT: extsb 5, 4 4759; PPC64LE-NEXT: .LBB281_1: 4760; PPC64LE-NEXT: lbarx 4, 0, 3 4761; PPC64LE-NEXT: extsb 6, 4 4762; PPC64LE-NEXT: cmpw 5, 6 4763; PPC64LE-NEXT: bge 0, .LBB281_3 4764; PPC64LE-NEXT: # %bb.2: 4765; PPC64LE-NEXT: stbcx. 5, 0, 3 4766; PPC64LE-NEXT: bne 0, .LBB281_1 4767; PPC64LE-NEXT: .LBB281_3: 4768; PPC64LE-NEXT: mr 3, 4 4769; PPC64LE-NEXT: lwsync 4770; PPC64LE-NEXT: blr 4771 %ret = atomicrmw min i8* %ptr, i8 %val acquire 4772 ret i8 %ret 4773} 4774 4775define i8 @test282(i8* %ptr, i8 %val) { 4776; PPC64LE-LABEL: test282: 4777; PPC64LE: # %bb.0: 4778; PPC64LE-NEXT: extsb 5, 4 4779; PPC64LE-NEXT: lwsync 4780; PPC64LE-NEXT: .LBB282_1: 4781; PPC64LE-NEXT: lbarx 4, 0, 3 4782; PPC64LE-NEXT: extsb 6, 4 4783; PPC64LE-NEXT: cmpw 5, 6 4784; PPC64LE-NEXT: bge 0, .LBB282_3 4785; PPC64LE-NEXT: # %bb.2: 4786; PPC64LE-NEXT: stbcx. 5, 0, 3 4787; PPC64LE-NEXT: bne 0, .LBB282_1 4788; PPC64LE-NEXT: .LBB282_3: 4789; PPC64LE-NEXT: mr 3, 4 4790; PPC64LE-NEXT: blr 4791 %ret = atomicrmw min i8* %ptr, i8 %val release 4792 ret i8 %ret 4793} 4794 4795define i8 @test283(i8* %ptr, i8 %val) { 4796; PPC64LE-LABEL: test283: 4797; PPC64LE: # %bb.0: 4798; PPC64LE-NEXT: extsb 5, 4 4799; PPC64LE-NEXT: lwsync 4800; PPC64LE-NEXT: .LBB283_1: 4801; PPC64LE-NEXT: lbarx 4, 0, 3 4802; PPC64LE-NEXT: extsb 6, 4 4803; PPC64LE-NEXT: cmpw 5, 6 4804; PPC64LE-NEXT: bge 0, .LBB283_3 4805; PPC64LE-NEXT: # %bb.2: 4806; PPC64LE-NEXT: stbcx. 5, 0, 3 4807; PPC64LE-NEXT: bne 0, .LBB283_1 4808; PPC64LE-NEXT: .LBB283_3: 4809; PPC64LE-NEXT: mr 3, 4 4810; PPC64LE-NEXT: lwsync 4811; PPC64LE-NEXT: blr 4812 %ret = atomicrmw min i8* %ptr, i8 %val acq_rel 4813 ret i8 %ret 4814} 4815 4816define i8 @test284(i8* %ptr, i8 %val) { 4817; PPC64LE-LABEL: test284: 4818; PPC64LE: # %bb.0: 4819; PPC64LE-NEXT: extsb 5, 4 4820; PPC64LE-NEXT: sync 4821; PPC64LE-NEXT: .LBB284_1: 4822; PPC64LE-NEXT: lbarx 4, 0, 3 4823; PPC64LE-NEXT: extsb 6, 4 4824; PPC64LE-NEXT: cmpw 5, 6 4825; PPC64LE-NEXT: bge 0, .LBB284_3 4826; PPC64LE-NEXT: # %bb.2: 4827; PPC64LE-NEXT: stbcx. 5, 0, 3 4828; PPC64LE-NEXT: bne 0, .LBB284_1 4829; PPC64LE-NEXT: .LBB284_3: 4830; PPC64LE-NEXT: mr 3, 4 4831; PPC64LE-NEXT: lwsync 4832; PPC64LE-NEXT: blr 4833 %ret = atomicrmw min i8* %ptr, i8 %val seq_cst 4834 ret i8 %ret 4835} 4836 4837define i16 @test285(i16* %ptr, i16 %val) { 4838; PPC64LE-LABEL: test285: 4839; PPC64LE: # %bb.0: 4840; PPC64LE-NEXT: extsh 5, 4 4841; PPC64LE-NEXT: .LBB285_1: 4842; PPC64LE-NEXT: lharx 4, 0, 3 4843; PPC64LE-NEXT: extsh 6, 4 4844; PPC64LE-NEXT: cmpw 5, 6 4845; PPC64LE-NEXT: bge 0, .LBB285_3 4846; PPC64LE-NEXT: # %bb.2: 4847; PPC64LE-NEXT: sthcx. 5, 0, 3 4848; PPC64LE-NEXT: bne 0, .LBB285_1 4849; PPC64LE-NEXT: .LBB285_3: 4850; PPC64LE-NEXT: mr 3, 4 4851; PPC64LE-NEXT: blr 4852 %ret = atomicrmw min i16* %ptr, i16 %val monotonic 4853 ret i16 %ret 4854} 4855 4856define i16 @test286(i16* %ptr, i16 %val) { 4857; PPC64LE-LABEL: test286: 4858; PPC64LE: # %bb.0: 4859; PPC64LE-NEXT: extsh 5, 4 4860; PPC64LE-NEXT: .LBB286_1: 4861; PPC64LE-NEXT: lharx 4, 0, 3 4862; PPC64LE-NEXT: extsh 6, 4 4863; PPC64LE-NEXT: cmpw 5, 6 4864; PPC64LE-NEXT: bge 0, .LBB286_3 4865; PPC64LE-NEXT: # %bb.2: 4866; PPC64LE-NEXT: sthcx. 5, 0, 3 4867; PPC64LE-NEXT: bne 0, .LBB286_1 4868; PPC64LE-NEXT: .LBB286_3: 4869; PPC64LE-NEXT: mr 3, 4 4870; PPC64LE-NEXT: lwsync 4871; PPC64LE-NEXT: blr 4872 %ret = atomicrmw min i16* %ptr, i16 %val acquire 4873 ret i16 %ret 4874} 4875 4876define i16 @test287(i16* %ptr, i16 %val) { 4877; PPC64LE-LABEL: test287: 4878; PPC64LE: # %bb.0: 4879; PPC64LE-NEXT: extsh 5, 4 4880; PPC64LE-NEXT: lwsync 4881; PPC64LE-NEXT: .LBB287_1: 4882; PPC64LE-NEXT: lharx 4, 0, 3 4883; PPC64LE-NEXT: extsh 6, 4 4884; PPC64LE-NEXT: cmpw 5, 6 4885; PPC64LE-NEXT: bge 0, .LBB287_3 4886; PPC64LE-NEXT: # %bb.2: 4887; PPC64LE-NEXT: sthcx. 5, 0, 3 4888; PPC64LE-NEXT: bne 0, .LBB287_1 4889; PPC64LE-NEXT: .LBB287_3: 4890; PPC64LE-NEXT: mr 3, 4 4891; PPC64LE-NEXT: blr 4892 %ret = atomicrmw min i16* %ptr, i16 %val release 4893 ret i16 %ret 4894} 4895 4896define i16 @test288(i16* %ptr, i16 %val) { 4897; PPC64LE-LABEL: test288: 4898; PPC64LE: # %bb.0: 4899; PPC64LE-NEXT: extsh 5, 4 4900; PPC64LE-NEXT: lwsync 4901; PPC64LE-NEXT: .LBB288_1: 4902; PPC64LE-NEXT: lharx 4, 0, 3 4903; PPC64LE-NEXT: extsh 6, 4 4904; PPC64LE-NEXT: cmpw 5, 6 4905; PPC64LE-NEXT: bge 0, .LBB288_3 4906; PPC64LE-NEXT: # %bb.2: 4907; PPC64LE-NEXT: sthcx. 5, 0, 3 4908; PPC64LE-NEXT: bne 0, .LBB288_1 4909; PPC64LE-NEXT: .LBB288_3: 4910; PPC64LE-NEXT: mr 3, 4 4911; PPC64LE-NEXT: lwsync 4912; PPC64LE-NEXT: blr 4913 %ret = atomicrmw min i16* %ptr, i16 %val acq_rel 4914 ret i16 %ret 4915} 4916 4917define i16 @test289(i16* %ptr, i16 %val) { 4918; PPC64LE-LABEL: test289: 4919; PPC64LE: # %bb.0: 4920; PPC64LE-NEXT: extsh 5, 4 4921; PPC64LE-NEXT: sync 4922; PPC64LE-NEXT: .LBB289_1: 4923; PPC64LE-NEXT: lharx 4, 0, 3 4924; PPC64LE-NEXT: extsh 6, 4 4925; PPC64LE-NEXT: cmpw 5, 6 4926; PPC64LE-NEXT: bge 0, .LBB289_3 4927; PPC64LE-NEXT: # %bb.2: 4928; PPC64LE-NEXT: sthcx. 5, 0, 3 4929; PPC64LE-NEXT: bne 0, .LBB289_1 4930; PPC64LE-NEXT: .LBB289_3: 4931; PPC64LE-NEXT: mr 3, 4 4932; PPC64LE-NEXT: lwsync 4933; PPC64LE-NEXT: blr 4934 %ret = atomicrmw min i16* %ptr, i16 %val seq_cst 4935 ret i16 %ret 4936} 4937 4938define i32 @test290(i32* %ptr, i32 %val) { 4939; PPC64LE-LABEL: test290: 4940; PPC64LE: # %bb.0: 4941; PPC64LE-NEXT: .LBB290_1: 4942; PPC64LE-NEXT: lwarx 5, 0, 3 4943; PPC64LE-NEXT: cmpw 4, 5 4944; PPC64LE-NEXT: bge 0, .LBB290_3 4945; PPC64LE-NEXT: # %bb.2: 4946; PPC64LE-NEXT: stwcx. 4, 0, 3 4947; PPC64LE-NEXT: bne 0, .LBB290_1 4948; PPC64LE-NEXT: .LBB290_3: 4949; PPC64LE-NEXT: mr 3, 5 4950; PPC64LE-NEXT: blr 4951 %ret = atomicrmw min i32* %ptr, i32 %val monotonic 4952 ret i32 %ret 4953} 4954 4955define i32 @test291(i32* %ptr, i32 %val) { 4956; PPC64LE-LABEL: test291: 4957; PPC64LE: # %bb.0: 4958; PPC64LE-NEXT: mr 5, 3 4959; PPC64LE-NEXT: .LBB291_1: 4960; PPC64LE-NEXT: lwarx 3, 0, 5 4961; PPC64LE-NEXT: cmpw 4, 3 4962; PPC64LE-NEXT: bge 0, .LBB291_3 4963; PPC64LE-NEXT: # %bb.2: 4964; PPC64LE-NEXT: stwcx. 4, 0, 5 4965; PPC64LE-NEXT: bne 0, .LBB291_1 4966; PPC64LE-NEXT: .LBB291_3: 4967; PPC64LE-NEXT: lwsync 4968; PPC64LE-NEXT: blr 4969 %ret = atomicrmw min i32* %ptr, i32 %val acquire 4970 ret i32 %ret 4971} 4972 4973define i32 @test292(i32* %ptr, i32 %val) { 4974; PPC64LE-LABEL: test292: 4975; PPC64LE: # %bb.0: 4976; PPC64LE-NEXT: lwsync 4977; PPC64LE-NEXT: .LBB292_1: 4978; PPC64LE-NEXT: lwarx 5, 0, 3 4979; PPC64LE-NEXT: cmpw 4, 5 4980; PPC64LE-NEXT: bge 0, .LBB292_3 4981; PPC64LE-NEXT: # %bb.2: 4982; PPC64LE-NEXT: stwcx. 4, 0, 3 4983; PPC64LE-NEXT: bne 0, .LBB292_1 4984; PPC64LE-NEXT: .LBB292_3: 4985; PPC64LE-NEXT: mr 3, 5 4986; PPC64LE-NEXT: blr 4987 %ret = atomicrmw min i32* %ptr, i32 %val release 4988 ret i32 %ret 4989} 4990 4991define i32 @test293(i32* %ptr, i32 %val) { 4992; PPC64LE-LABEL: test293: 4993; PPC64LE: # %bb.0: 4994; PPC64LE-NEXT: lwsync 4995; PPC64LE-NEXT: .LBB293_1: 4996; PPC64LE-NEXT: lwarx 5, 0, 3 4997; PPC64LE-NEXT: cmpw 4, 5 4998; PPC64LE-NEXT: bge 0, .LBB293_3 4999; PPC64LE-NEXT: # %bb.2: 5000; PPC64LE-NEXT: stwcx. 4, 0, 3 5001; PPC64LE-NEXT: bne 0, .LBB293_1 5002; PPC64LE-NEXT: .LBB293_3: 5003; PPC64LE-NEXT: mr 3, 5 5004; PPC64LE-NEXT: lwsync 5005; PPC64LE-NEXT: blr 5006 %ret = atomicrmw min i32* %ptr, i32 %val acq_rel 5007 ret i32 %ret 5008} 5009 5010define i32 @test294(i32* %ptr, i32 %val) { 5011; PPC64LE-LABEL: test294: 5012; PPC64LE: # %bb.0: 5013; PPC64LE-NEXT: sync 5014; PPC64LE-NEXT: .LBB294_1: 5015; PPC64LE-NEXT: lwarx 5, 0, 3 5016; PPC64LE-NEXT: cmpw 4, 5 5017; PPC64LE-NEXT: bge 0, .LBB294_3 5018; PPC64LE-NEXT: # %bb.2: 5019; PPC64LE-NEXT: stwcx. 4, 0, 3 5020; PPC64LE-NEXT: bne 0, .LBB294_1 5021; PPC64LE-NEXT: .LBB294_3: 5022; PPC64LE-NEXT: mr 3, 5 5023; PPC64LE-NEXT: lwsync 5024; PPC64LE-NEXT: blr 5025 %ret = atomicrmw min i32* %ptr, i32 %val seq_cst 5026 ret i32 %ret 5027} 5028 5029define i64 @test295(i64* %ptr, i64 %val) { 5030; PPC64LE-LABEL: test295: 5031; PPC64LE: # %bb.0: 5032; PPC64LE-NEXT: .LBB295_1: 5033; PPC64LE-NEXT: ldarx 5, 0, 3 5034; PPC64LE-NEXT: cmpd 4, 5 5035; PPC64LE-NEXT: bge 0, .LBB295_3 5036; PPC64LE-NEXT: # %bb.2: 5037; PPC64LE-NEXT: stdcx. 4, 0, 3 5038; PPC64LE-NEXT: bne 0, .LBB295_1 5039; PPC64LE-NEXT: .LBB295_3: 5040; PPC64LE-NEXT: mr 3, 5 5041; PPC64LE-NEXT: blr 5042 %ret = atomicrmw min i64* %ptr, i64 %val monotonic 5043 ret i64 %ret 5044} 5045 5046define i64 @test296(i64* %ptr, i64 %val) { 5047; PPC64LE-LABEL: test296: 5048; PPC64LE: # %bb.0: 5049; PPC64LE-NEXT: mr 5, 3 5050; PPC64LE-NEXT: .LBB296_1: 5051; PPC64LE-NEXT: ldarx 3, 0, 5 5052; PPC64LE-NEXT: cmpd 4, 3 5053; PPC64LE-NEXT: bge 0, .LBB296_3 5054; PPC64LE-NEXT: # %bb.2: 5055; PPC64LE-NEXT: stdcx. 4, 0, 5 5056; PPC64LE-NEXT: bne 0, .LBB296_1 5057; PPC64LE-NEXT: .LBB296_3: 5058; PPC64LE-NEXT: lwsync 5059; PPC64LE-NEXT: blr 5060 %ret = atomicrmw min i64* %ptr, i64 %val acquire 5061 ret i64 %ret 5062} 5063 5064define i64 @test297(i64* %ptr, i64 %val) { 5065; PPC64LE-LABEL: test297: 5066; PPC64LE: # %bb.0: 5067; PPC64LE-NEXT: lwsync 5068; PPC64LE-NEXT: .LBB297_1: 5069; PPC64LE-NEXT: ldarx 5, 0, 3 5070; PPC64LE-NEXT: cmpd 4, 5 5071; PPC64LE-NEXT: bge 0, .LBB297_3 5072; PPC64LE-NEXT: # %bb.2: 5073; PPC64LE-NEXT: stdcx. 4, 0, 3 5074; PPC64LE-NEXT: bne 0, .LBB297_1 5075; PPC64LE-NEXT: .LBB297_3: 5076; PPC64LE-NEXT: mr 3, 5 5077; PPC64LE-NEXT: blr 5078 %ret = atomicrmw min i64* %ptr, i64 %val release 5079 ret i64 %ret 5080} 5081 5082define i64 @test298(i64* %ptr, i64 %val) { 5083; PPC64LE-LABEL: test298: 5084; PPC64LE: # %bb.0: 5085; PPC64LE-NEXT: lwsync 5086; PPC64LE-NEXT: .LBB298_1: 5087; PPC64LE-NEXT: ldarx 5, 0, 3 5088; PPC64LE-NEXT: cmpd 4, 5 5089; PPC64LE-NEXT: bge 0, .LBB298_3 5090; PPC64LE-NEXT: # %bb.2: 5091; PPC64LE-NEXT: stdcx. 4, 0, 3 5092; PPC64LE-NEXT: bne 0, .LBB298_1 5093; PPC64LE-NEXT: .LBB298_3: 5094; PPC64LE-NEXT: mr 3, 5 5095; PPC64LE-NEXT: lwsync 5096; PPC64LE-NEXT: blr 5097 %ret = atomicrmw min i64* %ptr, i64 %val acq_rel 5098 ret i64 %ret 5099} 5100 5101define i64 @test299(i64* %ptr, i64 %val) { 5102; PPC64LE-LABEL: test299: 5103; PPC64LE: # %bb.0: 5104; PPC64LE-NEXT: sync 5105; PPC64LE-NEXT: .LBB299_1: 5106; PPC64LE-NEXT: ldarx 5, 0, 3 5107; PPC64LE-NEXT: cmpd 4, 5 5108; PPC64LE-NEXT: bge 0, .LBB299_3 5109; PPC64LE-NEXT: # %bb.2: 5110; PPC64LE-NEXT: stdcx. 4, 0, 3 5111; PPC64LE-NEXT: bne 0, .LBB299_1 5112; PPC64LE-NEXT: .LBB299_3: 5113; PPC64LE-NEXT: mr 3, 5 5114; PPC64LE-NEXT: lwsync 5115; PPC64LE-NEXT: blr 5116 %ret = atomicrmw min i64* %ptr, i64 %val seq_cst 5117 ret i64 %ret 5118} 5119 5120define i8 @test300(i8* %ptr, i8 %val) { 5121; PPC64LE-LABEL: test300: 5122; PPC64LE: # %bb.0: 5123; PPC64LE-NEXT: .LBB300_1: 5124; PPC64LE-NEXT: lbarx 5, 0, 3 5125; PPC64LE-NEXT: cmplw 4, 5 5126; PPC64LE-NEXT: ble 0, .LBB300_3 5127; PPC64LE-NEXT: # %bb.2: 5128; PPC64LE-NEXT: stbcx. 4, 0, 3 5129; PPC64LE-NEXT: bne 0, .LBB300_1 5130; PPC64LE-NEXT: .LBB300_3: 5131; PPC64LE-NEXT: mr 3, 5 5132; PPC64LE-NEXT: blr 5133 %ret = atomicrmw umax i8* %ptr, i8 %val monotonic 5134 ret i8 %ret 5135} 5136 5137define i8 @test301(i8* %ptr, i8 %val) { 5138; PPC64LE-LABEL: test301: 5139; PPC64LE: # %bb.0: 5140; PPC64LE-NEXT: mr 5, 3 5141; PPC64LE-NEXT: .LBB301_1: 5142; PPC64LE-NEXT: lbarx 3, 0, 5 5143; PPC64LE-NEXT: cmplw 4, 3 5144; PPC64LE-NEXT: ble 0, .LBB301_3 5145; PPC64LE-NEXT: # %bb.2: 5146; PPC64LE-NEXT: stbcx. 4, 0, 5 5147; PPC64LE-NEXT: bne 0, .LBB301_1 5148; PPC64LE-NEXT: .LBB301_3: 5149; PPC64LE-NEXT: lwsync 5150; PPC64LE-NEXT: blr 5151 %ret = atomicrmw umax i8* %ptr, i8 %val acquire 5152 ret i8 %ret 5153} 5154 5155define i8 @test302(i8* %ptr, i8 %val) { 5156; PPC64LE-LABEL: test302: 5157; PPC64LE: # %bb.0: 5158; PPC64LE-NEXT: lwsync 5159; PPC64LE-NEXT: .LBB302_1: 5160; PPC64LE-NEXT: lbarx 5, 0, 3 5161; PPC64LE-NEXT: cmplw 4, 5 5162; PPC64LE-NEXT: ble 0, .LBB302_3 5163; PPC64LE-NEXT: # %bb.2: 5164; PPC64LE-NEXT: stbcx. 4, 0, 3 5165; PPC64LE-NEXT: bne 0, .LBB302_1 5166; PPC64LE-NEXT: .LBB302_3: 5167; PPC64LE-NEXT: mr 3, 5 5168; PPC64LE-NEXT: blr 5169 %ret = atomicrmw umax i8* %ptr, i8 %val release 5170 ret i8 %ret 5171} 5172 5173define i8 @test303(i8* %ptr, i8 %val) { 5174; PPC64LE-LABEL: test303: 5175; PPC64LE: # %bb.0: 5176; PPC64LE-NEXT: lwsync 5177; PPC64LE-NEXT: .LBB303_1: 5178; PPC64LE-NEXT: lbarx 5, 0, 3 5179; PPC64LE-NEXT: cmplw 4, 5 5180; PPC64LE-NEXT: ble 0, .LBB303_3 5181; PPC64LE-NEXT: # %bb.2: 5182; PPC64LE-NEXT: stbcx. 4, 0, 3 5183; PPC64LE-NEXT: bne 0, .LBB303_1 5184; PPC64LE-NEXT: .LBB303_3: 5185; PPC64LE-NEXT: mr 3, 5 5186; PPC64LE-NEXT: lwsync 5187; PPC64LE-NEXT: blr 5188 %ret = atomicrmw umax i8* %ptr, i8 %val acq_rel 5189 ret i8 %ret 5190} 5191 5192define i8 @test304(i8* %ptr, i8 %val) { 5193; PPC64LE-LABEL: test304: 5194; PPC64LE: # %bb.0: 5195; PPC64LE-NEXT: sync 5196; PPC64LE-NEXT: .LBB304_1: 5197; PPC64LE-NEXT: lbarx 5, 0, 3 5198; PPC64LE-NEXT: cmplw 4, 5 5199; PPC64LE-NEXT: ble 0, .LBB304_3 5200; PPC64LE-NEXT: # %bb.2: 5201; PPC64LE-NEXT: stbcx. 4, 0, 3 5202; PPC64LE-NEXT: bne 0, .LBB304_1 5203; PPC64LE-NEXT: .LBB304_3: 5204; PPC64LE-NEXT: mr 3, 5 5205; PPC64LE-NEXT: lwsync 5206; PPC64LE-NEXT: blr 5207 %ret = atomicrmw umax i8* %ptr, i8 %val seq_cst 5208 ret i8 %ret 5209} 5210 5211define i16 @test305(i16* %ptr, i16 %val) { 5212; PPC64LE-LABEL: test305: 5213; PPC64LE: # %bb.0: 5214; PPC64LE-NEXT: .LBB305_1: 5215; PPC64LE-NEXT: lharx 5, 0, 3 5216; PPC64LE-NEXT: cmplw 4, 5 5217; PPC64LE-NEXT: ble 0, .LBB305_3 5218; PPC64LE-NEXT: # %bb.2: 5219; PPC64LE-NEXT: sthcx. 4, 0, 3 5220; PPC64LE-NEXT: bne 0, .LBB305_1 5221; PPC64LE-NEXT: .LBB305_3: 5222; PPC64LE-NEXT: mr 3, 5 5223; PPC64LE-NEXT: blr 5224 %ret = atomicrmw umax i16* %ptr, i16 %val monotonic 5225 ret i16 %ret 5226} 5227 5228define i16 @test306(i16* %ptr, i16 %val) { 5229; PPC64LE-LABEL: test306: 5230; PPC64LE: # %bb.0: 5231; PPC64LE-NEXT: mr 5, 3 5232; PPC64LE-NEXT: .LBB306_1: 5233; PPC64LE-NEXT: lharx 3, 0, 5 5234; PPC64LE-NEXT: cmplw 4, 3 5235; PPC64LE-NEXT: ble 0, .LBB306_3 5236; PPC64LE-NEXT: # %bb.2: 5237; PPC64LE-NEXT: sthcx. 4, 0, 5 5238; PPC64LE-NEXT: bne 0, .LBB306_1 5239; PPC64LE-NEXT: .LBB306_3: 5240; PPC64LE-NEXT: lwsync 5241; PPC64LE-NEXT: blr 5242 %ret = atomicrmw umax i16* %ptr, i16 %val acquire 5243 ret i16 %ret 5244} 5245 5246define i16 @test307(i16* %ptr, i16 %val) { 5247; PPC64LE-LABEL: test307: 5248; PPC64LE: # %bb.0: 5249; PPC64LE-NEXT: lwsync 5250; PPC64LE-NEXT: .LBB307_1: 5251; PPC64LE-NEXT: lharx 5, 0, 3 5252; PPC64LE-NEXT: cmplw 4, 5 5253; PPC64LE-NEXT: ble 0, .LBB307_3 5254; PPC64LE-NEXT: # %bb.2: 5255; PPC64LE-NEXT: sthcx. 4, 0, 3 5256; PPC64LE-NEXT: bne 0, .LBB307_1 5257; PPC64LE-NEXT: .LBB307_3: 5258; PPC64LE-NEXT: mr 3, 5 5259; PPC64LE-NEXT: blr 5260 %ret = atomicrmw umax i16* %ptr, i16 %val release 5261 ret i16 %ret 5262} 5263 5264define i16 @test308(i16* %ptr, i16 %val) { 5265; PPC64LE-LABEL: test308: 5266; PPC64LE: # %bb.0: 5267; PPC64LE-NEXT: lwsync 5268; PPC64LE-NEXT: .LBB308_1: 5269; PPC64LE-NEXT: lharx 5, 0, 3 5270; PPC64LE-NEXT: cmplw 4, 5 5271; PPC64LE-NEXT: ble 0, .LBB308_3 5272; PPC64LE-NEXT: # %bb.2: 5273; PPC64LE-NEXT: sthcx. 4, 0, 3 5274; PPC64LE-NEXT: bne 0, .LBB308_1 5275; PPC64LE-NEXT: .LBB308_3: 5276; PPC64LE-NEXT: mr 3, 5 5277; PPC64LE-NEXT: lwsync 5278; PPC64LE-NEXT: blr 5279 %ret = atomicrmw umax i16* %ptr, i16 %val acq_rel 5280 ret i16 %ret 5281} 5282 5283define i16 @test309(i16* %ptr, i16 %val) { 5284; PPC64LE-LABEL: test309: 5285; PPC64LE: # %bb.0: 5286; PPC64LE-NEXT: sync 5287; PPC64LE-NEXT: .LBB309_1: 5288; PPC64LE-NEXT: lharx 5, 0, 3 5289; PPC64LE-NEXT: cmplw 4, 5 5290; PPC64LE-NEXT: ble 0, .LBB309_3 5291; PPC64LE-NEXT: # %bb.2: 5292; PPC64LE-NEXT: sthcx. 4, 0, 3 5293; PPC64LE-NEXT: bne 0, .LBB309_1 5294; PPC64LE-NEXT: .LBB309_3: 5295; PPC64LE-NEXT: mr 3, 5 5296; PPC64LE-NEXT: lwsync 5297; PPC64LE-NEXT: blr 5298 %ret = atomicrmw umax i16* %ptr, i16 %val seq_cst 5299 ret i16 %ret 5300} 5301 5302define i32 @test310(i32* %ptr, i32 %val) { 5303; PPC64LE-LABEL: test310: 5304; PPC64LE: # %bb.0: 5305; PPC64LE-NEXT: .LBB310_1: 5306; PPC64LE-NEXT: lwarx 5, 0, 3 5307; PPC64LE-NEXT: cmplw 4, 5 5308; PPC64LE-NEXT: ble 0, .LBB310_3 5309; PPC64LE-NEXT: # %bb.2: 5310; PPC64LE-NEXT: stwcx. 4, 0, 3 5311; PPC64LE-NEXT: bne 0, .LBB310_1 5312; PPC64LE-NEXT: .LBB310_3: 5313; PPC64LE-NEXT: mr 3, 5 5314; PPC64LE-NEXT: blr 5315 %ret = atomicrmw umax i32* %ptr, i32 %val monotonic 5316 ret i32 %ret 5317} 5318 5319define i32 @test311(i32* %ptr, i32 %val) { 5320; PPC64LE-LABEL: test311: 5321; PPC64LE: # %bb.0: 5322; PPC64LE-NEXT: mr 5, 3 5323; PPC64LE-NEXT: .LBB311_1: 5324; PPC64LE-NEXT: lwarx 3, 0, 5 5325; PPC64LE-NEXT: cmplw 4, 3 5326; PPC64LE-NEXT: ble 0, .LBB311_3 5327; PPC64LE-NEXT: # %bb.2: 5328; PPC64LE-NEXT: stwcx. 4, 0, 5 5329; PPC64LE-NEXT: bne 0, .LBB311_1 5330; PPC64LE-NEXT: .LBB311_3: 5331; PPC64LE-NEXT: lwsync 5332; PPC64LE-NEXT: blr 5333 %ret = atomicrmw umax i32* %ptr, i32 %val acquire 5334 ret i32 %ret 5335} 5336 5337define i32 @test312(i32* %ptr, i32 %val) { 5338; PPC64LE-LABEL: test312: 5339; PPC64LE: # %bb.0: 5340; PPC64LE-NEXT: lwsync 5341; PPC64LE-NEXT: .LBB312_1: 5342; PPC64LE-NEXT: lwarx 5, 0, 3 5343; PPC64LE-NEXT: cmplw 4, 5 5344; PPC64LE-NEXT: ble 0, .LBB312_3 5345; PPC64LE-NEXT: # %bb.2: 5346; PPC64LE-NEXT: stwcx. 4, 0, 3 5347; PPC64LE-NEXT: bne 0, .LBB312_1 5348; PPC64LE-NEXT: .LBB312_3: 5349; PPC64LE-NEXT: mr 3, 5 5350; PPC64LE-NEXT: blr 5351 %ret = atomicrmw umax i32* %ptr, i32 %val release 5352 ret i32 %ret 5353} 5354 5355define i32 @test313(i32* %ptr, i32 %val) { 5356; PPC64LE-LABEL: test313: 5357; PPC64LE: # %bb.0: 5358; PPC64LE-NEXT: lwsync 5359; PPC64LE-NEXT: .LBB313_1: 5360; PPC64LE-NEXT: lwarx 5, 0, 3 5361; PPC64LE-NEXT: cmplw 4, 5 5362; PPC64LE-NEXT: ble 0, .LBB313_3 5363; PPC64LE-NEXT: # %bb.2: 5364; PPC64LE-NEXT: stwcx. 4, 0, 3 5365; PPC64LE-NEXT: bne 0, .LBB313_1 5366; PPC64LE-NEXT: .LBB313_3: 5367; PPC64LE-NEXT: mr 3, 5 5368; PPC64LE-NEXT: lwsync 5369; PPC64LE-NEXT: blr 5370 %ret = atomicrmw umax i32* %ptr, i32 %val acq_rel 5371 ret i32 %ret 5372} 5373 5374define i32 @test314(i32* %ptr, i32 %val) { 5375; PPC64LE-LABEL: test314: 5376; PPC64LE: # %bb.0: 5377; PPC64LE-NEXT: sync 5378; PPC64LE-NEXT: .LBB314_1: 5379; PPC64LE-NEXT: lwarx 5, 0, 3 5380; PPC64LE-NEXT: cmplw 4, 5 5381; PPC64LE-NEXT: ble 0, .LBB314_3 5382; PPC64LE-NEXT: # %bb.2: 5383; PPC64LE-NEXT: stwcx. 4, 0, 3 5384; PPC64LE-NEXT: bne 0, .LBB314_1 5385; PPC64LE-NEXT: .LBB314_3: 5386; PPC64LE-NEXT: mr 3, 5 5387; PPC64LE-NEXT: lwsync 5388; PPC64LE-NEXT: blr 5389 %ret = atomicrmw umax i32* %ptr, i32 %val seq_cst 5390 ret i32 %ret 5391} 5392 5393define i64 @test315(i64* %ptr, i64 %val) { 5394; PPC64LE-LABEL: test315: 5395; PPC64LE: # %bb.0: 5396; PPC64LE-NEXT: .LBB315_1: 5397; PPC64LE-NEXT: ldarx 5, 0, 3 5398; PPC64LE-NEXT: cmpld 4, 5 5399; PPC64LE-NEXT: ble 0, .LBB315_3 5400; PPC64LE-NEXT: # %bb.2: 5401; PPC64LE-NEXT: stdcx. 4, 0, 3 5402; PPC64LE-NEXT: bne 0, .LBB315_1 5403; PPC64LE-NEXT: .LBB315_3: 5404; PPC64LE-NEXT: mr 3, 5 5405; PPC64LE-NEXT: blr 5406 %ret = atomicrmw umax i64* %ptr, i64 %val monotonic 5407 ret i64 %ret 5408} 5409 5410define i64 @test316(i64* %ptr, i64 %val) { 5411; PPC64LE-LABEL: test316: 5412; PPC64LE: # %bb.0: 5413; PPC64LE-NEXT: mr 5, 3 5414; PPC64LE-NEXT: .LBB316_1: 5415; PPC64LE-NEXT: ldarx 3, 0, 5 5416; PPC64LE-NEXT: cmpld 4, 3 5417; PPC64LE-NEXT: ble 0, .LBB316_3 5418; PPC64LE-NEXT: # %bb.2: 5419; PPC64LE-NEXT: stdcx. 4, 0, 5 5420; PPC64LE-NEXT: bne 0, .LBB316_1 5421; PPC64LE-NEXT: .LBB316_3: 5422; PPC64LE-NEXT: lwsync 5423; PPC64LE-NEXT: blr 5424 %ret = atomicrmw umax i64* %ptr, i64 %val acquire 5425 ret i64 %ret 5426} 5427 5428define i64 @test317(i64* %ptr, i64 %val) { 5429; PPC64LE-LABEL: test317: 5430; PPC64LE: # %bb.0: 5431; PPC64LE-NEXT: lwsync 5432; PPC64LE-NEXT: .LBB317_1: 5433; PPC64LE-NEXT: ldarx 5, 0, 3 5434; PPC64LE-NEXT: cmpld 4, 5 5435; PPC64LE-NEXT: ble 0, .LBB317_3 5436; PPC64LE-NEXT: # %bb.2: 5437; PPC64LE-NEXT: stdcx. 4, 0, 3 5438; PPC64LE-NEXT: bne 0, .LBB317_1 5439; PPC64LE-NEXT: .LBB317_3: 5440; PPC64LE-NEXT: mr 3, 5 5441; PPC64LE-NEXT: blr 5442 %ret = atomicrmw umax i64* %ptr, i64 %val release 5443 ret i64 %ret 5444} 5445 5446define i64 @test318(i64* %ptr, i64 %val) { 5447; PPC64LE-LABEL: test318: 5448; PPC64LE: # %bb.0: 5449; PPC64LE-NEXT: lwsync 5450; PPC64LE-NEXT: .LBB318_1: 5451; PPC64LE-NEXT: ldarx 5, 0, 3 5452; PPC64LE-NEXT: cmpld 4, 5 5453; PPC64LE-NEXT: ble 0, .LBB318_3 5454; PPC64LE-NEXT: # %bb.2: 5455; PPC64LE-NEXT: stdcx. 4, 0, 3 5456; PPC64LE-NEXT: bne 0, .LBB318_1 5457; PPC64LE-NEXT: .LBB318_3: 5458; PPC64LE-NEXT: mr 3, 5 5459; PPC64LE-NEXT: lwsync 5460; PPC64LE-NEXT: blr 5461 %ret = atomicrmw umax i64* %ptr, i64 %val acq_rel 5462 ret i64 %ret 5463} 5464 5465define i64 @test319(i64* %ptr, i64 %val) { 5466; PPC64LE-LABEL: test319: 5467; PPC64LE: # %bb.0: 5468; PPC64LE-NEXT: sync 5469; PPC64LE-NEXT: .LBB319_1: 5470; PPC64LE-NEXT: ldarx 5, 0, 3 5471; PPC64LE-NEXT: cmpld 4, 5 5472; PPC64LE-NEXT: ble 0, .LBB319_3 5473; PPC64LE-NEXT: # %bb.2: 5474; PPC64LE-NEXT: stdcx. 4, 0, 3 5475; PPC64LE-NEXT: bne 0, .LBB319_1 5476; PPC64LE-NEXT: .LBB319_3: 5477; PPC64LE-NEXT: mr 3, 5 5478; PPC64LE-NEXT: lwsync 5479; PPC64LE-NEXT: blr 5480 %ret = atomicrmw umax i64* %ptr, i64 %val seq_cst 5481 ret i64 %ret 5482} 5483 5484define i8 @test320(i8* %ptr, i8 %val) { 5485; PPC64LE-LABEL: test320: 5486; PPC64LE: # %bb.0: 5487; PPC64LE-NEXT: .LBB320_1: 5488; PPC64LE-NEXT: lbarx 5, 0, 3 5489; PPC64LE-NEXT: cmplw 4, 5 5490; PPC64LE-NEXT: bge 0, .LBB320_3 5491; PPC64LE-NEXT: # %bb.2: 5492; PPC64LE-NEXT: stbcx. 4, 0, 3 5493; PPC64LE-NEXT: bne 0, .LBB320_1 5494; PPC64LE-NEXT: .LBB320_3: 5495; PPC64LE-NEXT: mr 3, 5 5496; PPC64LE-NEXT: blr 5497 %ret = atomicrmw umin i8* %ptr, i8 %val monotonic 5498 ret i8 %ret 5499} 5500 5501define i8 @test321(i8* %ptr, i8 %val) { 5502; PPC64LE-LABEL: test321: 5503; PPC64LE: # %bb.0: 5504; PPC64LE-NEXT: mr 5, 3 5505; PPC64LE-NEXT: .LBB321_1: 5506; PPC64LE-NEXT: lbarx 3, 0, 5 5507; PPC64LE-NEXT: cmplw 4, 3 5508; PPC64LE-NEXT: bge 0, .LBB321_3 5509; PPC64LE-NEXT: # %bb.2: 5510; PPC64LE-NEXT: stbcx. 4, 0, 5 5511; PPC64LE-NEXT: bne 0, .LBB321_1 5512; PPC64LE-NEXT: .LBB321_3: 5513; PPC64LE-NEXT: lwsync 5514; PPC64LE-NEXT: blr 5515 %ret = atomicrmw umin i8* %ptr, i8 %val acquire 5516 ret i8 %ret 5517} 5518 5519define i8 @test322(i8* %ptr, i8 %val) { 5520; PPC64LE-LABEL: test322: 5521; PPC64LE: # %bb.0: 5522; PPC64LE-NEXT: lwsync 5523; PPC64LE-NEXT: .LBB322_1: 5524; PPC64LE-NEXT: lbarx 5, 0, 3 5525; PPC64LE-NEXT: cmplw 4, 5 5526; PPC64LE-NEXT: bge 0, .LBB322_3 5527; PPC64LE-NEXT: # %bb.2: 5528; PPC64LE-NEXT: stbcx. 4, 0, 3 5529; PPC64LE-NEXT: bne 0, .LBB322_1 5530; PPC64LE-NEXT: .LBB322_3: 5531; PPC64LE-NEXT: mr 3, 5 5532; PPC64LE-NEXT: blr 5533 %ret = atomicrmw umin i8* %ptr, i8 %val release 5534 ret i8 %ret 5535} 5536 5537define i8 @test323(i8* %ptr, i8 %val) { 5538; PPC64LE-LABEL: test323: 5539; PPC64LE: # %bb.0: 5540; PPC64LE-NEXT: lwsync 5541; PPC64LE-NEXT: .LBB323_1: 5542; PPC64LE-NEXT: lbarx 5, 0, 3 5543; PPC64LE-NEXT: cmplw 4, 5 5544; PPC64LE-NEXT: bge 0, .LBB323_3 5545; PPC64LE-NEXT: # %bb.2: 5546; PPC64LE-NEXT: stbcx. 4, 0, 3 5547; PPC64LE-NEXT: bne 0, .LBB323_1 5548; PPC64LE-NEXT: .LBB323_3: 5549; PPC64LE-NEXT: mr 3, 5 5550; PPC64LE-NEXT: lwsync 5551; PPC64LE-NEXT: blr 5552 %ret = atomicrmw umin i8* %ptr, i8 %val acq_rel 5553 ret i8 %ret 5554} 5555 5556define i8 @test324(i8* %ptr, i8 %val) { 5557; PPC64LE-LABEL: test324: 5558; PPC64LE: # %bb.0: 5559; PPC64LE-NEXT: sync 5560; PPC64LE-NEXT: .LBB324_1: 5561; PPC64LE-NEXT: lbarx 5, 0, 3 5562; PPC64LE-NEXT: cmplw 4, 5 5563; PPC64LE-NEXT: bge 0, .LBB324_3 5564; PPC64LE-NEXT: # %bb.2: 5565; PPC64LE-NEXT: stbcx. 4, 0, 3 5566; PPC64LE-NEXT: bne 0, .LBB324_1 5567; PPC64LE-NEXT: .LBB324_3: 5568; PPC64LE-NEXT: mr 3, 5 5569; PPC64LE-NEXT: lwsync 5570; PPC64LE-NEXT: blr 5571 %ret = atomicrmw umin i8* %ptr, i8 %val seq_cst 5572 ret i8 %ret 5573} 5574 5575define i16 @test325(i16* %ptr, i16 %val) { 5576; PPC64LE-LABEL: test325: 5577; PPC64LE: # %bb.0: 5578; PPC64LE-NEXT: .LBB325_1: 5579; PPC64LE-NEXT: lharx 5, 0, 3 5580; PPC64LE-NEXT: cmplw 4, 5 5581; PPC64LE-NEXT: bge 0, .LBB325_3 5582; PPC64LE-NEXT: # %bb.2: 5583; PPC64LE-NEXT: sthcx. 4, 0, 3 5584; PPC64LE-NEXT: bne 0, .LBB325_1 5585; PPC64LE-NEXT: .LBB325_3: 5586; PPC64LE-NEXT: mr 3, 5 5587; PPC64LE-NEXT: blr 5588 %ret = atomicrmw umin i16* %ptr, i16 %val monotonic 5589 ret i16 %ret 5590} 5591 5592define i16 @test326(i16* %ptr, i16 %val) { 5593; PPC64LE-LABEL: test326: 5594; PPC64LE: # %bb.0: 5595; PPC64LE-NEXT: mr 5, 3 5596; PPC64LE-NEXT: .LBB326_1: 5597; PPC64LE-NEXT: lharx 3, 0, 5 5598; PPC64LE-NEXT: cmplw 4, 3 5599; PPC64LE-NEXT: bge 0, .LBB326_3 5600; PPC64LE-NEXT: # %bb.2: 5601; PPC64LE-NEXT: sthcx. 4, 0, 5 5602; PPC64LE-NEXT: bne 0, .LBB326_1 5603; PPC64LE-NEXT: .LBB326_3: 5604; PPC64LE-NEXT: lwsync 5605; PPC64LE-NEXT: blr 5606 %ret = atomicrmw umin i16* %ptr, i16 %val acquire 5607 ret i16 %ret 5608} 5609 5610define i16 @test327(i16* %ptr, i16 %val) { 5611; PPC64LE-LABEL: test327: 5612; PPC64LE: # %bb.0: 5613; PPC64LE-NEXT: lwsync 5614; PPC64LE-NEXT: .LBB327_1: 5615; PPC64LE-NEXT: lharx 5, 0, 3 5616; PPC64LE-NEXT: cmplw 4, 5 5617; PPC64LE-NEXT: bge 0, .LBB327_3 5618; PPC64LE-NEXT: # %bb.2: 5619; PPC64LE-NEXT: sthcx. 4, 0, 3 5620; PPC64LE-NEXT: bne 0, .LBB327_1 5621; PPC64LE-NEXT: .LBB327_3: 5622; PPC64LE-NEXT: mr 3, 5 5623; PPC64LE-NEXT: blr 5624 %ret = atomicrmw umin i16* %ptr, i16 %val release 5625 ret i16 %ret 5626} 5627 5628define i16 @test328(i16* %ptr, i16 %val) { 5629; PPC64LE-LABEL: test328: 5630; PPC64LE: # %bb.0: 5631; PPC64LE-NEXT: lwsync 5632; PPC64LE-NEXT: .LBB328_1: 5633; PPC64LE-NEXT: lharx 5, 0, 3 5634; PPC64LE-NEXT: cmplw 4, 5 5635; PPC64LE-NEXT: bge 0, .LBB328_3 5636; PPC64LE-NEXT: # %bb.2: 5637; PPC64LE-NEXT: sthcx. 4, 0, 3 5638; PPC64LE-NEXT: bne 0, .LBB328_1 5639; PPC64LE-NEXT: .LBB328_3: 5640; PPC64LE-NEXT: mr 3, 5 5641; PPC64LE-NEXT: lwsync 5642; PPC64LE-NEXT: blr 5643 %ret = atomicrmw umin i16* %ptr, i16 %val acq_rel 5644 ret i16 %ret 5645} 5646 5647define i16 @test329(i16* %ptr, i16 %val) { 5648; PPC64LE-LABEL: test329: 5649; PPC64LE: # %bb.0: 5650; PPC64LE-NEXT: sync 5651; PPC64LE-NEXT: .LBB329_1: 5652; PPC64LE-NEXT: lharx 5, 0, 3 5653; PPC64LE-NEXT: cmplw 4, 5 5654; PPC64LE-NEXT: bge 0, .LBB329_3 5655; PPC64LE-NEXT: # %bb.2: 5656; PPC64LE-NEXT: sthcx. 4, 0, 3 5657; PPC64LE-NEXT: bne 0, .LBB329_1 5658; PPC64LE-NEXT: .LBB329_3: 5659; PPC64LE-NEXT: mr 3, 5 5660; PPC64LE-NEXT: lwsync 5661; PPC64LE-NEXT: blr 5662 %ret = atomicrmw umin i16* %ptr, i16 %val seq_cst 5663 ret i16 %ret 5664} 5665 5666define i32 @test330(i32* %ptr, i32 %val) { 5667; PPC64LE-LABEL: test330: 5668; PPC64LE: # %bb.0: 5669; PPC64LE-NEXT: .LBB330_1: 5670; PPC64LE-NEXT: lwarx 5, 0, 3 5671; PPC64LE-NEXT: cmplw 4, 5 5672; PPC64LE-NEXT: bge 0, .LBB330_3 5673; PPC64LE-NEXT: # %bb.2: 5674; PPC64LE-NEXT: stwcx. 4, 0, 3 5675; PPC64LE-NEXT: bne 0, .LBB330_1 5676; PPC64LE-NEXT: .LBB330_3: 5677; PPC64LE-NEXT: mr 3, 5 5678; PPC64LE-NEXT: blr 5679 %ret = atomicrmw umin i32* %ptr, i32 %val monotonic 5680 ret i32 %ret 5681} 5682 5683define i32 @test331(i32* %ptr, i32 %val) { 5684; PPC64LE-LABEL: test331: 5685; PPC64LE: # %bb.0: 5686; PPC64LE-NEXT: mr 5, 3 5687; PPC64LE-NEXT: .LBB331_1: 5688; PPC64LE-NEXT: lwarx 3, 0, 5 5689; PPC64LE-NEXT: cmplw 4, 3 5690; PPC64LE-NEXT: bge 0, .LBB331_3 5691; PPC64LE-NEXT: # %bb.2: 5692; PPC64LE-NEXT: stwcx. 4, 0, 5 5693; PPC64LE-NEXT: bne 0, .LBB331_1 5694; PPC64LE-NEXT: .LBB331_3: 5695; PPC64LE-NEXT: lwsync 5696; PPC64LE-NEXT: blr 5697 %ret = atomicrmw umin i32* %ptr, i32 %val acquire 5698 ret i32 %ret 5699} 5700 5701define i32 @test332(i32* %ptr, i32 %val) { 5702; PPC64LE-LABEL: test332: 5703; PPC64LE: # %bb.0: 5704; PPC64LE-NEXT: lwsync 5705; PPC64LE-NEXT: .LBB332_1: 5706; PPC64LE-NEXT: lwarx 5, 0, 3 5707; PPC64LE-NEXT: cmplw 4, 5 5708; PPC64LE-NEXT: bge 0, .LBB332_3 5709; PPC64LE-NEXT: # %bb.2: 5710; PPC64LE-NEXT: stwcx. 4, 0, 3 5711; PPC64LE-NEXT: bne 0, .LBB332_1 5712; PPC64LE-NEXT: .LBB332_3: 5713; PPC64LE-NEXT: mr 3, 5 5714; PPC64LE-NEXT: blr 5715 %ret = atomicrmw umin i32* %ptr, i32 %val release 5716 ret i32 %ret 5717} 5718 5719define i32 @test333(i32* %ptr, i32 %val) { 5720; PPC64LE-LABEL: test333: 5721; PPC64LE: # %bb.0: 5722; PPC64LE-NEXT: lwsync 5723; PPC64LE-NEXT: .LBB333_1: 5724; PPC64LE-NEXT: lwarx 5, 0, 3 5725; PPC64LE-NEXT: cmplw 4, 5 5726; PPC64LE-NEXT: bge 0, .LBB333_3 5727; PPC64LE-NEXT: # %bb.2: 5728; PPC64LE-NEXT: stwcx. 4, 0, 3 5729; PPC64LE-NEXT: bne 0, .LBB333_1 5730; PPC64LE-NEXT: .LBB333_3: 5731; PPC64LE-NEXT: mr 3, 5 5732; PPC64LE-NEXT: lwsync 5733; PPC64LE-NEXT: blr 5734 %ret = atomicrmw umin i32* %ptr, i32 %val acq_rel 5735 ret i32 %ret 5736} 5737 5738define i32 @test334(i32* %ptr, i32 %val) { 5739; PPC64LE-LABEL: test334: 5740; PPC64LE: # %bb.0: 5741; PPC64LE-NEXT: sync 5742; PPC64LE-NEXT: .LBB334_1: 5743; PPC64LE-NEXT: lwarx 5, 0, 3 5744; PPC64LE-NEXT: cmplw 4, 5 5745; PPC64LE-NEXT: bge 0, .LBB334_3 5746; PPC64LE-NEXT: # %bb.2: 5747; PPC64LE-NEXT: stwcx. 4, 0, 3 5748; PPC64LE-NEXT: bne 0, .LBB334_1 5749; PPC64LE-NEXT: .LBB334_3: 5750; PPC64LE-NEXT: mr 3, 5 5751; PPC64LE-NEXT: lwsync 5752; PPC64LE-NEXT: blr 5753 %ret = atomicrmw umin i32* %ptr, i32 %val seq_cst 5754 ret i32 %ret 5755} 5756 5757define i64 @test335(i64* %ptr, i64 %val) { 5758; PPC64LE-LABEL: test335: 5759; PPC64LE: # %bb.0: 5760; PPC64LE-NEXT: .LBB335_1: 5761; PPC64LE-NEXT: ldarx 5, 0, 3 5762; PPC64LE-NEXT: cmpld 4, 5 5763; PPC64LE-NEXT: bge 0, .LBB335_3 5764; PPC64LE-NEXT: # %bb.2: 5765; PPC64LE-NEXT: stdcx. 4, 0, 3 5766; PPC64LE-NEXT: bne 0, .LBB335_1 5767; PPC64LE-NEXT: .LBB335_3: 5768; PPC64LE-NEXT: mr 3, 5 5769; PPC64LE-NEXT: blr 5770 %ret = atomicrmw umin i64* %ptr, i64 %val monotonic 5771 ret i64 %ret 5772} 5773 5774define i64 @test336(i64* %ptr, i64 %val) { 5775; PPC64LE-LABEL: test336: 5776; PPC64LE: # %bb.0: 5777; PPC64LE-NEXT: mr 5, 3 5778; PPC64LE-NEXT: .LBB336_1: 5779; PPC64LE-NEXT: ldarx 3, 0, 5 5780; PPC64LE-NEXT: cmpld 4, 3 5781; PPC64LE-NEXT: bge 0, .LBB336_3 5782; PPC64LE-NEXT: # %bb.2: 5783; PPC64LE-NEXT: stdcx. 4, 0, 5 5784; PPC64LE-NEXT: bne 0, .LBB336_1 5785; PPC64LE-NEXT: .LBB336_3: 5786; PPC64LE-NEXT: lwsync 5787; PPC64LE-NEXT: blr 5788 %ret = atomicrmw umin i64* %ptr, i64 %val acquire 5789 ret i64 %ret 5790} 5791 5792define i64 @test337(i64* %ptr, i64 %val) { 5793; PPC64LE-LABEL: test337: 5794; PPC64LE: # %bb.0: 5795; PPC64LE-NEXT: lwsync 5796; PPC64LE-NEXT: .LBB337_1: 5797; PPC64LE-NEXT: ldarx 5, 0, 3 5798; PPC64LE-NEXT: cmpld 4, 5 5799; PPC64LE-NEXT: bge 0, .LBB337_3 5800; PPC64LE-NEXT: # %bb.2: 5801; PPC64LE-NEXT: stdcx. 4, 0, 3 5802; PPC64LE-NEXT: bne 0, .LBB337_1 5803; PPC64LE-NEXT: .LBB337_3: 5804; PPC64LE-NEXT: mr 3, 5 5805; PPC64LE-NEXT: blr 5806 %ret = atomicrmw umin i64* %ptr, i64 %val release 5807 ret i64 %ret 5808} 5809 5810define i64 @test338(i64* %ptr, i64 %val) { 5811; PPC64LE-LABEL: test338: 5812; PPC64LE: # %bb.0: 5813; PPC64LE-NEXT: lwsync 5814; PPC64LE-NEXT: .LBB338_1: 5815; PPC64LE-NEXT: ldarx 5, 0, 3 5816; PPC64LE-NEXT: cmpld 4, 5 5817; PPC64LE-NEXT: bge 0, .LBB338_3 5818; PPC64LE-NEXT: # %bb.2: 5819; PPC64LE-NEXT: stdcx. 4, 0, 3 5820; PPC64LE-NEXT: bne 0, .LBB338_1 5821; PPC64LE-NEXT: .LBB338_3: 5822; PPC64LE-NEXT: mr 3, 5 5823; PPC64LE-NEXT: lwsync 5824; PPC64LE-NEXT: blr 5825 %ret = atomicrmw umin i64* %ptr, i64 %val acq_rel 5826 ret i64 %ret 5827} 5828 5829define i64 @test339(i64* %ptr, i64 %val) { 5830; PPC64LE-LABEL: test339: 5831; PPC64LE: # %bb.0: 5832; PPC64LE-NEXT: sync 5833; PPC64LE-NEXT: .LBB339_1: 5834; PPC64LE-NEXT: ldarx 5, 0, 3 5835; PPC64LE-NEXT: cmpld 4, 5 5836; PPC64LE-NEXT: bge 0, .LBB339_3 5837; PPC64LE-NEXT: # %bb.2: 5838; PPC64LE-NEXT: stdcx. 4, 0, 3 5839; PPC64LE-NEXT: bne 0, .LBB339_1 5840; PPC64LE-NEXT: .LBB339_3: 5841; PPC64LE-NEXT: mr 3, 5 5842; PPC64LE-NEXT: lwsync 5843; PPC64LE-NEXT: blr 5844 %ret = atomicrmw umin i64* %ptr, i64 %val seq_cst 5845 ret i64 %ret 5846} 5847 5848define i8 @test340(i8* %ptr, i8 %val) { 5849; PPC64LE-LABEL: test340: 5850; PPC64LE: # %bb.0: 5851; PPC64LE-NEXT: .LBB340_1: 5852; PPC64LE-NEXT: lbarx 5, 0, 3 5853; PPC64LE-NEXT: stbcx. 4, 0, 3 5854; PPC64LE-NEXT: bne 0, .LBB340_1 5855; PPC64LE-NEXT: # %bb.2: 5856; PPC64LE-NEXT: mr 3, 5 5857; PPC64LE-NEXT: blr 5858 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") monotonic 5859 ret i8 %ret 5860} 5861 5862define i8 @test341(i8* %ptr, i8 %val) { 5863; PPC64LE-LABEL: test341: 5864; PPC64LE: # %bb.0: 5865; PPC64LE-NEXT: mr 5, 3 5866; PPC64LE-NEXT: .LBB341_1: 5867; PPC64LE-NEXT: lbarx 3, 0, 5 5868; PPC64LE-NEXT: stbcx. 4, 0, 5 5869; PPC64LE-NEXT: bne 0, .LBB341_1 5870; PPC64LE-NEXT: # %bb.2: 5871; PPC64LE-NEXT: lwsync 5872; PPC64LE-NEXT: blr 5873 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") acquire 5874 ret i8 %ret 5875} 5876 5877define i8 @test342(i8* %ptr, i8 %val) { 5878; PPC64LE-LABEL: test342: 5879; PPC64LE: # %bb.0: 5880; PPC64LE-NEXT: lwsync 5881; PPC64LE-NEXT: .LBB342_1: 5882; PPC64LE-NEXT: lbarx 5, 0, 3 5883; PPC64LE-NEXT: stbcx. 4, 0, 3 5884; PPC64LE-NEXT: bne 0, .LBB342_1 5885; PPC64LE-NEXT: # %bb.2: 5886; PPC64LE-NEXT: mr 3, 5 5887; PPC64LE-NEXT: blr 5888 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") release 5889 ret i8 %ret 5890} 5891 5892define i8 @test343(i8* %ptr, i8 %val) { 5893; PPC64LE-LABEL: test343: 5894; PPC64LE: # %bb.0: 5895; PPC64LE-NEXT: lwsync 5896; PPC64LE-NEXT: .LBB343_1: 5897; PPC64LE-NEXT: lbarx 5, 0, 3 5898; PPC64LE-NEXT: stbcx. 4, 0, 3 5899; PPC64LE-NEXT: bne 0, .LBB343_1 5900; PPC64LE-NEXT: # %bb.2: 5901; PPC64LE-NEXT: mr 3, 5 5902; PPC64LE-NEXT: lwsync 5903; PPC64LE-NEXT: blr 5904 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") acq_rel 5905 ret i8 %ret 5906} 5907 5908define i8 @test344(i8* %ptr, i8 %val) { 5909; PPC64LE-LABEL: test344: 5910; PPC64LE: # %bb.0: 5911; PPC64LE-NEXT: sync 5912; PPC64LE-NEXT: .LBB344_1: 5913; PPC64LE-NEXT: lbarx 5, 0, 3 5914; PPC64LE-NEXT: stbcx. 4, 0, 3 5915; PPC64LE-NEXT: bne 0, .LBB344_1 5916; PPC64LE-NEXT: # %bb.2: 5917; PPC64LE-NEXT: mr 3, 5 5918; PPC64LE-NEXT: lwsync 5919; PPC64LE-NEXT: blr 5920 %ret = atomicrmw xchg i8* %ptr, i8 %val syncscope("singlethread") seq_cst 5921 ret i8 %ret 5922} 5923 5924define i16 @test345(i16* %ptr, i16 %val) { 5925; PPC64LE-LABEL: test345: 5926; PPC64LE: # %bb.0: 5927; PPC64LE-NEXT: .LBB345_1: 5928; PPC64LE-NEXT: lharx 5, 0, 3 5929; PPC64LE-NEXT: sthcx. 4, 0, 3 5930; PPC64LE-NEXT: bne 0, .LBB345_1 5931; PPC64LE-NEXT: # %bb.2: 5932; PPC64LE-NEXT: mr 3, 5 5933; PPC64LE-NEXT: blr 5934 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") monotonic 5935 ret i16 %ret 5936} 5937 5938define i16 @test346(i16* %ptr, i16 %val) { 5939; PPC64LE-LABEL: test346: 5940; PPC64LE: # %bb.0: 5941; PPC64LE-NEXT: mr 5, 3 5942; PPC64LE-NEXT: .LBB346_1: 5943; PPC64LE-NEXT: lharx 3, 0, 5 5944; PPC64LE-NEXT: sthcx. 4, 0, 5 5945; PPC64LE-NEXT: bne 0, .LBB346_1 5946; PPC64LE-NEXT: # %bb.2: 5947; PPC64LE-NEXT: lwsync 5948; PPC64LE-NEXT: blr 5949 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") acquire 5950 ret i16 %ret 5951} 5952 5953define i16 @test347(i16* %ptr, i16 %val) { 5954; PPC64LE-LABEL: test347: 5955; PPC64LE: # %bb.0: 5956; PPC64LE-NEXT: lwsync 5957; PPC64LE-NEXT: .LBB347_1: 5958; PPC64LE-NEXT: lharx 5, 0, 3 5959; PPC64LE-NEXT: sthcx. 4, 0, 3 5960; PPC64LE-NEXT: bne 0, .LBB347_1 5961; PPC64LE-NEXT: # %bb.2: 5962; PPC64LE-NEXT: mr 3, 5 5963; PPC64LE-NEXT: blr 5964 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") release 5965 ret i16 %ret 5966} 5967 5968define i16 @test348(i16* %ptr, i16 %val) { 5969; PPC64LE-LABEL: test348: 5970; PPC64LE: # %bb.0: 5971; PPC64LE-NEXT: lwsync 5972; PPC64LE-NEXT: .LBB348_1: 5973; PPC64LE-NEXT: lharx 5, 0, 3 5974; PPC64LE-NEXT: sthcx. 4, 0, 3 5975; PPC64LE-NEXT: bne 0, .LBB348_1 5976; PPC64LE-NEXT: # %bb.2: 5977; PPC64LE-NEXT: mr 3, 5 5978; PPC64LE-NEXT: lwsync 5979; PPC64LE-NEXT: blr 5980 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") acq_rel 5981 ret i16 %ret 5982} 5983 5984define i16 @test349(i16* %ptr, i16 %val) { 5985; PPC64LE-LABEL: test349: 5986; PPC64LE: # %bb.0: 5987; PPC64LE-NEXT: sync 5988; PPC64LE-NEXT: .LBB349_1: 5989; PPC64LE-NEXT: lharx 5, 0, 3 5990; PPC64LE-NEXT: sthcx. 4, 0, 3 5991; PPC64LE-NEXT: bne 0, .LBB349_1 5992; PPC64LE-NEXT: # %bb.2: 5993; PPC64LE-NEXT: mr 3, 5 5994; PPC64LE-NEXT: lwsync 5995; PPC64LE-NEXT: blr 5996 %ret = atomicrmw xchg i16* %ptr, i16 %val syncscope("singlethread") seq_cst 5997 ret i16 %ret 5998} 5999 6000define i32 @test350(i32* %ptr, i32 %val) { 6001; PPC64LE-LABEL: test350: 6002; PPC64LE: # %bb.0: 6003; PPC64LE-NEXT: .LBB350_1: 6004; PPC64LE-NEXT: lwarx 5, 0, 3 6005; PPC64LE-NEXT: stwcx. 4, 0, 3 6006; PPC64LE-NEXT: bne 0, .LBB350_1 6007; PPC64LE-NEXT: # %bb.2: 6008; PPC64LE-NEXT: mr 3, 5 6009; PPC64LE-NEXT: blr 6010 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") monotonic 6011 ret i32 %ret 6012} 6013 6014define i32 @test351(i32* %ptr, i32 %val) { 6015; PPC64LE-LABEL: test351: 6016; PPC64LE: # %bb.0: 6017; PPC64LE-NEXT: mr 5, 3 6018; PPC64LE-NEXT: .LBB351_1: 6019; PPC64LE-NEXT: lwarx 3, 0, 5 6020; PPC64LE-NEXT: stwcx. 4, 0, 5 6021; PPC64LE-NEXT: bne 0, .LBB351_1 6022; PPC64LE-NEXT: # %bb.2: 6023; PPC64LE-NEXT: lwsync 6024; PPC64LE-NEXT: blr 6025 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") acquire 6026 ret i32 %ret 6027} 6028 6029define i32 @test352(i32* %ptr, i32 %val) { 6030; PPC64LE-LABEL: test352: 6031; PPC64LE: # %bb.0: 6032; PPC64LE-NEXT: lwsync 6033; PPC64LE-NEXT: .LBB352_1: 6034; PPC64LE-NEXT: lwarx 5, 0, 3 6035; PPC64LE-NEXT: stwcx. 4, 0, 3 6036; PPC64LE-NEXT: bne 0, .LBB352_1 6037; PPC64LE-NEXT: # %bb.2: 6038; PPC64LE-NEXT: mr 3, 5 6039; PPC64LE-NEXT: blr 6040 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") release 6041 ret i32 %ret 6042} 6043 6044define i32 @test353(i32* %ptr, i32 %val) { 6045; PPC64LE-LABEL: test353: 6046; PPC64LE: # %bb.0: 6047; PPC64LE-NEXT: lwsync 6048; PPC64LE-NEXT: .LBB353_1: 6049; PPC64LE-NEXT: lwarx 5, 0, 3 6050; PPC64LE-NEXT: stwcx. 4, 0, 3 6051; PPC64LE-NEXT: bne 0, .LBB353_1 6052; PPC64LE-NEXT: # %bb.2: 6053; PPC64LE-NEXT: mr 3, 5 6054; PPC64LE-NEXT: lwsync 6055; PPC64LE-NEXT: blr 6056 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6057 ret i32 %ret 6058} 6059 6060define i32 @test354(i32* %ptr, i32 %val) { 6061; PPC64LE-LABEL: test354: 6062; PPC64LE: # %bb.0: 6063; PPC64LE-NEXT: sync 6064; PPC64LE-NEXT: .LBB354_1: 6065; PPC64LE-NEXT: lwarx 5, 0, 3 6066; PPC64LE-NEXT: stwcx. 4, 0, 3 6067; PPC64LE-NEXT: bne 0, .LBB354_1 6068; PPC64LE-NEXT: # %bb.2: 6069; PPC64LE-NEXT: mr 3, 5 6070; PPC64LE-NEXT: lwsync 6071; PPC64LE-NEXT: blr 6072 %ret = atomicrmw xchg i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6073 ret i32 %ret 6074} 6075 6076define i64 @test355(i64* %ptr, i64 %val) { 6077; PPC64LE-LABEL: test355: 6078; PPC64LE: # %bb.0: 6079; PPC64LE-NEXT: .LBB355_1: 6080; PPC64LE-NEXT: ldarx 5, 0, 3 6081; PPC64LE-NEXT: stdcx. 4, 0, 3 6082; PPC64LE-NEXT: bne 0, .LBB355_1 6083; PPC64LE-NEXT: # %bb.2: 6084; PPC64LE-NEXT: mr 3, 5 6085; PPC64LE-NEXT: blr 6086 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") monotonic 6087 ret i64 %ret 6088} 6089 6090define i64 @test356(i64* %ptr, i64 %val) { 6091; PPC64LE-LABEL: test356: 6092; PPC64LE: # %bb.0: 6093; PPC64LE-NEXT: mr 5, 3 6094; PPC64LE-NEXT: .LBB356_1: 6095; PPC64LE-NEXT: ldarx 3, 0, 5 6096; PPC64LE-NEXT: stdcx. 4, 0, 5 6097; PPC64LE-NEXT: bne 0, .LBB356_1 6098; PPC64LE-NEXT: # %bb.2: 6099; PPC64LE-NEXT: lwsync 6100; PPC64LE-NEXT: blr 6101 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") acquire 6102 ret i64 %ret 6103} 6104 6105define i64 @test357(i64* %ptr, i64 %val) { 6106; PPC64LE-LABEL: test357: 6107; PPC64LE: # %bb.0: 6108; PPC64LE-NEXT: lwsync 6109; PPC64LE-NEXT: .LBB357_1: 6110; PPC64LE-NEXT: ldarx 5, 0, 3 6111; PPC64LE-NEXT: stdcx. 4, 0, 3 6112; PPC64LE-NEXT: bne 0, .LBB357_1 6113; PPC64LE-NEXT: # %bb.2: 6114; PPC64LE-NEXT: mr 3, 5 6115; PPC64LE-NEXT: blr 6116 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") release 6117 ret i64 %ret 6118} 6119 6120define i64 @test358(i64* %ptr, i64 %val) { 6121; PPC64LE-LABEL: test358: 6122; PPC64LE: # %bb.0: 6123; PPC64LE-NEXT: lwsync 6124; PPC64LE-NEXT: .LBB358_1: 6125; PPC64LE-NEXT: ldarx 5, 0, 3 6126; PPC64LE-NEXT: stdcx. 4, 0, 3 6127; PPC64LE-NEXT: bne 0, .LBB358_1 6128; PPC64LE-NEXT: # %bb.2: 6129; PPC64LE-NEXT: mr 3, 5 6130; PPC64LE-NEXT: lwsync 6131; PPC64LE-NEXT: blr 6132 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6133 ret i64 %ret 6134} 6135 6136define i64 @test359(i64* %ptr, i64 %val) { 6137; PPC64LE-LABEL: test359: 6138; PPC64LE: # %bb.0: 6139; PPC64LE-NEXT: sync 6140; PPC64LE-NEXT: .LBB359_1: 6141; PPC64LE-NEXT: ldarx 5, 0, 3 6142; PPC64LE-NEXT: stdcx. 4, 0, 3 6143; PPC64LE-NEXT: bne 0, .LBB359_1 6144; PPC64LE-NEXT: # %bb.2: 6145; PPC64LE-NEXT: mr 3, 5 6146; PPC64LE-NEXT: lwsync 6147; PPC64LE-NEXT: blr 6148 %ret = atomicrmw xchg i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6149 ret i64 %ret 6150} 6151 6152define i8 @test360(i8* %ptr, i8 %val) { 6153; PPC64LE-LABEL: test360: 6154; PPC64LE: # %bb.0: 6155; PPC64LE-NEXT: .LBB360_1: 6156; PPC64LE-NEXT: lbarx 5, 0, 3 6157; PPC64LE-NEXT: add 6, 4, 5 6158; PPC64LE-NEXT: stbcx. 6, 0, 3 6159; PPC64LE-NEXT: bne 0, .LBB360_1 6160; PPC64LE-NEXT: # %bb.2: 6161; PPC64LE-NEXT: mr 3, 5 6162; PPC64LE-NEXT: blr 6163 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") monotonic 6164 ret i8 %ret 6165} 6166 6167define i8 @test361(i8* %ptr, i8 %val) { 6168; PPC64LE-LABEL: test361: 6169; PPC64LE: # %bb.0: 6170; PPC64LE-NEXT: mr 5, 3 6171; PPC64LE-NEXT: .LBB361_1: 6172; PPC64LE-NEXT: lbarx 3, 0, 5 6173; PPC64LE-NEXT: add 6, 4, 3 6174; PPC64LE-NEXT: stbcx. 6, 0, 5 6175; PPC64LE-NEXT: bne 0, .LBB361_1 6176; PPC64LE-NEXT: # %bb.2: 6177; PPC64LE-NEXT: lwsync 6178; PPC64LE-NEXT: blr 6179 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") acquire 6180 ret i8 %ret 6181} 6182 6183define i8 @test362(i8* %ptr, i8 %val) { 6184; PPC64LE-LABEL: test362: 6185; PPC64LE: # %bb.0: 6186; PPC64LE-NEXT: lwsync 6187; PPC64LE-NEXT: .LBB362_1: 6188; PPC64LE-NEXT: lbarx 5, 0, 3 6189; PPC64LE-NEXT: add 6, 4, 5 6190; PPC64LE-NEXT: stbcx. 6, 0, 3 6191; PPC64LE-NEXT: bne 0, .LBB362_1 6192; PPC64LE-NEXT: # %bb.2: 6193; PPC64LE-NEXT: mr 3, 5 6194; PPC64LE-NEXT: blr 6195 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") release 6196 ret i8 %ret 6197} 6198 6199define i8 @test363(i8* %ptr, i8 %val) { 6200; PPC64LE-LABEL: test363: 6201; PPC64LE: # %bb.0: 6202; PPC64LE-NEXT: lwsync 6203; PPC64LE-NEXT: .LBB363_1: 6204; PPC64LE-NEXT: lbarx 5, 0, 3 6205; PPC64LE-NEXT: add 6, 4, 5 6206; PPC64LE-NEXT: stbcx. 6, 0, 3 6207; PPC64LE-NEXT: bne 0, .LBB363_1 6208; PPC64LE-NEXT: # %bb.2: 6209; PPC64LE-NEXT: mr 3, 5 6210; PPC64LE-NEXT: lwsync 6211; PPC64LE-NEXT: blr 6212 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6213 ret i8 %ret 6214} 6215 6216define i8 @test364(i8* %ptr, i8 %val) { 6217; PPC64LE-LABEL: test364: 6218; PPC64LE: # %bb.0: 6219; PPC64LE-NEXT: sync 6220; PPC64LE-NEXT: .LBB364_1: 6221; PPC64LE-NEXT: lbarx 5, 0, 3 6222; PPC64LE-NEXT: add 6, 4, 5 6223; PPC64LE-NEXT: stbcx. 6, 0, 3 6224; PPC64LE-NEXT: bne 0, .LBB364_1 6225; PPC64LE-NEXT: # %bb.2: 6226; PPC64LE-NEXT: mr 3, 5 6227; PPC64LE-NEXT: lwsync 6228; PPC64LE-NEXT: blr 6229 %ret = atomicrmw add i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6230 ret i8 %ret 6231} 6232 6233define i16 @test365(i16* %ptr, i16 %val) { 6234; PPC64LE-LABEL: test365: 6235; PPC64LE: # %bb.0: 6236; PPC64LE-NEXT: .LBB365_1: 6237; PPC64LE-NEXT: lharx 5, 0, 3 6238; PPC64LE-NEXT: add 6, 4, 5 6239; PPC64LE-NEXT: sthcx. 6, 0, 3 6240; PPC64LE-NEXT: bne 0, .LBB365_1 6241; PPC64LE-NEXT: # %bb.2: 6242; PPC64LE-NEXT: mr 3, 5 6243; PPC64LE-NEXT: blr 6244 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") monotonic 6245 ret i16 %ret 6246} 6247 6248define i16 @test366(i16* %ptr, i16 %val) { 6249; PPC64LE-LABEL: test366: 6250; PPC64LE: # %bb.0: 6251; PPC64LE-NEXT: mr 5, 3 6252; PPC64LE-NEXT: .LBB366_1: 6253; PPC64LE-NEXT: lharx 3, 0, 5 6254; PPC64LE-NEXT: add 6, 4, 3 6255; PPC64LE-NEXT: sthcx. 6, 0, 5 6256; PPC64LE-NEXT: bne 0, .LBB366_1 6257; PPC64LE-NEXT: # %bb.2: 6258; PPC64LE-NEXT: lwsync 6259; PPC64LE-NEXT: blr 6260 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") acquire 6261 ret i16 %ret 6262} 6263 6264define i16 @test367(i16* %ptr, i16 %val) { 6265; PPC64LE-LABEL: test367: 6266; PPC64LE: # %bb.0: 6267; PPC64LE-NEXT: lwsync 6268; PPC64LE-NEXT: .LBB367_1: 6269; PPC64LE-NEXT: lharx 5, 0, 3 6270; PPC64LE-NEXT: add 6, 4, 5 6271; PPC64LE-NEXT: sthcx. 6, 0, 3 6272; PPC64LE-NEXT: bne 0, .LBB367_1 6273; PPC64LE-NEXT: # %bb.2: 6274; PPC64LE-NEXT: mr 3, 5 6275; PPC64LE-NEXT: blr 6276 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") release 6277 ret i16 %ret 6278} 6279 6280define i16 @test368(i16* %ptr, i16 %val) { 6281; PPC64LE-LABEL: test368: 6282; PPC64LE: # %bb.0: 6283; PPC64LE-NEXT: lwsync 6284; PPC64LE-NEXT: .LBB368_1: 6285; PPC64LE-NEXT: lharx 5, 0, 3 6286; PPC64LE-NEXT: add 6, 4, 5 6287; PPC64LE-NEXT: sthcx. 6, 0, 3 6288; PPC64LE-NEXT: bne 0, .LBB368_1 6289; PPC64LE-NEXT: # %bb.2: 6290; PPC64LE-NEXT: mr 3, 5 6291; PPC64LE-NEXT: lwsync 6292; PPC64LE-NEXT: blr 6293 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6294 ret i16 %ret 6295} 6296 6297define i16 @test369(i16* %ptr, i16 %val) { 6298; PPC64LE-LABEL: test369: 6299; PPC64LE: # %bb.0: 6300; PPC64LE-NEXT: sync 6301; PPC64LE-NEXT: .LBB369_1: 6302; PPC64LE-NEXT: lharx 5, 0, 3 6303; PPC64LE-NEXT: add 6, 4, 5 6304; PPC64LE-NEXT: sthcx. 6, 0, 3 6305; PPC64LE-NEXT: bne 0, .LBB369_1 6306; PPC64LE-NEXT: # %bb.2: 6307; PPC64LE-NEXT: mr 3, 5 6308; PPC64LE-NEXT: lwsync 6309; PPC64LE-NEXT: blr 6310 %ret = atomicrmw add i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6311 ret i16 %ret 6312} 6313 6314define i32 @test370(i32* %ptr, i32 %val) { 6315; PPC64LE-LABEL: test370: 6316; PPC64LE: # %bb.0: 6317; PPC64LE-NEXT: .LBB370_1: 6318; PPC64LE-NEXT: lwarx 5, 0, 3 6319; PPC64LE-NEXT: add 6, 4, 5 6320; PPC64LE-NEXT: stwcx. 6, 0, 3 6321; PPC64LE-NEXT: bne 0, .LBB370_1 6322; PPC64LE-NEXT: # %bb.2: 6323; PPC64LE-NEXT: mr 3, 5 6324; PPC64LE-NEXT: blr 6325 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") monotonic 6326 ret i32 %ret 6327} 6328 6329define i32 @test371(i32* %ptr, i32 %val) { 6330; PPC64LE-LABEL: test371: 6331; PPC64LE: # %bb.0: 6332; PPC64LE-NEXT: mr 5, 3 6333; PPC64LE-NEXT: .LBB371_1: 6334; PPC64LE-NEXT: lwarx 3, 0, 5 6335; PPC64LE-NEXT: add 6, 4, 3 6336; PPC64LE-NEXT: stwcx. 6, 0, 5 6337; PPC64LE-NEXT: bne 0, .LBB371_1 6338; PPC64LE-NEXT: # %bb.2: 6339; PPC64LE-NEXT: lwsync 6340; PPC64LE-NEXT: blr 6341 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") acquire 6342 ret i32 %ret 6343} 6344 6345define i32 @test372(i32* %ptr, i32 %val) { 6346; PPC64LE-LABEL: test372: 6347; PPC64LE: # %bb.0: 6348; PPC64LE-NEXT: lwsync 6349; PPC64LE-NEXT: .LBB372_1: 6350; PPC64LE-NEXT: lwarx 5, 0, 3 6351; PPC64LE-NEXT: add 6, 4, 5 6352; PPC64LE-NEXT: stwcx. 6, 0, 3 6353; PPC64LE-NEXT: bne 0, .LBB372_1 6354; PPC64LE-NEXT: # %bb.2: 6355; PPC64LE-NEXT: mr 3, 5 6356; PPC64LE-NEXT: blr 6357 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") release 6358 ret i32 %ret 6359} 6360 6361define i32 @test373(i32* %ptr, i32 %val) { 6362; PPC64LE-LABEL: test373: 6363; PPC64LE: # %bb.0: 6364; PPC64LE-NEXT: lwsync 6365; PPC64LE-NEXT: .LBB373_1: 6366; PPC64LE-NEXT: lwarx 5, 0, 3 6367; PPC64LE-NEXT: add 6, 4, 5 6368; PPC64LE-NEXT: stwcx. 6, 0, 3 6369; PPC64LE-NEXT: bne 0, .LBB373_1 6370; PPC64LE-NEXT: # %bb.2: 6371; PPC64LE-NEXT: mr 3, 5 6372; PPC64LE-NEXT: lwsync 6373; PPC64LE-NEXT: blr 6374 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6375 ret i32 %ret 6376} 6377 6378define i32 @test374(i32* %ptr, i32 %val) { 6379; PPC64LE-LABEL: test374: 6380; PPC64LE: # %bb.0: 6381; PPC64LE-NEXT: sync 6382; PPC64LE-NEXT: .LBB374_1: 6383; PPC64LE-NEXT: lwarx 5, 0, 3 6384; PPC64LE-NEXT: add 6, 4, 5 6385; PPC64LE-NEXT: stwcx. 6, 0, 3 6386; PPC64LE-NEXT: bne 0, .LBB374_1 6387; PPC64LE-NEXT: # %bb.2: 6388; PPC64LE-NEXT: mr 3, 5 6389; PPC64LE-NEXT: lwsync 6390; PPC64LE-NEXT: blr 6391 %ret = atomicrmw add i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6392 ret i32 %ret 6393} 6394 6395define i64 @test375(i64* %ptr, i64 %val) { 6396; PPC64LE-LABEL: test375: 6397; PPC64LE: # %bb.0: 6398; PPC64LE-NEXT: .LBB375_1: 6399; PPC64LE-NEXT: ldarx 5, 0, 3 6400; PPC64LE-NEXT: add 6, 4, 5 6401; PPC64LE-NEXT: stdcx. 6, 0, 3 6402; PPC64LE-NEXT: bne 0, .LBB375_1 6403; PPC64LE-NEXT: # %bb.2: 6404; PPC64LE-NEXT: mr 3, 5 6405; PPC64LE-NEXT: blr 6406 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") monotonic 6407 ret i64 %ret 6408} 6409 6410define i64 @test376(i64* %ptr, i64 %val) { 6411; PPC64LE-LABEL: test376: 6412; PPC64LE: # %bb.0: 6413; PPC64LE-NEXT: mr 5, 3 6414; PPC64LE-NEXT: .LBB376_1: 6415; PPC64LE-NEXT: ldarx 3, 0, 5 6416; PPC64LE-NEXT: add 6, 4, 3 6417; PPC64LE-NEXT: stdcx. 6, 0, 5 6418; PPC64LE-NEXT: bne 0, .LBB376_1 6419; PPC64LE-NEXT: # %bb.2: 6420; PPC64LE-NEXT: lwsync 6421; PPC64LE-NEXT: blr 6422 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") acquire 6423 ret i64 %ret 6424} 6425 6426define i64 @test377(i64* %ptr, i64 %val) { 6427; PPC64LE-LABEL: test377: 6428; PPC64LE: # %bb.0: 6429; PPC64LE-NEXT: lwsync 6430; PPC64LE-NEXT: .LBB377_1: 6431; PPC64LE-NEXT: ldarx 5, 0, 3 6432; PPC64LE-NEXT: add 6, 4, 5 6433; PPC64LE-NEXT: stdcx. 6, 0, 3 6434; PPC64LE-NEXT: bne 0, .LBB377_1 6435; PPC64LE-NEXT: # %bb.2: 6436; PPC64LE-NEXT: mr 3, 5 6437; PPC64LE-NEXT: blr 6438 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") release 6439 ret i64 %ret 6440} 6441 6442define i64 @test378(i64* %ptr, i64 %val) { 6443; PPC64LE-LABEL: test378: 6444; PPC64LE: # %bb.0: 6445; PPC64LE-NEXT: lwsync 6446; PPC64LE-NEXT: .LBB378_1: 6447; PPC64LE-NEXT: ldarx 5, 0, 3 6448; PPC64LE-NEXT: add 6, 4, 5 6449; PPC64LE-NEXT: stdcx. 6, 0, 3 6450; PPC64LE-NEXT: bne 0, .LBB378_1 6451; PPC64LE-NEXT: # %bb.2: 6452; PPC64LE-NEXT: mr 3, 5 6453; PPC64LE-NEXT: lwsync 6454; PPC64LE-NEXT: blr 6455 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6456 ret i64 %ret 6457} 6458 6459define i64 @test379(i64* %ptr, i64 %val) { 6460; PPC64LE-LABEL: test379: 6461; PPC64LE: # %bb.0: 6462; PPC64LE-NEXT: sync 6463; PPC64LE-NEXT: .LBB379_1: 6464; PPC64LE-NEXT: ldarx 5, 0, 3 6465; PPC64LE-NEXT: add 6, 4, 5 6466; PPC64LE-NEXT: stdcx. 6, 0, 3 6467; PPC64LE-NEXT: bne 0, .LBB379_1 6468; PPC64LE-NEXT: # %bb.2: 6469; PPC64LE-NEXT: mr 3, 5 6470; PPC64LE-NEXT: lwsync 6471; PPC64LE-NEXT: blr 6472 %ret = atomicrmw add i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6473 ret i64 %ret 6474} 6475 6476define i8 @test380(i8* %ptr, i8 %val) { 6477; PPC64LE-LABEL: test380: 6478; PPC64LE: # %bb.0: 6479; PPC64LE-NEXT: .LBB380_1: 6480; PPC64LE-NEXT: lbarx 5, 0, 3 6481; PPC64LE-NEXT: sub 6, 5, 4 6482; PPC64LE-NEXT: stbcx. 6, 0, 3 6483; PPC64LE-NEXT: bne 0, .LBB380_1 6484; PPC64LE-NEXT: # %bb.2: 6485; PPC64LE-NEXT: mr 3, 5 6486; PPC64LE-NEXT: blr 6487 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") monotonic 6488 ret i8 %ret 6489} 6490 6491define i8 @test381(i8* %ptr, i8 %val) { 6492; PPC64LE-LABEL: test381: 6493; PPC64LE: # %bb.0: 6494; PPC64LE-NEXT: mr 5, 3 6495; PPC64LE-NEXT: .LBB381_1: 6496; PPC64LE-NEXT: lbarx 3, 0, 5 6497; PPC64LE-NEXT: sub 6, 3, 4 6498; PPC64LE-NEXT: stbcx. 6, 0, 5 6499; PPC64LE-NEXT: bne 0, .LBB381_1 6500; PPC64LE-NEXT: # %bb.2: 6501; PPC64LE-NEXT: lwsync 6502; PPC64LE-NEXT: blr 6503 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") acquire 6504 ret i8 %ret 6505} 6506 6507define i8 @test382(i8* %ptr, i8 %val) { 6508; PPC64LE-LABEL: test382: 6509; PPC64LE: # %bb.0: 6510; PPC64LE-NEXT: lwsync 6511; PPC64LE-NEXT: .LBB382_1: 6512; PPC64LE-NEXT: lbarx 5, 0, 3 6513; PPC64LE-NEXT: sub 6, 5, 4 6514; PPC64LE-NEXT: stbcx. 6, 0, 3 6515; PPC64LE-NEXT: bne 0, .LBB382_1 6516; PPC64LE-NEXT: # %bb.2: 6517; PPC64LE-NEXT: mr 3, 5 6518; PPC64LE-NEXT: blr 6519 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") release 6520 ret i8 %ret 6521} 6522 6523define i8 @test383(i8* %ptr, i8 %val) { 6524; PPC64LE-LABEL: test383: 6525; PPC64LE: # %bb.0: 6526; PPC64LE-NEXT: lwsync 6527; PPC64LE-NEXT: .LBB383_1: 6528; PPC64LE-NEXT: lbarx 5, 0, 3 6529; PPC64LE-NEXT: sub 6, 5, 4 6530; PPC64LE-NEXT: stbcx. 6, 0, 3 6531; PPC64LE-NEXT: bne 0, .LBB383_1 6532; PPC64LE-NEXT: # %bb.2: 6533; PPC64LE-NEXT: mr 3, 5 6534; PPC64LE-NEXT: lwsync 6535; PPC64LE-NEXT: blr 6536 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6537 ret i8 %ret 6538} 6539 6540define i8 @test384(i8* %ptr, i8 %val) { 6541; PPC64LE-LABEL: test384: 6542; PPC64LE: # %bb.0: 6543; PPC64LE-NEXT: sync 6544; PPC64LE-NEXT: .LBB384_1: 6545; PPC64LE-NEXT: lbarx 5, 0, 3 6546; PPC64LE-NEXT: sub 6, 5, 4 6547; PPC64LE-NEXT: stbcx. 6, 0, 3 6548; PPC64LE-NEXT: bne 0, .LBB384_1 6549; PPC64LE-NEXT: # %bb.2: 6550; PPC64LE-NEXT: mr 3, 5 6551; PPC64LE-NEXT: lwsync 6552; PPC64LE-NEXT: blr 6553 %ret = atomicrmw sub i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6554 ret i8 %ret 6555} 6556 6557define i16 @test385(i16* %ptr, i16 %val) { 6558; PPC64LE-LABEL: test385: 6559; PPC64LE: # %bb.0: 6560; PPC64LE-NEXT: .LBB385_1: 6561; PPC64LE-NEXT: lharx 5, 0, 3 6562; PPC64LE-NEXT: sub 6, 5, 4 6563; PPC64LE-NEXT: sthcx. 6, 0, 3 6564; PPC64LE-NEXT: bne 0, .LBB385_1 6565; PPC64LE-NEXT: # %bb.2: 6566; PPC64LE-NEXT: mr 3, 5 6567; PPC64LE-NEXT: blr 6568 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") monotonic 6569 ret i16 %ret 6570} 6571 6572define i16 @test386(i16* %ptr, i16 %val) { 6573; PPC64LE-LABEL: test386: 6574; PPC64LE: # %bb.0: 6575; PPC64LE-NEXT: mr 5, 3 6576; PPC64LE-NEXT: .LBB386_1: 6577; PPC64LE-NEXT: lharx 3, 0, 5 6578; PPC64LE-NEXT: sub 6, 3, 4 6579; PPC64LE-NEXT: sthcx. 6, 0, 5 6580; PPC64LE-NEXT: bne 0, .LBB386_1 6581; PPC64LE-NEXT: # %bb.2: 6582; PPC64LE-NEXT: lwsync 6583; PPC64LE-NEXT: blr 6584 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") acquire 6585 ret i16 %ret 6586} 6587 6588define i16 @test387(i16* %ptr, i16 %val) { 6589; PPC64LE-LABEL: test387: 6590; PPC64LE: # %bb.0: 6591; PPC64LE-NEXT: lwsync 6592; PPC64LE-NEXT: .LBB387_1: 6593; PPC64LE-NEXT: lharx 5, 0, 3 6594; PPC64LE-NEXT: sub 6, 5, 4 6595; PPC64LE-NEXT: sthcx. 6, 0, 3 6596; PPC64LE-NEXT: bne 0, .LBB387_1 6597; PPC64LE-NEXT: # %bb.2: 6598; PPC64LE-NEXT: mr 3, 5 6599; PPC64LE-NEXT: blr 6600 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") release 6601 ret i16 %ret 6602} 6603 6604define i16 @test388(i16* %ptr, i16 %val) { 6605; PPC64LE-LABEL: test388: 6606; PPC64LE: # %bb.0: 6607; PPC64LE-NEXT: lwsync 6608; PPC64LE-NEXT: .LBB388_1: 6609; PPC64LE-NEXT: lharx 5, 0, 3 6610; PPC64LE-NEXT: sub 6, 5, 4 6611; PPC64LE-NEXT: sthcx. 6, 0, 3 6612; PPC64LE-NEXT: bne 0, .LBB388_1 6613; PPC64LE-NEXT: # %bb.2: 6614; PPC64LE-NEXT: mr 3, 5 6615; PPC64LE-NEXT: lwsync 6616; PPC64LE-NEXT: blr 6617 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6618 ret i16 %ret 6619} 6620 6621define i16 @test389(i16* %ptr, i16 %val) { 6622; PPC64LE-LABEL: test389: 6623; PPC64LE: # %bb.0: 6624; PPC64LE-NEXT: sync 6625; PPC64LE-NEXT: .LBB389_1: 6626; PPC64LE-NEXT: lharx 5, 0, 3 6627; PPC64LE-NEXT: sub 6, 5, 4 6628; PPC64LE-NEXT: sthcx. 6, 0, 3 6629; PPC64LE-NEXT: bne 0, .LBB389_1 6630; PPC64LE-NEXT: # %bb.2: 6631; PPC64LE-NEXT: mr 3, 5 6632; PPC64LE-NEXT: lwsync 6633; PPC64LE-NEXT: blr 6634 %ret = atomicrmw sub i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6635 ret i16 %ret 6636} 6637 6638define i32 @test390(i32* %ptr, i32 %val) { 6639; PPC64LE-LABEL: test390: 6640; PPC64LE: # %bb.0: 6641; PPC64LE-NEXT: .LBB390_1: 6642; PPC64LE-NEXT: lwarx 5, 0, 3 6643; PPC64LE-NEXT: sub 6, 5, 4 6644; PPC64LE-NEXT: stwcx. 6, 0, 3 6645; PPC64LE-NEXT: bne 0, .LBB390_1 6646; PPC64LE-NEXT: # %bb.2: 6647; PPC64LE-NEXT: mr 3, 5 6648; PPC64LE-NEXT: blr 6649 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") monotonic 6650 ret i32 %ret 6651} 6652 6653define i32 @test391(i32* %ptr, i32 %val) { 6654; PPC64LE-LABEL: test391: 6655; PPC64LE: # %bb.0: 6656; PPC64LE-NEXT: mr 5, 3 6657; PPC64LE-NEXT: .LBB391_1: 6658; PPC64LE-NEXT: lwarx 3, 0, 5 6659; PPC64LE-NEXT: sub 6, 3, 4 6660; PPC64LE-NEXT: stwcx. 6, 0, 5 6661; PPC64LE-NEXT: bne 0, .LBB391_1 6662; PPC64LE-NEXT: # %bb.2: 6663; PPC64LE-NEXT: lwsync 6664; PPC64LE-NEXT: blr 6665 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") acquire 6666 ret i32 %ret 6667} 6668 6669define i32 @test392(i32* %ptr, i32 %val) { 6670; PPC64LE-LABEL: test392: 6671; PPC64LE: # %bb.0: 6672; PPC64LE-NEXT: lwsync 6673; PPC64LE-NEXT: .LBB392_1: 6674; PPC64LE-NEXT: lwarx 5, 0, 3 6675; PPC64LE-NEXT: sub 6, 5, 4 6676; PPC64LE-NEXT: stwcx. 6, 0, 3 6677; PPC64LE-NEXT: bne 0, .LBB392_1 6678; PPC64LE-NEXT: # %bb.2: 6679; PPC64LE-NEXT: mr 3, 5 6680; PPC64LE-NEXT: blr 6681 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") release 6682 ret i32 %ret 6683} 6684 6685define i32 @test393(i32* %ptr, i32 %val) { 6686; PPC64LE-LABEL: test393: 6687; PPC64LE: # %bb.0: 6688; PPC64LE-NEXT: lwsync 6689; PPC64LE-NEXT: .LBB393_1: 6690; PPC64LE-NEXT: lwarx 5, 0, 3 6691; PPC64LE-NEXT: sub 6, 5, 4 6692; PPC64LE-NEXT: stwcx. 6, 0, 3 6693; PPC64LE-NEXT: bne 0, .LBB393_1 6694; PPC64LE-NEXT: # %bb.2: 6695; PPC64LE-NEXT: mr 3, 5 6696; PPC64LE-NEXT: lwsync 6697; PPC64LE-NEXT: blr 6698 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") acq_rel 6699 ret i32 %ret 6700} 6701 6702define i32 @test394(i32* %ptr, i32 %val) { 6703; PPC64LE-LABEL: test394: 6704; PPC64LE: # %bb.0: 6705; PPC64LE-NEXT: sync 6706; PPC64LE-NEXT: .LBB394_1: 6707; PPC64LE-NEXT: lwarx 5, 0, 3 6708; PPC64LE-NEXT: sub 6, 5, 4 6709; PPC64LE-NEXT: stwcx. 6, 0, 3 6710; PPC64LE-NEXT: bne 0, .LBB394_1 6711; PPC64LE-NEXT: # %bb.2: 6712; PPC64LE-NEXT: mr 3, 5 6713; PPC64LE-NEXT: lwsync 6714; PPC64LE-NEXT: blr 6715 %ret = atomicrmw sub i32* %ptr, i32 %val syncscope("singlethread") seq_cst 6716 ret i32 %ret 6717} 6718 6719define i64 @test395(i64* %ptr, i64 %val) { 6720; PPC64LE-LABEL: test395: 6721; PPC64LE: # %bb.0: 6722; PPC64LE-NEXT: .LBB395_1: 6723; PPC64LE-NEXT: ldarx 5, 0, 3 6724; PPC64LE-NEXT: sub 6, 5, 4 6725; PPC64LE-NEXT: stdcx. 6, 0, 3 6726; PPC64LE-NEXT: bne 0, .LBB395_1 6727; PPC64LE-NEXT: # %bb.2: 6728; PPC64LE-NEXT: mr 3, 5 6729; PPC64LE-NEXT: blr 6730 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") monotonic 6731 ret i64 %ret 6732} 6733 6734define i64 @test396(i64* %ptr, i64 %val) { 6735; PPC64LE-LABEL: test396: 6736; PPC64LE: # %bb.0: 6737; PPC64LE-NEXT: mr 5, 3 6738; PPC64LE-NEXT: .LBB396_1: 6739; PPC64LE-NEXT: ldarx 3, 0, 5 6740; PPC64LE-NEXT: sub 6, 3, 4 6741; PPC64LE-NEXT: stdcx. 6, 0, 5 6742; PPC64LE-NEXT: bne 0, .LBB396_1 6743; PPC64LE-NEXT: # %bb.2: 6744; PPC64LE-NEXT: lwsync 6745; PPC64LE-NEXT: blr 6746 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") acquire 6747 ret i64 %ret 6748} 6749 6750define i64 @test397(i64* %ptr, i64 %val) { 6751; PPC64LE-LABEL: test397: 6752; PPC64LE: # %bb.0: 6753; PPC64LE-NEXT: lwsync 6754; PPC64LE-NEXT: .LBB397_1: 6755; PPC64LE-NEXT: ldarx 5, 0, 3 6756; PPC64LE-NEXT: sub 6, 5, 4 6757; PPC64LE-NEXT: stdcx. 6, 0, 3 6758; PPC64LE-NEXT: bne 0, .LBB397_1 6759; PPC64LE-NEXT: # %bb.2: 6760; PPC64LE-NEXT: mr 3, 5 6761; PPC64LE-NEXT: blr 6762 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") release 6763 ret i64 %ret 6764} 6765 6766define i64 @test398(i64* %ptr, i64 %val) { 6767; PPC64LE-LABEL: test398: 6768; PPC64LE: # %bb.0: 6769; PPC64LE-NEXT: lwsync 6770; PPC64LE-NEXT: .LBB398_1: 6771; PPC64LE-NEXT: ldarx 5, 0, 3 6772; PPC64LE-NEXT: sub 6, 5, 4 6773; PPC64LE-NEXT: stdcx. 6, 0, 3 6774; PPC64LE-NEXT: bne 0, .LBB398_1 6775; PPC64LE-NEXT: # %bb.2: 6776; PPC64LE-NEXT: mr 3, 5 6777; PPC64LE-NEXT: lwsync 6778; PPC64LE-NEXT: blr 6779 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") acq_rel 6780 ret i64 %ret 6781} 6782 6783define i64 @test399(i64* %ptr, i64 %val) { 6784; PPC64LE-LABEL: test399: 6785; PPC64LE: # %bb.0: 6786; PPC64LE-NEXT: sync 6787; PPC64LE-NEXT: .LBB399_1: 6788; PPC64LE-NEXT: ldarx 5, 0, 3 6789; PPC64LE-NEXT: sub 6, 5, 4 6790; PPC64LE-NEXT: stdcx. 6, 0, 3 6791; PPC64LE-NEXT: bne 0, .LBB399_1 6792; PPC64LE-NEXT: # %bb.2: 6793; PPC64LE-NEXT: mr 3, 5 6794; PPC64LE-NEXT: lwsync 6795; PPC64LE-NEXT: blr 6796 %ret = atomicrmw sub i64* %ptr, i64 %val syncscope("singlethread") seq_cst 6797 ret i64 %ret 6798} 6799 6800define i8 @test400(i8* %ptr, i8 %val) { 6801; PPC64LE-LABEL: test400: 6802; PPC64LE: # %bb.0: 6803; PPC64LE-NEXT: .LBB400_1: 6804; PPC64LE-NEXT: lbarx 5, 0, 3 6805; PPC64LE-NEXT: and 6, 4, 5 6806; PPC64LE-NEXT: stbcx. 6, 0, 3 6807; PPC64LE-NEXT: bne 0, .LBB400_1 6808; PPC64LE-NEXT: # %bb.2: 6809; PPC64LE-NEXT: mr 3, 5 6810; PPC64LE-NEXT: blr 6811 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") monotonic 6812 ret i8 %ret 6813} 6814 6815define i8 @test401(i8* %ptr, i8 %val) { 6816; PPC64LE-LABEL: test401: 6817; PPC64LE: # %bb.0: 6818; PPC64LE-NEXT: mr 5, 3 6819; PPC64LE-NEXT: .LBB401_1: 6820; PPC64LE-NEXT: lbarx 3, 0, 5 6821; PPC64LE-NEXT: and 6, 4, 3 6822; PPC64LE-NEXT: stbcx. 6, 0, 5 6823; PPC64LE-NEXT: bne 0, .LBB401_1 6824; PPC64LE-NEXT: # %bb.2: 6825; PPC64LE-NEXT: lwsync 6826; PPC64LE-NEXT: blr 6827 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") acquire 6828 ret i8 %ret 6829} 6830 6831define i8 @test402(i8* %ptr, i8 %val) { 6832; PPC64LE-LABEL: test402: 6833; PPC64LE: # %bb.0: 6834; PPC64LE-NEXT: lwsync 6835; PPC64LE-NEXT: .LBB402_1: 6836; PPC64LE-NEXT: lbarx 5, 0, 3 6837; PPC64LE-NEXT: and 6, 4, 5 6838; PPC64LE-NEXT: stbcx. 6, 0, 3 6839; PPC64LE-NEXT: bne 0, .LBB402_1 6840; PPC64LE-NEXT: # %bb.2: 6841; PPC64LE-NEXT: mr 3, 5 6842; PPC64LE-NEXT: blr 6843 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") release 6844 ret i8 %ret 6845} 6846 6847define i8 @test403(i8* %ptr, i8 %val) { 6848; PPC64LE-LABEL: test403: 6849; PPC64LE: # %bb.0: 6850; PPC64LE-NEXT: lwsync 6851; PPC64LE-NEXT: .LBB403_1: 6852; PPC64LE-NEXT: lbarx 5, 0, 3 6853; PPC64LE-NEXT: and 6, 4, 5 6854; PPC64LE-NEXT: stbcx. 6, 0, 3 6855; PPC64LE-NEXT: bne 0, .LBB403_1 6856; PPC64LE-NEXT: # %bb.2: 6857; PPC64LE-NEXT: mr 3, 5 6858; PPC64LE-NEXT: lwsync 6859; PPC64LE-NEXT: blr 6860 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") acq_rel 6861 ret i8 %ret 6862} 6863 6864define i8 @test404(i8* %ptr, i8 %val) { 6865; PPC64LE-LABEL: test404: 6866; PPC64LE: # %bb.0: 6867; PPC64LE-NEXT: sync 6868; PPC64LE-NEXT: .LBB404_1: 6869; PPC64LE-NEXT: lbarx 5, 0, 3 6870; PPC64LE-NEXT: and 6, 4, 5 6871; PPC64LE-NEXT: stbcx. 6, 0, 3 6872; PPC64LE-NEXT: bne 0, .LBB404_1 6873; PPC64LE-NEXT: # %bb.2: 6874; PPC64LE-NEXT: mr 3, 5 6875; PPC64LE-NEXT: lwsync 6876; PPC64LE-NEXT: blr 6877 %ret = atomicrmw and i8* %ptr, i8 %val syncscope("singlethread") seq_cst 6878 ret i8 %ret 6879} 6880 6881define i16 @test405(i16* %ptr, i16 %val) { 6882; PPC64LE-LABEL: test405: 6883; PPC64LE: # %bb.0: 6884; PPC64LE-NEXT: .LBB405_1: 6885; PPC64LE-NEXT: lharx 5, 0, 3 6886; PPC64LE-NEXT: and 6, 4, 5 6887; PPC64LE-NEXT: sthcx. 6, 0, 3 6888; PPC64LE-NEXT: bne 0, .LBB405_1 6889; PPC64LE-NEXT: # %bb.2: 6890; PPC64LE-NEXT: mr 3, 5 6891; PPC64LE-NEXT: blr 6892 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") monotonic 6893 ret i16 %ret 6894} 6895 6896define i16 @test406(i16* %ptr, i16 %val) { 6897; PPC64LE-LABEL: test406: 6898; PPC64LE: # %bb.0: 6899; PPC64LE-NEXT: mr 5, 3 6900; PPC64LE-NEXT: .LBB406_1: 6901; PPC64LE-NEXT: lharx 3, 0, 5 6902; PPC64LE-NEXT: and 6, 4, 3 6903; PPC64LE-NEXT: sthcx. 6, 0, 5 6904; PPC64LE-NEXT: bne 0, .LBB406_1 6905; PPC64LE-NEXT: # %bb.2: 6906; PPC64LE-NEXT: lwsync 6907; PPC64LE-NEXT: blr 6908 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") acquire 6909 ret i16 %ret 6910} 6911 6912define i16 @test407(i16* %ptr, i16 %val) { 6913; PPC64LE-LABEL: test407: 6914; PPC64LE: # %bb.0: 6915; PPC64LE-NEXT: lwsync 6916; PPC64LE-NEXT: .LBB407_1: 6917; PPC64LE-NEXT: lharx 5, 0, 3 6918; PPC64LE-NEXT: and 6, 4, 5 6919; PPC64LE-NEXT: sthcx. 6, 0, 3 6920; PPC64LE-NEXT: bne 0, .LBB407_1 6921; PPC64LE-NEXT: # %bb.2: 6922; PPC64LE-NEXT: mr 3, 5 6923; PPC64LE-NEXT: blr 6924 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") release 6925 ret i16 %ret 6926} 6927 6928define i16 @test408(i16* %ptr, i16 %val) { 6929; PPC64LE-LABEL: test408: 6930; PPC64LE: # %bb.0: 6931; PPC64LE-NEXT: lwsync 6932; PPC64LE-NEXT: .LBB408_1: 6933; PPC64LE-NEXT: lharx 5, 0, 3 6934; PPC64LE-NEXT: and 6, 4, 5 6935; PPC64LE-NEXT: sthcx. 6, 0, 3 6936; PPC64LE-NEXT: bne 0, .LBB408_1 6937; PPC64LE-NEXT: # %bb.2: 6938; PPC64LE-NEXT: mr 3, 5 6939; PPC64LE-NEXT: lwsync 6940; PPC64LE-NEXT: blr 6941 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") acq_rel 6942 ret i16 %ret 6943} 6944 6945define i16 @test409(i16* %ptr, i16 %val) { 6946; PPC64LE-LABEL: test409: 6947; PPC64LE: # %bb.0: 6948; PPC64LE-NEXT: sync 6949; PPC64LE-NEXT: .LBB409_1: 6950; PPC64LE-NEXT: lharx 5, 0, 3 6951; PPC64LE-NEXT: and 6, 4, 5 6952; PPC64LE-NEXT: sthcx. 6, 0, 3 6953; PPC64LE-NEXT: bne 0, .LBB409_1 6954; PPC64LE-NEXT: # %bb.2: 6955; PPC64LE-NEXT: mr 3, 5 6956; PPC64LE-NEXT: lwsync 6957; PPC64LE-NEXT: blr 6958 %ret = atomicrmw and i16* %ptr, i16 %val syncscope("singlethread") seq_cst 6959 ret i16 %ret 6960} 6961 6962define i32 @test410(i32* %ptr, i32 %val) { 6963; PPC64LE-LABEL: test410: 6964; PPC64LE: # %bb.0: 6965; PPC64LE-NEXT: .LBB410_1: 6966; PPC64LE-NEXT: lwarx 5, 0, 3 6967; PPC64LE-NEXT: and 6, 4, 5 6968; PPC64LE-NEXT: stwcx. 6, 0, 3 6969; PPC64LE-NEXT: bne 0, .LBB410_1 6970; PPC64LE-NEXT: # %bb.2: 6971; PPC64LE-NEXT: mr 3, 5 6972; PPC64LE-NEXT: blr 6973 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") monotonic 6974 ret i32 %ret 6975} 6976 6977define i32 @test411(i32* %ptr, i32 %val) { 6978; PPC64LE-LABEL: test411: 6979; PPC64LE: # %bb.0: 6980; PPC64LE-NEXT: mr 5, 3 6981; PPC64LE-NEXT: .LBB411_1: 6982; PPC64LE-NEXT: lwarx 3, 0, 5 6983; PPC64LE-NEXT: and 6, 4, 3 6984; PPC64LE-NEXT: stwcx. 6, 0, 5 6985; PPC64LE-NEXT: bne 0, .LBB411_1 6986; PPC64LE-NEXT: # %bb.2: 6987; PPC64LE-NEXT: lwsync 6988; PPC64LE-NEXT: blr 6989 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") acquire 6990 ret i32 %ret 6991} 6992 6993define i32 @test412(i32* %ptr, i32 %val) { 6994; PPC64LE-LABEL: test412: 6995; PPC64LE: # %bb.0: 6996; PPC64LE-NEXT: lwsync 6997; PPC64LE-NEXT: .LBB412_1: 6998; PPC64LE-NEXT: lwarx 5, 0, 3 6999; PPC64LE-NEXT: and 6, 4, 5 7000; PPC64LE-NEXT: stwcx. 6, 0, 3 7001; PPC64LE-NEXT: bne 0, .LBB412_1 7002; PPC64LE-NEXT: # %bb.2: 7003; PPC64LE-NEXT: mr 3, 5 7004; PPC64LE-NEXT: blr 7005 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") release 7006 ret i32 %ret 7007} 7008 7009define i32 @test413(i32* %ptr, i32 %val) { 7010; PPC64LE-LABEL: test413: 7011; PPC64LE: # %bb.0: 7012; PPC64LE-NEXT: lwsync 7013; PPC64LE-NEXT: .LBB413_1: 7014; PPC64LE-NEXT: lwarx 5, 0, 3 7015; PPC64LE-NEXT: and 6, 4, 5 7016; PPC64LE-NEXT: stwcx. 6, 0, 3 7017; PPC64LE-NEXT: bne 0, .LBB413_1 7018; PPC64LE-NEXT: # %bb.2: 7019; PPC64LE-NEXT: mr 3, 5 7020; PPC64LE-NEXT: lwsync 7021; PPC64LE-NEXT: blr 7022 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7023 ret i32 %ret 7024} 7025 7026define i32 @test414(i32* %ptr, i32 %val) { 7027; PPC64LE-LABEL: test414: 7028; PPC64LE: # %bb.0: 7029; PPC64LE-NEXT: sync 7030; PPC64LE-NEXT: .LBB414_1: 7031; PPC64LE-NEXT: lwarx 5, 0, 3 7032; PPC64LE-NEXT: and 6, 4, 5 7033; PPC64LE-NEXT: stwcx. 6, 0, 3 7034; PPC64LE-NEXT: bne 0, .LBB414_1 7035; PPC64LE-NEXT: # %bb.2: 7036; PPC64LE-NEXT: mr 3, 5 7037; PPC64LE-NEXT: lwsync 7038; PPC64LE-NEXT: blr 7039 %ret = atomicrmw and i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7040 ret i32 %ret 7041} 7042 7043define i64 @test415(i64* %ptr, i64 %val) { 7044; PPC64LE-LABEL: test415: 7045; PPC64LE: # %bb.0: 7046; PPC64LE-NEXT: .LBB415_1: 7047; PPC64LE-NEXT: ldarx 5, 0, 3 7048; PPC64LE-NEXT: and 6, 4, 5 7049; PPC64LE-NEXT: stdcx. 6, 0, 3 7050; PPC64LE-NEXT: bne 0, .LBB415_1 7051; PPC64LE-NEXT: # %bb.2: 7052; PPC64LE-NEXT: mr 3, 5 7053; PPC64LE-NEXT: blr 7054 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") monotonic 7055 ret i64 %ret 7056} 7057 7058define i64 @test416(i64* %ptr, i64 %val) { 7059; PPC64LE-LABEL: test416: 7060; PPC64LE: # %bb.0: 7061; PPC64LE-NEXT: mr 5, 3 7062; PPC64LE-NEXT: .LBB416_1: 7063; PPC64LE-NEXT: ldarx 3, 0, 5 7064; PPC64LE-NEXT: and 6, 4, 3 7065; PPC64LE-NEXT: stdcx. 6, 0, 5 7066; PPC64LE-NEXT: bne 0, .LBB416_1 7067; PPC64LE-NEXT: # %bb.2: 7068; PPC64LE-NEXT: lwsync 7069; PPC64LE-NEXT: blr 7070 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") acquire 7071 ret i64 %ret 7072} 7073 7074define i64 @test417(i64* %ptr, i64 %val) { 7075; PPC64LE-LABEL: test417: 7076; PPC64LE: # %bb.0: 7077; PPC64LE-NEXT: lwsync 7078; PPC64LE-NEXT: .LBB417_1: 7079; PPC64LE-NEXT: ldarx 5, 0, 3 7080; PPC64LE-NEXT: and 6, 4, 5 7081; PPC64LE-NEXT: stdcx. 6, 0, 3 7082; PPC64LE-NEXT: bne 0, .LBB417_1 7083; PPC64LE-NEXT: # %bb.2: 7084; PPC64LE-NEXT: mr 3, 5 7085; PPC64LE-NEXT: blr 7086 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") release 7087 ret i64 %ret 7088} 7089 7090define i64 @test418(i64* %ptr, i64 %val) { 7091; PPC64LE-LABEL: test418: 7092; PPC64LE: # %bb.0: 7093; PPC64LE-NEXT: lwsync 7094; PPC64LE-NEXT: .LBB418_1: 7095; PPC64LE-NEXT: ldarx 5, 0, 3 7096; PPC64LE-NEXT: and 6, 4, 5 7097; PPC64LE-NEXT: stdcx. 6, 0, 3 7098; PPC64LE-NEXT: bne 0, .LBB418_1 7099; PPC64LE-NEXT: # %bb.2: 7100; PPC64LE-NEXT: mr 3, 5 7101; PPC64LE-NEXT: lwsync 7102; PPC64LE-NEXT: blr 7103 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7104 ret i64 %ret 7105} 7106 7107define i64 @test419(i64* %ptr, i64 %val) { 7108; PPC64LE-LABEL: test419: 7109; PPC64LE: # %bb.0: 7110; PPC64LE-NEXT: sync 7111; PPC64LE-NEXT: .LBB419_1: 7112; PPC64LE-NEXT: ldarx 5, 0, 3 7113; PPC64LE-NEXT: and 6, 4, 5 7114; PPC64LE-NEXT: stdcx. 6, 0, 3 7115; PPC64LE-NEXT: bne 0, .LBB419_1 7116; PPC64LE-NEXT: # %bb.2: 7117; PPC64LE-NEXT: mr 3, 5 7118; PPC64LE-NEXT: lwsync 7119; PPC64LE-NEXT: blr 7120 %ret = atomicrmw and i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7121 ret i64 %ret 7122} 7123 7124define i8 @test420(i8* %ptr, i8 %val) { 7125; PPC64LE-LABEL: test420: 7126; PPC64LE: # %bb.0: 7127; PPC64LE-NEXT: .LBB420_1: 7128; PPC64LE-NEXT: lbarx 5, 0, 3 7129; PPC64LE-NEXT: nand 6, 4, 5 7130; PPC64LE-NEXT: stbcx. 6, 0, 3 7131; PPC64LE-NEXT: bne 0, .LBB420_1 7132; PPC64LE-NEXT: # %bb.2: 7133; PPC64LE-NEXT: mr 3, 5 7134; PPC64LE-NEXT: blr 7135 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") monotonic 7136 ret i8 %ret 7137} 7138 7139define i8 @test421(i8* %ptr, i8 %val) { 7140; PPC64LE-LABEL: test421: 7141; PPC64LE: # %bb.0: 7142; PPC64LE-NEXT: mr 5, 3 7143; PPC64LE-NEXT: .LBB421_1: 7144; PPC64LE-NEXT: lbarx 3, 0, 5 7145; PPC64LE-NEXT: nand 6, 4, 3 7146; PPC64LE-NEXT: stbcx. 6, 0, 5 7147; PPC64LE-NEXT: bne 0, .LBB421_1 7148; PPC64LE-NEXT: # %bb.2: 7149; PPC64LE-NEXT: lwsync 7150; PPC64LE-NEXT: blr 7151 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") acquire 7152 ret i8 %ret 7153} 7154 7155define i8 @test422(i8* %ptr, i8 %val) { 7156; PPC64LE-LABEL: test422: 7157; PPC64LE: # %bb.0: 7158; PPC64LE-NEXT: lwsync 7159; PPC64LE-NEXT: .LBB422_1: 7160; PPC64LE-NEXT: lbarx 5, 0, 3 7161; PPC64LE-NEXT: nand 6, 4, 5 7162; PPC64LE-NEXT: stbcx. 6, 0, 3 7163; PPC64LE-NEXT: bne 0, .LBB422_1 7164; PPC64LE-NEXT: # %bb.2: 7165; PPC64LE-NEXT: mr 3, 5 7166; PPC64LE-NEXT: blr 7167 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") release 7168 ret i8 %ret 7169} 7170 7171define i8 @test423(i8* %ptr, i8 %val) { 7172; PPC64LE-LABEL: test423: 7173; PPC64LE: # %bb.0: 7174; PPC64LE-NEXT: lwsync 7175; PPC64LE-NEXT: .LBB423_1: 7176; PPC64LE-NEXT: lbarx 5, 0, 3 7177; PPC64LE-NEXT: nand 6, 4, 5 7178; PPC64LE-NEXT: stbcx. 6, 0, 3 7179; PPC64LE-NEXT: bne 0, .LBB423_1 7180; PPC64LE-NEXT: # %bb.2: 7181; PPC64LE-NEXT: mr 3, 5 7182; PPC64LE-NEXT: lwsync 7183; PPC64LE-NEXT: blr 7184 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7185 ret i8 %ret 7186} 7187 7188define i8 @test424(i8* %ptr, i8 %val) { 7189; PPC64LE-LABEL: test424: 7190; PPC64LE: # %bb.0: 7191; PPC64LE-NEXT: sync 7192; PPC64LE-NEXT: .LBB424_1: 7193; PPC64LE-NEXT: lbarx 5, 0, 3 7194; PPC64LE-NEXT: nand 6, 4, 5 7195; PPC64LE-NEXT: stbcx. 6, 0, 3 7196; PPC64LE-NEXT: bne 0, .LBB424_1 7197; PPC64LE-NEXT: # %bb.2: 7198; PPC64LE-NEXT: mr 3, 5 7199; PPC64LE-NEXT: lwsync 7200; PPC64LE-NEXT: blr 7201 %ret = atomicrmw nand i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7202 ret i8 %ret 7203} 7204 7205define i16 @test425(i16* %ptr, i16 %val) { 7206; PPC64LE-LABEL: test425: 7207; PPC64LE: # %bb.0: 7208; PPC64LE-NEXT: .LBB425_1: 7209; PPC64LE-NEXT: lharx 5, 0, 3 7210; PPC64LE-NEXT: nand 6, 4, 5 7211; PPC64LE-NEXT: sthcx. 6, 0, 3 7212; PPC64LE-NEXT: bne 0, .LBB425_1 7213; PPC64LE-NEXT: # %bb.2: 7214; PPC64LE-NEXT: mr 3, 5 7215; PPC64LE-NEXT: blr 7216 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") monotonic 7217 ret i16 %ret 7218} 7219 7220define i16 @test426(i16* %ptr, i16 %val) { 7221; PPC64LE-LABEL: test426: 7222; PPC64LE: # %bb.0: 7223; PPC64LE-NEXT: mr 5, 3 7224; PPC64LE-NEXT: .LBB426_1: 7225; PPC64LE-NEXT: lharx 3, 0, 5 7226; PPC64LE-NEXT: nand 6, 4, 3 7227; PPC64LE-NEXT: sthcx. 6, 0, 5 7228; PPC64LE-NEXT: bne 0, .LBB426_1 7229; PPC64LE-NEXT: # %bb.2: 7230; PPC64LE-NEXT: lwsync 7231; PPC64LE-NEXT: blr 7232 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") acquire 7233 ret i16 %ret 7234} 7235 7236define i16 @test427(i16* %ptr, i16 %val) { 7237; PPC64LE-LABEL: test427: 7238; PPC64LE: # %bb.0: 7239; PPC64LE-NEXT: lwsync 7240; PPC64LE-NEXT: .LBB427_1: 7241; PPC64LE-NEXT: lharx 5, 0, 3 7242; PPC64LE-NEXT: nand 6, 4, 5 7243; PPC64LE-NEXT: sthcx. 6, 0, 3 7244; PPC64LE-NEXT: bne 0, .LBB427_1 7245; PPC64LE-NEXT: # %bb.2: 7246; PPC64LE-NEXT: mr 3, 5 7247; PPC64LE-NEXT: blr 7248 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") release 7249 ret i16 %ret 7250} 7251 7252define i16 @test428(i16* %ptr, i16 %val) { 7253; PPC64LE-LABEL: test428: 7254; PPC64LE: # %bb.0: 7255; PPC64LE-NEXT: lwsync 7256; PPC64LE-NEXT: .LBB428_1: 7257; PPC64LE-NEXT: lharx 5, 0, 3 7258; PPC64LE-NEXT: nand 6, 4, 5 7259; PPC64LE-NEXT: sthcx. 6, 0, 3 7260; PPC64LE-NEXT: bne 0, .LBB428_1 7261; PPC64LE-NEXT: # %bb.2: 7262; PPC64LE-NEXT: mr 3, 5 7263; PPC64LE-NEXT: lwsync 7264; PPC64LE-NEXT: blr 7265 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7266 ret i16 %ret 7267} 7268 7269define i16 @test429(i16* %ptr, i16 %val) { 7270; PPC64LE-LABEL: test429: 7271; PPC64LE: # %bb.0: 7272; PPC64LE-NEXT: sync 7273; PPC64LE-NEXT: .LBB429_1: 7274; PPC64LE-NEXT: lharx 5, 0, 3 7275; PPC64LE-NEXT: nand 6, 4, 5 7276; PPC64LE-NEXT: sthcx. 6, 0, 3 7277; PPC64LE-NEXT: bne 0, .LBB429_1 7278; PPC64LE-NEXT: # %bb.2: 7279; PPC64LE-NEXT: mr 3, 5 7280; PPC64LE-NEXT: lwsync 7281; PPC64LE-NEXT: blr 7282 %ret = atomicrmw nand i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7283 ret i16 %ret 7284} 7285 7286define i32 @test430(i32* %ptr, i32 %val) { 7287; PPC64LE-LABEL: test430: 7288; PPC64LE: # %bb.0: 7289; PPC64LE-NEXT: .LBB430_1: 7290; PPC64LE-NEXT: lwarx 5, 0, 3 7291; PPC64LE-NEXT: nand 6, 4, 5 7292; PPC64LE-NEXT: stwcx. 6, 0, 3 7293; PPC64LE-NEXT: bne 0, .LBB430_1 7294; PPC64LE-NEXT: # %bb.2: 7295; PPC64LE-NEXT: mr 3, 5 7296; PPC64LE-NEXT: blr 7297 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") monotonic 7298 ret i32 %ret 7299} 7300 7301define i32 @test431(i32* %ptr, i32 %val) { 7302; PPC64LE-LABEL: test431: 7303; PPC64LE: # %bb.0: 7304; PPC64LE-NEXT: mr 5, 3 7305; PPC64LE-NEXT: .LBB431_1: 7306; PPC64LE-NEXT: lwarx 3, 0, 5 7307; PPC64LE-NEXT: nand 6, 4, 3 7308; PPC64LE-NEXT: stwcx. 6, 0, 5 7309; PPC64LE-NEXT: bne 0, .LBB431_1 7310; PPC64LE-NEXT: # %bb.2: 7311; PPC64LE-NEXT: lwsync 7312; PPC64LE-NEXT: blr 7313 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") acquire 7314 ret i32 %ret 7315} 7316 7317define i32 @test432(i32* %ptr, i32 %val) { 7318; PPC64LE-LABEL: test432: 7319; PPC64LE: # %bb.0: 7320; PPC64LE-NEXT: lwsync 7321; PPC64LE-NEXT: .LBB432_1: 7322; PPC64LE-NEXT: lwarx 5, 0, 3 7323; PPC64LE-NEXT: nand 6, 4, 5 7324; PPC64LE-NEXT: stwcx. 6, 0, 3 7325; PPC64LE-NEXT: bne 0, .LBB432_1 7326; PPC64LE-NEXT: # %bb.2: 7327; PPC64LE-NEXT: mr 3, 5 7328; PPC64LE-NEXT: blr 7329 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") release 7330 ret i32 %ret 7331} 7332 7333define i32 @test433(i32* %ptr, i32 %val) { 7334; PPC64LE-LABEL: test433: 7335; PPC64LE: # %bb.0: 7336; PPC64LE-NEXT: lwsync 7337; PPC64LE-NEXT: .LBB433_1: 7338; PPC64LE-NEXT: lwarx 5, 0, 3 7339; PPC64LE-NEXT: nand 6, 4, 5 7340; PPC64LE-NEXT: stwcx. 6, 0, 3 7341; PPC64LE-NEXT: bne 0, .LBB433_1 7342; PPC64LE-NEXT: # %bb.2: 7343; PPC64LE-NEXT: mr 3, 5 7344; PPC64LE-NEXT: lwsync 7345; PPC64LE-NEXT: blr 7346 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7347 ret i32 %ret 7348} 7349 7350define i32 @test434(i32* %ptr, i32 %val) { 7351; PPC64LE-LABEL: test434: 7352; PPC64LE: # %bb.0: 7353; PPC64LE-NEXT: sync 7354; PPC64LE-NEXT: .LBB434_1: 7355; PPC64LE-NEXT: lwarx 5, 0, 3 7356; PPC64LE-NEXT: nand 6, 4, 5 7357; PPC64LE-NEXT: stwcx. 6, 0, 3 7358; PPC64LE-NEXT: bne 0, .LBB434_1 7359; PPC64LE-NEXT: # %bb.2: 7360; PPC64LE-NEXT: mr 3, 5 7361; PPC64LE-NEXT: lwsync 7362; PPC64LE-NEXT: blr 7363 %ret = atomicrmw nand i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7364 ret i32 %ret 7365} 7366 7367define i64 @test435(i64* %ptr, i64 %val) { 7368; PPC64LE-LABEL: test435: 7369; PPC64LE: # %bb.0: 7370; PPC64LE-NEXT: .LBB435_1: 7371; PPC64LE-NEXT: ldarx 5, 0, 3 7372; PPC64LE-NEXT: nand 6, 4, 5 7373; PPC64LE-NEXT: stdcx. 6, 0, 3 7374; PPC64LE-NEXT: bne 0, .LBB435_1 7375; PPC64LE-NEXT: # %bb.2: 7376; PPC64LE-NEXT: mr 3, 5 7377; PPC64LE-NEXT: blr 7378 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") monotonic 7379 ret i64 %ret 7380} 7381 7382define i64 @test436(i64* %ptr, i64 %val) { 7383; PPC64LE-LABEL: test436: 7384; PPC64LE: # %bb.0: 7385; PPC64LE-NEXT: mr 5, 3 7386; PPC64LE-NEXT: .LBB436_1: 7387; PPC64LE-NEXT: ldarx 3, 0, 5 7388; PPC64LE-NEXT: nand 6, 4, 3 7389; PPC64LE-NEXT: stdcx. 6, 0, 5 7390; PPC64LE-NEXT: bne 0, .LBB436_1 7391; PPC64LE-NEXT: # %bb.2: 7392; PPC64LE-NEXT: lwsync 7393; PPC64LE-NEXT: blr 7394 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") acquire 7395 ret i64 %ret 7396} 7397 7398define i64 @test437(i64* %ptr, i64 %val) { 7399; PPC64LE-LABEL: test437: 7400; PPC64LE: # %bb.0: 7401; PPC64LE-NEXT: lwsync 7402; PPC64LE-NEXT: .LBB437_1: 7403; PPC64LE-NEXT: ldarx 5, 0, 3 7404; PPC64LE-NEXT: nand 6, 4, 5 7405; PPC64LE-NEXT: stdcx. 6, 0, 3 7406; PPC64LE-NEXT: bne 0, .LBB437_1 7407; PPC64LE-NEXT: # %bb.2: 7408; PPC64LE-NEXT: mr 3, 5 7409; PPC64LE-NEXT: blr 7410 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") release 7411 ret i64 %ret 7412} 7413 7414define i64 @test438(i64* %ptr, i64 %val) { 7415; PPC64LE-LABEL: test438: 7416; PPC64LE: # %bb.0: 7417; PPC64LE-NEXT: lwsync 7418; PPC64LE-NEXT: .LBB438_1: 7419; PPC64LE-NEXT: ldarx 5, 0, 3 7420; PPC64LE-NEXT: nand 6, 4, 5 7421; PPC64LE-NEXT: stdcx. 6, 0, 3 7422; PPC64LE-NEXT: bne 0, .LBB438_1 7423; PPC64LE-NEXT: # %bb.2: 7424; PPC64LE-NEXT: mr 3, 5 7425; PPC64LE-NEXT: lwsync 7426; PPC64LE-NEXT: blr 7427 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7428 ret i64 %ret 7429} 7430 7431define i64 @test439(i64* %ptr, i64 %val) { 7432; PPC64LE-LABEL: test439: 7433; PPC64LE: # %bb.0: 7434; PPC64LE-NEXT: sync 7435; PPC64LE-NEXT: .LBB439_1: 7436; PPC64LE-NEXT: ldarx 5, 0, 3 7437; PPC64LE-NEXT: nand 6, 4, 5 7438; PPC64LE-NEXT: stdcx. 6, 0, 3 7439; PPC64LE-NEXT: bne 0, .LBB439_1 7440; PPC64LE-NEXT: # %bb.2: 7441; PPC64LE-NEXT: mr 3, 5 7442; PPC64LE-NEXT: lwsync 7443; PPC64LE-NEXT: blr 7444 %ret = atomicrmw nand i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7445 ret i64 %ret 7446} 7447 7448define i8 @test440(i8* %ptr, i8 %val) { 7449; PPC64LE-LABEL: test440: 7450; PPC64LE: # %bb.0: 7451; PPC64LE-NEXT: .LBB440_1: 7452; PPC64LE-NEXT: lbarx 5, 0, 3 7453; PPC64LE-NEXT: or 6, 4, 5 7454; PPC64LE-NEXT: stbcx. 6, 0, 3 7455; PPC64LE-NEXT: bne 0, .LBB440_1 7456; PPC64LE-NEXT: # %bb.2: 7457; PPC64LE-NEXT: mr 3, 5 7458; PPC64LE-NEXT: blr 7459 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") monotonic 7460 ret i8 %ret 7461} 7462 7463define i8 @test441(i8* %ptr, i8 %val) { 7464; PPC64LE-LABEL: test441: 7465; PPC64LE: # %bb.0: 7466; PPC64LE-NEXT: mr 5, 3 7467; PPC64LE-NEXT: .LBB441_1: 7468; PPC64LE-NEXT: lbarx 3, 0, 5 7469; PPC64LE-NEXT: or 6, 4, 3 7470; PPC64LE-NEXT: stbcx. 6, 0, 5 7471; PPC64LE-NEXT: bne 0, .LBB441_1 7472; PPC64LE-NEXT: # %bb.2: 7473; PPC64LE-NEXT: lwsync 7474; PPC64LE-NEXT: blr 7475 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") acquire 7476 ret i8 %ret 7477} 7478 7479define i8 @test442(i8* %ptr, i8 %val) { 7480; PPC64LE-LABEL: test442: 7481; PPC64LE: # %bb.0: 7482; PPC64LE-NEXT: lwsync 7483; PPC64LE-NEXT: .LBB442_1: 7484; PPC64LE-NEXT: lbarx 5, 0, 3 7485; PPC64LE-NEXT: or 6, 4, 5 7486; PPC64LE-NEXT: stbcx. 6, 0, 3 7487; PPC64LE-NEXT: bne 0, .LBB442_1 7488; PPC64LE-NEXT: # %bb.2: 7489; PPC64LE-NEXT: mr 3, 5 7490; PPC64LE-NEXT: blr 7491 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") release 7492 ret i8 %ret 7493} 7494 7495define i8 @test443(i8* %ptr, i8 %val) { 7496; PPC64LE-LABEL: test443: 7497; PPC64LE: # %bb.0: 7498; PPC64LE-NEXT: lwsync 7499; PPC64LE-NEXT: .LBB443_1: 7500; PPC64LE-NEXT: lbarx 5, 0, 3 7501; PPC64LE-NEXT: or 6, 4, 5 7502; PPC64LE-NEXT: stbcx. 6, 0, 3 7503; PPC64LE-NEXT: bne 0, .LBB443_1 7504; PPC64LE-NEXT: # %bb.2: 7505; PPC64LE-NEXT: mr 3, 5 7506; PPC64LE-NEXT: lwsync 7507; PPC64LE-NEXT: blr 7508 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7509 ret i8 %ret 7510} 7511 7512define i8 @test444(i8* %ptr, i8 %val) { 7513; PPC64LE-LABEL: test444: 7514; PPC64LE: # %bb.0: 7515; PPC64LE-NEXT: sync 7516; PPC64LE-NEXT: .LBB444_1: 7517; PPC64LE-NEXT: lbarx 5, 0, 3 7518; PPC64LE-NEXT: or 6, 4, 5 7519; PPC64LE-NEXT: stbcx. 6, 0, 3 7520; PPC64LE-NEXT: bne 0, .LBB444_1 7521; PPC64LE-NEXT: # %bb.2: 7522; PPC64LE-NEXT: mr 3, 5 7523; PPC64LE-NEXT: lwsync 7524; PPC64LE-NEXT: blr 7525 %ret = atomicrmw or i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7526 ret i8 %ret 7527} 7528 7529define i16 @test445(i16* %ptr, i16 %val) { 7530; PPC64LE-LABEL: test445: 7531; PPC64LE: # %bb.0: 7532; PPC64LE-NEXT: .LBB445_1: 7533; PPC64LE-NEXT: lharx 5, 0, 3 7534; PPC64LE-NEXT: or 6, 4, 5 7535; PPC64LE-NEXT: sthcx. 6, 0, 3 7536; PPC64LE-NEXT: bne 0, .LBB445_1 7537; PPC64LE-NEXT: # %bb.2: 7538; PPC64LE-NEXT: mr 3, 5 7539; PPC64LE-NEXT: blr 7540 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") monotonic 7541 ret i16 %ret 7542} 7543 7544define i16 @test446(i16* %ptr, i16 %val) { 7545; PPC64LE-LABEL: test446: 7546; PPC64LE: # %bb.0: 7547; PPC64LE-NEXT: mr 5, 3 7548; PPC64LE-NEXT: .LBB446_1: 7549; PPC64LE-NEXT: lharx 3, 0, 5 7550; PPC64LE-NEXT: or 6, 4, 3 7551; PPC64LE-NEXT: sthcx. 6, 0, 5 7552; PPC64LE-NEXT: bne 0, .LBB446_1 7553; PPC64LE-NEXT: # %bb.2: 7554; PPC64LE-NEXT: lwsync 7555; PPC64LE-NEXT: blr 7556 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") acquire 7557 ret i16 %ret 7558} 7559 7560define i16 @test447(i16* %ptr, i16 %val) { 7561; PPC64LE-LABEL: test447: 7562; PPC64LE: # %bb.0: 7563; PPC64LE-NEXT: lwsync 7564; PPC64LE-NEXT: .LBB447_1: 7565; PPC64LE-NEXT: lharx 5, 0, 3 7566; PPC64LE-NEXT: or 6, 4, 5 7567; PPC64LE-NEXT: sthcx. 6, 0, 3 7568; PPC64LE-NEXT: bne 0, .LBB447_1 7569; PPC64LE-NEXT: # %bb.2: 7570; PPC64LE-NEXT: mr 3, 5 7571; PPC64LE-NEXT: blr 7572 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") release 7573 ret i16 %ret 7574} 7575 7576define i16 @test448(i16* %ptr, i16 %val) { 7577; PPC64LE-LABEL: test448: 7578; PPC64LE: # %bb.0: 7579; PPC64LE-NEXT: lwsync 7580; PPC64LE-NEXT: .LBB448_1: 7581; PPC64LE-NEXT: lharx 5, 0, 3 7582; PPC64LE-NEXT: or 6, 4, 5 7583; PPC64LE-NEXT: sthcx. 6, 0, 3 7584; PPC64LE-NEXT: bne 0, .LBB448_1 7585; PPC64LE-NEXT: # %bb.2: 7586; PPC64LE-NEXT: mr 3, 5 7587; PPC64LE-NEXT: lwsync 7588; PPC64LE-NEXT: blr 7589 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7590 ret i16 %ret 7591} 7592 7593define i16 @test449(i16* %ptr, i16 %val) { 7594; PPC64LE-LABEL: test449: 7595; PPC64LE: # %bb.0: 7596; PPC64LE-NEXT: sync 7597; PPC64LE-NEXT: .LBB449_1: 7598; PPC64LE-NEXT: lharx 5, 0, 3 7599; PPC64LE-NEXT: or 6, 4, 5 7600; PPC64LE-NEXT: sthcx. 6, 0, 3 7601; PPC64LE-NEXT: bne 0, .LBB449_1 7602; PPC64LE-NEXT: # %bb.2: 7603; PPC64LE-NEXT: mr 3, 5 7604; PPC64LE-NEXT: lwsync 7605; PPC64LE-NEXT: blr 7606 %ret = atomicrmw or i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7607 ret i16 %ret 7608} 7609 7610define i32 @test450(i32* %ptr, i32 %val) { 7611; PPC64LE-LABEL: test450: 7612; PPC64LE: # %bb.0: 7613; PPC64LE-NEXT: .LBB450_1: 7614; PPC64LE-NEXT: lwarx 5, 0, 3 7615; PPC64LE-NEXT: or 6, 4, 5 7616; PPC64LE-NEXT: stwcx. 6, 0, 3 7617; PPC64LE-NEXT: bne 0, .LBB450_1 7618; PPC64LE-NEXT: # %bb.2: 7619; PPC64LE-NEXT: mr 3, 5 7620; PPC64LE-NEXT: blr 7621 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") monotonic 7622 ret i32 %ret 7623} 7624 7625define i32 @test451(i32* %ptr, i32 %val) { 7626; PPC64LE-LABEL: test451: 7627; PPC64LE: # %bb.0: 7628; PPC64LE-NEXT: mr 5, 3 7629; PPC64LE-NEXT: .LBB451_1: 7630; PPC64LE-NEXT: lwarx 3, 0, 5 7631; PPC64LE-NEXT: or 6, 4, 3 7632; PPC64LE-NEXT: stwcx. 6, 0, 5 7633; PPC64LE-NEXT: bne 0, .LBB451_1 7634; PPC64LE-NEXT: # %bb.2: 7635; PPC64LE-NEXT: lwsync 7636; PPC64LE-NEXT: blr 7637 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") acquire 7638 ret i32 %ret 7639} 7640 7641define i32 @test452(i32* %ptr, i32 %val) { 7642; PPC64LE-LABEL: test452: 7643; PPC64LE: # %bb.0: 7644; PPC64LE-NEXT: lwsync 7645; PPC64LE-NEXT: .LBB452_1: 7646; PPC64LE-NEXT: lwarx 5, 0, 3 7647; PPC64LE-NEXT: or 6, 4, 5 7648; PPC64LE-NEXT: stwcx. 6, 0, 3 7649; PPC64LE-NEXT: bne 0, .LBB452_1 7650; PPC64LE-NEXT: # %bb.2: 7651; PPC64LE-NEXT: mr 3, 5 7652; PPC64LE-NEXT: blr 7653 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") release 7654 ret i32 %ret 7655} 7656 7657define i32 @test453(i32* %ptr, i32 %val) { 7658; PPC64LE-LABEL: test453: 7659; PPC64LE: # %bb.0: 7660; PPC64LE-NEXT: lwsync 7661; PPC64LE-NEXT: .LBB453_1: 7662; PPC64LE-NEXT: lwarx 5, 0, 3 7663; PPC64LE-NEXT: or 6, 4, 5 7664; PPC64LE-NEXT: stwcx. 6, 0, 3 7665; PPC64LE-NEXT: bne 0, .LBB453_1 7666; PPC64LE-NEXT: # %bb.2: 7667; PPC64LE-NEXT: mr 3, 5 7668; PPC64LE-NEXT: lwsync 7669; PPC64LE-NEXT: blr 7670 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7671 ret i32 %ret 7672} 7673 7674define i32 @test454(i32* %ptr, i32 %val) { 7675; PPC64LE-LABEL: test454: 7676; PPC64LE: # %bb.0: 7677; PPC64LE-NEXT: sync 7678; PPC64LE-NEXT: .LBB454_1: 7679; PPC64LE-NEXT: lwarx 5, 0, 3 7680; PPC64LE-NEXT: or 6, 4, 5 7681; PPC64LE-NEXT: stwcx. 6, 0, 3 7682; PPC64LE-NEXT: bne 0, .LBB454_1 7683; PPC64LE-NEXT: # %bb.2: 7684; PPC64LE-NEXT: mr 3, 5 7685; PPC64LE-NEXT: lwsync 7686; PPC64LE-NEXT: blr 7687 %ret = atomicrmw or i32* %ptr, i32 %val syncscope("singlethread") seq_cst 7688 ret i32 %ret 7689} 7690 7691define i64 @test455(i64* %ptr, i64 %val) { 7692; PPC64LE-LABEL: test455: 7693; PPC64LE: # %bb.0: 7694; PPC64LE-NEXT: .LBB455_1: 7695; PPC64LE-NEXT: ldarx 5, 0, 3 7696; PPC64LE-NEXT: or 6, 4, 5 7697; PPC64LE-NEXT: stdcx. 6, 0, 3 7698; PPC64LE-NEXT: bne 0, .LBB455_1 7699; PPC64LE-NEXT: # %bb.2: 7700; PPC64LE-NEXT: mr 3, 5 7701; PPC64LE-NEXT: blr 7702 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") monotonic 7703 ret i64 %ret 7704} 7705 7706define i64 @test456(i64* %ptr, i64 %val) { 7707; PPC64LE-LABEL: test456: 7708; PPC64LE: # %bb.0: 7709; PPC64LE-NEXT: mr 5, 3 7710; PPC64LE-NEXT: .LBB456_1: 7711; PPC64LE-NEXT: ldarx 3, 0, 5 7712; PPC64LE-NEXT: or 6, 4, 3 7713; PPC64LE-NEXT: stdcx. 6, 0, 5 7714; PPC64LE-NEXT: bne 0, .LBB456_1 7715; PPC64LE-NEXT: # %bb.2: 7716; PPC64LE-NEXT: lwsync 7717; PPC64LE-NEXT: blr 7718 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") acquire 7719 ret i64 %ret 7720} 7721 7722define i64 @test457(i64* %ptr, i64 %val) { 7723; PPC64LE-LABEL: test457: 7724; PPC64LE: # %bb.0: 7725; PPC64LE-NEXT: lwsync 7726; PPC64LE-NEXT: .LBB457_1: 7727; PPC64LE-NEXT: ldarx 5, 0, 3 7728; PPC64LE-NEXT: or 6, 4, 5 7729; PPC64LE-NEXT: stdcx. 6, 0, 3 7730; PPC64LE-NEXT: bne 0, .LBB457_1 7731; PPC64LE-NEXT: # %bb.2: 7732; PPC64LE-NEXT: mr 3, 5 7733; PPC64LE-NEXT: blr 7734 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") release 7735 ret i64 %ret 7736} 7737 7738define i64 @test458(i64* %ptr, i64 %val) { 7739; PPC64LE-LABEL: test458: 7740; PPC64LE: # %bb.0: 7741; PPC64LE-NEXT: lwsync 7742; PPC64LE-NEXT: .LBB458_1: 7743; PPC64LE-NEXT: ldarx 5, 0, 3 7744; PPC64LE-NEXT: or 6, 4, 5 7745; PPC64LE-NEXT: stdcx. 6, 0, 3 7746; PPC64LE-NEXT: bne 0, .LBB458_1 7747; PPC64LE-NEXT: # %bb.2: 7748; PPC64LE-NEXT: mr 3, 5 7749; PPC64LE-NEXT: lwsync 7750; PPC64LE-NEXT: blr 7751 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") acq_rel 7752 ret i64 %ret 7753} 7754 7755define i64 @test459(i64* %ptr, i64 %val) { 7756; PPC64LE-LABEL: test459: 7757; PPC64LE: # %bb.0: 7758; PPC64LE-NEXT: sync 7759; PPC64LE-NEXT: .LBB459_1: 7760; PPC64LE-NEXT: ldarx 5, 0, 3 7761; PPC64LE-NEXT: or 6, 4, 5 7762; PPC64LE-NEXT: stdcx. 6, 0, 3 7763; PPC64LE-NEXT: bne 0, .LBB459_1 7764; PPC64LE-NEXT: # %bb.2: 7765; PPC64LE-NEXT: mr 3, 5 7766; PPC64LE-NEXT: lwsync 7767; PPC64LE-NEXT: blr 7768 %ret = atomicrmw or i64* %ptr, i64 %val syncscope("singlethread") seq_cst 7769 ret i64 %ret 7770} 7771 7772define i8 @test460(i8* %ptr, i8 %val) { 7773; PPC64LE-LABEL: test460: 7774; PPC64LE: # %bb.0: 7775; PPC64LE-NEXT: .LBB460_1: 7776; PPC64LE-NEXT: lbarx 5, 0, 3 7777; PPC64LE-NEXT: xor 6, 4, 5 7778; PPC64LE-NEXT: stbcx. 6, 0, 3 7779; PPC64LE-NEXT: bne 0, .LBB460_1 7780; PPC64LE-NEXT: # %bb.2: 7781; PPC64LE-NEXT: mr 3, 5 7782; PPC64LE-NEXT: blr 7783 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") monotonic 7784 ret i8 %ret 7785} 7786 7787define i8 @test461(i8* %ptr, i8 %val) { 7788; PPC64LE-LABEL: test461: 7789; PPC64LE: # %bb.0: 7790; PPC64LE-NEXT: mr 5, 3 7791; PPC64LE-NEXT: .LBB461_1: 7792; PPC64LE-NEXT: lbarx 3, 0, 5 7793; PPC64LE-NEXT: xor 6, 4, 3 7794; PPC64LE-NEXT: stbcx. 6, 0, 5 7795; PPC64LE-NEXT: bne 0, .LBB461_1 7796; PPC64LE-NEXT: # %bb.2: 7797; PPC64LE-NEXT: lwsync 7798; PPC64LE-NEXT: blr 7799 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") acquire 7800 ret i8 %ret 7801} 7802 7803define i8 @test462(i8* %ptr, i8 %val) { 7804; PPC64LE-LABEL: test462: 7805; PPC64LE: # %bb.0: 7806; PPC64LE-NEXT: lwsync 7807; PPC64LE-NEXT: .LBB462_1: 7808; PPC64LE-NEXT: lbarx 5, 0, 3 7809; PPC64LE-NEXT: xor 6, 4, 5 7810; PPC64LE-NEXT: stbcx. 6, 0, 3 7811; PPC64LE-NEXT: bne 0, .LBB462_1 7812; PPC64LE-NEXT: # %bb.2: 7813; PPC64LE-NEXT: mr 3, 5 7814; PPC64LE-NEXT: blr 7815 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") release 7816 ret i8 %ret 7817} 7818 7819define i8 @test463(i8* %ptr, i8 %val) { 7820; PPC64LE-LABEL: test463: 7821; PPC64LE: # %bb.0: 7822; PPC64LE-NEXT: lwsync 7823; PPC64LE-NEXT: .LBB463_1: 7824; PPC64LE-NEXT: lbarx 5, 0, 3 7825; PPC64LE-NEXT: xor 6, 4, 5 7826; PPC64LE-NEXT: stbcx. 6, 0, 3 7827; PPC64LE-NEXT: bne 0, .LBB463_1 7828; PPC64LE-NEXT: # %bb.2: 7829; PPC64LE-NEXT: mr 3, 5 7830; PPC64LE-NEXT: lwsync 7831; PPC64LE-NEXT: blr 7832 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") acq_rel 7833 ret i8 %ret 7834} 7835 7836define i8 @test464(i8* %ptr, i8 %val) { 7837; PPC64LE-LABEL: test464: 7838; PPC64LE: # %bb.0: 7839; PPC64LE-NEXT: sync 7840; PPC64LE-NEXT: .LBB464_1: 7841; PPC64LE-NEXT: lbarx 5, 0, 3 7842; PPC64LE-NEXT: xor 6, 4, 5 7843; PPC64LE-NEXT: stbcx. 6, 0, 3 7844; PPC64LE-NEXT: bne 0, .LBB464_1 7845; PPC64LE-NEXT: # %bb.2: 7846; PPC64LE-NEXT: mr 3, 5 7847; PPC64LE-NEXT: lwsync 7848; PPC64LE-NEXT: blr 7849 %ret = atomicrmw xor i8* %ptr, i8 %val syncscope("singlethread") seq_cst 7850 ret i8 %ret 7851} 7852 7853define i16 @test465(i16* %ptr, i16 %val) { 7854; PPC64LE-LABEL: test465: 7855; PPC64LE: # %bb.0: 7856; PPC64LE-NEXT: .LBB465_1: 7857; PPC64LE-NEXT: lharx 5, 0, 3 7858; PPC64LE-NEXT: xor 6, 4, 5 7859; PPC64LE-NEXT: sthcx. 6, 0, 3 7860; PPC64LE-NEXT: bne 0, .LBB465_1 7861; PPC64LE-NEXT: # %bb.2: 7862; PPC64LE-NEXT: mr 3, 5 7863; PPC64LE-NEXT: blr 7864 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") monotonic 7865 ret i16 %ret 7866} 7867 7868define i16 @test466(i16* %ptr, i16 %val) { 7869; PPC64LE-LABEL: test466: 7870; PPC64LE: # %bb.0: 7871; PPC64LE-NEXT: mr 5, 3 7872; PPC64LE-NEXT: .LBB466_1: 7873; PPC64LE-NEXT: lharx 3, 0, 5 7874; PPC64LE-NEXT: xor 6, 4, 3 7875; PPC64LE-NEXT: sthcx. 6, 0, 5 7876; PPC64LE-NEXT: bne 0, .LBB466_1 7877; PPC64LE-NEXT: # %bb.2: 7878; PPC64LE-NEXT: lwsync 7879; PPC64LE-NEXT: blr 7880 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") acquire 7881 ret i16 %ret 7882} 7883 7884define i16 @test467(i16* %ptr, i16 %val) { 7885; PPC64LE-LABEL: test467: 7886; PPC64LE: # %bb.0: 7887; PPC64LE-NEXT: lwsync 7888; PPC64LE-NEXT: .LBB467_1: 7889; PPC64LE-NEXT: lharx 5, 0, 3 7890; PPC64LE-NEXT: xor 6, 4, 5 7891; PPC64LE-NEXT: sthcx. 6, 0, 3 7892; PPC64LE-NEXT: bne 0, .LBB467_1 7893; PPC64LE-NEXT: # %bb.2: 7894; PPC64LE-NEXT: mr 3, 5 7895; PPC64LE-NEXT: blr 7896 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") release 7897 ret i16 %ret 7898} 7899 7900define i16 @test468(i16* %ptr, i16 %val) { 7901; PPC64LE-LABEL: test468: 7902; PPC64LE: # %bb.0: 7903; PPC64LE-NEXT: lwsync 7904; PPC64LE-NEXT: .LBB468_1: 7905; PPC64LE-NEXT: lharx 5, 0, 3 7906; PPC64LE-NEXT: xor 6, 4, 5 7907; PPC64LE-NEXT: sthcx. 6, 0, 3 7908; PPC64LE-NEXT: bne 0, .LBB468_1 7909; PPC64LE-NEXT: # %bb.2: 7910; PPC64LE-NEXT: mr 3, 5 7911; PPC64LE-NEXT: lwsync 7912; PPC64LE-NEXT: blr 7913 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") acq_rel 7914 ret i16 %ret 7915} 7916 7917define i16 @test469(i16* %ptr, i16 %val) { 7918; PPC64LE-LABEL: test469: 7919; PPC64LE: # %bb.0: 7920; PPC64LE-NEXT: sync 7921; PPC64LE-NEXT: .LBB469_1: 7922; PPC64LE-NEXT: lharx 5, 0, 3 7923; PPC64LE-NEXT: xor 6, 4, 5 7924; PPC64LE-NEXT: sthcx. 6, 0, 3 7925; PPC64LE-NEXT: bne 0, .LBB469_1 7926; PPC64LE-NEXT: # %bb.2: 7927; PPC64LE-NEXT: mr 3, 5 7928; PPC64LE-NEXT: lwsync 7929; PPC64LE-NEXT: blr 7930 %ret = atomicrmw xor i16* %ptr, i16 %val syncscope("singlethread") seq_cst 7931 ret i16 %ret 7932} 7933 7934define i32 @test470(i32* %ptr, i32 %val) { 7935; PPC64LE-LABEL: test470: 7936; PPC64LE: # %bb.0: 7937; PPC64LE-NEXT: .LBB470_1: 7938; PPC64LE-NEXT: lwarx 5, 0, 3 7939; PPC64LE-NEXT: xor 6, 4, 5 7940; PPC64LE-NEXT: stwcx. 6, 0, 3 7941; PPC64LE-NEXT: bne 0, .LBB470_1 7942; PPC64LE-NEXT: # %bb.2: 7943; PPC64LE-NEXT: mr 3, 5 7944; PPC64LE-NEXT: blr 7945 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") monotonic 7946 ret i32 %ret 7947} 7948 7949define i32 @test471(i32* %ptr, i32 %val) { 7950; PPC64LE-LABEL: test471: 7951; PPC64LE: # %bb.0: 7952; PPC64LE-NEXT: mr 5, 3 7953; PPC64LE-NEXT: .LBB471_1: 7954; PPC64LE-NEXT: lwarx 3, 0, 5 7955; PPC64LE-NEXT: xor 6, 4, 3 7956; PPC64LE-NEXT: stwcx. 6, 0, 5 7957; PPC64LE-NEXT: bne 0, .LBB471_1 7958; PPC64LE-NEXT: # %bb.2: 7959; PPC64LE-NEXT: lwsync 7960; PPC64LE-NEXT: blr 7961 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") acquire 7962 ret i32 %ret 7963} 7964 7965define i32 @test472(i32* %ptr, i32 %val) { 7966; PPC64LE-LABEL: test472: 7967; PPC64LE: # %bb.0: 7968; PPC64LE-NEXT: lwsync 7969; PPC64LE-NEXT: .LBB472_1: 7970; PPC64LE-NEXT: lwarx 5, 0, 3 7971; PPC64LE-NEXT: xor 6, 4, 5 7972; PPC64LE-NEXT: stwcx. 6, 0, 3 7973; PPC64LE-NEXT: bne 0, .LBB472_1 7974; PPC64LE-NEXT: # %bb.2: 7975; PPC64LE-NEXT: mr 3, 5 7976; PPC64LE-NEXT: blr 7977 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") release 7978 ret i32 %ret 7979} 7980 7981define i32 @test473(i32* %ptr, i32 %val) { 7982; PPC64LE-LABEL: test473: 7983; PPC64LE: # %bb.0: 7984; PPC64LE-NEXT: lwsync 7985; PPC64LE-NEXT: .LBB473_1: 7986; PPC64LE-NEXT: lwarx 5, 0, 3 7987; PPC64LE-NEXT: xor 6, 4, 5 7988; PPC64LE-NEXT: stwcx. 6, 0, 3 7989; PPC64LE-NEXT: bne 0, .LBB473_1 7990; PPC64LE-NEXT: # %bb.2: 7991; PPC64LE-NEXT: mr 3, 5 7992; PPC64LE-NEXT: lwsync 7993; PPC64LE-NEXT: blr 7994 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") acq_rel 7995 ret i32 %ret 7996} 7997 7998define i32 @test474(i32* %ptr, i32 %val) { 7999; PPC64LE-LABEL: test474: 8000; PPC64LE: # %bb.0: 8001; PPC64LE-NEXT: sync 8002; PPC64LE-NEXT: .LBB474_1: 8003; PPC64LE-NEXT: lwarx 5, 0, 3 8004; PPC64LE-NEXT: xor 6, 4, 5 8005; PPC64LE-NEXT: stwcx. 6, 0, 3 8006; PPC64LE-NEXT: bne 0, .LBB474_1 8007; PPC64LE-NEXT: # %bb.2: 8008; PPC64LE-NEXT: mr 3, 5 8009; PPC64LE-NEXT: lwsync 8010; PPC64LE-NEXT: blr 8011 %ret = atomicrmw xor i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8012 ret i32 %ret 8013} 8014 8015define i64 @test475(i64* %ptr, i64 %val) { 8016; PPC64LE-LABEL: test475: 8017; PPC64LE: # %bb.0: 8018; PPC64LE-NEXT: .LBB475_1: 8019; PPC64LE-NEXT: ldarx 5, 0, 3 8020; PPC64LE-NEXT: xor 6, 4, 5 8021; PPC64LE-NEXT: stdcx. 6, 0, 3 8022; PPC64LE-NEXT: bne 0, .LBB475_1 8023; PPC64LE-NEXT: # %bb.2: 8024; PPC64LE-NEXT: mr 3, 5 8025; PPC64LE-NEXT: blr 8026 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") monotonic 8027 ret i64 %ret 8028} 8029 8030define i64 @test476(i64* %ptr, i64 %val) { 8031; PPC64LE-LABEL: test476: 8032; PPC64LE: # %bb.0: 8033; PPC64LE-NEXT: mr 5, 3 8034; PPC64LE-NEXT: .LBB476_1: 8035; PPC64LE-NEXT: ldarx 3, 0, 5 8036; PPC64LE-NEXT: xor 6, 4, 3 8037; PPC64LE-NEXT: stdcx. 6, 0, 5 8038; PPC64LE-NEXT: bne 0, .LBB476_1 8039; PPC64LE-NEXT: # %bb.2: 8040; PPC64LE-NEXT: lwsync 8041; PPC64LE-NEXT: blr 8042 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") acquire 8043 ret i64 %ret 8044} 8045 8046define i64 @test477(i64* %ptr, i64 %val) { 8047; PPC64LE-LABEL: test477: 8048; PPC64LE: # %bb.0: 8049; PPC64LE-NEXT: lwsync 8050; PPC64LE-NEXT: .LBB477_1: 8051; PPC64LE-NEXT: ldarx 5, 0, 3 8052; PPC64LE-NEXT: xor 6, 4, 5 8053; PPC64LE-NEXT: stdcx. 6, 0, 3 8054; PPC64LE-NEXT: bne 0, .LBB477_1 8055; PPC64LE-NEXT: # %bb.2: 8056; PPC64LE-NEXT: mr 3, 5 8057; PPC64LE-NEXT: blr 8058 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") release 8059 ret i64 %ret 8060} 8061 8062define i64 @test478(i64* %ptr, i64 %val) { 8063; PPC64LE-LABEL: test478: 8064; PPC64LE: # %bb.0: 8065; PPC64LE-NEXT: lwsync 8066; PPC64LE-NEXT: .LBB478_1: 8067; PPC64LE-NEXT: ldarx 5, 0, 3 8068; PPC64LE-NEXT: xor 6, 4, 5 8069; PPC64LE-NEXT: stdcx. 6, 0, 3 8070; PPC64LE-NEXT: bne 0, .LBB478_1 8071; PPC64LE-NEXT: # %bb.2: 8072; PPC64LE-NEXT: mr 3, 5 8073; PPC64LE-NEXT: lwsync 8074; PPC64LE-NEXT: blr 8075 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8076 ret i64 %ret 8077} 8078 8079define i64 @test479(i64* %ptr, i64 %val) { 8080; PPC64LE-LABEL: test479: 8081; PPC64LE: # %bb.0: 8082; PPC64LE-NEXT: sync 8083; PPC64LE-NEXT: .LBB479_1: 8084; PPC64LE-NEXT: ldarx 5, 0, 3 8085; PPC64LE-NEXT: xor 6, 4, 5 8086; PPC64LE-NEXT: stdcx. 6, 0, 3 8087; PPC64LE-NEXT: bne 0, .LBB479_1 8088; PPC64LE-NEXT: # %bb.2: 8089; PPC64LE-NEXT: mr 3, 5 8090; PPC64LE-NEXT: lwsync 8091; PPC64LE-NEXT: blr 8092 %ret = atomicrmw xor i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8093 ret i64 %ret 8094} 8095 8096define i8 @test480(i8* %ptr, i8 %val) { 8097; PPC64LE-LABEL: test480: 8098; PPC64LE: # %bb.0: 8099; PPC64LE-NEXT: extsb 5, 4 8100; PPC64LE-NEXT: .LBB480_1: 8101; PPC64LE-NEXT: lbarx 4, 0, 3 8102; PPC64LE-NEXT: extsb 6, 4 8103; PPC64LE-NEXT: cmpw 5, 6 8104; PPC64LE-NEXT: ble 0, .LBB480_3 8105; PPC64LE-NEXT: # %bb.2: 8106; PPC64LE-NEXT: stbcx. 5, 0, 3 8107; PPC64LE-NEXT: bne 0, .LBB480_1 8108; PPC64LE-NEXT: .LBB480_3: 8109; PPC64LE-NEXT: mr 3, 4 8110; PPC64LE-NEXT: blr 8111 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") monotonic 8112 ret i8 %ret 8113} 8114 8115define i8 @test481(i8* %ptr, i8 %val) { 8116; PPC64LE-LABEL: test481: 8117; PPC64LE: # %bb.0: 8118; PPC64LE-NEXT: extsb 5, 4 8119; PPC64LE-NEXT: .LBB481_1: 8120; PPC64LE-NEXT: lbarx 4, 0, 3 8121; PPC64LE-NEXT: extsb 6, 4 8122; PPC64LE-NEXT: cmpw 5, 6 8123; PPC64LE-NEXT: ble 0, .LBB481_3 8124; PPC64LE-NEXT: # %bb.2: 8125; PPC64LE-NEXT: stbcx. 5, 0, 3 8126; PPC64LE-NEXT: bne 0, .LBB481_1 8127; PPC64LE-NEXT: .LBB481_3: 8128; PPC64LE-NEXT: mr 3, 4 8129; PPC64LE-NEXT: lwsync 8130; PPC64LE-NEXT: blr 8131 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") acquire 8132 ret i8 %ret 8133} 8134 8135define i8 @test482(i8* %ptr, i8 %val) { 8136; PPC64LE-LABEL: test482: 8137; PPC64LE: # %bb.0: 8138; PPC64LE-NEXT: extsb 5, 4 8139; PPC64LE-NEXT: lwsync 8140; PPC64LE-NEXT: .LBB482_1: 8141; PPC64LE-NEXT: lbarx 4, 0, 3 8142; PPC64LE-NEXT: extsb 6, 4 8143; PPC64LE-NEXT: cmpw 5, 6 8144; PPC64LE-NEXT: ble 0, .LBB482_3 8145; PPC64LE-NEXT: # %bb.2: 8146; PPC64LE-NEXT: stbcx. 5, 0, 3 8147; PPC64LE-NEXT: bne 0, .LBB482_1 8148; PPC64LE-NEXT: .LBB482_3: 8149; PPC64LE-NEXT: mr 3, 4 8150; PPC64LE-NEXT: blr 8151 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") release 8152 ret i8 %ret 8153} 8154 8155define i8 @test483(i8* %ptr, i8 %val) { 8156; PPC64LE-LABEL: test483: 8157; PPC64LE: # %bb.0: 8158; PPC64LE-NEXT: extsb 5, 4 8159; PPC64LE-NEXT: lwsync 8160; PPC64LE-NEXT: .LBB483_1: 8161; PPC64LE-NEXT: lbarx 4, 0, 3 8162; PPC64LE-NEXT: extsb 6, 4 8163; PPC64LE-NEXT: cmpw 5, 6 8164; PPC64LE-NEXT: ble 0, .LBB483_3 8165; PPC64LE-NEXT: # %bb.2: 8166; PPC64LE-NEXT: stbcx. 5, 0, 3 8167; PPC64LE-NEXT: bne 0, .LBB483_1 8168; PPC64LE-NEXT: .LBB483_3: 8169; PPC64LE-NEXT: mr 3, 4 8170; PPC64LE-NEXT: lwsync 8171; PPC64LE-NEXT: blr 8172 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8173 ret i8 %ret 8174} 8175 8176define i8 @test484(i8* %ptr, i8 %val) { 8177; PPC64LE-LABEL: test484: 8178; PPC64LE: # %bb.0: 8179; PPC64LE-NEXT: extsb 5, 4 8180; PPC64LE-NEXT: sync 8181; PPC64LE-NEXT: .LBB484_1: 8182; PPC64LE-NEXT: lbarx 4, 0, 3 8183; PPC64LE-NEXT: extsb 6, 4 8184; PPC64LE-NEXT: cmpw 5, 6 8185; PPC64LE-NEXT: ble 0, .LBB484_3 8186; PPC64LE-NEXT: # %bb.2: 8187; PPC64LE-NEXT: stbcx. 5, 0, 3 8188; PPC64LE-NEXT: bne 0, .LBB484_1 8189; PPC64LE-NEXT: .LBB484_3: 8190; PPC64LE-NEXT: mr 3, 4 8191; PPC64LE-NEXT: lwsync 8192; PPC64LE-NEXT: blr 8193 %ret = atomicrmw max i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8194 ret i8 %ret 8195} 8196 8197define i16 @test485(i16* %ptr, i16 %val) { 8198; PPC64LE-LABEL: test485: 8199; PPC64LE: # %bb.0: 8200; PPC64LE-NEXT: extsh 5, 4 8201; PPC64LE-NEXT: .LBB485_1: 8202; PPC64LE-NEXT: lharx 4, 0, 3 8203; PPC64LE-NEXT: extsh 6, 4 8204; PPC64LE-NEXT: cmpw 5, 6 8205; PPC64LE-NEXT: ble 0, .LBB485_3 8206; PPC64LE-NEXT: # %bb.2: 8207; PPC64LE-NEXT: sthcx. 5, 0, 3 8208; PPC64LE-NEXT: bne 0, .LBB485_1 8209; PPC64LE-NEXT: .LBB485_3: 8210; PPC64LE-NEXT: mr 3, 4 8211; PPC64LE-NEXT: blr 8212 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") monotonic 8213 ret i16 %ret 8214} 8215 8216define i16 @test486(i16* %ptr, i16 %val) { 8217; PPC64LE-LABEL: test486: 8218; PPC64LE: # %bb.0: 8219; PPC64LE-NEXT: extsh 5, 4 8220; PPC64LE-NEXT: .LBB486_1: 8221; PPC64LE-NEXT: lharx 4, 0, 3 8222; PPC64LE-NEXT: extsh 6, 4 8223; PPC64LE-NEXT: cmpw 5, 6 8224; PPC64LE-NEXT: ble 0, .LBB486_3 8225; PPC64LE-NEXT: # %bb.2: 8226; PPC64LE-NEXT: sthcx. 5, 0, 3 8227; PPC64LE-NEXT: bne 0, .LBB486_1 8228; PPC64LE-NEXT: .LBB486_3: 8229; PPC64LE-NEXT: mr 3, 4 8230; PPC64LE-NEXT: lwsync 8231; PPC64LE-NEXT: blr 8232 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") acquire 8233 ret i16 %ret 8234} 8235 8236define i16 @test487(i16* %ptr, i16 %val) { 8237; PPC64LE-LABEL: test487: 8238; PPC64LE: # %bb.0: 8239; PPC64LE-NEXT: extsh 5, 4 8240; PPC64LE-NEXT: lwsync 8241; PPC64LE-NEXT: .LBB487_1: 8242; PPC64LE-NEXT: lharx 4, 0, 3 8243; PPC64LE-NEXT: extsh 6, 4 8244; PPC64LE-NEXT: cmpw 5, 6 8245; PPC64LE-NEXT: ble 0, .LBB487_3 8246; PPC64LE-NEXT: # %bb.2: 8247; PPC64LE-NEXT: sthcx. 5, 0, 3 8248; PPC64LE-NEXT: bne 0, .LBB487_1 8249; PPC64LE-NEXT: .LBB487_3: 8250; PPC64LE-NEXT: mr 3, 4 8251; PPC64LE-NEXT: blr 8252 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") release 8253 ret i16 %ret 8254} 8255 8256define i16 @test488(i16* %ptr, i16 %val) { 8257; PPC64LE-LABEL: test488: 8258; PPC64LE: # %bb.0: 8259; PPC64LE-NEXT: extsh 5, 4 8260; PPC64LE-NEXT: lwsync 8261; PPC64LE-NEXT: .LBB488_1: 8262; PPC64LE-NEXT: lharx 4, 0, 3 8263; PPC64LE-NEXT: extsh 6, 4 8264; PPC64LE-NEXT: cmpw 5, 6 8265; PPC64LE-NEXT: ble 0, .LBB488_3 8266; PPC64LE-NEXT: # %bb.2: 8267; PPC64LE-NEXT: sthcx. 5, 0, 3 8268; PPC64LE-NEXT: bne 0, .LBB488_1 8269; PPC64LE-NEXT: .LBB488_3: 8270; PPC64LE-NEXT: mr 3, 4 8271; PPC64LE-NEXT: lwsync 8272; PPC64LE-NEXT: blr 8273 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") acq_rel 8274 ret i16 %ret 8275} 8276 8277define i16 @test489(i16* %ptr, i16 %val) { 8278; PPC64LE-LABEL: test489: 8279; PPC64LE: # %bb.0: 8280; PPC64LE-NEXT: extsh 5, 4 8281; PPC64LE-NEXT: sync 8282; PPC64LE-NEXT: .LBB489_1: 8283; PPC64LE-NEXT: lharx 4, 0, 3 8284; PPC64LE-NEXT: extsh 6, 4 8285; PPC64LE-NEXT: cmpw 5, 6 8286; PPC64LE-NEXT: ble 0, .LBB489_3 8287; PPC64LE-NEXT: # %bb.2: 8288; PPC64LE-NEXT: sthcx. 5, 0, 3 8289; PPC64LE-NEXT: bne 0, .LBB489_1 8290; PPC64LE-NEXT: .LBB489_3: 8291; PPC64LE-NEXT: mr 3, 4 8292; PPC64LE-NEXT: lwsync 8293; PPC64LE-NEXT: blr 8294 %ret = atomicrmw max i16* %ptr, i16 %val syncscope("singlethread") seq_cst 8295 ret i16 %ret 8296} 8297 8298define i32 @test490(i32* %ptr, i32 %val) { 8299; PPC64LE-LABEL: test490: 8300; PPC64LE: # %bb.0: 8301; PPC64LE-NEXT: .LBB490_1: 8302; PPC64LE-NEXT: lwarx 5, 0, 3 8303; PPC64LE-NEXT: cmpw 4, 5 8304; PPC64LE-NEXT: ble 0, .LBB490_3 8305; PPC64LE-NEXT: # %bb.2: 8306; PPC64LE-NEXT: stwcx. 4, 0, 3 8307; PPC64LE-NEXT: bne 0, .LBB490_1 8308; PPC64LE-NEXT: .LBB490_3: 8309; PPC64LE-NEXT: mr 3, 5 8310; PPC64LE-NEXT: blr 8311 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") monotonic 8312 ret i32 %ret 8313} 8314 8315define i32 @test491(i32* %ptr, i32 %val) { 8316; PPC64LE-LABEL: test491: 8317; PPC64LE: # %bb.0: 8318; PPC64LE-NEXT: mr 5, 3 8319; PPC64LE-NEXT: .LBB491_1: 8320; PPC64LE-NEXT: lwarx 3, 0, 5 8321; PPC64LE-NEXT: cmpw 4, 3 8322; PPC64LE-NEXT: ble 0, .LBB491_3 8323; PPC64LE-NEXT: # %bb.2: 8324; PPC64LE-NEXT: stwcx. 4, 0, 5 8325; PPC64LE-NEXT: bne 0, .LBB491_1 8326; PPC64LE-NEXT: .LBB491_3: 8327; PPC64LE-NEXT: lwsync 8328; PPC64LE-NEXT: blr 8329 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") acquire 8330 ret i32 %ret 8331} 8332 8333define i32 @test492(i32* %ptr, i32 %val) { 8334; PPC64LE-LABEL: test492: 8335; PPC64LE: # %bb.0: 8336; PPC64LE-NEXT: lwsync 8337; PPC64LE-NEXT: .LBB492_1: 8338; PPC64LE-NEXT: lwarx 5, 0, 3 8339; PPC64LE-NEXT: cmpw 4, 5 8340; PPC64LE-NEXT: ble 0, .LBB492_3 8341; PPC64LE-NEXT: # %bb.2: 8342; PPC64LE-NEXT: stwcx. 4, 0, 3 8343; PPC64LE-NEXT: bne 0, .LBB492_1 8344; PPC64LE-NEXT: .LBB492_3: 8345; PPC64LE-NEXT: mr 3, 5 8346; PPC64LE-NEXT: blr 8347 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") release 8348 ret i32 %ret 8349} 8350 8351define i32 @test493(i32* %ptr, i32 %val) { 8352; PPC64LE-LABEL: test493: 8353; PPC64LE: # %bb.0: 8354; PPC64LE-NEXT: lwsync 8355; PPC64LE-NEXT: .LBB493_1: 8356; PPC64LE-NEXT: lwarx 5, 0, 3 8357; PPC64LE-NEXT: cmpw 4, 5 8358; PPC64LE-NEXT: ble 0, .LBB493_3 8359; PPC64LE-NEXT: # %bb.2: 8360; PPC64LE-NEXT: stwcx. 4, 0, 3 8361; PPC64LE-NEXT: bne 0, .LBB493_1 8362; PPC64LE-NEXT: .LBB493_3: 8363; PPC64LE-NEXT: mr 3, 5 8364; PPC64LE-NEXT: lwsync 8365; PPC64LE-NEXT: blr 8366 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") acq_rel 8367 ret i32 %ret 8368} 8369 8370define i32 @test494(i32* %ptr, i32 %val) { 8371; PPC64LE-LABEL: test494: 8372; PPC64LE: # %bb.0: 8373; PPC64LE-NEXT: sync 8374; PPC64LE-NEXT: .LBB494_1: 8375; PPC64LE-NEXT: lwarx 5, 0, 3 8376; PPC64LE-NEXT: cmpw 4, 5 8377; PPC64LE-NEXT: ble 0, .LBB494_3 8378; PPC64LE-NEXT: # %bb.2: 8379; PPC64LE-NEXT: stwcx. 4, 0, 3 8380; PPC64LE-NEXT: bne 0, .LBB494_1 8381; PPC64LE-NEXT: .LBB494_3: 8382; PPC64LE-NEXT: mr 3, 5 8383; PPC64LE-NEXT: lwsync 8384; PPC64LE-NEXT: blr 8385 %ret = atomicrmw max i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8386 ret i32 %ret 8387} 8388 8389define i64 @test495(i64* %ptr, i64 %val) { 8390; PPC64LE-LABEL: test495: 8391; PPC64LE: # %bb.0: 8392; PPC64LE-NEXT: .LBB495_1: 8393; PPC64LE-NEXT: ldarx 5, 0, 3 8394; PPC64LE-NEXT: cmpd 4, 5 8395; PPC64LE-NEXT: ble 0, .LBB495_3 8396; PPC64LE-NEXT: # %bb.2: 8397; PPC64LE-NEXT: stdcx. 4, 0, 3 8398; PPC64LE-NEXT: bne 0, .LBB495_1 8399; PPC64LE-NEXT: .LBB495_3: 8400; PPC64LE-NEXT: mr 3, 5 8401; PPC64LE-NEXT: blr 8402 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") monotonic 8403 ret i64 %ret 8404} 8405 8406define i64 @test496(i64* %ptr, i64 %val) { 8407; PPC64LE-LABEL: test496: 8408; PPC64LE: # %bb.0: 8409; PPC64LE-NEXT: mr 5, 3 8410; PPC64LE-NEXT: .LBB496_1: 8411; PPC64LE-NEXT: ldarx 3, 0, 5 8412; PPC64LE-NEXT: cmpd 4, 3 8413; PPC64LE-NEXT: ble 0, .LBB496_3 8414; PPC64LE-NEXT: # %bb.2: 8415; PPC64LE-NEXT: stdcx. 4, 0, 5 8416; PPC64LE-NEXT: bne 0, .LBB496_1 8417; PPC64LE-NEXT: .LBB496_3: 8418; PPC64LE-NEXT: lwsync 8419; PPC64LE-NEXT: blr 8420 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") acquire 8421 ret i64 %ret 8422} 8423 8424define i64 @test497(i64* %ptr, i64 %val) { 8425; PPC64LE-LABEL: test497: 8426; PPC64LE: # %bb.0: 8427; PPC64LE-NEXT: lwsync 8428; PPC64LE-NEXT: .LBB497_1: 8429; PPC64LE-NEXT: ldarx 5, 0, 3 8430; PPC64LE-NEXT: cmpd 4, 5 8431; PPC64LE-NEXT: ble 0, .LBB497_3 8432; PPC64LE-NEXT: # %bb.2: 8433; PPC64LE-NEXT: stdcx. 4, 0, 3 8434; PPC64LE-NEXT: bne 0, .LBB497_1 8435; PPC64LE-NEXT: .LBB497_3: 8436; PPC64LE-NEXT: mr 3, 5 8437; PPC64LE-NEXT: blr 8438 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") release 8439 ret i64 %ret 8440} 8441 8442define i64 @test498(i64* %ptr, i64 %val) { 8443; PPC64LE-LABEL: test498: 8444; PPC64LE: # %bb.0: 8445; PPC64LE-NEXT: lwsync 8446; PPC64LE-NEXT: .LBB498_1: 8447; PPC64LE-NEXT: ldarx 5, 0, 3 8448; PPC64LE-NEXT: cmpd 4, 5 8449; PPC64LE-NEXT: ble 0, .LBB498_3 8450; PPC64LE-NEXT: # %bb.2: 8451; PPC64LE-NEXT: stdcx. 4, 0, 3 8452; PPC64LE-NEXT: bne 0, .LBB498_1 8453; PPC64LE-NEXT: .LBB498_3: 8454; PPC64LE-NEXT: mr 3, 5 8455; PPC64LE-NEXT: lwsync 8456; PPC64LE-NEXT: blr 8457 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8458 ret i64 %ret 8459} 8460 8461define i64 @test499(i64* %ptr, i64 %val) { 8462; PPC64LE-LABEL: test499: 8463; PPC64LE: # %bb.0: 8464; PPC64LE-NEXT: sync 8465; PPC64LE-NEXT: .LBB499_1: 8466; PPC64LE-NEXT: ldarx 5, 0, 3 8467; PPC64LE-NEXT: cmpd 4, 5 8468; PPC64LE-NEXT: ble 0, .LBB499_3 8469; PPC64LE-NEXT: # %bb.2: 8470; PPC64LE-NEXT: stdcx. 4, 0, 3 8471; PPC64LE-NEXT: bne 0, .LBB499_1 8472; PPC64LE-NEXT: .LBB499_3: 8473; PPC64LE-NEXT: mr 3, 5 8474; PPC64LE-NEXT: lwsync 8475; PPC64LE-NEXT: blr 8476 %ret = atomicrmw max i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8477 ret i64 %ret 8478} 8479 8480define i8 @test500(i8* %ptr, i8 %val) { 8481; PPC64LE-LABEL: test500: 8482; PPC64LE: # %bb.0: 8483; PPC64LE-NEXT: extsb 5, 4 8484; PPC64LE-NEXT: .LBB500_1: 8485; PPC64LE-NEXT: lbarx 4, 0, 3 8486; PPC64LE-NEXT: extsb 6, 4 8487; PPC64LE-NEXT: cmpw 5, 6 8488; PPC64LE-NEXT: bge 0, .LBB500_3 8489; PPC64LE-NEXT: # %bb.2: 8490; PPC64LE-NEXT: stbcx. 5, 0, 3 8491; PPC64LE-NEXT: bne 0, .LBB500_1 8492; PPC64LE-NEXT: .LBB500_3: 8493; PPC64LE-NEXT: mr 3, 4 8494; PPC64LE-NEXT: blr 8495 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") monotonic 8496 ret i8 %ret 8497} 8498 8499define i8 @test501(i8* %ptr, i8 %val) { 8500; PPC64LE-LABEL: test501: 8501; PPC64LE: # %bb.0: 8502; PPC64LE-NEXT: extsb 5, 4 8503; PPC64LE-NEXT: .LBB501_1: 8504; PPC64LE-NEXT: lbarx 4, 0, 3 8505; PPC64LE-NEXT: extsb 6, 4 8506; PPC64LE-NEXT: cmpw 5, 6 8507; PPC64LE-NEXT: bge 0, .LBB501_3 8508; PPC64LE-NEXT: # %bb.2: 8509; PPC64LE-NEXT: stbcx. 5, 0, 3 8510; PPC64LE-NEXT: bne 0, .LBB501_1 8511; PPC64LE-NEXT: .LBB501_3: 8512; PPC64LE-NEXT: mr 3, 4 8513; PPC64LE-NEXT: lwsync 8514; PPC64LE-NEXT: blr 8515 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") acquire 8516 ret i8 %ret 8517} 8518 8519define i8 @test502(i8* %ptr, i8 %val) { 8520; PPC64LE-LABEL: test502: 8521; PPC64LE: # %bb.0: 8522; PPC64LE-NEXT: extsb 5, 4 8523; PPC64LE-NEXT: lwsync 8524; PPC64LE-NEXT: .LBB502_1: 8525; PPC64LE-NEXT: lbarx 4, 0, 3 8526; PPC64LE-NEXT: extsb 6, 4 8527; PPC64LE-NEXT: cmpw 5, 6 8528; PPC64LE-NEXT: bge 0, .LBB502_3 8529; PPC64LE-NEXT: # %bb.2: 8530; PPC64LE-NEXT: stbcx. 5, 0, 3 8531; PPC64LE-NEXT: bne 0, .LBB502_1 8532; PPC64LE-NEXT: .LBB502_3: 8533; PPC64LE-NEXT: mr 3, 4 8534; PPC64LE-NEXT: blr 8535 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") release 8536 ret i8 %ret 8537} 8538 8539define i8 @test503(i8* %ptr, i8 %val) { 8540; PPC64LE-LABEL: test503: 8541; PPC64LE: # %bb.0: 8542; PPC64LE-NEXT: extsb 5, 4 8543; PPC64LE-NEXT: lwsync 8544; PPC64LE-NEXT: .LBB503_1: 8545; PPC64LE-NEXT: lbarx 4, 0, 3 8546; PPC64LE-NEXT: extsb 6, 4 8547; PPC64LE-NEXT: cmpw 5, 6 8548; PPC64LE-NEXT: bge 0, .LBB503_3 8549; PPC64LE-NEXT: # %bb.2: 8550; PPC64LE-NEXT: stbcx. 5, 0, 3 8551; PPC64LE-NEXT: bne 0, .LBB503_1 8552; PPC64LE-NEXT: .LBB503_3: 8553; PPC64LE-NEXT: mr 3, 4 8554; PPC64LE-NEXT: lwsync 8555; PPC64LE-NEXT: blr 8556 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8557 ret i8 %ret 8558} 8559 8560define i8 @test504(i8* %ptr, i8 %val) { 8561; PPC64LE-LABEL: test504: 8562; PPC64LE: # %bb.0: 8563; PPC64LE-NEXT: extsb 5, 4 8564; PPC64LE-NEXT: sync 8565; PPC64LE-NEXT: .LBB504_1: 8566; PPC64LE-NEXT: lbarx 4, 0, 3 8567; PPC64LE-NEXT: extsb 6, 4 8568; PPC64LE-NEXT: cmpw 5, 6 8569; PPC64LE-NEXT: bge 0, .LBB504_3 8570; PPC64LE-NEXT: # %bb.2: 8571; PPC64LE-NEXT: stbcx. 5, 0, 3 8572; PPC64LE-NEXT: bne 0, .LBB504_1 8573; PPC64LE-NEXT: .LBB504_3: 8574; PPC64LE-NEXT: mr 3, 4 8575; PPC64LE-NEXT: lwsync 8576; PPC64LE-NEXT: blr 8577 %ret = atomicrmw min i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8578 ret i8 %ret 8579} 8580 8581define i16 @test505(i16* %ptr, i16 %val) { 8582; PPC64LE-LABEL: test505: 8583; PPC64LE: # %bb.0: 8584; PPC64LE-NEXT: extsh 5, 4 8585; PPC64LE-NEXT: .LBB505_1: 8586; PPC64LE-NEXT: lharx 4, 0, 3 8587; PPC64LE-NEXT: extsh 6, 4 8588; PPC64LE-NEXT: cmpw 5, 6 8589; PPC64LE-NEXT: bge 0, .LBB505_3 8590; PPC64LE-NEXT: # %bb.2: 8591; PPC64LE-NEXT: sthcx. 5, 0, 3 8592; PPC64LE-NEXT: bne 0, .LBB505_1 8593; PPC64LE-NEXT: .LBB505_3: 8594; PPC64LE-NEXT: mr 3, 4 8595; PPC64LE-NEXT: blr 8596 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") monotonic 8597 ret i16 %ret 8598} 8599 8600define i16 @test506(i16* %ptr, i16 %val) { 8601; PPC64LE-LABEL: test506: 8602; PPC64LE: # %bb.0: 8603; PPC64LE-NEXT: extsh 5, 4 8604; PPC64LE-NEXT: .LBB506_1: 8605; PPC64LE-NEXT: lharx 4, 0, 3 8606; PPC64LE-NEXT: extsh 6, 4 8607; PPC64LE-NEXT: cmpw 5, 6 8608; PPC64LE-NEXT: bge 0, .LBB506_3 8609; PPC64LE-NEXT: # %bb.2: 8610; PPC64LE-NEXT: sthcx. 5, 0, 3 8611; PPC64LE-NEXT: bne 0, .LBB506_1 8612; PPC64LE-NEXT: .LBB506_3: 8613; PPC64LE-NEXT: mr 3, 4 8614; PPC64LE-NEXT: lwsync 8615; PPC64LE-NEXT: blr 8616 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") acquire 8617 ret i16 %ret 8618} 8619 8620define i16 @test507(i16* %ptr, i16 %val) { 8621; PPC64LE-LABEL: test507: 8622; PPC64LE: # %bb.0: 8623; PPC64LE-NEXT: extsh 5, 4 8624; PPC64LE-NEXT: lwsync 8625; PPC64LE-NEXT: .LBB507_1: 8626; PPC64LE-NEXT: lharx 4, 0, 3 8627; PPC64LE-NEXT: extsh 6, 4 8628; PPC64LE-NEXT: cmpw 5, 6 8629; PPC64LE-NEXT: bge 0, .LBB507_3 8630; PPC64LE-NEXT: # %bb.2: 8631; PPC64LE-NEXT: sthcx. 5, 0, 3 8632; PPC64LE-NEXT: bne 0, .LBB507_1 8633; PPC64LE-NEXT: .LBB507_3: 8634; PPC64LE-NEXT: mr 3, 4 8635; PPC64LE-NEXT: blr 8636 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") release 8637 ret i16 %ret 8638} 8639 8640define i16 @test508(i16* %ptr, i16 %val) { 8641; PPC64LE-LABEL: test508: 8642; PPC64LE: # %bb.0: 8643; PPC64LE-NEXT: extsh 5, 4 8644; PPC64LE-NEXT: lwsync 8645; PPC64LE-NEXT: .LBB508_1: 8646; PPC64LE-NEXT: lharx 4, 0, 3 8647; PPC64LE-NEXT: extsh 6, 4 8648; PPC64LE-NEXT: cmpw 5, 6 8649; PPC64LE-NEXT: bge 0, .LBB508_3 8650; PPC64LE-NEXT: # %bb.2: 8651; PPC64LE-NEXT: sthcx. 5, 0, 3 8652; PPC64LE-NEXT: bne 0, .LBB508_1 8653; PPC64LE-NEXT: .LBB508_3: 8654; PPC64LE-NEXT: mr 3, 4 8655; PPC64LE-NEXT: lwsync 8656; PPC64LE-NEXT: blr 8657 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") acq_rel 8658 ret i16 %ret 8659} 8660 8661define i16 @test509(i16* %ptr, i16 %val) { 8662; PPC64LE-LABEL: test509: 8663; PPC64LE: # %bb.0: 8664; PPC64LE-NEXT: extsh 5, 4 8665; PPC64LE-NEXT: sync 8666; PPC64LE-NEXT: .LBB509_1: 8667; PPC64LE-NEXT: lharx 4, 0, 3 8668; PPC64LE-NEXT: extsh 6, 4 8669; PPC64LE-NEXT: cmpw 5, 6 8670; PPC64LE-NEXT: bge 0, .LBB509_3 8671; PPC64LE-NEXT: # %bb.2: 8672; PPC64LE-NEXT: sthcx. 5, 0, 3 8673; PPC64LE-NEXT: bne 0, .LBB509_1 8674; PPC64LE-NEXT: .LBB509_3: 8675; PPC64LE-NEXT: mr 3, 4 8676; PPC64LE-NEXT: lwsync 8677; PPC64LE-NEXT: blr 8678 %ret = atomicrmw min i16* %ptr, i16 %val syncscope("singlethread") seq_cst 8679 ret i16 %ret 8680} 8681 8682define i32 @test510(i32* %ptr, i32 %val) { 8683; PPC64LE-LABEL: test510: 8684; PPC64LE: # %bb.0: 8685; PPC64LE-NEXT: .LBB510_1: 8686; PPC64LE-NEXT: lwarx 5, 0, 3 8687; PPC64LE-NEXT: cmpw 4, 5 8688; PPC64LE-NEXT: bge 0, .LBB510_3 8689; PPC64LE-NEXT: # %bb.2: 8690; PPC64LE-NEXT: stwcx. 4, 0, 3 8691; PPC64LE-NEXT: bne 0, .LBB510_1 8692; PPC64LE-NEXT: .LBB510_3: 8693; PPC64LE-NEXT: mr 3, 5 8694; PPC64LE-NEXT: blr 8695 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") monotonic 8696 ret i32 %ret 8697} 8698 8699define i32 @test511(i32* %ptr, i32 %val) { 8700; PPC64LE-LABEL: test511: 8701; PPC64LE: # %bb.0: 8702; PPC64LE-NEXT: mr 5, 3 8703; PPC64LE-NEXT: .LBB511_1: 8704; PPC64LE-NEXT: lwarx 3, 0, 5 8705; PPC64LE-NEXT: cmpw 4, 3 8706; PPC64LE-NEXT: bge 0, .LBB511_3 8707; PPC64LE-NEXT: # %bb.2: 8708; PPC64LE-NEXT: stwcx. 4, 0, 5 8709; PPC64LE-NEXT: bne 0, .LBB511_1 8710; PPC64LE-NEXT: .LBB511_3: 8711; PPC64LE-NEXT: lwsync 8712; PPC64LE-NEXT: blr 8713 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") acquire 8714 ret i32 %ret 8715} 8716 8717define i32 @test512(i32* %ptr, i32 %val) { 8718; PPC64LE-LABEL: test512: 8719; PPC64LE: # %bb.0: 8720; PPC64LE-NEXT: lwsync 8721; PPC64LE-NEXT: .LBB512_1: 8722; PPC64LE-NEXT: lwarx 5, 0, 3 8723; PPC64LE-NEXT: cmpw 4, 5 8724; PPC64LE-NEXT: bge 0, .LBB512_3 8725; PPC64LE-NEXT: # %bb.2: 8726; PPC64LE-NEXT: stwcx. 4, 0, 3 8727; PPC64LE-NEXT: bne 0, .LBB512_1 8728; PPC64LE-NEXT: .LBB512_3: 8729; PPC64LE-NEXT: mr 3, 5 8730; PPC64LE-NEXT: blr 8731 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") release 8732 ret i32 %ret 8733} 8734 8735define i32 @test513(i32* %ptr, i32 %val) { 8736; PPC64LE-LABEL: test513: 8737; PPC64LE: # %bb.0: 8738; PPC64LE-NEXT: lwsync 8739; PPC64LE-NEXT: .LBB513_1: 8740; PPC64LE-NEXT: lwarx 5, 0, 3 8741; PPC64LE-NEXT: cmpw 4, 5 8742; PPC64LE-NEXT: bge 0, .LBB513_3 8743; PPC64LE-NEXT: # %bb.2: 8744; PPC64LE-NEXT: stwcx. 4, 0, 3 8745; PPC64LE-NEXT: bne 0, .LBB513_1 8746; PPC64LE-NEXT: .LBB513_3: 8747; PPC64LE-NEXT: mr 3, 5 8748; PPC64LE-NEXT: lwsync 8749; PPC64LE-NEXT: blr 8750 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") acq_rel 8751 ret i32 %ret 8752} 8753 8754define i32 @test514(i32* %ptr, i32 %val) { 8755; PPC64LE-LABEL: test514: 8756; PPC64LE: # %bb.0: 8757; PPC64LE-NEXT: sync 8758; PPC64LE-NEXT: .LBB514_1: 8759; PPC64LE-NEXT: lwarx 5, 0, 3 8760; PPC64LE-NEXT: cmpw 4, 5 8761; PPC64LE-NEXT: bge 0, .LBB514_3 8762; PPC64LE-NEXT: # %bb.2: 8763; PPC64LE-NEXT: stwcx. 4, 0, 3 8764; PPC64LE-NEXT: bne 0, .LBB514_1 8765; PPC64LE-NEXT: .LBB514_3: 8766; PPC64LE-NEXT: mr 3, 5 8767; PPC64LE-NEXT: lwsync 8768; PPC64LE-NEXT: blr 8769 %ret = atomicrmw min i32* %ptr, i32 %val syncscope("singlethread") seq_cst 8770 ret i32 %ret 8771} 8772 8773define i64 @test515(i64* %ptr, i64 %val) { 8774; PPC64LE-LABEL: test515: 8775; PPC64LE: # %bb.0: 8776; PPC64LE-NEXT: .LBB515_1: 8777; PPC64LE-NEXT: ldarx 5, 0, 3 8778; PPC64LE-NEXT: cmpd 4, 5 8779; PPC64LE-NEXT: bge 0, .LBB515_3 8780; PPC64LE-NEXT: # %bb.2: 8781; PPC64LE-NEXT: stdcx. 4, 0, 3 8782; PPC64LE-NEXT: bne 0, .LBB515_1 8783; PPC64LE-NEXT: .LBB515_3: 8784; PPC64LE-NEXT: mr 3, 5 8785; PPC64LE-NEXT: blr 8786 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") monotonic 8787 ret i64 %ret 8788} 8789 8790define i64 @test516(i64* %ptr, i64 %val) { 8791; PPC64LE-LABEL: test516: 8792; PPC64LE: # %bb.0: 8793; PPC64LE-NEXT: mr 5, 3 8794; PPC64LE-NEXT: .LBB516_1: 8795; PPC64LE-NEXT: ldarx 3, 0, 5 8796; PPC64LE-NEXT: cmpd 4, 3 8797; PPC64LE-NEXT: bge 0, .LBB516_3 8798; PPC64LE-NEXT: # %bb.2: 8799; PPC64LE-NEXT: stdcx. 4, 0, 5 8800; PPC64LE-NEXT: bne 0, .LBB516_1 8801; PPC64LE-NEXT: .LBB516_3: 8802; PPC64LE-NEXT: lwsync 8803; PPC64LE-NEXT: blr 8804 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") acquire 8805 ret i64 %ret 8806} 8807 8808define i64 @test517(i64* %ptr, i64 %val) { 8809; PPC64LE-LABEL: test517: 8810; PPC64LE: # %bb.0: 8811; PPC64LE-NEXT: lwsync 8812; PPC64LE-NEXT: .LBB517_1: 8813; PPC64LE-NEXT: ldarx 5, 0, 3 8814; PPC64LE-NEXT: cmpd 4, 5 8815; PPC64LE-NEXT: bge 0, .LBB517_3 8816; PPC64LE-NEXT: # %bb.2: 8817; PPC64LE-NEXT: stdcx. 4, 0, 3 8818; PPC64LE-NEXT: bne 0, .LBB517_1 8819; PPC64LE-NEXT: .LBB517_3: 8820; PPC64LE-NEXT: mr 3, 5 8821; PPC64LE-NEXT: blr 8822 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") release 8823 ret i64 %ret 8824} 8825 8826define i64 @test518(i64* %ptr, i64 %val) { 8827; PPC64LE-LABEL: test518: 8828; PPC64LE: # %bb.0: 8829; PPC64LE-NEXT: lwsync 8830; PPC64LE-NEXT: .LBB518_1: 8831; PPC64LE-NEXT: ldarx 5, 0, 3 8832; PPC64LE-NEXT: cmpd 4, 5 8833; PPC64LE-NEXT: bge 0, .LBB518_3 8834; PPC64LE-NEXT: # %bb.2: 8835; PPC64LE-NEXT: stdcx. 4, 0, 3 8836; PPC64LE-NEXT: bne 0, .LBB518_1 8837; PPC64LE-NEXT: .LBB518_3: 8838; PPC64LE-NEXT: mr 3, 5 8839; PPC64LE-NEXT: lwsync 8840; PPC64LE-NEXT: blr 8841 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") acq_rel 8842 ret i64 %ret 8843} 8844 8845define i64 @test519(i64* %ptr, i64 %val) { 8846; PPC64LE-LABEL: test519: 8847; PPC64LE: # %bb.0: 8848; PPC64LE-NEXT: sync 8849; PPC64LE-NEXT: .LBB519_1: 8850; PPC64LE-NEXT: ldarx 5, 0, 3 8851; PPC64LE-NEXT: cmpd 4, 5 8852; PPC64LE-NEXT: bge 0, .LBB519_3 8853; PPC64LE-NEXT: # %bb.2: 8854; PPC64LE-NEXT: stdcx. 4, 0, 3 8855; PPC64LE-NEXT: bne 0, .LBB519_1 8856; PPC64LE-NEXT: .LBB519_3: 8857; PPC64LE-NEXT: mr 3, 5 8858; PPC64LE-NEXT: lwsync 8859; PPC64LE-NEXT: blr 8860 %ret = atomicrmw min i64* %ptr, i64 %val syncscope("singlethread") seq_cst 8861 ret i64 %ret 8862} 8863 8864define i8 @test520(i8* %ptr, i8 %val) { 8865; PPC64LE-LABEL: test520: 8866; PPC64LE: # %bb.0: 8867; PPC64LE-NEXT: .LBB520_1: 8868; PPC64LE-NEXT: lbarx 5, 0, 3 8869; PPC64LE-NEXT: cmplw 4, 5 8870; PPC64LE-NEXT: ble 0, .LBB520_3 8871; PPC64LE-NEXT: # %bb.2: 8872; PPC64LE-NEXT: stbcx. 4, 0, 3 8873; PPC64LE-NEXT: bne 0, .LBB520_1 8874; PPC64LE-NEXT: .LBB520_3: 8875; PPC64LE-NEXT: mr 3, 5 8876; PPC64LE-NEXT: blr 8877 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") monotonic 8878 ret i8 %ret 8879} 8880 8881define i8 @test521(i8* %ptr, i8 %val) { 8882; PPC64LE-LABEL: test521: 8883; PPC64LE: # %bb.0: 8884; PPC64LE-NEXT: mr 5, 3 8885; PPC64LE-NEXT: .LBB521_1: 8886; PPC64LE-NEXT: lbarx 3, 0, 5 8887; PPC64LE-NEXT: cmplw 4, 3 8888; PPC64LE-NEXT: ble 0, .LBB521_3 8889; PPC64LE-NEXT: # %bb.2: 8890; PPC64LE-NEXT: stbcx. 4, 0, 5 8891; PPC64LE-NEXT: bne 0, .LBB521_1 8892; PPC64LE-NEXT: .LBB521_3: 8893; PPC64LE-NEXT: lwsync 8894; PPC64LE-NEXT: blr 8895 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") acquire 8896 ret i8 %ret 8897} 8898 8899define i8 @test522(i8* %ptr, i8 %val) { 8900; PPC64LE-LABEL: test522: 8901; PPC64LE: # %bb.0: 8902; PPC64LE-NEXT: lwsync 8903; PPC64LE-NEXT: .LBB522_1: 8904; PPC64LE-NEXT: lbarx 5, 0, 3 8905; PPC64LE-NEXT: cmplw 4, 5 8906; PPC64LE-NEXT: ble 0, .LBB522_3 8907; PPC64LE-NEXT: # %bb.2: 8908; PPC64LE-NEXT: stbcx. 4, 0, 3 8909; PPC64LE-NEXT: bne 0, .LBB522_1 8910; PPC64LE-NEXT: .LBB522_3: 8911; PPC64LE-NEXT: mr 3, 5 8912; PPC64LE-NEXT: blr 8913 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") release 8914 ret i8 %ret 8915} 8916 8917define i8 @test523(i8* %ptr, i8 %val) { 8918; PPC64LE-LABEL: test523: 8919; PPC64LE: # %bb.0: 8920; PPC64LE-NEXT: lwsync 8921; PPC64LE-NEXT: .LBB523_1: 8922; PPC64LE-NEXT: lbarx 5, 0, 3 8923; PPC64LE-NEXT: cmplw 4, 5 8924; PPC64LE-NEXT: ble 0, .LBB523_3 8925; PPC64LE-NEXT: # %bb.2: 8926; PPC64LE-NEXT: stbcx. 4, 0, 3 8927; PPC64LE-NEXT: bne 0, .LBB523_1 8928; PPC64LE-NEXT: .LBB523_3: 8929; PPC64LE-NEXT: mr 3, 5 8930; PPC64LE-NEXT: lwsync 8931; PPC64LE-NEXT: blr 8932 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") acq_rel 8933 ret i8 %ret 8934} 8935 8936define i8 @test524(i8* %ptr, i8 %val) { 8937; PPC64LE-LABEL: test524: 8938; PPC64LE: # %bb.0: 8939; PPC64LE-NEXT: sync 8940; PPC64LE-NEXT: .LBB524_1: 8941; PPC64LE-NEXT: lbarx 5, 0, 3 8942; PPC64LE-NEXT: cmplw 4, 5 8943; PPC64LE-NEXT: ble 0, .LBB524_3 8944; PPC64LE-NEXT: # %bb.2: 8945; PPC64LE-NEXT: stbcx. 4, 0, 3 8946; PPC64LE-NEXT: bne 0, .LBB524_1 8947; PPC64LE-NEXT: .LBB524_3: 8948; PPC64LE-NEXT: mr 3, 5 8949; PPC64LE-NEXT: lwsync 8950; PPC64LE-NEXT: blr 8951 %ret = atomicrmw umax i8* %ptr, i8 %val syncscope("singlethread") seq_cst 8952 ret i8 %ret 8953} 8954 8955define i16 @test525(i16* %ptr, i16 %val) { 8956; PPC64LE-LABEL: test525: 8957; PPC64LE: # %bb.0: 8958; PPC64LE-NEXT: .LBB525_1: 8959; PPC64LE-NEXT: lharx 5, 0, 3 8960; PPC64LE-NEXT: cmplw 4, 5 8961; PPC64LE-NEXT: ble 0, .LBB525_3 8962; PPC64LE-NEXT: # %bb.2: 8963; PPC64LE-NEXT: sthcx. 4, 0, 3 8964; PPC64LE-NEXT: bne 0, .LBB525_1 8965; PPC64LE-NEXT: .LBB525_3: 8966; PPC64LE-NEXT: mr 3, 5 8967; PPC64LE-NEXT: blr 8968 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") monotonic 8969 ret i16 %ret 8970} 8971 8972define i16 @test526(i16* %ptr, i16 %val) { 8973; PPC64LE-LABEL: test526: 8974; PPC64LE: # %bb.0: 8975; PPC64LE-NEXT: mr 5, 3 8976; PPC64LE-NEXT: .LBB526_1: 8977; PPC64LE-NEXT: lharx 3, 0, 5 8978; PPC64LE-NEXT: cmplw 4, 3 8979; PPC64LE-NEXT: ble 0, .LBB526_3 8980; PPC64LE-NEXT: # %bb.2: 8981; PPC64LE-NEXT: sthcx. 4, 0, 5 8982; PPC64LE-NEXT: bne 0, .LBB526_1 8983; PPC64LE-NEXT: .LBB526_3: 8984; PPC64LE-NEXT: lwsync 8985; PPC64LE-NEXT: blr 8986 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") acquire 8987 ret i16 %ret 8988} 8989 8990define i16 @test527(i16* %ptr, i16 %val) { 8991; PPC64LE-LABEL: test527: 8992; PPC64LE: # %bb.0: 8993; PPC64LE-NEXT: lwsync 8994; PPC64LE-NEXT: .LBB527_1: 8995; PPC64LE-NEXT: lharx 5, 0, 3 8996; PPC64LE-NEXT: cmplw 4, 5 8997; PPC64LE-NEXT: ble 0, .LBB527_3 8998; PPC64LE-NEXT: # %bb.2: 8999; PPC64LE-NEXT: sthcx. 4, 0, 3 9000; PPC64LE-NEXT: bne 0, .LBB527_1 9001; PPC64LE-NEXT: .LBB527_3: 9002; PPC64LE-NEXT: mr 3, 5 9003; PPC64LE-NEXT: blr 9004 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") release 9005 ret i16 %ret 9006} 9007 9008define i16 @test528(i16* %ptr, i16 %val) { 9009; PPC64LE-LABEL: test528: 9010; PPC64LE: # %bb.0: 9011; PPC64LE-NEXT: lwsync 9012; PPC64LE-NEXT: .LBB528_1: 9013; PPC64LE-NEXT: lharx 5, 0, 3 9014; PPC64LE-NEXT: cmplw 4, 5 9015; PPC64LE-NEXT: ble 0, .LBB528_3 9016; PPC64LE-NEXT: # %bb.2: 9017; PPC64LE-NEXT: sthcx. 4, 0, 3 9018; PPC64LE-NEXT: bne 0, .LBB528_1 9019; PPC64LE-NEXT: .LBB528_3: 9020; PPC64LE-NEXT: mr 3, 5 9021; PPC64LE-NEXT: lwsync 9022; PPC64LE-NEXT: blr 9023 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") acq_rel 9024 ret i16 %ret 9025} 9026 9027define i16 @test529(i16* %ptr, i16 %val) { 9028; PPC64LE-LABEL: test529: 9029; PPC64LE: # %bb.0: 9030; PPC64LE-NEXT: sync 9031; PPC64LE-NEXT: .LBB529_1: 9032; PPC64LE-NEXT: lharx 5, 0, 3 9033; PPC64LE-NEXT: cmplw 4, 5 9034; PPC64LE-NEXT: ble 0, .LBB529_3 9035; PPC64LE-NEXT: # %bb.2: 9036; PPC64LE-NEXT: sthcx. 4, 0, 3 9037; PPC64LE-NEXT: bne 0, .LBB529_1 9038; PPC64LE-NEXT: .LBB529_3: 9039; PPC64LE-NEXT: mr 3, 5 9040; PPC64LE-NEXT: lwsync 9041; PPC64LE-NEXT: blr 9042 %ret = atomicrmw umax i16* %ptr, i16 %val syncscope("singlethread") seq_cst 9043 ret i16 %ret 9044} 9045 9046define i32 @test530(i32* %ptr, i32 %val) { 9047; PPC64LE-LABEL: test530: 9048; PPC64LE: # %bb.0: 9049; PPC64LE-NEXT: .LBB530_1: 9050; PPC64LE-NEXT: lwarx 5, 0, 3 9051; PPC64LE-NEXT: cmplw 4, 5 9052; PPC64LE-NEXT: ble 0, .LBB530_3 9053; PPC64LE-NEXT: # %bb.2: 9054; PPC64LE-NEXT: stwcx. 4, 0, 3 9055; PPC64LE-NEXT: bne 0, .LBB530_1 9056; PPC64LE-NEXT: .LBB530_3: 9057; PPC64LE-NEXT: mr 3, 5 9058; PPC64LE-NEXT: blr 9059 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") monotonic 9060 ret i32 %ret 9061} 9062 9063define i32 @test531(i32* %ptr, i32 %val) { 9064; PPC64LE-LABEL: test531: 9065; PPC64LE: # %bb.0: 9066; PPC64LE-NEXT: mr 5, 3 9067; PPC64LE-NEXT: .LBB531_1: 9068; PPC64LE-NEXT: lwarx 3, 0, 5 9069; PPC64LE-NEXT: cmplw 4, 3 9070; PPC64LE-NEXT: ble 0, .LBB531_3 9071; PPC64LE-NEXT: # %bb.2: 9072; PPC64LE-NEXT: stwcx. 4, 0, 5 9073; PPC64LE-NEXT: bne 0, .LBB531_1 9074; PPC64LE-NEXT: .LBB531_3: 9075; PPC64LE-NEXT: lwsync 9076; PPC64LE-NEXT: blr 9077 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") acquire 9078 ret i32 %ret 9079} 9080 9081define i32 @test532(i32* %ptr, i32 %val) { 9082; PPC64LE-LABEL: test532: 9083; PPC64LE: # %bb.0: 9084; PPC64LE-NEXT: lwsync 9085; PPC64LE-NEXT: .LBB532_1: 9086; PPC64LE-NEXT: lwarx 5, 0, 3 9087; PPC64LE-NEXT: cmplw 4, 5 9088; PPC64LE-NEXT: ble 0, .LBB532_3 9089; PPC64LE-NEXT: # %bb.2: 9090; PPC64LE-NEXT: stwcx. 4, 0, 3 9091; PPC64LE-NEXT: bne 0, .LBB532_1 9092; PPC64LE-NEXT: .LBB532_3: 9093; PPC64LE-NEXT: mr 3, 5 9094; PPC64LE-NEXT: blr 9095 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") release 9096 ret i32 %ret 9097} 9098 9099define i32 @test533(i32* %ptr, i32 %val) { 9100; PPC64LE-LABEL: test533: 9101; PPC64LE: # %bb.0: 9102; PPC64LE-NEXT: lwsync 9103; PPC64LE-NEXT: .LBB533_1: 9104; PPC64LE-NEXT: lwarx 5, 0, 3 9105; PPC64LE-NEXT: cmplw 4, 5 9106; PPC64LE-NEXT: ble 0, .LBB533_3 9107; PPC64LE-NEXT: # %bb.2: 9108; PPC64LE-NEXT: stwcx. 4, 0, 3 9109; PPC64LE-NEXT: bne 0, .LBB533_1 9110; PPC64LE-NEXT: .LBB533_3: 9111; PPC64LE-NEXT: mr 3, 5 9112; PPC64LE-NEXT: lwsync 9113; PPC64LE-NEXT: blr 9114 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") acq_rel 9115 ret i32 %ret 9116} 9117 9118define i32 @test534(i32* %ptr, i32 %val) { 9119; PPC64LE-LABEL: test534: 9120; PPC64LE: # %bb.0: 9121; PPC64LE-NEXT: sync 9122; PPC64LE-NEXT: .LBB534_1: 9123; PPC64LE-NEXT: lwarx 5, 0, 3 9124; PPC64LE-NEXT: cmplw 4, 5 9125; PPC64LE-NEXT: ble 0, .LBB534_3 9126; PPC64LE-NEXT: # %bb.2: 9127; PPC64LE-NEXT: stwcx. 4, 0, 3 9128; PPC64LE-NEXT: bne 0, .LBB534_1 9129; PPC64LE-NEXT: .LBB534_3: 9130; PPC64LE-NEXT: mr 3, 5 9131; PPC64LE-NEXT: lwsync 9132; PPC64LE-NEXT: blr 9133 %ret = atomicrmw umax i32* %ptr, i32 %val syncscope("singlethread") seq_cst 9134 ret i32 %ret 9135} 9136 9137define i64 @test535(i64* %ptr, i64 %val) { 9138; PPC64LE-LABEL: test535: 9139; PPC64LE: # %bb.0: 9140; PPC64LE-NEXT: .LBB535_1: 9141; PPC64LE-NEXT: ldarx 5, 0, 3 9142; PPC64LE-NEXT: cmpld 4, 5 9143; PPC64LE-NEXT: ble 0, .LBB535_3 9144; PPC64LE-NEXT: # %bb.2: 9145; PPC64LE-NEXT: stdcx. 4, 0, 3 9146; PPC64LE-NEXT: bne 0, .LBB535_1 9147; PPC64LE-NEXT: .LBB535_3: 9148; PPC64LE-NEXT: mr 3, 5 9149; PPC64LE-NEXT: blr 9150 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") monotonic 9151 ret i64 %ret 9152} 9153 9154define i64 @test536(i64* %ptr, i64 %val) { 9155; PPC64LE-LABEL: test536: 9156; PPC64LE: # %bb.0: 9157; PPC64LE-NEXT: mr 5, 3 9158; PPC64LE-NEXT: .LBB536_1: 9159; PPC64LE-NEXT: ldarx 3, 0, 5 9160; PPC64LE-NEXT: cmpld 4, 3 9161; PPC64LE-NEXT: ble 0, .LBB536_3 9162; PPC64LE-NEXT: # %bb.2: 9163; PPC64LE-NEXT: stdcx. 4, 0, 5 9164; PPC64LE-NEXT: bne 0, .LBB536_1 9165; PPC64LE-NEXT: .LBB536_3: 9166; PPC64LE-NEXT: lwsync 9167; PPC64LE-NEXT: blr 9168 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") acquire 9169 ret i64 %ret 9170} 9171 9172define i64 @test537(i64* %ptr, i64 %val) { 9173; PPC64LE-LABEL: test537: 9174; PPC64LE: # %bb.0: 9175; PPC64LE-NEXT: lwsync 9176; PPC64LE-NEXT: .LBB537_1: 9177; PPC64LE-NEXT: ldarx 5, 0, 3 9178; PPC64LE-NEXT: cmpld 4, 5 9179; PPC64LE-NEXT: ble 0, .LBB537_3 9180; PPC64LE-NEXT: # %bb.2: 9181; PPC64LE-NEXT: stdcx. 4, 0, 3 9182; PPC64LE-NEXT: bne 0, .LBB537_1 9183; PPC64LE-NEXT: .LBB537_3: 9184; PPC64LE-NEXT: mr 3, 5 9185; PPC64LE-NEXT: blr 9186 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") release 9187 ret i64 %ret 9188} 9189 9190define i64 @test538(i64* %ptr, i64 %val) { 9191; PPC64LE-LABEL: test538: 9192; PPC64LE: # %bb.0: 9193; PPC64LE-NEXT: lwsync 9194; PPC64LE-NEXT: .LBB538_1: 9195; PPC64LE-NEXT: ldarx 5, 0, 3 9196; PPC64LE-NEXT: cmpld 4, 5 9197; PPC64LE-NEXT: ble 0, .LBB538_3 9198; PPC64LE-NEXT: # %bb.2: 9199; PPC64LE-NEXT: stdcx. 4, 0, 3 9200; PPC64LE-NEXT: bne 0, .LBB538_1 9201; PPC64LE-NEXT: .LBB538_3: 9202; PPC64LE-NEXT: mr 3, 5 9203; PPC64LE-NEXT: lwsync 9204; PPC64LE-NEXT: blr 9205 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") acq_rel 9206 ret i64 %ret 9207} 9208 9209define i64 @test539(i64* %ptr, i64 %val) { 9210; PPC64LE-LABEL: test539: 9211; PPC64LE: # %bb.0: 9212; PPC64LE-NEXT: sync 9213; PPC64LE-NEXT: .LBB539_1: 9214; PPC64LE-NEXT: ldarx 5, 0, 3 9215; PPC64LE-NEXT: cmpld 4, 5 9216; PPC64LE-NEXT: ble 0, .LBB539_3 9217; PPC64LE-NEXT: # %bb.2: 9218; PPC64LE-NEXT: stdcx. 4, 0, 3 9219; PPC64LE-NEXT: bne 0, .LBB539_1 9220; PPC64LE-NEXT: .LBB539_3: 9221; PPC64LE-NEXT: mr 3, 5 9222; PPC64LE-NEXT: lwsync 9223; PPC64LE-NEXT: blr 9224 %ret = atomicrmw umax i64* %ptr, i64 %val syncscope("singlethread") seq_cst 9225 ret i64 %ret 9226} 9227 9228define i8 @test540(i8* %ptr, i8 %val) { 9229; PPC64LE-LABEL: test540: 9230; PPC64LE: # %bb.0: 9231; PPC64LE-NEXT: .LBB540_1: 9232; PPC64LE-NEXT: lbarx 5, 0, 3 9233; PPC64LE-NEXT: cmplw 4, 5 9234; PPC64LE-NEXT: bge 0, .LBB540_3 9235; PPC64LE-NEXT: # %bb.2: 9236; PPC64LE-NEXT: stbcx. 4, 0, 3 9237; PPC64LE-NEXT: bne 0, .LBB540_1 9238; PPC64LE-NEXT: .LBB540_3: 9239; PPC64LE-NEXT: mr 3, 5 9240; PPC64LE-NEXT: blr 9241 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") monotonic 9242 ret i8 %ret 9243} 9244 9245define i8 @test541(i8* %ptr, i8 %val) { 9246; PPC64LE-LABEL: test541: 9247; PPC64LE: # %bb.0: 9248; PPC64LE-NEXT: mr 5, 3 9249; PPC64LE-NEXT: .LBB541_1: 9250; PPC64LE-NEXT: lbarx 3, 0, 5 9251; PPC64LE-NEXT: cmplw 4, 3 9252; PPC64LE-NEXT: bge 0, .LBB541_3 9253; PPC64LE-NEXT: # %bb.2: 9254; PPC64LE-NEXT: stbcx. 4, 0, 5 9255; PPC64LE-NEXT: bne 0, .LBB541_1 9256; PPC64LE-NEXT: .LBB541_3: 9257; PPC64LE-NEXT: lwsync 9258; PPC64LE-NEXT: blr 9259 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") acquire 9260 ret i8 %ret 9261} 9262 9263define i8 @test542(i8* %ptr, i8 %val) { 9264; PPC64LE-LABEL: test542: 9265; PPC64LE: # %bb.0: 9266; PPC64LE-NEXT: lwsync 9267; PPC64LE-NEXT: .LBB542_1: 9268; PPC64LE-NEXT: lbarx 5, 0, 3 9269; PPC64LE-NEXT: cmplw 4, 5 9270; PPC64LE-NEXT: bge 0, .LBB542_3 9271; PPC64LE-NEXT: # %bb.2: 9272; PPC64LE-NEXT: stbcx. 4, 0, 3 9273; PPC64LE-NEXT: bne 0, .LBB542_1 9274; PPC64LE-NEXT: .LBB542_3: 9275; PPC64LE-NEXT: mr 3, 5 9276; PPC64LE-NEXT: blr 9277 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") release 9278 ret i8 %ret 9279} 9280 9281define i8 @test543(i8* %ptr, i8 %val) { 9282; PPC64LE-LABEL: test543: 9283; PPC64LE: # %bb.0: 9284; PPC64LE-NEXT: lwsync 9285; PPC64LE-NEXT: .LBB543_1: 9286; PPC64LE-NEXT: lbarx 5, 0, 3 9287; PPC64LE-NEXT: cmplw 4, 5 9288; PPC64LE-NEXT: bge 0, .LBB543_3 9289; PPC64LE-NEXT: # %bb.2: 9290; PPC64LE-NEXT: stbcx. 4, 0, 3 9291; PPC64LE-NEXT: bne 0, .LBB543_1 9292; PPC64LE-NEXT: .LBB543_3: 9293; PPC64LE-NEXT: mr 3, 5 9294; PPC64LE-NEXT: lwsync 9295; PPC64LE-NEXT: blr 9296 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") acq_rel 9297 ret i8 %ret 9298} 9299 9300define i8 @test544(i8* %ptr, i8 %val) { 9301; PPC64LE-LABEL: test544: 9302; PPC64LE: # %bb.0: 9303; PPC64LE-NEXT: sync 9304; PPC64LE-NEXT: .LBB544_1: 9305; PPC64LE-NEXT: lbarx 5, 0, 3 9306; PPC64LE-NEXT: cmplw 4, 5 9307; PPC64LE-NEXT: bge 0, .LBB544_3 9308; PPC64LE-NEXT: # %bb.2: 9309; PPC64LE-NEXT: stbcx. 4, 0, 3 9310; PPC64LE-NEXT: bne 0, .LBB544_1 9311; PPC64LE-NEXT: .LBB544_3: 9312; PPC64LE-NEXT: mr 3, 5 9313; PPC64LE-NEXT: lwsync 9314; PPC64LE-NEXT: blr 9315 %ret = atomicrmw umin i8* %ptr, i8 %val syncscope("singlethread") seq_cst 9316 ret i8 %ret 9317} 9318 9319define i16 @test545(i16* %ptr, i16 %val) { 9320; PPC64LE-LABEL: test545: 9321; PPC64LE: # %bb.0: 9322; PPC64LE-NEXT: .LBB545_1: 9323; PPC64LE-NEXT: lharx 5, 0, 3 9324; PPC64LE-NEXT: cmplw 4, 5 9325; PPC64LE-NEXT: bge 0, .LBB545_3 9326; PPC64LE-NEXT: # %bb.2: 9327; PPC64LE-NEXT: sthcx. 4, 0, 3 9328; PPC64LE-NEXT: bne 0, .LBB545_1 9329; PPC64LE-NEXT: .LBB545_3: 9330; PPC64LE-NEXT: mr 3, 5 9331; PPC64LE-NEXT: blr 9332 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") monotonic 9333 ret i16 %ret 9334} 9335 9336define i16 @test546(i16* %ptr, i16 %val) { 9337; PPC64LE-LABEL: test546: 9338; PPC64LE: # %bb.0: 9339; PPC64LE-NEXT: mr 5, 3 9340; PPC64LE-NEXT: .LBB546_1: 9341; PPC64LE-NEXT: lharx 3, 0, 5 9342; PPC64LE-NEXT: cmplw 4, 3 9343; PPC64LE-NEXT: bge 0, .LBB546_3 9344; PPC64LE-NEXT: # %bb.2: 9345; PPC64LE-NEXT: sthcx. 4, 0, 5 9346; PPC64LE-NEXT: bne 0, .LBB546_1 9347; PPC64LE-NEXT: .LBB546_3: 9348; PPC64LE-NEXT: lwsync 9349; PPC64LE-NEXT: blr 9350 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") acquire 9351 ret i16 %ret 9352} 9353 9354define i16 @test547(i16* %ptr, i16 %val) { 9355; PPC64LE-LABEL: test547: 9356; PPC64LE: # %bb.0: 9357; PPC64LE-NEXT: lwsync 9358; PPC64LE-NEXT: .LBB547_1: 9359; PPC64LE-NEXT: lharx 5, 0, 3 9360; PPC64LE-NEXT: cmplw 4, 5 9361; PPC64LE-NEXT: bge 0, .LBB547_3 9362; PPC64LE-NEXT: # %bb.2: 9363; PPC64LE-NEXT: sthcx. 4, 0, 3 9364; PPC64LE-NEXT: bne 0, .LBB547_1 9365; PPC64LE-NEXT: .LBB547_3: 9366; PPC64LE-NEXT: mr 3, 5 9367; PPC64LE-NEXT: blr 9368 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") release 9369 ret i16 %ret 9370} 9371 9372define i16 @test548(i16* %ptr, i16 %val) { 9373; PPC64LE-LABEL: test548: 9374; PPC64LE: # %bb.0: 9375; PPC64LE-NEXT: lwsync 9376; PPC64LE-NEXT: .LBB548_1: 9377; PPC64LE-NEXT: lharx 5, 0, 3 9378; PPC64LE-NEXT: cmplw 4, 5 9379; PPC64LE-NEXT: bge 0, .LBB548_3 9380; PPC64LE-NEXT: # %bb.2: 9381; PPC64LE-NEXT: sthcx. 4, 0, 3 9382; PPC64LE-NEXT: bne 0, .LBB548_1 9383; PPC64LE-NEXT: .LBB548_3: 9384; PPC64LE-NEXT: mr 3, 5 9385; PPC64LE-NEXT: lwsync 9386; PPC64LE-NEXT: blr 9387 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") acq_rel 9388 ret i16 %ret 9389} 9390 9391define i16 @test549(i16* %ptr, i16 %val) { 9392; PPC64LE-LABEL: test549: 9393; PPC64LE: # %bb.0: 9394; PPC64LE-NEXT: sync 9395; PPC64LE-NEXT: .LBB549_1: 9396; PPC64LE-NEXT: lharx 5, 0, 3 9397; PPC64LE-NEXT: cmplw 4, 5 9398; PPC64LE-NEXT: bge 0, .LBB549_3 9399; PPC64LE-NEXT: # %bb.2: 9400; PPC64LE-NEXT: sthcx. 4, 0, 3 9401; PPC64LE-NEXT: bne 0, .LBB549_1 9402; PPC64LE-NEXT: .LBB549_3: 9403; PPC64LE-NEXT: mr 3, 5 9404; PPC64LE-NEXT: lwsync 9405; PPC64LE-NEXT: blr 9406 %ret = atomicrmw umin i16* %ptr, i16 %val syncscope("singlethread") seq_cst 9407 ret i16 %ret 9408} 9409 9410define i32 @test550(i32* %ptr, i32 %val) { 9411; PPC64LE-LABEL: test550: 9412; PPC64LE: # %bb.0: 9413; PPC64LE-NEXT: .LBB550_1: 9414; PPC64LE-NEXT: lwarx 5, 0, 3 9415; PPC64LE-NEXT: cmplw 4, 5 9416; PPC64LE-NEXT: bge 0, .LBB550_3 9417; PPC64LE-NEXT: # %bb.2: 9418; PPC64LE-NEXT: stwcx. 4, 0, 3 9419; PPC64LE-NEXT: bne 0, .LBB550_1 9420; PPC64LE-NEXT: .LBB550_3: 9421; PPC64LE-NEXT: mr 3, 5 9422; PPC64LE-NEXT: blr 9423 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") monotonic 9424 ret i32 %ret 9425} 9426 9427define i32 @test551(i32* %ptr, i32 %val) { 9428; PPC64LE-LABEL: test551: 9429; PPC64LE: # %bb.0: 9430; PPC64LE-NEXT: mr 5, 3 9431; PPC64LE-NEXT: .LBB551_1: 9432; PPC64LE-NEXT: lwarx 3, 0, 5 9433; PPC64LE-NEXT: cmplw 4, 3 9434; PPC64LE-NEXT: bge 0, .LBB551_3 9435; PPC64LE-NEXT: # %bb.2: 9436; PPC64LE-NEXT: stwcx. 4, 0, 5 9437; PPC64LE-NEXT: bne 0, .LBB551_1 9438; PPC64LE-NEXT: .LBB551_3: 9439; PPC64LE-NEXT: lwsync 9440; PPC64LE-NEXT: blr 9441 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") acquire 9442 ret i32 %ret 9443} 9444 9445define i32 @test552(i32* %ptr, i32 %val) { 9446; PPC64LE-LABEL: test552: 9447; PPC64LE: # %bb.0: 9448; PPC64LE-NEXT: lwsync 9449; PPC64LE-NEXT: .LBB552_1: 9450; PPC64LE-NEXT: lwarx 5, 0, 3 9451; PPC64LE-NEXT: cmplw 4, 5 9452; PPC64LE-NEXT: bge 0, .LBB552_3 9453; PPC64LE-NEXT: # %bb.2: 9454; PPC64LE-NEXT: stwcx. 4, 0, 3 9455; PPC64LE-NEXT: bne 0, .LBB552_1 9456; PPC64LE-NEXT: .LBB552_3: 9457; PPC64LE-NEXT: mr 3, 5 9458; PPC64LE-NEXT: blr 9459 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") release 9460 ret i32 %ret 9461} 9462 9463define i32 @test553(i32* %ptr, i32 %val) { 9464; PPC64LE-LABEL: test553: 9465; PPC64LE: # %bb.0: 9466; PPC64LE-NEXT: lwsync 9467; PPC64LE-NEXT: .LBB553_1: 9468; PPC64LE-NEXT: lwarx 5, 0, 3 9469; PPC64LE-NEXT: cmplw 4, 5 9470; PPC64LE-NEXT: bge 0, .LBB553_3 9471; PPC64LE-NEXT: # %bb.2: 9472; PPC64LE-NEXT: stwcx. 4, 0, 3 9473; PPC64LE-NEXT: bne 0, .LBB553_1 9474; PPC64LE-NEXT: .LBB553_3: 9475; PPC64LE-NEXT: mr 3, 5 9476; PPC64LE-NEXT: lwsync 9477; PPC64LE-NEXT: blr 9478 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") acq_rel 9479 ret i32 %ret 9480} 9481 9482define i32 @test554(i32* %ptr, i32 %val) { 9483; PPC64LE-LABEL: test554: 9484; PPC64LE: # %bb.0: 9485; PPC64LE-NEXT: sync 9486; PPC64LE-NEXT: .LBB554_1: 9487; PPC64LE-NEXT: lwarx 5, 0, 3 9488; PPC64LE-NEXT: cmplw 4, 5 9489; PPC64LE-NEXT: bge 0, .LBB554_3 9490; PPC64LE-NEXT: # %bb.2: 9491; PPC64LE-NEXT: stwcx. 4, 0, 3 9492; PPC64LE-NEXT: bne 0, .LBB554_1 9493; PPC64LE-NEXT: .LBB554_3: 9494; PPC64LE-NEXT: mr 3, 5 9495; PPC64LE-NEXT: lwsync 9496; PPC64LE-NEXT: blr 9497 %ret = atomicrmw umin i32* %ptr, i32 %val syncscope("singlethread") seq_cst 9498 ret i32 %ret 9499} 9500 9501define i64 @test555(i64* %ptr, i64 %val) { 9502; PPC64LE-LABEL: test555: 9503; PPC64LE: # %bb.0: 9504; PPC64LE-NEXT: .LBB555_1: 9505; PPC64LE-NEXT: ldarx 5, 0, 3 9506; PPC64LE-NEXT: cmpld 4, 5 9507; PPC64LE-NEXT: bge 0, .LBB555_3 9508; PPC64LE-NEXT: # %bb.2: 9509; PPC64LE-NEXT: stdcx. 4, 0, 3 9510; PPC64LE-NEXT: bne 0, .LBB555_1 9511; PPC64LE-NEXT: .LBB555_3: 9512; PPC64LE-NEXT: mr 3, 5 9513; PPC64LE-NEXT: blr 9514 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") monotonic 9515 ret i64 %ret 9516} 9517 9518define i64 @test556(i64* %ptr, i64 %val) { 9519; PPC64LE-LABEL: test556: 9520; PPC64LE: # %bb.0: 9521; PPC64LE-NEXT: mr 5, 3 9522; PPC64LE-NEXT: .LBB556_1: 9523; PPC64LE-NEXT: ldarx 3, 0, 5 9524; PPC64LE-NEXT: cmpld 4, 3 9525; PPC64LE-NEXT: bge 0, .LBB556_3 9526; PPC64LE-NEXT: # %bb.2: 9527; PPC64LE-NEXT: stdcx. 4, 0, 5 9528; PPC64LE-NEXT: bne 0, .LBB556_1 9529; PPC64LE-NEXT: .LBB556_3: 9530; PPC64LE-NEXT: lwsync 9531; PPC64LE-NEXT: blr 9532 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") acquire 9533 ret i64 %ret 9534} 9535 9536define i64 @test557(i64* %ptr, i64 %val) { 9537; PPC64LE-LABEL: test557: 9538; PPC64LE: # %bb.0: 9539; PPC64LE-NEXT: lwsync 9540; PPC64LE-NEXT: .LBB557_1: 9541; PPC64LE-NEXT: ldarx 5, 0, 3 9542; PPC64LE-NEXT: cmpld 4, 5 9543; PPC64LE-NEXT: bge 0, .LBB557_3 9544; PPC64LE-NEXT: # %bb.2: 9545; PPC64LE-NEXT: stdcx. 4, 0, 3 9546; PPC64LE-NEXT: bne 0, .LBB557_1 9547; PPC64LE-NEXT: .LBB557_3: 9548; PPC64LE-NEXT: mr 3, 5 9549; PPC64LE-NEXT: blr 9550 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") release 9551 ret i64 %ret 9552} 9553 9554define i64 @test558(i64* %ptr, i64 %val) { 9555; PPC64LE-LABEL: test558: 9556; PPC64LE: # %bb.0: 9557; PPC64LE-NEXT: lwsync 9558; PPC64LE-NEXT: .LBB558_1: 9559; PPC64LE-NEXT: ldarx 5, 0, 3 9560; PPC64LE-NEXT: cmpld 4, 5 9561; PPC64LE-NEXT: bge 0, .LBB558_3 9562; PPC64LE-NEXT: # %bb.2: 9563; PPC64LE-NEXT: stdcx. 4, 0, 3 9564; PPC64LE-NEXT: bne 0, .LBB558_1 9565; PPC64LE-NEXT: .LBB558_3: 9566; PPC64LE-NEXT: mr 3, 5 9567; PPC64LE-NEXT: lwsync 9568; PPC64LE-NEXT: blr 9569 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") acq_rel 9570 ret i64 %ret 9571} 9572 9573define i64 @test559(i64* %ptr, i64 %val) { 9574; PPC64LE-LABEL: test559: 9575; PPC64LE: # %bb.0: 9576; PPC64LE-NEXT: sync 9577; PPC64LE-NEXT: .LBB559_1: 9578; PPC64LE-NEXT: ldarx 5, 0, 3 9579; PPC64LE-NEXT: cmpld 4, 5 9580; PPC64LE-NEXT: bge 0, .LBB559_3 9581; PPC64LE-NEXT: # %bb.2: 9582; PPC64LE-NEXT: stdcx. 4, 0, 3 9583; PPC64LE-NEXT: bne 0, .LBB559_1 9584; PPC64LE-NEXT: .LBB559_3: 9585; PPC64LE-NEXT: mr 3, 5 9586; PPC64LE-NEXT: lwsync 9587; PPC64LE-NEXT: blr 9588 %ret = atomicrmw umin i64* %ptr, i64 %val syncscope("singlethread") seq_cst 9589 ret i64 %ret 9590} 9591 9592; The second load should never be scheduled before isync. 9593define i32 @test_ordering0(i32* %ptr1, i32* %ptr2) { 9594; PPC64LE-LABEL: test_ordering0: 9595; PPC64LE: # %bb.0: 9596; PPC64LE-NEXT: lwz 4, 0(3) 9597; PPC64LE-NEXT: cmpd 7, 4, 4 9598; PPC64LE-NEXT: bne- 7, .+4 9599; PPC64LE-NEXT: isync 9600; PPC64LE-NEXT: lwz 3, 0(3) 9601; PPC64LE-NEXT: add 3, 4, 3 9602; PPC64LE-NEXT: blr 9603 %val1 = load atomic i32, i32* %ptr1 acquire, align 4 9604 %val2 = load i32, i32* %ptr1 9605 %add = add i32 %val1, %val2 9606 ret i32 %add 9607} 9608 9609; The second store should never be scheduled before isync. 9610define i32 @test_ordering1(i32* %ptr1, i32 %val1, i32* %ptr2) { 9611; PPC64LE-LABEL: test_ordering1: 9612; PPC64LE: # %bb.0: 9613; PPC64LE-NEXT: lwz 3, 0(3) 9614; PPC64LE-NEXT: cmpd 7, 3, 3 9615; PPC64LE-NEXT: bne- 7, .+4 9616; PPC64LE-NEXT: isync 9617; PPC64LE-NEXT: stw 4, 0(5) 9618; PPC64LE-NEXT: blr 9619 %val2 = load atomic i32, i32* %ptr1 acquire, align 4 9620 store i32 %val1, i32* %ptr2 9621 ret i32 %val2 9622} 9623