1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instcombine -S | FileCheck %s 3 4; Remove an icmp by using its operand in the subsequent logic directly. 5 6define i8 @zext_or_icmp_icmp(i8 %a, i8 %b) { 7; CHECK-LABEL: @zext_or_icmp_icmp( 8; CHECK-NEXT: [[MASK:%.*]] = and i8 [[A:%.*]], 1 9; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i8 [[B:%.*]], 0 10; CHECK-NEXT: [[TOBOOL22:%.*]] = zext i1 [[TOBOOL2]] to i8 11; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[MASK]], 1 12; CHECK-NEXT: [[ZEXT3:%.*]] = or i8 [[TMP1]], [[TOBOOL22]] 13; CHECK-NEXT: ret i8 [[ZEXT3]] 14; 15 %mask = and i8 %a, 1 16 %toBool1 = icmp eq i8 %mask, 0 17 %toBool2 = icmp eq i8 %b, 0 18 %bothCond = or i1 %toBool1, %toBool2 19 %zext = zext i1 %bothCond to i8 20 ret i8 %zext 21} 22 23define i8 @zext_or_icmp_icmp_logical(i8 %a, i8 %b) { 24; CHECK-LABEL: @zext_or_icmp_icmp_logical( 25; CHECK-NEXT: [[MASK:%.*]] = and i8 [[A:%.*]], 1 26; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i8 [[B:%.*]], 0 27; CHECK-NEXT: [[TOBOOL22:%.*]] = zext i1 [[TOBOOL2]] to i8 28; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[MASK]], 1 29; CHECK-NEXT: [[ZEXT3:%.*]] = or i8 [[TMP1]], [[TOBOOL22]] 30; CHECK-NEXT: ret i8 [[ZEXT3]] 31; 32 %mask = and i8 %a, 1 33 %toBool1 = icmp eq i8 %mask, 0 34 %toBool2 = icmp eq i8 %b, 0 35 %bothCond = select i1 %toBool1, i1 true, i1 %toBool2 36 %zext = zext i1 %bothCond to i8 37 ret i8 %zext 38} 39 40; Here, widening the or from i1 to i32 and removing one of the icmps would 41; widen an undef value (created by the out-of-range shift), increasing the 42; range of valid values for the return, so we can't do it. 43 44define i32 @dont_widen_undef() { 45; CHECK-LABEL: @dont_widen_undef( 46; CHECK-NEXT: entry: 47; CHECK-NEXT: br label [[BLOCK2:%.*]] 48; CHECK: block1: 49; CHECK-NEXT: br label [[BLOCK2]] 50; CHECK: block2: 51; CHECK-NEXT: [[CMP_I:%.*]] = phi i1 [ false, [[BLOCK1:%.*]] ], [ true, [[ENTRY:%.*]] ] 52; CHECK-NEXT: [[M_011:%.*]] = phi i32 [ 0, [[BLOCK1]] ], [ 33, [[ENTRY]] ] 53; CHECK-NEXT: [[M_1_OP:%.*]] = lshr i32 1, [[M_011]] 54; CHECK-NEXT: [[SEXT_MASK:%.*]] = and i32 [[M_1_OP]], 65535 55; CHECK-NEXT: [[CMP115:%.*]] = icmp ne i32 [[SEXT_MASK]], 0 56; CHECK-NEXT: [[CMP1:%.*]] = or i1 [[CMP_I]], [[CMP115]] 57; CHECK-NEXT: [[CONV2:%.*]] = zext i1 [[CMP1]] to i32 58; CHECK-NEXT: ret i32 [[CONV2]] 59; 60entry: 61 br label %block2 62 63block1: 64 br label %block2 65 66block2: 67 %m.011 = phi i32 [ 33, %entry ], [ 0, %block1 ] 68 %cmp.i = icmp ugt i32 %m.011, 1 69 %m.1.op = lshr i32 1, %m.011 70 %sext.mask = and i32 %m.1.op, 65535 71 %cmp115 = icmp ne i32 %sext.mask, 0 72 %cmp1 = or i1 %cmp.i, %cmp115 73 %conv2 = zext i1 %cmp1 to i32 74 ret i32 %conv2 75} 76 77define i32 @dont_widen_undef_logical() { 78; CHECK-LABEL: @dont_widen_undef_logical( 79; CHECK-NEXT: entry: 80; CHECK-NEXT: br label [[BLOCK2:%.*]] 81; CHECK: block1: 82; CHECK-NEXT: br label [[BLOCK2]] 83; CHECK: block2: 84; CHECK-NEXT: [[CMP_I:%.*]] = phi i1 [ false, [[BLOCK1:%.*]] ], [ true, [[ENTRY:%.*]] ] 85; CHECK-NEXT: [[M_011:%.*]] = phi i32 [ 0, [[BLOCK1]] ], [ 33, [[ENTRY]] ] 86; CHECK-NEXT: [[M_1_OP:%.*]] = lshr i32 1, [[M_011]] 87; CHECK-NEXT: [[SEXT_MASK:%.*]] = and i32 [[M_1_OP]], 65535 88; CHECK-NEXT: [[CMP115:%.*]] = icmp ne i32 [[SEXT_MASK]], 0 89; CHECK-NEXT: [[CMP1:%.*]] = or i1 [[CMP_I]], [[CMP115]] 90; CHECK-NEXT: [[CONV2:%.*]] = zext i1 [[CMP1]] to i32 91; CHECK-NEXT: ret i32 [[CONV2]] 92; 93entry: 94 br label %block2 95 96block1: 97 br label %block2 98 99block2: 100 %m.011 = phi i32 [ 33, %entry ], [ 0, %block1 ] 101 %cmp.i = icmp ugt i32 %m.011, 1 102 %m.1.op = lshr i32 1, %m.011 103 %sext.mask = and i32 %m.1.op, 65535 104 %cmp115 = icmp ne i32 %sext.mask, 0 105 %cmp1 = select i1 %cmp.i, i1 true, i1 %cmp115 106 %conv2 = zext i1 %cmp1 to i32 107 ret i32 %conv2 108} 109 110; This should not end with more instructions than it started from. 111 112define i32 @PR49475(i32 %x, i16 %y) { 113; CHECK-LABEL: @PR49475( 114; CHECK-NEXT: [[M:%.*]] = and i16 [[Y:%.*]], 1 115; CHECK-NEXT: [[B1:%.*]] = icmp eq i32 [[X:%.*]], 0 116; CHECK-NEXT: [[B2:%.*]] = icmp eq i16 [[M]], 0 117; CHECK-NEXT: [[T1:%.*]] = or i1 [[B1]], [[B2]] 118; CHECK-NEXT: [[Z:%.*]] = zext i1 [[T1]] to i32 119; CHECK-NEXT: ret i32 [[Z]] 120; 121 %m = and i16 %y, 1 122 %b1 = icmp eq i32 %x, 0 123 %b2 = icmp eq i16 %m, 0 124 %t1 = or i1 %b1, %b2 125 %z = zext i1 %t1 to i32 126 ret i32 %z 127} 128 129; This would infinite-loop. 130 131define i8 @PR49475_infloop(i32 %t0, i16 %insert, i64 %e, i8 %i162) { 132; CHECK-LABEL: @PR49475_infloop( 133; CHECK-NEXT: [[B:%.*]] = icmp eq i32 [[T0:%.*]], 0 134; CHECK-NEXT: [[B2:%.*]] = icmp eq i16 [[INSERT:%.*]], 0 135; CHECK-NEXT: [[T1:%.*]] = or i1 [[B]], [[B2]] 136; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[T1]] to i32 137; CHECK-NEXT: [[AND:%.*]] = and i32 [[EXT]], [[T0]] 138; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[AND]], 140 139; CHECK-NEXT: [[XOR1:%.*]] = zext i32 [[TMP1]] to i64 140; CHECK-NEXT: [[CONV16:%.*]] = sext i8 [[I162:%.*]] to i64 141; CHECK-NEXT: [[SUB17:%.*]] = sub i64 [[CONV16]], [[E:%.*]] 142; CHECK-NEXT: [[SEXT:%.*]] = shl i64 [[SUB17]], 32 143; CHECK-NEXT: [[CONV18:%.*]] = ashr exact i64 [[SEXT]], 32 144; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[CONV18]], [[XOR1]] 145; CHECK-NEXT: [[CONV19:%.*]] = zext i1 [[CMP]] to i16 146; CHECK-NEXT: [[OR21:%.*]] = or i16 [[CONV19]], [[INSERT]] 147; CHECK-NEXT: [[TRUNC44:%.*]] = trunc i16 [[OR21]] to i8 148; CHECK-NEXT: [[INC:%.*]] = or i8 [[TRUNC44]], [[I162]] 149; CHECK-NEXT: [[TOBOOL23_NOT:%.*]] = icmp eq i16 [[OR21]], 0 150; CHECK-NEXT: call void @llvm.assume(i1 [[TOBOOL23_NOT]]) 151; CHECK-NEXT: ret i8 [[INC]] 152; 153 %b = icmp eq i32 %t0, 0 154 %b2 = icmp eq i16 %insert, 0 155 %t1 = or i1 %b, %b2 156 %ext = zext i1 %t1 to i32 157 %and = and i32 %t0, %ext 158 %conv13 = zext i32 %and to i64 159 %xor = xor i64 %conv13, 140 160 %conv16 = sext i8 %i162 to i64 161 %sub17 = sub i64 %conv16, %e 162 %sext = shl i64 %sub17, 32 163 %conv18 = ashr exact i64 %sext, 32 164 %cmp = icmp sge i64 %xor, %conv18 165 %conv19 = zext i1 %cmp to i16 166 %or21 = or i16 %insert, %conv19 167 %trunc44 = trunc i16 %or21 to i8 168 %inc = add i8 %i162, %trunc44 169 %tobool23.not = icmp eq i16 %or21, 0 170 call void @llvm.assume(i1 %tobool23.not) 171 ret i8 %inc 172} 173 174declare void @llvm.assume(i1 noundef) 175