1# RUN: llc -run-pass ppc-mi-peepholes -ppc-convert-rr-to-ri %s -o - -verify-machineinstrs | FileCheck %s 2# RUN: llc -start-after ppc-mi-peepholes -ppc-late-peephole %s -o - -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-LATE 3 4--- | 5 ; ModuleID = 'convert-rr-to-ri-instrs.ll' 6 source_filename = "convert-rr-to-ri-instrs.c" 7 target datalayout = "e-m:e-i64:64-n32:64" 8 target triple = "powerpc64le-unknown-linux-gnu" 9 10 ; Function Attrs: norecurse nounwind readnone 11 define signext i32 @testADD4(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 12 entry: 13 %add = add nsw i32 %a, 33 14 %add1 = add nsw i32 %add, %b 15 ret i32 %add1 16 } 17 18 ; Function Attrs: norecurse nounwind readnone 19 define i64 @testADD8(i64 %a, i64 %b) local_unnamed_addr #0 { 20 entry: 21 %add = add nsw i64 %a, 33 22 %add1 = add nsw i64 %add, %b 23 ret i64 %add1 24 } 25 26 ; Function Attrs: norecurse nounwind readnone 27 define i128 @testADDC(i128 %a, i128 %b) local_unnamed_addr #0 { 28 entry: 29 %add = add nsw i128 %b, %a 30 ret i128 %add 31 } 32 33 ; Function Attrs: norecurse nounwind readnone 34 define i128 @testADDC8(i128 %a, i128 %b) local_unnamed_addr #0 { 35 entry: 36 %add = add nsw i128 %b, %a 37 ret i128 %add 38 } 39 40 ; Function Attrs: norecurse nounwind readnone 41 define i64 @testADDC_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 42 entry: 43 %add = add nsw i64 %b, %a 44 %cmp = icmp eq i64 %add, 0 45 %neg = sext i1 %cmp to i64 46 %retval.0 = xor i64 %add, %neg 47 ret i64 %retval.0 48 } 49 50 ; Function Attrs: norecurse nounwind readnone 51 define signext i32 @testADDI(i32 signext %a) local_unnamed_addr #0 { 52 entry: 53 %add = add nsw i32 %a, 44 54 ret i32 %add 55 } 56 57 ; Function Attrs: norecurse nounwind readnone 58 define signext i32 @testADDI8(i32 signext %a) local_unnamed_addr #0 { 59 entry: 60 %add = add nsw i32 %a, 44 61 ret i32 %add 62 } 63 64 ; Function Attrs: norecurse nounwind readnone 65 define signext i32 @testAND_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 66 entry: 67 %and = and i64 %b, %a 68 %tobool = icmp eq i64 %and, 0 69 %cond = select i1 %tobool, i64 %b, i64 %a 70 %conv = trunc i64 %cond to i32 71 ret i32 %conv 72 } 73 74 ; Function Attrs: norecurse nounwind readnone 75 define i64 @testAND8_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 76 entry: 77 %and = and i64 %b, %a 78 %tobool = icmp eq i64 %and, 0 79 %cond = select i1 %tobool, i64 %b, i64 %a 80 ret i64 %cond 81 } 82 83 ; Function Attrs: norecurse nounwind readnone 84 define i64 @testCMPD(i64 %a, i64 %b) local_unnamed_addr #0 { 85 entry: 86 %cmp = icmp sgt i64 %a, %b 87 %add = select i1 %cmp, i64 0, i64 %a 88 %cond = add nsw i64 %add, %b 89 ret i64 %cond 90 } 91 92 ; Function Attrs: norecurse nounwind readnone 93 define i64 @testCMPDI(i64 %a, i64 %b) local_unnamed_addr #0 { 94 entry: 95 %cmp = icmp sgt i64 %a, 87 96 %add = select i1 %cmp, i64 0, i64 %a 97 %cond = add nsw i64 %add, %b 98 ret i64 %cond 99 } 100 101 ; Function Attrs: norecurse nounwind readnone 102 define i64 @testCMPDI_F(i64 %a, i64 %b) local_unnamed_addr #0 { 103 entry: 104 %cmp = icmp sgt i64 %a, 87 105 %add = select i1 %cmp, i64 0, i64 %a 106 %cond = add nsw i64 %add, %b 107 ret i64 %cond 108 } 109 110 ; Function Attrs: norecurse nounwind readnone 111 define i64 @testCMPLD(i64 %a, i64 %b) local_unnamed_addr #0 { 112 entry: 113 %cmp = icmp ugt i64 %a, %b 114 %add = select i1 %cmp, i64 0, i64 %a 115 %cond = add i64 %add, %b 116 ret i64 %cond 117 } 118 119 ; Function Attrs: norecurse nounwind readnone 120 define i64 @testCMPLDI(i64 %a, i64 %b) local_unnamed_addr #0 { 121 entry: 122 %cmp = icmp ugt i64 %a, 87 123 %add = select i1 %cmp, i64 0, i64 %a 124 %cond = add i64 %add, %b 125 ret i64 %cond 126 } 127 128 ; Function Attrs: norecurse nounwind readnone 129 define signext i32 @testCMPW(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 130 entry: 131 %cmp = icmp sgt i32 %a, %b 132 %add = select i1 %cmp, i32 0, i32 %a 133 %cond = add nsw i32 %add, %b 134 ret i32 %cond 135 } 136 137 ; Function Attrs: norecurse nounwind readnone 138 define signext i32 @testCMPWI(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 139 entry: 140 %cmp = icmp sgt i32 %a, 87 141 %add = select i1 %cmp, i32 0, i32 %a 142 %cond = add nsw i32 %add, %b 143 ret i32 %cond 144 } 145 146 ; Function Attrs: norecurse nounwind readnone 147 define zeroext i32 @testCMPLW(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 148 entry: 149 %cmp = icmp ugt i32 %a, %b 150 %add = select i1 %cmp, i32 0, i32 %a 151 %cond = add i32 %add, %b 152 ret i32 %cond 153 } 154 155 ; Function Attrs: norecurse nounwind readnone 156 define zeroext i32 @testCMPLWI(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 157 entry: 158 %cmp = icmp ugt i32 %a, 87 159 %add = select i1 %cmp, i32 0, i32 %a 160 %cond = add i32 %add, %b 161 ret i32 %cond 162 } 163 164 ; Function Attrs: norecurse nounwind readonly 165 define zeroext i8 @testLBZUX(i8* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 166 entry: 167 %add = add i32 %idx, 1 168 %idxprom = zext i32 %add to i64 169 %arrayidx = getelementptr inbounds i8, i8* %ptr, i64 %idxprom 170 %0 = load i8, i8* %arrayidx, align 1, !tbaa !3 171 %conv = zext i8 %0 to i32 172 %add1 = add i32 %idx, 2 173 %idxprom2 = zext i32 %add1 to i64 174 %arrayidx3 = getelementptr inbounds i8, i8* %ptr, i64 %idxprom2 175 %1 = load i8, i8* %arrayidx3, align 1, !tbaa !3 176 %conv4 = zext i8 %1 to i32 177 %add5 = add nuw nsw i32 %conv4, %conv 178 %conv6 = trunc i32 %add5 to i8 179 ret i8 %conv6 180 } 181 182 ; Function Attrs: norecurse nounwind readonly 183 define zeroext i8 @testLBZX(i8* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 184 entry: 185 %add = add i32 %idx, 1 186 %idxprom = zext i32 %add to i64 187 %arrayidx = getelementptr inbounds i8, i8* %ptr, i64 %idxprom 188 %0 = load i8, i8* %arrayidx, align 1, !tbaa !3 189 %conv = zext i8 %0 to i32 190 %add1 = add i32 %idx, 2 191 %idxprom2 = zext i32 %add1 to i64 192 %arrayidx3 = getelementptr inbounds i8, i8* %ptr, i64 %idxprom2 193 %1 = load i8, i8* %arrayidx3, align 1, !tbaa !3 194 %conv4 = zext i8 %1 to i32 195 %add5 = add nuw nsw i32 %conv4, %conv 196 %conv6 = trunc i32 %add5 to i8 197 ret i8 %conv6 198 } 199 200 ; Function Attrs: norecurse nounwind readonly 201 define zeroext i16 @testLHZUX(i16* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 202 entry: 203 %add = add i32 %idx, 1 204 %idxprom = zext i32 %add to i64 205 %arrayidx = getelementptr inbounds i16, i16* %ptr, i64 %idxprom 206 %0 = load i16, i16* %arrayidx, align 2, !tbaa !6 207 %conv = zext i16 %0 to i32 208 %add1 = add i32 %idx, 2 209 %idxprom2 = zext i32 %add1 to i64 210 %arrayidx3 = getelementptr inbounds i16, i16* %ptr, i64 %idxprom2 211 %1 = load i16, i16* %arrayidx3, align 2, !tbaa !6 212 %conv4 = zext i16 %1 to i32 213 %add5 = add nuw nsw i32 %conv4, %conv 214 %conv6 = trunc i32 %add5 to i16 215 ret i16 %conv6 216 } 217 218 ; Function Attrs: norecurse nounwind readonly 219 define zeroext i16 @testLHZX(i16* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 220 entry: 221 %add = add i32 %idx, 1 222 %idxprom = zext i32 %add to i64 223 %arrayidx = getelementptr inbounds i16, i16* %ptr, i64 %idxprom 224 %0 = load i16, i16* %arrayidx, align 2, !tbaa !6 225 %conv = zext i16 %0 to i32 226 %add1 = add i32 %idx, 2 227 %idxprom2 = zext i32 %add1 to i64 228 %arrayidx3 = getelementptr inbounds i16, i16* %ptr, i64 %idxprom2 229 %1 = load i16, i16* %arrayidx3, align 2, !tbaa !6 230 %conv4 = zext i16 %1 to i32 231 %add5 = add nuw nsw i32 %conv4, %conv 232 %conv6 = trunc i32 %add5 to i16 233 ret i16 %conv6 234 } 235 236 ; Function Attrs: norecurse nounwind readonly 237 define signext i16 @testLHAUX(i16* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 238 entry: 239 %add = add i32 %idx, 1 240 %idxprom = zext i32 %add to i64 241 %arrayidx = getelementptr inbounds i16, i16* %ptr, i64 %idxprom 242 %0 = load i16, i16* %arrayidx, align 2, !tbaa !6 243 %conv9 = zext i16 %0 to i32 244 %add1 = add i32 %idx, 2 245 %idxprom2 = zext i32 %add1 to i64 246 %arrayidx3 = getelementptr inbounds i16, i16* %ptr, i64 %idxprom2 247 %1 = load i16, i16* %arrayidx3, align 2, !tbaa !6 248 %conv410 = zext i16 %1 to i32 249 %add5 = add nuw nsw i32 %conv410, %conv9 250 %conv6 = trunc i32 %add5 to i16 251 ret i16 %conv6 252 } 253 254 ; Function Attrs: norecurse nounwind readonly 255 define signext i16 @testLHAX(i16* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 256 entry: 257 %add = add i32 %idx, 1 258 %idxprom = zext i32 %add to i64 259 %arrayidx = getelementptr inbounds i16, i16* %ptr, i64 %idxprom 260 %0 = load i16, i16* %arrayidx, align 2, !tbaa !6 261 %conv9 = zext i16 %0 to i32 262 %add1 = add i32 %idx, 2 263 %idxprom2 = zext i32 %add1 to i64 264 %arrayidx3 = getelementptr inbounds i16, i16* %ptr, i64 %idxprom2 265 %1 = load i16, i16* %arrayidx3, align 2, !tbaa !6 266 %conv410 = zext i16 %1 to i32 267 %add5 = add nuw nsw i32 %conv410, %conv9 268 %conv6 = trunc i32 %add5 to i16 269 ret i16 %conv6 270 } 271 272 ; Function Attrs: norecurse nounwind readonly 273 define zeroext i32 @testLWZUX(i32* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 274 entry: 275 %add = add i32 %idx, 1 276 %idxprom = zext i32 %add to i64 277 %arrayidx = getelementptr inbounds i32, i32* %ptr, i64 %idxprom 278 %0 = load i32, i32* %arrayidx, align 4, !tbaa !8 279 %add1 = add i32 %idx, 2 280 %idxprom2 = zext i32 %add1 to i64 281 %arrayidx3 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom2 282 %1 = load i32, i32* %arrayidx3, align 4, !tbaa !8 283 %add4 = add i32 %1, %0 284 ret i32 %add4 285 } 286 287 ; Function Attrs: norecurse nounwind readonly 288 define zeroext i32 @testLWZX(i32* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 289 entry: 290 %add = add i32 %idx, 1 291 %idxprom = zext i32 %add to i64 292 %arrayidx = getelementptr inbounds i32, i32* %ptr, i64 %idxprom 293 %0 = load i32, i32* %arrayidx, align 4, !tbaa !8 294 %add1 = add i32 %idx, 2 295 %idxprom2 = zext i32 %add1 to i64 296 %arrayidx3 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom2 297 %1 = load i32, i32* %arrayidx3, align 4, !tbaa !8 298 %add4 = add i32 %1, %0 299 ret i32 %add4 300 } 301 302 ; Function Attrs: norecurse nounwind readonly 303 define i64 @testLWAX(i32* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 304 entry: 305 %add = add i32 %idx, 1 306 %idxprom = zext i32 %add to i64 307 %arrayidx = getelementptr inbounds i32, i32* %ptr, i64 %idxprom 308 %0 = load i32, i32* %arrayidx, align 4, !tbaa !8 309 %conv = sext i32 %0 to i64 310 %add1 = add i32 %idx, 2 311 %idxprom2 = zext i32 %add1 to i64 312 %arrayidx3 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom2 313 %1 = load i32, i32* %arrayidx3, align 4, !tbaa !8 314 %conv4 = sext i32 %1 to i64 315 %add5 = add nsw i64 %conv4, %conv 316 ret i64 %add5 317 } 318 319 ; Function Attrs: norecurse nounwind readonly 320 define i64 @testLDUX(i64* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 321 entry: 322 %add = add i32 %idx, 1 323 %idxprom = zext i32 %add to i64 324 %arrayidx = getelementptr inbounds i64, i64* %ptr, i64 %idxprom 325 %0 = load i64, i64* %arrayidx, align 8, !tbaa !10 326 %add1 = add i32 %idx, 2 327 %idxprom2 = zext i32 %add1 to i64 328 %arrayidx3 = getelementptr inbounds i64, i64* %ptr, i64 %idxprom2 329 %1 = load i64, i64* %arrayidx3, align 8, !tbaa !10 330 %add4 = add i64 %1, %0 331 ret i64 %add4 332 } 333 334 ; Function Attrs: norecurse nounwind readonly 335 define i64 @testLDX(i64* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 336 entry: 337 %add = add i32 %idx, 1 338 %idxprom = zext i32 %add to i64 339 %arrayidx = getelementptr inbounds i64, i64* %ptr, i64 %idxprom 340 %0 = load i64, i64* %arrayidx, align 8, !tbaa !10 341 %add1 = add i32 %idx, 2 342 %idxprom2 = zext i32 %add1 to i64 343 %arrayidx3 = getelementptr inbounds i64, i64* %ptr, i64 %idxprom2 344 %1 = load i64, i64* %arrayidx3, align 8, !tbaa !10 345 %add4 = add i64 %1, %0 346 ret i64 %add4 347 } 348 349 ; Function Attrs: norecurse nounwind readonly 350 define double @testLFDUX(double* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #2 { 351 entry: 352 %add = add i32 %idx, 1 353 %idxprom = zext i32 %add to i64 354 %arrayidx = getelementptr inbounds double, double* %ptr, i64 %idxprom 355 %0 = load double, double* %arrayidx, align 8, !tbaa !12 356 %add1 = add i32 %idx, 2 357 %idxprom2 = zext i32 %add1 to i64 358 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 %idxprom2 359 %1 = load double, double* %arrayidx3, align 8, !tbaa !12 360 %add4 = fadd double %0, %1 361 ret double %add4 362 } 363 364 ; Function Attrs: norecurse nounwind readonly 365 define double @testLFDX(double* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #2 { 366 entry: 367 %add = add i32 %idx, 1 368 %idxprom = zext i32 %add to i64 369 %arrayidx = getelementptr inbounds double, double* %ptr, i64 %idxprom 370 %0 = load double, double* %arrayidx, align 8, !tbaa !12 371 %add1 = add i32 %idx, 2 372 %idxprom2 = zext i32 %add1 to i64 373 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 %idxprom2 374 %1 = load double, double* %arrayidx3, align 8, !tbaa !12 375 %add4 = fadd double %0, %1 376 ret double %add4 377 } 378 379 ; Function Attrs: norecurse nounwind readonly 380 define <4 x float> @testLFSUX(float* nocapture readonly %ptr, i32 signext %idx) local_unnamed_addr #2 { 381 entry: 382 %idxprom = sext i32 %idx to i64 383 %arrayidx = getelementptr inbounds float, float* %ptr, i64 %idxprom 384 %0 = load float, float* %arrayidx, align 4, !tbaa !14 385 %conv = fptoui float %0 to i32 386 %vecinit = insertelement <4 x i32> undef, i32 %conv, i32 0 387 %1 = bitcast float* %ptr to i8* 388 %2 = shl i64 %idxprom, 2 389 %uglygep = getelementptr i8, i8* %1, i64 %2 390 %uglygep2 = getelementptr i8, i8* %uglygep, i64 4 391 %3 = bitcast i8* %uglygep2 to float* 392 %4 = load float, float* %3, align 4, !tbaa !14 393 %conv3 = fptoui float %4 to i32 394 %vecinit4 = insertelement <4 x i32> %vecinit, i32 %conv3, i32 1 395 %uglygep5 = getelementptr i8, i8* %uglygep, i64 8 396 %5 = bitcast i8* %uglygep5 to float* 397 %6 = load float, float* %5, align 4, !tbaa !14 398 %conv8 = fptoui float %6 to i32 399 %vecinit9 = insertelement <4 x i32> %vecinit4, i32 %conv8, i32 2 400 %uglygep8 = getelementptr i8, i8* %uglygep, i64 12 401 %7 = bitcast i8* %uglygep8 to float* 402 %8 = load float, float* %7, align 4, !tbaa !14 403 %conv13 = fptoui float %8 to i32 404 %vecinit14 = insertelement <4 x i32> %vecinit9, i32 %conv13, i32 3 405 %9 = bitcast <4 x i32> %vecinit14 to <4 x float> 406 ret <4 x float> %9 407 } 408 409 ; Function Attrs: norecurse nounwind readonly 410 define float @testLFSX(float* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #2 { 411 entry: 412 %add = add i32 %idx, 1 413 %idxprom = zext i32 %add to i64 414 %arrayidx = getelementptr inbounds float, float* %ptr, i64 %idxprom 415 %0 = load float, float* %arrayidx, align 4, !tbaa !14 416 %add1 = add i32 %idx, 2 417 %idxprom2 = zext i32 %add1 to i64 418 %arrayidx3 = getelementptr inbounds float, float* %ptr, i64 %idxprom2 419 %1 = load float, float* %arrayidx3, align 4, !tbaa !14 420 %add4 = fadd float %0, %1 421 ret float %add4 422 } 423 424 ; Function Attrs: norecurse nounwind readonly 425 define double @testLXSDX(double* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 426 entry: 427 %add = add i32 %idx, 1 428 %idxprom = zext i32 %add to i64 429 %arrayidx = getelementptr inbounds double, double* %ptr, i64 %idxprom 430 %0 = load double, double* %arrayidx, align 8, !tbaa !12 431 %add1 = add i32 %idx, 2 432 %idxprom2 = zext i32 %add1 to i64 433 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 %idxprom2 434 %1 = load double, double* %arrayidx3, align 8, !tbaa !12 435 %add4 = fadd double %0, %1 436 ret double %add4 437 } 438 439 ; Function Attrs: norecurse nounwind readonly 440 define float @testLXSSPX(float* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 441 entry: 442 %add = add i32 %idx, 1 443 %idxprom = zext i32 %add to i64 444 %arrayidx = getelementptr inbounds float, float* %ptr, i64 %idxprom 445 %0 = load float, float* %arrayidx, align 4, !tbaa !14 446 %add1 = add i32 %idx, 2 447 %idxprom2 = zext i32 %add1 to i64 448 %arrayidx3 = getelementptr inbounds float, float* %ptr, i64 %idxprom2 449 %1 = load float, float* %arrayidx3, align 4, !tbaa !14 450 %add4 = fadd float %0, %1 451 ret float %add4 452 } 453 454 ; Function Attrs: norecurse nounwind readonly 455 define <4 x i32> @testLXVX(<4 x i32>* nocapture readonly %ptr, i32 zeroext %idx) local_unnamed_addr #1 { 456 entry: 457 %add = add i32 %idx, 1 458 %idxprom = zext i32 %add to i64 459 %arrayidx = getelementptr inbounds <4 x i32>, <4 x i32>* %ptr, i64 %idxprom 460 %0 = load <4 x i32>, <4 x i32>* %arrayidx, align 16, !tbaa !3 461 %add1 = add i32 %idx, 2 462 %idxprom2 = zext i32 %add1 to i64 463 %arrayidx3 = getelementptr inbounds <4 x i32>, <4 x i32>* %ptr, i64 %idxprom2 464 %1 = load <4 x i32>, <4 x i32>* %arrayidx3, align 16, !tbaa !3 465 %add4 = add <4 x i32> %1, %0 466 ret <4 x i32> %add4 467 } 468 469 ; Function Attrs: norecurse nounwind readnone 470 define signext i32 @testOR(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 471 entry: 472 %or = or i32 %b, %a 473 ret i32 %or 474 } 475 476 ; Function Attrs: norecurse nounwind readnone 477 define i64 @testOR8(i64 %a, i64 %b) local_unnamed_addr #0 { 478 entry: 479 %or = or i64 %b, %a 480 ret i64 %or 481 } 482 483 ; Function Attrs: norecurse nounwind readnone 484 define signext i32 @testORI(i32 signext %a) local_unnamed_addr #0 { 485 entry: 486 %or = or i32 %a, 88 487 ret i32 %or 488 } 489 490 ; Function Attrs: norecurse nounwind readnone 491 define i64 @testORI8(i64 %a) local_unnamed_addr #0 { 492 entry: 493 %or = or i64 %a, 99 494 ret i64 %or 495 } 496 497 ; Function Attrs: norecurse nounwind readnone 498 define i64 @testRLDCL(i64 %a, i64 %b) local_unnamed_addr #0 { 499 entry: 500 %and = and i64 %b, 63 501 %shl = shl i64 %a, %and 502 %sub = sub nsw i64 64, %and 503 %shr = lshr i64 %a, %sub 504 %or = or i64 %shr, %shl 505 ret i64 %or 506 } 507 508 ; Function Attrs: norecurse nounwind readnone 509 define i64 @testRLDCL_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 510 entry: 511 %and = and i64 %b, 63 512 %shl = shl i64 %a, %and 513 %sub = sub nsw i64 64, %and 514 %shr = lshr i64 %a, %sub 515 %or = or i64 %shr, %shl 516 %tobool = icmp eq i64 %or, 0 517 %cond = select i1 %tobool, i64 %and, i64 %a 518 ret i64 %cond 519 } 520 521 ; Function Attrs: norecurse nounwind readnone 522 define i64 @testRLDCR(i64 %a, i64 %b) local_unnamed_addr #0 { 523 entry: 524 %and = and i64 %b, 63 525 %shl = shl i64 %a, %and 526 %sub = sub nsw i64 64, %and 527 %shr = lshr i64 %a, %sub 528 %or = or i64 %shr, %shl 529 ret i64 %or 530 } 531 532 ; Function Attrs: norecurse nounwind readnone 533 define i64 @testRLDCR_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 534 entry: 535 %and = and i64 %b, 63 536 %shl = shl i64 %a, %and 537 %sub = sub nsw i64 64, %and 538 %shr = lshr i64 %a, %sub 539 %or = or i64 %shr, %shl 540 %tobool = icmp eq i64 %or, 0 541 %cond = select i1 %tobool, i64 %and, i64 %a 542 ret i64 %cond 543 } 544 545 ; Function Attrs: norecurse nounwind readnone 546 define i64 @testRLDICL(i64 %a) local_unnamed_addr #0 { 547 entry: 548 %shr = lshr i64 %a, 11 549 %and = and i64 %shr, 16777215 550 ret i64 %and 551 } 552 553 ; Function Attrs: norecurse nounwind readnone 554 define i64 @testRLDICL_MB0(i64 %a) local_unnamed_addr #0 { 555 entry: 556 %shr = lshr i64 %a, 11 557 %and = and i64 %shr, 16777215 558 ret i64 %and 559 } 560 561 ; Function Attrs: norecurse nounwind readnone 562 define i64 @testRLDICL_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 563 entry: 564 %shr = lshr i64 %a, 11 565 %and = and i64 %shr, 16777215 566 %tobool = icmp eq i64 %and, 0 567 %cond = select i1 %tobool, i64 %b, i64 %and 568 ret i64 %cond 569 } 570 571 ; Function Attrs: norecurse nounwind readnone 572 define i64 @testRLDICL_rec2(i64 %a, i64 %b) local_unnamed_addr #0 { 573 entry: 574 %shr = lshr i64 %a, 11 575 %and = and i64 %shr, 16777215 576 %tobool = icmp eq i64 %and, 0 577 %cond = select i1 %tobool, i64 %b, i64 %and 578 ret i64 %cond 579 } 580 581 ; Function Attrs: norecurse nounwind readnone 582 define i64 @testRLDICL_rec3(i64 %a, i64 %b) local_unnamed_addr #0 { 583 entry: 584 %shr = lshr i64 %a, 11 585 %and = and i64 %shr, 16777215 586 %tobool = icmp eq i64 %and, 0 587 %cond = select i1 %tobool, i64 %b, i64 %and 588 ret i64 %cond 589 } 590 591 ; Function Attrs: norecurse nounwind readnone 592 define zeroext i32 @testRLWINM(i32 zeroext %a) local_unnamed_addr #0 { 593 entry: 594 %shl = shl i32 %a, 4 595 %and = and i32 %shl, 4080 596 ret i32 %and 597 } 598 599 ; Function Attrs: norecurse nounwind readnone 600 define zeroext i32 @testRLWINMFullReg(i32 zeroext %a) local_unnamed_addr #0 { 601 entry: 602 %shl = shl i32 %a, 4 603 %and = and i32 %shl, 4080 604 ret i32 %and 605 } 606 607 ; Function Attrs: norecurse nounwind readnone 608 define zeroext i32 @testRLWINMFullRegOutOfRange(i32 zeroext %a) local_unnamed_addr #0 { 609 entry: 610 %shl = shl i32 %a, 4 611 %and = and i32 %shl, 4080 612 ret i32 %and 613 } 614 615 ; Function Attrs: norecurse nounwind readnone 616 define i64 @testRLWINM8(i64 %a) local_unnamed_addr #0 { 617 entry: 618 %shl = shl i64 %a, 4 619 %and = and i64 %shl, 4080 620 ret i64 %and 621 } 622 623 ; Function Attrs: norecurse nounwind readnone 624 define zeroext i32 @testRLWINM_rec(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 625 entry: 626 %and = and i32 %a, 255 627 %tobool = icmp eq i32 %and, 0 628 %cond = select i1 %tobool, i32 %b, i32 %a 629 ret i32 %cond 630 } 631 632 ; Function Attrs: norecurse nounwind readnone 633 define zeroext i32 @testRLWINM_rec2(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 634 entry: 635 %and = and i32 %a, 255 636 %tobool = icmp eq i32 %and, 0 637 %cond = select i1 %tobool, i32 %b, i32 %a 638 ret i32 %cond 639 } 640 641 ; Function Attrs: norecurse nounwind readnone 642 define i64 @testRLWINM8_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 643 entry: 644 %a.tr = trunc i64 %a to i32 645 %0 = shl i32 %a.tr, 4 646 %conv = and i32 %0, 4080 647 %tobool = icmp eq i32 %conv, 0 648 %conv1 = zext i32 %conv to i64 649 %cond = select i1 %tobool, i64 %b, i64 %conv1 650 ret i64 %cond 651 } 652 653 ; Function Attrs: norecurse nounwind readnone 654 define i64 @testSLD(i64 %a, i64 %b) local_unnamed_addr #0 { 655 entry: 656 %shl = shl i64 %a, %b 657 ret i64 %shl 658 } 659 660 ; Function Attrs: norecurse nounwind readnone 661 define i64 @testSLD_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 662 entry: 663 %shl = shl i64 %a, %b 664 %tobool = icmp eq i64 %shl, 0 665 %cond = select i1 %tobool, i64 %b, i64 %a 666 ret i64 %cond 667 } 668 669 ; Function Attrs: norecurse nounwind readnone 670 define i64 @testSRD(i64 %a, i64 %b) local_unnamed_addr #0 { 671 entry: 672 %shr = lshr i64 %a, %b 673 ret i64 %shr 674 } 675 676 ; Function Attrs: norecurse nounwind readnone 677 define i64 @testSRD_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 678 entry: 679 %shr = lshr i64 %a, %b 680 %tobool = icmp eq i64 %shr, 0 681 %cond = select i1 %tobool, i64 %b, i64 %a 682 ret i64 %cond 683 } 684 685 ; Function Attrs: norecurse nounwind readnone 686 define zeroext i32 @testSLW(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 687 entry: 688 %shl = shl i32 %a, %b 689 ret i32 %shl 690 } 691 692 ; Function Attrs: norecurse nounwind readnone 693 define zeroext i32 @testSLW_rec(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 694 entry: 695 %shl = shl i32 %a, %b 696 %tobool = icmp eq i32 %shl, 0 697 %cond = select i1 %tobool, i32 %b, i32 %a 698 ret i32 %cond 699 } 700 701 ; Function Attrs: norecurse nounwind readnone 702 define zeroext i32 @testSRW(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 703 entry: 704 %shr = lshr i32 %a, %b 705 ret i32 %shr 706 } 707 708 ; Function Attrs: norecurse nounwind readnone 709 define zeroext i32 @testSRW_rec(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { 710 entry: 711 %shr = lshr i32 %a, %b 712 %tobool = icmp eq i32 %shr, 0 713 %cond = select i1 %tobool, i32 %b, i32 %a 714 ret i32 %cond 715 } 716 717 ; Function Attrs: norecurse nounwind readnone 718 define signext i32 @testSRAW(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 719 entry: 720 %shr = ashr i32 %a, %b 721 ret i32 %shr 722 } 723 724 ; Function Attrs: norecurse nounwind readnone 725 define signext i32 @testSRAW_rec(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 726 entry: 727 %shr = ashr i32 %a, %b 728 %tobool = icmp eq i32 %shr, 0 729 %cond = select i1 %tobool, i32 %b, i32 %shr 730 ret i32 %cond 731 } 732 733 ; Function Attrs: norecurse nounwind readnone 734 define i64 @testSRAD(i64 %a, i64 %b) local_unnamed_addr #0 { 735 entry: 736 %shr = ashr i64 %a, %b 737 ret i64 %shr 738 } 739 740 ; Function Attrs: norecurse nounwind readnone 741 define i64 @testSRAD_rec(i64 %a, i64 %b) local_unnamed_addr #0 { 742 entry: 743 %shr = ashr i64 %a, %b 744 %tobool = icmp eq i64 %shr, 0 745 %cond = select i1 %tobool, i64 %b, i64 %shr 746 ret i64 %cond 747 } 748 749 ; Function Attrs: norecurse nounwind 750 define void @testSTBUX(i8* nocapture %ptr, i8 zeroext %a, i32 zeroext %idx) local_unnamed_addr #3 { 751 entry: 752 %add = add i32 %idx, 1 753 %idxprom = zext i32 %add to i64 754 %arrayidx = getelementptr inbounds i8, i8* %ptr, i64 %idxprom 755 store i8 %a, i8* %arrayidx, align 1, !tbaa !3 756 %add1 = add i32 %idx, 2 757 %idxprom2 = zext i32 %add1 to i64 758 %arrayidx3 = getelementptr inbounds i8, i8* %ptr, i64 %idxprom2 759 store i8 %a, i8* %arrayidx3, align 1, !tbaa !3 760 ret void 761 } 762 763 ; Function Attrs: norecurse nounwind 764 define void @testSTBX(i8* nocapture %ptr, i8 zeroext %a, i32 zeroext %idx) local_unnamed_addr #3 { 765 entry: 766 %add = add i32 %idx, 1 767 %idxprom = zext i32 %add to i64 768 %arrayidx = getelementptr inbounds i8, i8* %ptr, i64 %idxprom 769 store i8 %a, i8* %arrayidx, align 1, !tbaa !3 770 %add1 = add i32 %idx, 2 771 %idxprom2 = zext i32 %add1 to i64 772 %arrayidx3 = getelementptr inbounds i8, i8* %ptr, i64 %idxprom2 773 store i8 %a, i8* %arrayidx3, align 1, !tbaa !3 774 ret void 775 } 776 777 ; Function Attrs: norecurse nounwind 778 define void @testSTHUX(i16* nocapture %ptr, i16 zeroext %a, i32 zeroext %idx) local_unnamed_addr #3 { 779 entry: 780 %add = add i32 %idx, 1 781 %idxprom = zext i32 %add to i64 782 %arrayidx = getelementptr inbounds i16, i16* %ptr, i64 %idxprom 783 store i16 %a, i16* %arrayidx, align 2, !tbaa !6 784 %add1 = add i32 %idx, 2 785 %idxprom2 = zext i32 %add1 to i64 786 %arrayidx3 = getelementptr inbounds i16, i16* %ptr, i64 %idxprom2 787 store i16 %a, i16* %arrayidx3, align 2, !tbaa !6 788 ret void 789 } 790 791 ; Function Attrs: norecurse nounwind 792 define void @testSTHX(i16* nocapture %ptr, i16 zeroext %a, i32 zeroext %idx) local_unnamed_addr #3 { 793 entry: 794 %add = add i32 %idx, 1 795 %idxprom = zext i32 %add to i64 796 %arrayidx = getelementptr inbounds i16, i16* %ptr, i64 %idxprom 797 store i16 %a, i16* %arrayidx, align 1, !tbaa !3 798 %add1 = add i32 %idx, 2 799 %idxprom2 = zext i32 %add1 to i64 800 %arrayidx3 = getelementptr inbounds i16, i16* %ptr, i64 %idxprom2 801 store i16 %a, i16* %arrayidx3, align 1, !tbaa !3 802 ret void 803 } 804 805 ; Function Attrs: norecurse nounwind 806 define void @testSTWUX(i32* nocapture %ptr, i32 zeroext %a, i32 zeroext %idx) local_unnamed_addr #3 { 807 entry: 808 %add = add i32 %idx, 1 809 %idxprom = zext i32 %add to i64 810 %arrayidx = getelementptr inbounds i32, i32* %ptr, i64 %idxprom 811 store i32 %a, i32* %arrayidx, align 4, !tbaa !8 812 %add1 = add i32 %idx, 2 813 %idxprom2 = zext i32 %add1 to i64 814 %arrayidx3 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom2 815 store i32 %a, i32* %arrayidx3, align 4, !tbaa !8 816 ret void 817 } 818 819 ; Function Attrs: norecurse nounwind 820 define void @testSTWX(i32* nocapture %ptr, i32 zeroext %a, i32 zeroext %idx) local_unnamed_addr #3 { 821 entry: 822 %add = add i32 %idx, 1 823 %idxprom = zext i32 %add to i64 824 %arrayidx = getelementptr inbounds i32, i32* %ptr, i64 %idxprom 825 store i32 %a, i32* %arrayidx, align 4, !tbaa !8 826 %add1 = add i32 %idx, 2 827 %idxprom2 = zext i32 %add1 to i64 828 %arrayidx3 = getelementptr inbounds i32, i32* %ptr, i64 %idxprom2 829 store i32 %a, i32* %arrayidx3, align 4, !tbaa !8 830 ret void 831 } 832 833 ; Function Attrs: norecurse nounwind 834 define void @testSTDUX(i64* nocapture %ptr, i64 %a, i32 zeroext %idx) local_unnamed_addr #3 { 835 entry: 836 %add = add i32 %idx, 1 837 %idxprom = zext i32 %add to i64 838 %arrayidx = getelementptr inbounds i64, i64* %ptr, i64 %idxprom 839 store i64 %a, i64* %arrayidx, align 8, !tbaa !10 840 %add1 = add i32 %idx, 2 841 %idxprom2 = zext i32 %add1 to i64 842 %arrayidx3 = getelementptr inbounds i64, i64* %ptr, i64 %idxprom2 843 store i64 %a, i64* %arrayidx3, align 8, !tbaa !10 844 ret void 845 } 846 847 ; Function Attrs: norecurse nounwind 848 define void @testSTDX(i64* nocapture %ptr, i64 %a, i32 zeroext %idx) local_unnamed_addr #3 { 849 entry: 850 %add = add i32 %idx, 1 851 %idxprom = zext i32 %add to i64 852 %arrayidx = getelementptr inbounds i64, i64* %ptr, i64 %idxprom 853 store i64 %a, i64* %arrayidx, align 8, !tbaa !10 854 %add1 = add i32 %idx, 2 855 %idxprom2 = zext i32 %add1 to i64 856 %arrayidx3 = getelementptr inbounds i64, i64* %ptr, i64 %idxprom2 857 store i64 %a, i64* %arrayidx3, align 8, !tbaa !10 858 ret void 859 } 860 861 ; Function Attrs: norecurse nounwind readonly 862 define void @testSTFSX(float* nocapture %ptr, float %a, i32 zeroext %idx) local_unnamed_addr #2 { 863 entry: 864 %add = add i32 %idx, 1 865 %idxprom = zext i32 %add to i64 866 %arrayidx = getelementptr inbounds float, float* %ptr, i64 %idxprom 867 store float %a, float* %arrayidx, align 4, !tbaa !14 868 %add1 = add i32 %idx, 2 869 %idxprom2 = zext i32 %add1 to i64 870 %arrayidx3 = getelementptr inbounds float, float* %ptr, i64 %idxprom2 871 store float %a, float* %arrayidx3, align 4, !tbaa !14 872 ret void 873 } 874 875 ; Function Attrs: norecurse nounwind readonly 876 define void @testSTFSUX(float* nocapture %ptr, float %a, i32 zeroext %idx) local_unnamed_addr #2 { 877 entry: 878 %add = add i32 %idx, 1 879 %idxprom = zext i32 %add to i64 880 %arrayidx = getelementptr inbounds float, float* %ptr, i64 %idxprom 881 store float %a, float* %arrayidx, align 4, !tbaa !14 882 %add1 = add i32 %idx, 2 883 %idxprom2 = zext i32 %add1 to i64 884 %arrayidx3 = getelementptr inbounds float, float* %ptr, i64 %idxprom2 885 store float %a, float* %arrayidx3, align 4, !tbaa !14 886 ret void 887 } 888 889 ; Function Attrs: norecurse nounwind readonly 890 define void @testSTFDX(double* nocapture %ptr, double %a, i32 zeroext %idx) local_unnamed_addr #2 { 891 entry: 892 %add = add i32 %idx, 1 893 %idxprom = zext i32 %add to i64 894 %arrayidx = getelementptr inbounds double, double* %ptr, i64 %idxprom 895 store double %a, double* %arrayidx, align 8, !tbaa !12 896 %add1 = add i32 %idx, 2 897 %idxprom2 = zext i32 %add1 to i64 898 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 %idxprom2 899 store double %a, double* %arrayidx3, align 8, !tbaa !12 900 ret void 901 } 902 903 ; Function Attrs: norecurse nounwind readonly 904 define void @testSTFDUX(double* nocapture %ptr, double %a, i32 zeroext %idx) local_unnamed_addr #2 { 905 entry: 906 %add = add i32 %idx, 1 907 %idxprom = zext i32 %add to i64 908 %arrayidx = getelementptr inbounds double, double* %ptr, i64 %idxprom 909 store double %a, double* %arrayidx, align 8, !tbaa !12 910 %add1 = add i32 %idx, 2 911 %idxprom2 = zext i32 %add1 to i64 912 %arrayidx3 = getelementptr inbounds double, double* %ptr, i64 %idxprom2 913 store double %a, double* %arrayidx3, align 8, !tbaa !12 914 ret void 915 } 916 917 ; Function Attrs: norecurse nounwind 918 define void @testSTXSSPX(float* nocapture %ptr, float %a, i32 zeroext %idx) local_unnamed_addr #3 { 919 entry: 920 %idxprom = zext i32 %idx to i64 921 %arrayidx = getelementptr inbounds float, float* %ptr, i64 %idxprom 922 store float %a, float* %arrayidx, align 4, !tbaa !14 923 ret void 924 } 925 926 ; Function Attrs: norecurse nounwind 927 define void @testSTXSDX(double* nocapture %ptr, double %a, i32 zeroext %idx) local_unnamed_addr #3 { 928 entry: 929 %idxprom = zext i32 %idx to i64 930 %arrayidx = getelementptr inbounds double, double* %ptr, i64 %idxprom 931 store double %a, double* %arrayidx, align 8, !tbaa !12 932 ret void 933 } 934 935 ; Function Attrs: norecurse nounwind 936 define void @testSTXVX(<4 x i32>* nocapture %ptr, <4 x i32> %a, i32 zeroext %idx) local_unnamed_addr #3 { 937 entry: 938 %idxprom = zext i32 %idx to i64 939 %arrayidx = getelementptr inbounds <4 x i32>, <4 x i32>* %ptr, i64 %idxprom 940 store <4 x i32> %a, <4 x i32>* %arrayidx, align 16, !tbaa !3 941 ret void 942 } 943 944 ; Function Attrs: norecurse nounwind readnone 945 define i128 @testSUBFC(i128 %a, i128 %b) local_unnamed_addr #0 { 946 entry: 947 %sub = sub nsw i128 %a, %b 948 ret i128 %sub 949 } 950 951 ; Function Attrs: norecurse nounwind readnone 952 define i128 @testSUBFC8(i128 %a, i128 %b) local_unnamed_addr #0 { 953 entry: 954 %sub = sub nsw i128 %a, %b 955 ret i128 %sub 956 } 957 958 ; Function Attrs: norecurse nounwind readnone 959 define signext i32 @testXOR(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { 960 entry: 961 %xor = xor i32 %b, %a 962 ret i32 %xor 963 } 964 965 ; Function Attrs: norecurse nounwind readnone 966 define i64 @testXOR8(i64 %a, i64 %b) local_unnamed_addr #0 { 967 entry: 968 %xor = xor i64 %b, %a 969 ret i64 %xor 970 } 971 972 ; Function Attrs: norecurse nounwind readnone 973 define signext i32 @testXORI(i32 signext %a) local_unnamed_addr #0 { 974 entry: 975 %xor = xor i32 %a, 17 976 ret i32 %xor 977 } 978 979 ; Function Attrs: norecurse nounwind readnone 980 define i64 @testXOR8I(i64 %a) local_unnamed_addr #0 { 981 entry: 982 %xor = xor i64 %a, 17 983 ret i64 %xor 984 } 985 986 attributes #0 = { norecurse nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pwr9" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,+vsx" "unsafe-fp-math"="false" "use-soft-float"="false" } 987 attributes #1 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pwr9" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,+vsx" "unsafe-fp-math"="false" "use-soft-float"="false" } 988 attributes #2 = { norecurse nounwind readonly "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pwr9" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,-vsx" "unsafe-fp-math"="false" "use-soft-float"="false" } 989 attributes #3 = { norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pwr9" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+power9-vector,+vsx" "unsafe-fp-math"="false" "use-soft-float"="false" } 990 991 !llvm.module.flags = !{!0, !1} 992 !llvm.ident = !{!2} 993 994 !0 = !{i32 1, !"wchar_size", i32 4} 995 !1 = !{i32 7, !"PIC Level", i32 2} 996 !2 = !{!"clang version 6.0.0 (trunk 316067)"} 997 !3 = !{!4, !4, i64 0} 998 !4 = !{!"omnipotent char", !5, i64 0} 999 !5 = !{!"Simple C/C++ TBAA"} 1000 !6 = !{!7, !7, i64 0} 1001 !7 = !{!"short", !4, i64 0} 1002 !8 = !{!9, !9, i64 0} 1003 !9 = !{!"int", !4, i64 0} 1004 !10 = !{!11, !11, i64 0} 1005 !11 = !{!"long long", !4, i64 0} 1006 !12 = !{!13, !13, i64 0} 1007 !13 = !{!"double", !4, i64 0} 1008 !14 = !{!15, !15, i64 0} 1009 !15 = !{!"float", !4, i64 0} 1010 1011... 1012--- 1013name: testADD4 1014# CHECK-ALL: name: testADD4 1015alignment: 16 1016exposesReturnsTwice: false 1017legalized: false 1018regBankSelected: false 1019selected: false 1020tracksRegLiveness: true 1021registers: 1022 - { id: 0, class: g8rc, preferred-register: '' } 1023 - { id: 1, class: g8rc, preferred-register: '' } 1024 - { id: 2, class: gprc, preferred-register: '' } 1025 - { id: 3, class: gprc, preferred-register: '' } 1026 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 1027 - { id: 5, class: gprc, preferred-register: '' } 1028 - { id: 6, class: g8rc, preferred-register: '' } 1029liveins: 1030 - { reg: '$x3', virtual-reg: '%0' } 1031 - { reg: '$x4', virtual-reg: '%1' } 1032frameInfo: 1033 isFrameAddressTaken: false 1034 isReturnAddressTaken: false 1035 hasStackMap: false 1036 hasPatchPoint: false 1037 stackSize: 0 1038 offsetAdjustment: 0 1039 maxAlignment: 0 1040 adjustsStack: false 1041 hasCalls: false 1042 stackProtector: '' 1043 maxCallFrameSize: 4294967295 1044 hasOpaqueSPAdjustment: false 1045 hasVAStart: false 1046 hasMustTailInVarArgFunc: false 1047 savePoint: '' 1048 restorePoint: '' 1049fixedStack: 1050stack: 1051constants: 1052body: | 1053 bb.0.entry: 1054 liveins: $x3, $x4 1055 1056 %1 = COPY $x4 1057 %0 = COPY $x3 1058 %2 = LI 33 1059 %3 = COPY %0.sub_32 1060 %4 = ADD4 killed %3, %2 1061 %5 = ADD4 killed %2, killed %4 1062 ; CHECK: ADDI killed %3, 33 1063 ; CHECK: ADDI killed %4, 33 1064 ; CHECK-LATE: addi 3, 3, 33 1065 ; CHECK-LATE: addi 3, 3, 33 1066 %6 = EXTSW_32_64 killed %5 1067 $x3 = COPY %6 1068 BLR8 implicit $lr8, implicit $rm, implicit $x3 1069 1070... 1071--- 1072name: testADD8 1073# CHECK-ALL: name: testADD8 1074alignment: 16 1075exposesReturnsTwice: false 1076legalized: false 1077regBankSelected: false 1078selected: false 1079tracksRegLiveness: true 1080registers: 1081 - { id: 0, class: g8rc, preferred-register: '' } 1082 - { id: 1, class: g8rc, preferred-register: '' } 1083 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1084 - { id: 3, class: g8rc, preferred-register: '' } 1085liveins: 1086 - { reg: '$x3', virtual-reg: '%0' } 1087 - { reg: '$x4', virtual-reg: '%1' } 1088frameInfo: 1089 isFrameAddressTaken: false 1090 isReturnAddressTaken: false 1091 hasStackMap: false 1092 hasPatchPoint: false 1093 stackSize: 0 1094 offsetAdjustment: 0 1095 maxAlignment: 0 1096 adjustsStack: false 1097 hasCalls: false 1098 stackProtector: '' 1099 maxCallFrameSize: 4294967295 1100 hasOpaqueSPAdjustment: false 1101 hasVAStart: false 1102 hasMustTailInVarArgFunc: false 1103 savePoint: '' 1104 restorePoint: '' 1105fixedStack: 1106stack: 1107constants: 1108body: | 1109 bb.0.entry: 1110 liveins: $x3, $x4 1111 1112 %1 = LI8 33 1113 %0 = COPY $x3 1114 %2 = ADD8 %0, %1 1115 %3 = ADD8 killed %1, killed %2 1116 ; CHECK: ADDI8 %0, 33 1117 ; CHECK: ADDI8 killed %2, 33 1118 ; CHECK-LATE: addi 3, 3, 33 1119 ; CHECK-LATE: addi 3, 3, 33 1120 $x3 = COPY %3 1121 BLR8 implicit $lr8, implicit $rm, implicit $x3 1122 1123... 1124--- 1125name: testADDC 1126# CHECK-ALL: name: testADDC 1127alignment: 16 1128exposesReturnsTwice: false 1129legalized: false 1130regBankSelected: false 1131selected: false 1132tracksRegLiveness: true 1133registers: 1134 - { id: 0, class: g8rc, preferred-register: '' } 1135 - { id: 1, class: g8rc, preferred-register: '' } 1136 - { id: 2, class: g8rc, preferred-register: '' } 1137 - { id: 3, class: g8rc, preferred-register: '' } 1138 - { id: 4, class: gprc, preferred-register: '' } 1139 - { id: 5, class: gprc, preferred-register: '' } 1140 - { id: 6, class: gprc, preferred-register: '' } 1141 - { id: 7, class: g8rc, preferred-register: '' } 1142 - { id: 8, class: g8rc, preferred-register: '' } 1143liveins: 1144 - { reg: '$x3', virtual-reg: '%0' } 1145 - { reg: '$x4', virtual-reg: '%1' } 1146 - { reg: '$x5', virtual-reg: '%2' } 1147 - { reg: '$x6', virtual-reg: '%3' } 1148frameInfo: 1149 isFrameAddressTaken: false 1150 isReturnAddressTaken: false 1151 hasStackMap: false 1152 hasPatchPoint: false 1153 stackSize: 0 1154 offsetAdjustment: 0 1155 maxAlignment: 0 1156 adjustsStack: false 1157 hasCalls: false 1158 stackProtector: '' 1159 maxCallFrameSize: 4294967295 1160 hasOpaqueSPAdjustment: false 1161 hasVAStart: false 1162 hasMustTailInVarArgFunc: false 1163 savePoint: '' 1164 restorePoint: '' 1165fixedStack: 1166stack: 1167constants: 1168body: | 1169 bb.0.entry: 1170 liveins: $x3, $x4, $x5, $x6 1171 1172 %3 = COPY $x6 1173 %2 = COPY $x5 1174 %1 = COPY $x4 1175 %0 = COPY $x3 1176 %4 = COPY %0.sub_32 1177 %5 = LI 55 1178 %6 = ADDC %5, %4, implicit-def $carry 1179 ; CHECK: ADDIC %4, 55, implicit-def $carry 1180 ; CHECK-LATE: addic 3, 3, 55 1181 %7 = ADDE8 %3, %1, implicit-def dead $carry, implicit $carry 1182 %8 = EXTSW_32_64 %6 1183 $x3 = COPY %8 1184 $x4 = COPY %7 1185 BLR8 implicit $lr8, implicit $rm, implicit $x3, implicit $x4 1186 1187... 1188--- 1189name: testADDC8 1190# CHECK-ALL: name: testADDC8 1191alignment: 16 1192exposesReturnsTwice: false 1193legalized: false 1194regBankSelected: false 1195selected: false 1196tracksRegLiveness: true 1197registers: 1198 - { id: 0, class: g8rc, preferred-register: '' } 1199 - { id: 1, class: g8rc, preferred-register: '' } 1200 - { id: 2, class: g8rc, preferred-register: '' } 1201 - { id: 3, class: g8rc, preferred-register: '' } 1202 - { id: 4, class: g8rc, preferred-register: '' } 1203 - { id: 5, class: g8rc, preferred-register: '' } 1204liveins: 1205 - { reg: '$x3', virtual-reg: '%0' } 1206 - { reg: '$x4', virtual-reg: '%1' } 1207 - { reg: '$x5', virtual-reg: '%2' } 1208 - { reg: '$x6', virtual-reg: '%3' } 1209frameInfo: 1210 isFrameAddressTaken: false 1211 isReturnAddressTaken: false 1212 hasStackMap: false 1213 hasPatchPoint: false 1214 stackSize: 0 1215 offsetAdjustment: 0 1216 maxAlignment: 0 1217 adjustsStack: false 1218 hasCalls: false 1219 stackProtector: '' 1220 maxCallFrameSize: 4294967295 1221 hasOpaqueSPAdjustment: false 1222 hasVAStart: false 1223 hasMustTailInVarArgFunc: false 1224 savePoint: '' 1225 restorePoint: '' 1226fixedStack: 1227stack: 1228constants: 1229body: | 1230 bb.0.entry: 1231 liveins: $x3, $x4, $x5, $x6 1232 1233 %3 = COPY $x6 1234 %2 = COPY $x5 1235 %1 = COPY $x4 1236 %0 = LI8 777 1237 %4 = ADDC8 %2, %0, implicit-def $carry 1238 ; CHECK: ADDIC8 %2, 777, implicit-def $carry 1239 ; CHECK-LATE: addic 3, 5, 777 1240 %5 = ADDE8 %3, %1, implicit-def dead $carry, implicit $carry 1241 $x3 = COPY %4 1242 $x4 = COPY %5 1243 BLR8 implicit $lr8, implicit $rm, implicit $x3, implicit $x4 1244 1245... 1246--- 1247name: testADDC_rec 1248# CHECK-ALL: name: testADDC_rec 1249alignment: 16 1250exposesReturnsTwice: false 1251legalized: false 1252regBankSelected: false 1253selected: false 1254tracksRegLiveness: true 1255registers: 1256 - { id: 0, class: g8rc, preferred-register: '' } 1257 - { id: 1, class: gprc, preferred-register: '' } 1258 - { id: 2, class: gprc, preferred-register: '' } 1259 - { id: 3, class: gprc, preferred-register: '' } 1260 - { id: 4, class: crrc, preferred-register: '' } 1261 - { id: 5, class: crbitrc, preferred-register: '' } 1262 - { id: 6, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1263 - { id: 7, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1264 - { id: 8, class: g8rc, preferred-register: '' } 1265liveins: 1266 - { reg: '$x3', virtual-reg: '%0' } 1267 - { reg: '$x4', virtual-reg: '%1' } 1268frameInfo: 1269 isFrameAddressTaken: false 1270 isReturnAddressTaken: false 1271 hasStackMap: false 1272 hasPatchPoint: false 1273 stackSize: 0 1274 offsetAdjustment: 0 1275 maxAlignment: 0 1276 adjustsStack: false 1277 hasCalls: false 1278 stackProtector: '' 1279 maxCallFrameSize: 4294967295 1280 hasOpaqueSPAdjustment: false 1281 hasVAStart: false 1282 hasMustTailInVarArgFunc: false 1283 savePoint: '' 1284 restorePoint: '' 1285fixedStack: 1286stack: 1287constants: 1288body: | 1289 bb.0.entry: 1290 liveins: $x3, $x4 1291 1292 %1 = LI 433 1293 %0 = COPY $x3 1294 %2 = COPY %0.sub_32 1295 %3 = ADDC_rec %1, %2, implicit-def $cr0, implicit-def $carry 1296 ; CHECK: ADDIC_rec %2, 433, implicit-def $cr0, implicit-def $carry 1297 ; CHECK-LATE: addic. 3, 3, 433 1298 %4 = COPY killed $cr0 1299 %5 = COPY %4.sub_eq 1300 %6 = LI8 0 1301 %7 = LI8 -1 1302 %8 = ISEL8 %7, %6, %5 1303 $x3 = COPY %8 1304 BLR8 implicit $lr8, implicit $rm, implicit $x3 1305 1306... 1307--- 1308name: testADDI 1309# CHECK-ALL: name: testADDI 1310alignment: 16 1311exposesReturnsTwice: false 1312legalized: false 1313regBankSelected: false 1314selected: false 1315tracksRegLiveness: true 1316registers: 1317 - { id: 0, class: g8rc, preferred-register: '' } 1318 - { id: 1, class: gprc_and_gprc_nor0, preferred-register: '' } 1319 - { id: 2, class: gprc, preferred-register: '' } 1320 - { id: 3, class: g8rc, preferred-register: '' } 1321liveins: 1322 - { reg: '$x3', virtual-reg: '%0' } 1323frameInfo: 1324 isFrameAddressTaken: false 1325 isReturnAddressTaken: false 1326 hasStackMap: false 1327 hasPatchPoint: false 1328 stackSize: 0 1329 offsetAdjustment: 0 1330 maxAlignment: 0 1331 adjustsStack: false 1332 hasCalls: false 1333 stackProtector: '' 1334 maxCallFrameSize: 4294967295 1335 hasOpaqueSPAdjustment: false 1336 hasVAStart: false 1337 hasMustTailInVarArgFunc: false 1338 savePoint: '' 1339 restorePoint: '' 1340fixedStack: 1341stack: 1342constants: 1343body: | 1344 bb.0.entry: 1345 liveins: $x3 1346 1347 %0 = COPY $x3 1348 %1 = LI 77 1349 %2 = ADDI killed %1, 44 1350 %3 = EXTSW_32_64 killed %2 1351 ; CHECK: LI 121 1352 ; CHECK-LATE: li 3, 121 1353 $x3 = COPY %3 1354 BLR8 implicit $lr8, implicit $rm, implicit $x3 1355 1356... 1357--- 1358name: testADDI8 1359# CHECK-ALL: name: testADDI8 1360alignment: 16 1361exposesReturnsTwice: false 1362legalized: false 1363regBankSelected: false 1364selected: false 1365tracksRegLiveness: true 1366registers: 1367 - { id: 0, class: g8rc, preferred-register: '' } 1368 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1369 - { id: 2, class: g8rc, preferred-register: '' } 1370 - { id: 3, class: g8rc, preferred-register: '' } 1371liveins: 1372 - { reg: '$x3', virtual-reg: '%0' } 1373frameInfo: 1374 isFrameAddressTaken: false 1375 isReturnAddressTaken: false 1376 hasStackMap: false 1377 hasPatchPoint: false 1378 stackSize: 0 1379 offsetAdjustment: 0 1380 maxAlignment: 0 1381 adjustsStack: false 1382 hasCalls: false 1383 stackProtector: '' 1384 maxCallFrameSize: 4294967295 1385 hasOpaqueSPAdjustment: false 1386 hasVAStart: false 1387 hasMustTailInVarArgFunc: false 1388 savePoint: '' 1389 restorePoint: '' 1390fixedStack: 1391stack: 1392constants: 1393body: | 1394 bb.0.entry: 1395 liveins: $x3 1396 1397 %0 = COPY $x3 1398 %1 = LI8 333 1399 %2 = ADDI8 killed %1, 44 1400 ; CHECK: LI8 377 1401 ; CHECK-LATE: li 3, 377 1402 %3 = EXTSW killed %2 1403 $x3 = COPY %3 1404 BLR8 implicit $lr8, implicit $rm, implicit $x3 1405 1406... 1407--- 1408name: testAND_rec 1409# CHECK-ALL: name: testAND_rec 1410alignment: 16 1411exposesReturnsTwice: false 1412legalized: false 1413regBankSelected: false 1414selected: false 1415tracksRegLiveness: true 1416registers: 1417 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1418 - { id: 1, class: gprc, preferred-register: '' } 1419 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 1420 - { id: 3, class: gprc, preferred-register: '' } 1421 - { id: 4, class: crrc, preferred-register: '' } 1422 - { id: 5, class: gprc, preferred-register: '' } 1423 - { id: 6, class: g8rc, preferred-register: '' } 1424liveins: 1425 - { reg: '$x3', virtual-reg: '%0' } 1426 - { reg: '$x4', virtual-reg: '%1' } 1427frameInfo: 1428 isFrameAddressTaken: false 1429 isReturnAddressTaken: false 1430 hasStackMap: false 1431 hasPatchPoint: false 1432 stackSize: 0 1433 offsetAdjustment: 0 1434 maxAlignment: 0 1435 adjustsStack: false 1436 hasCalls: false 1437 stackProtector: '' 1438 maxCallFrameSize: 4294967295 1439 hasOpaqueSPAdjustment: false 1440 hasVAStart: false 1441 hasMustTailInVarArgFunc: false 1442 savePoint: '' 1443 restorePoint: '' 1444fixedStack: 1445stack: 1446constants: 1447body: | 1448 bb.0.entry: 1449 liveins: $x3, $x4 1450 1451 %1 = LI 78 1452 %0 = COPY $x3 1453 %2 = COPY %0.sub_32 1454 %3 = AND_rec %1, %2, implicit-def $cr0 1455 ; CHECK: ANDI_rec %2, 78, implicit-def $cr0 1456 ; CHECK-LATE: andi. 5, 3, 78 1457 %4 = COPY killed $cr0 1458 %5 = ISEL %2, %1, %4.sub_eq 1459 %6 = EXTSW_32_64 killed %5 1460 $x3 = COPY %6 1461 BLR8 implicit $lr8, implicit $rm, implicit $x3 1462 1463... 1464--- 1465name: testAND8_rec 1466# CHECK-ALL: name: testAND8_rec 1467alignment: 16 1468exposesReturnsTwice: false 1469legalized: false 1470regBankSelected: false 1471selected: false 1472tracksRegLiveness: true 1473registers: 1474 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1475 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1476 - { id: 2, class: g8rc, preferred-register: '' } 1477 - { id: 3, class: crrc, preferred-register: '' } 1478 - { id: 4, class: g8rc, preferred-register: '' } 1479liveins: 1480 - { reg: '$x3', virtual-reg: '%0' } 1481 - { reg: '$x4', virtual-reg: '%1' } 1482frameInfo: 1483 isFrameAddressTaken: false 1484 isReturnAddressTaken: false 1485 hasStackMap: false 1486 hasPatchPoint: false 1487 stackSize: 0 1488 offsetAdjustment: 0 1489 maxAlignment: 0 1490 adjustsStack: false 1491 hasCalls: false 1492 stackProtector: '' 1493 maxCallFrameSize: 4294967295 1494 hasOpaqueSPAdjustment: false 1495 hasVAStart: false 1496 hasMustTailInVarArgFunc: false 1497 savePoint: '' 1498 restorePoint: '' 1499fixedStack: 1500stack: 1501constants: 1502body: | 1503 bb.0.entry: 1504 liveins: $x3, $x4 1505 1506 %1 = LI8 321 1507 %0 = COPY $x3 1508 %2 = AND8_rec %1, %0, implicit-def $cr0 1509 ; CHECK: ANDI8_rec %0, 321, implicit-def $cr0 1510 ; CHECK-LATE: andi. 5, 3, 321 1511 %3 = COPY killed $cr0 1512 %4 = ISEL8 %1, %0, %3.sub_eq 1513 $x3 = COPY %4 1514 BLR8 implicit $lr8, implicit $rm, implicit $x3 1515 1516... 1517--- 1518name: testCMPD 1519# CHECK-ALL: name: testCMPD 1520alignment: 16 1521exposesReturnsTwice: false 1522legalized: false 1523regBankSelected: false 1524selected: false 1525tracksRegLiveness: true 1526registers: 1527 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1528 - { id: 1, class: g8rc, preferred-register: '' } 1529 - { id: 2, class: crrc, preferred-register: '' } 1530 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1531 - { id: 4, class: g8rc, preferred-register: '' } 1532 - { id: 5, class: g8rc, preferred-register: '' } 1533liveins: 1534 - { reg: '$x3', virtual-reg: '%0' } 1535 - { reg: '$x4', virtual-reg: '%1' } 1536frameInfo: 1537 isFrameAddressTaken: false 1538 isReturnAddressTaken: false 1539 hasStackMap: false 1540 hasPatchPoint: false 1541 stackSize: 0 1542 offsetAdjustment: 0 1543 maxAlignment: 0 1544 adjustsStack: false 1545 hasCalls: false 1546 stackProtector: '' 1547 maxCallFrameSize: 4294967295 1548 hasOpaqueSPAdjustment: false 1549 hasVAStart: false 1550 hasMustTailInVarArgFunc: false 1551 savePoint: '' 1552 restorePoint: '' 1553fixedStack: 1554stack: 1555constants: 1556body: | 1557 bb.0.entry: 1558 liveins: $x3, $x4 1559 1560 %1 = LI8 65533 1561 %0 = COPY $x3 1562 %2 = CMPD %0, %1 1563 ; CHECK: CMPDI %0, -3 1564 ; CHECK-LATE: cmpdi 3, -3 1565 %4 = ISEL8 $zero8, %0, %2.sub_gt 1566 %5 = ADD8 killed %4, %1 1567 $x3 = COPY %5 1568 BLR8 implicit $lr8, implicit $rm, implicit $x3 1569 1570... 1571--- 1572name: testCMPDI 1573# CHECK-ALL: name: testCMPDI 1574alignment: 16 1575exposesReturnsTwice: false 1576legalized: false 1577regBankSelected: false 1578selected: false 1579tracksRegLiveness: true 1580registers: 1581 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1582 - { id: 1, class: g8rc, preferred-register: '' } 1583 - { id: 2, class: crrc, preferred-register: '' } 1584 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1585 - { id: 4, class: g8rc, preferred-register: '' } 1586 - { id: 5, class: g8rc, preferred-register: '' } 1587liveins: 1588 - { reg: '$x3', virtual-reg: '%0' } 1589 - { reg: '$x4', virtual-reg: '%1' } 1590frameInfo: 1591 isFrameAddressTaken: false 1592 isReturnAddressTaken: false 1593 hasStackMap: false 1594 hasPatchPoint: false 1595 stackSize: 0 1596 offsetAdjustment: 0 1597 maxAlignment: 0 1598 adjustsStack: false 1599 hasCalls: false 1600 stackProtector: '' 1601 maxCallFrameSize: 4294967295 1602 hasOpaqueSPAdjustment: false 1603 hasVAStart: false 1604 hasMustTailInVarArgFunc: false 1605 savePoint: '' 1606 restorePoint: '' 1607fixedStack: 1608stack: 1609constants: 1610body: | 1611 bb.0.entry: 1612 liveins: $x3, $x4 1613 1614 %1 = COPY $x4 1615 %0 = LI8 89 1616 %2 = CMPDI %0, 87 1617 %4 = ISEL8 $zero8, %0, %2.sub_gt 1618 ; CHECK: ADDI8 %1, 0 1619 %5 = ADD8 killed %4, %1 1620 $x3 = COPY %5 1621 BLR8 implicit $lr8, implicit $rm, implicit $x3 1622 1623... 1624--- 1625name: testCMPDI_F 1626# CHECK-ALL: name: testCMPDI_F 1627alignment: 16 1628exposesReturnsTwice: false 1629legalized: false 1630regBankSelected: false 1631selected: false 1632tracksRegLiveness: true 1633registers: 1634 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1635 - { id: 1, class: g8rc, preferred-register: '' } 1636 - { id: 2, class: crrc, preferred-register: '' } 1637 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1638 - { id: 4, class: g8rc, preferred-register: '' } 1639 - { id: 5, class: g8rc, preferred-register: '' } 1640liveins: 1641 - { reg: '$x3', virtual-reg: '%0' } 1642 - { reg: '$x4', virtual-reg: '%1' } 1643frameInfo: 1644 isFrameAddressTaken: false 1645 isReturnAddressTaken: false 1646 hasStackMap: false 1647 hasPatchPoint: false 1648 stackSize: 0 1649 offsetAdjustment: 0 1650 maxAlignment: 0 1651 adjustsStack: false 1652 hasCalls: false 1653 stackProtector: '' 1654 maxCallFrameSize: 4294967295 1655 hasOpaqueSPAdjustment: false 1656 hasVAStart: false 1657 hasMustTailInVarArgFunc: false 1658 savePoint: '' 1659 restorePoint: '' 1660fixedStack: 1661stack: 1662constants: 1663body: | 1664 bb.0.entry: 1665 liveins: $x3, $x4 1666 1667 %1 = COPY $x4 1668 %0 = LI8 87 1669 %2 = CMPDI %0, 87 1670 %4 = ISEL8 $zero8, %0, %2.sub_gt 1671 ; CHECK: COPY %0 1672 %5 = ADD8 killed %4, %1 1673 $x3 = COPY %5 1674 BLR8 implicit $lr8, implicit $rm, implicit $x3 1675 1676... 1677--- 1678name: testCMPLD 1679# CHECK-ALL: name: testCMPLD 1680alignment: 16 1681exposesReturnsTwice: false 1682legalized: false 1683regBankSelected: false 1684selected: false 1685tracksRegLiveness: true 1686registers: 1687 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1688 - { id: 1, class: g8rc, preferred-register: '' } 1689 - { id: 2, class: crrc, preferred-register: '' } 1690 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1691 - { id: 4, class: g8rc, preferred-register: '' } 1692 - { id: 5, class: g8rc, preferred-register: '' } 1693liveins: 1694 - { reg: '$x3', virtual-reg: '%0' } 1695 - { reg: '$x4', virtual-reg: '%1' } 1696frameInfo: 1697 isFrameAddressTaken: false 1698 isReturnAddressTaken: false 1699 hasStackMap: false 1700 hasPatchPoint: false 1701 stackSize: 0 1702 offsetAdjustment: 0 1703 maxAlignment: 0 1704 adjustsStack: false 1705 hasCalls: false 1706 stackProtector: '' 1707 maxCallFrameSize: 4294967295 1708 hasOpaqueSPAdjustment: false 1709 hasVAStart: false 1710 hasMustTailInVarArgFunc: false 1711 savePoint: '' 1712 restorePoint: '' 1713fixedStack: 1714stack: 1715constants: 1716body: | 1717 bb.0.entry: 1718 liveins: $x3, $x4 1719 1720 %1 = LI8 99 1721 %0 = COPY $x3 1722 %2 = CMPLD %0, %1 1723 ; CHECK: CMPLDI %0, 99 1724 ; CHECK-LATE: cmpldi 3, 99 1725 %4 = ISEL8 $zero8, %0, %2.sub_gt 1726 %5 = ADD8 killed %4, %1 1727 $x3 = COPY %5 1728 BLR8 implicit $lr8, implicit $rm, implicit $x3 1729 1730... 1731--- 1732name: testCMPLDI 1733# CHECK-ALL: name: testCMPLDI 1734alignment: 16 1735exposesReturnsTwice: false 1736legalized: false 1737regBankSelected: false 1738selected: false 1739tracksRegLiveness: true 1740registers: 1741 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1742 - { id: 1, class: g8rc, preferred-register: '' } 1743 - { id: 2, class: crrc, preferred-register: '' } 1744 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 1745 - { id: 4, class: g8rc, preferred-register: '' } 1746 - { id: 5, class: g8rc, preferred-register: '' } 1747liveins: 1748 - { reg: '$x3', virtual-reg: '%0' } 1749 - { reg: '$x4', virtual-reg: '%1' } 1750frameInfo: 1751 isFrameAddressTaken: false 1752 isReturnAddressTaken: false 1753 hasStackMap: false 1754 hasPatchPoint: false 1755 stackSize: 0 1756 offsetAdjustment: 0 1757 maxAlignment: 0 1758 adjustsStack: false 1759 hasCalls: false 1760 stackProtector: '' 1761 maxCallFrameSize: 4294967295 1762 hasOpaqueSPAdjustment: false 1763 hasVAStart: false 1764 hasMustTailInVarArgFunc: false 1765 savePoint: '' 1766 restorePoint: '' 1767fixedStack: 1768stack: 1769constants: 1770body: | 1771 bb.0.entry: 1772 liveins: $x3, $x4 1773 1774 %1 = COPY $x4 1775 %0 = LI8 65534 1776 %2 = CMPLDI %0, 65535 1777 %4 = ISEL8 $zero8, %0, %2.sub_gt 1778 ; CHECK: COPY %0 1779 %5 = ADD8 killed %4, %1 1780 $x3 = COPY %5 1781 BLR8 implicit $lr8, implicit $rm, implicit $x3 1782 1783... 1784--- 1785name: testCMPW 1786# CHECK-ALL: name: testCMPW 1787alignment: 16 1788exposesReturnsTwice: false 1789legalized: false 1790regBankSelected: false 1791selected: false 1792tracksRegLiveness: true 1793registers: 1794 - { id: 0, class: g8rc, preferred-register: '' } 1795 - { id: 1, class: g8rc, preferred-register: '' } 1796 - { id: 2, class: gprc, preferred-register: '' } 1797 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 1798 - { id: 4, class: crrc, preferred-register: '' } 1799 - { id: 5, class: gprc_and_gprc_nor0, preferred-register: '' } 1800 - { id: 6, class: gprc, preferred-register: '' } 1801 - { id: 7, class: gprc, preferred-register: '' } 1802 - { id: 8, class: g8rc, preferred-register: '' } 1803liveins: 1804 - { reg: '$x3', virtual-reg: '%0' } 1805 - { reg: '$x4', virtual-reg: '%1' } 1806frameInfo: 1807 isFrameAddressTaken: false 1808 isReturnAddressTaken: false 1809 hasStackMap: false 1810 hasPatchPoint: false 1811 stackSize: 0 1812 offsetAdjustment: 0 1813 maxAlignment: 0 1814 adjustsStack: false 1815 hasCalls: false 1816 stackProtector: '' 1817 maxCallFrameSize: 4294967295 1818 hasOpaqueSPAdjustment: false 1819 hasVAStart: false 1820 hasMustTailInVarArgFunc: false 1821 savePoint: '' 1822 restorePoint: '' 1823fixedStack: 1824stack: 1825constants: 1826body: | 1827 bb.0.entry: 1828 liveins: $x3, $x4 1829 1830 %1 = COPY $x4 1831 %0 = COPY $x3 1832 %2 = LI -1 1833 %3 = COPY %0.sub_32 1834 %4 = CMPW %3, %2 1835 ; CHECK: CMPWI %3, -1 1836 %6 = ISEL $zero, %3, %4.sub_gt 1837 %7 = ADD4 killed %6, %2 1838 %8 = EXTSW_32_64 killed %7 1839 $x3 = COPY %8 1840 BLR8 implicit $lr8, implicit $rm, implicit $x3 1841 1842... 1843--- 1844name: testCMPWI 1845# CHECK-ALL: name: testCMPWI 1846alignment: 16 1847exposesReturnsTwice: false 1848legalized: false 1849regBankSelected: false 1850selected: false 1851tracksRegLiveness: true 1852registers: 1853 - { id: 0, class: g8rc, preferred-register: '' } 1854 - { id: 1, class: g8rc, preferred-register: '' } 1855 - { id: 2, class: gprc, preferred-register: '' } 1856 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 1857 - { id: 4, class: crrc, preferred-register: '' } 1858 - { id: 5, class: gprc_and_gprc_nor0, preferred-register: '' } 1859 - { id: 6, class: gprc, preferred-register: '' } 1860 - { id: 7, class: gprc, preferred-register: '' } 1861 - { id: 8, class: g8rc, preferred-register: '' } 1862liveins: 1863 - { reg: '$x3', virtual-reg: '%0' } 1864 - { reg: '$x4', virtual-reg: '%1' } 1865frameInfo: 1866 isFrameAddressTaken: false 1867 isReturnAddressTaken: false 1868 hasStackMap: false 1869 hasPatchPoint: false 1870 stackSize: 0 1871 offsetAdjustment: 0 1872 maxAlignment: 0 1873 adjustsStack: false 1874 hasCalls: false 1875 stackProtector: '' 1876 maxCallFrameSize: 4294967295 1877 hasOpaqueSPAdjustment: false 1878 hasVAStart: false 1879 hasMustTailInVarArgFunc: false 1880 savePoint: '' 1881 restorePoint: '' 1882fixedStack: 1883stack: 1884constants: 1885body: | 1886 bb.0.entry: 1887 liveins: $x3, $x4 1888 1889 %1 = COPY $x4 1890 %0 = COPY $x3 1891 %2 = COPY %1.sub_32 1892 %3 = LI -3 1893 %4 = CMPWI %3, 87 1894 %6 = ISEL $zero, %3, %4.sub_gt 1895 ; CHECK: COPY %3 1896 %7 = ADD4 killed %6, killed %2 1897 %8 = EXTSW_32_64 killed %7 1898 $x3 = COPY %8 1899 BLR8 implicit $lr8, implicit $rm, implicit $x3 1900 1901... 1902--- 1903name: testCMPLW 1904# CHECK-ALL: name: testCMPLW 1905alignment: 16 1906exposesReturnsTwice: false 1907legalized: false 1908regBankSelected: false 1909selected: false 1910tracksRegLiveness: true 1911registers: 1912 - { id: 0, class: g8rc, preferred-register: '' } 1913 - { id: 1, class: g8rc, preferred-register: '' } 1914 - { id: 2, class: gprc, preferred-register: '' } 1915 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 1916 - { id: 4, class: crrc, preferred-register: '' } 1917 - { id: 5, class: gprc_and_gprc_nor0, preferred-register: '' } 1918 - { id: 6, class: gprc, preferred-register: '' } 1919 - { id: 7, class: gprc, preferred-register: '' } 1920 - { id: 8, class: g8rc, preferred-register: '' } 1921 - { id: 9, class: g8rc, preferred-register: '' } 1922 - { id: 10, class: g8rc, preferred-register: '' } 1923liveins: 1924 - { reg: '$x3', virtual-reg: '%0' } 1925 - { reg: '$x4', virtual-reg: '%1' } 1926frameInfo: 1927 isFrameAddressTaken: false 1928 isReturnAddressTaken: false 1929 hasStackMap: false 1930 hasPatchPoint: false 1931 stackSize: 0 1932 offsetAdjustment: 0 1933 maxAlignment: 0 1934 adjustsStack: false 1935 hasCalls: false 1936 stackProtector: '' 1937 maxCallFrameSize: 4294967295 1938 hasOpaqueSPAdjustment: false 1939 hasVAStart: false 1940 hasMustTailInVarArgFunc: false 1941 savePoint: '' 1942 restorePoint: '' 1943fixedStack: 1944stack: 1945constants: 1946body: | 1947 bb.0.entry: 1948 liveins: $x3, $x4 1949 1950 %1 = COPY $x4 1951 %0 = COPY $x3 1952 %2 = LI 32767 1953 %3 = COPY %0.sub_32 1954 %4 = CMPLW %3, %2 1955 ; CHECK: CMPLWI %3, 32767 1956 ; CHECK-LATE: cmplwi 3, 32767 1957 %6 = ISEL $zero, %3, %4.sub_gt 1958 %7 = ADD4 killed %6, %2 1959 %9 = IMPLICIT_DEF 1960 %8 = INSERT_SUBREG %9, killed %7, 1 1961 %10 = RLDICL killed %8, 0, 32 1962 $x3 = COPY %10 1963 BLR8 implicit $lr8, implicit $rm, implicit $x3 1964 1965... 1966--- 1967name: testCMPLWI 1968# CHECK-ALL: name: testCMPLWI 1969alignment: 16 1970exposesReturnsTwice: false 1971legalized: false 1972regBankSelected: false 1973selected: false 1974tracksRegLiveness: true 1975registers: 1976 - { id: 0, class: g8rc, preferred-register: '' } 1977 - { id: 1, class: g8rc, preferred-register: '' } 1978 - { id: 2, class: gprc, preferred-register: '' } 1979 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 1980 - { id: 4, class: crrc, preferred-register: '' } 1981 - { id: 5, class: gprc_and_gprc_nor0, preferred-register: '' } 1982 - { id: 6, class: gprc, preferred-register: '' } 1983 - { id: 7, class: gprc, preferred-register: '' } 1984 - { id: 8, class: g8rc, preferred-register: '' } 1985 - { id: 9, class: g8rc, preferred-register: '' } 1986 - { id: 10, class: g8rc, preferred-register: '' } 1987liveins: 1988 - { reg: '$x3', virtual-reg: '%0' } 1989 - { reg: '$x4', virtual-reg: '%1' } 1990frameInfo: 1991 isFrameAddressTaken: false 1992 isReturnAddressTaken: false 1993 hasStackMap: false 1994 hasPatchPoint: false 1995 stackSize: 0 1996 offsetAdjustment: 0 1997 maxAlignment: 0 1998 adjustsStack: false 1999 hasCalls: false 2000 stackProtector: '' 2001 maxCallFrameSize: 4294967295 2002 hasOpaqueSPAdjustment: false 2003 hasVAStart: false 2004 hasMustTailInVarArgFunc: false 2005 savePoint: '' 2006 restorePoint: '' 2007fixedStack: 2008stack: 2009constants: 2010body: | 2011 bb.0.entry: 2012 liveins: $x3, $x4 2013 2014 %1 = COPY $x4 2015 %0 = COPY $x3 2016 %2 = COPY %1.sub_32 2017 %3 = LI -3 2018 %4 = CMPLWI %3, 87 2019 %6 = ISEL $zero, %3, %4.sub_gt 2020 ; CHECK: ADDI killed %2, 0 2021 %7 = ADD4 killed %6, killed %2 2022 %9 = IMPLICIT_DEF 2023 %8 = INSERT_SUBREG %9, killed %7, 1 2024 %10 = RLDICL killed %8, 0, 32 2025 $x3 = COPY %10 2026 BLR8 implicit $lr8, implicit $rm, implicit $x3 2027 2028... 2029--- 2030name: testLBZUX 2031# CHECK-ALL: name: testLBZUX 2032alignment: 16 2033exposesReturnsTwice: false 2034legalized: false 2035regBankSelected: false 2036selected: false 2037tracksRegLiveness: true 2038registers: 2039 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2040 - { id: 1, class: g8rc, preferred-register: '' } 2041 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2042 - { id: 3, class: gprc, preferred-register: '' } 2043 - { id: 4, class: g8rc, preferred-register: '' } 2044 - { id: 5, class: g8rc, preferred-register: '' } 2045 - { id: 6, class: g8rc, preferred-register: '' } 2046 - { id: 7, class: gprc, preferred-register: '' } 2047 - { id: 8, class: gprc, preferred-register: '' } 2048 - { id: 9, class: g8rc, preferred-register: '' } 2049 - { id: 10, class: g8rc, preferred-register: '' } 2050 - { id: 11, class: g8rc, preferred-register: '' } 2051 - { id: 12, class: gprc, preferred-register: '' } 2052 - { id: 13, class: gprc, preferred-register: '' } 2053 - { id: 14, class: g8rc, preferred-register: '' } 2054 - { id: 15, class: g8rc, preferred-register: '' } 2055 - { id: 16, class: g8rc, preferred-register: '' } 2056 - { id: 17, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2057liveins: 2058 - { reg: '$x3', virtual-reg: '%0' } 2059 - { reg: '$x4', virtual-reg: '%1' } 2060frameInfo: 2061 isFrameAddressTaken: false 2062 isReturnAddressTaken: false 2063 hasStackMap: false 2064 hasPatchPoint: false 2065 stackSize: 0 2066 offsetAdjustment: 0 2067 maxAlignment: 0 2068 adjustsStack: false 2069 hasCalls: false 2070 stackProtector: '' 2071 maxCallFrameSize: 4294967295 2072 hasOpaqueSPAdjustment: false 2073 hasVAStart: false 2074 hasMustTailInVarArgFunc: false 2075 savePoint: '' 2076 restorePoint: '' 2077fixedStack: 2078stack: 2079constants: 2080body: | 2081 bb.0.entry: 2082 liveins: $x3, $x4 2083 2084 %1 = COPY $x4 2085 %0 = COPY $x3 2086 %2 = COPY %1.sub_32 2087 %3 = ADDI %2, 1 2088 %5 = IMPLICIT_DEF 2089 %4 = INSERT_SUBREG %5, killed %3, 1 2090 %6 = RLDICL killed %4, 0, 32 2091 %7 = LBZX %0, killed %6 :: (load (s8) from %ir.arrayidx, !tbaa !3) 2092 %8 = ADDI %2, 2 2093 %10 = IMPLICIT_DEF 2094 %9 = INSERT_SUBREG %10, killed %8, 1 2095 %11 = LI8 -15 2096 %12,%17 = LBZUX %0, killed %11 :: (load (s8) from %ir.arrayidx3, !tbaa !3) 2097 ; CHECK: LBZU -15, %0 2098 ; CHECK-LATE: lbzu 5, -15(3) 2099 %13 = ADD4 killed %12, killed %7 2100 %15 = IMPLICIT_DEF 2101 %14 = INSERT_SUBREG %15, killed %13, 1 2102 %16 = RLWINM8 killed %14, 0, 24, 31 2103 $x3 = COPY %16 2104 BLR8 implicit $lr8, implicit $rm, implicit $x3 2105 2106... 2107--- 2108name: testLBZX 2109# CHECK-ALL: name: testLBZX 2110alignment: 16 2111exposesReturnsTwice: false 2112legalized: false 2113regBankSelected: false 2114selected: false 2115tracksRegLiveness: true 2116registers: 2117 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2118 - { id: 1, class: g8rc, preferred-register: '' } 2119 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2120 - { id: 3, class: gprc, preferred-register: '' } 2121 - { id: 4, class: g8rc, preferred-register: '' } 2122 - { id: 5, class: g8rc, preferred-register: '' } 2123 - { id: 6, class: g8rc, preferred-register: '' } 2124 - { id: 7, class: gprc, preferred-register: '' } 2125 - { id: 8, class: gprc, preferred-register: '' } 2126 - { id: 9, class: g8rc, preferred-register: '' } 2127 - { id: 10, class: g8rc, preferred-register: '' } 2128 - { id: 11, class: g8rc, preferred-register: '' } 2129 - { id: 12, class: gprc, preferred-register: '' } 2130 - { id: 13, class: gprc, preferred-register: '' } 2131 - { id: 14, class: g8rc, preferred-register: '' } 2132 - { id: 15, class: g8rc, preferred-register: '' } 2133 - { id: 16, class: g8rc, preferred-register: '' } 2134liveins: 2135 - { reg: '$x3', virtual-reg: '%0' } 2136 - { reg: '$x4', virtual-reg: '%1' } 2137frameInfo: 2138 isFrameAddressTaken: false 2139 isReturnAddressTaken: false 2140 hasStackMap: false 2141 hasPatchPoint: false 2142 stackSize: 0 2143 offsetAdjustment: 0 2144 maxAlignment: 0 2145 adjustsStack: false 2146 hasCalls: false 2147 stackProtector: '' 2148 maxCallFrameSize: 4294967295 2149 hasOpaqueSPAdjustment: false 2150 hasVAStart: false 2151 hasMustTailInVarArgFunc: false 2152 savePoint: '' 2153 restorePoint: '' 2154fixedStack: 2155stack: 2156constants: 2157body: | 2158 bb.0.entry: 2159 liveins: $x3, $x4 2160 2161 %1 = COPY $x4 2162 %0 = LI8 45 2163 %2 = COPY %1.sub_32 2164 %3 = ADDI %2, 1 2165 %5 = IMPLICIT_DEF 2166 %4 = INSERT_SUBREG %5, killed %3, 1 2167 %6 = RLDICL killed %4, 0, 32 2168 %7 = LBZX %0, killed %6 :: (load (s8) from %ir.arrayidx, !tbaa !3) 2169 ; CHECK: LBZ 45, killed %6 2170 ; CHECK-LATE: lbz 5, 45(5) 2171 %8 = ADDI %2, 2 2172 %10 = IMPLICIT_DEF 2173 %9 = INSERT_SUBREG %10, killed %8, 1 2174 %11 = RLDICL killed %9, 0, 32 2175 %12 = LBZX %0, killed %11 :: (load (s8) from %ir.arrayidx3, !tbaa !3) 2176 ; CHECK: LBZ 45, killed %11 2177 ; CHECK-LATE: lbz 3, 45(4) 2178 %13 = ADD4 killed %12, killed %7 2179 %15 = IMPLICIT_DEF 2180 %14 = INSERT_SUBREG %15, killed %13, 1 2181 %16 = RLWINM8 killed %14, 0, 24, 31 2182 $x3 = COPY %16 2183 BLR8 implicit $lr8, implicit $rm, implicit $x3 2184 2185... 2186--- 2187name: testLHZUX 2188# CHECK-ALL: name: testLHZUX 2189alignment: 16 2190exposesReturnsTwice: false 2191legalized: false 2192regBankSelected: false 2193selected: false 2194tracksRegLiveness: true 2195registers: 2196 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2197 - { id: 1, class: g8rc, preferred-register: '' } 2198 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2199 - { id: 3, class: gprc, preferred-register: '' } 2200 - { id: 4, class: g8rc, preferred-register: '' } 2201 - { id: 5, class: g8rc, preferred-register: '' } 2202 - { id: 6, class: g8rc, preferred-register: '' } 2203 - { id: 7, class: gprc, preferred-register: '' } 2204 - { id: 8, class: gprc, preferred-register: '' } 2205 - { id: 9, class: g8rc, preferred-register: '' } 2206 - { id: 10, class: g8rc, preferred-register: '' } 2207 - { id: 11, class: g8rc, preferred-register: '' } 2208 - { id: 12, class: gprc, preferred-register: '' } 2209 - { id: 13, class: gprc, preferred-register: '' } 2210 - { id: 14, class: g8rc, preferred-register: '' } 2211 - { id: 15, class: g8rc, preferred-register: '' } 2212 - { id: 16, class: g8rc, preferred-register: '' } 2213 - { id: 17, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2214liveins: 2215 - { reg: '$x3', virtual-reg: '%0' } 2216 - { reg: '$x4', virtual-reg: '%1' } 2217frameInfo: 2218 isFrameAddressTaken: false 2219 isReturnAddressTaken: false 2220 hasStackMap: false 2221 hasPatchPoint: false 2222 stackSize: 0 2223 offsetAdjustment: 0 2224 maxAlignment: 0 2225 adjustsStack: false 2226 hasCalls: false 2227 stackProtector: '' 2228 maxCallFrameSize: 4294967295 2229 hasOpaqueSPAdjustment: false 2230 hasVAStart: false 2231 hasMustTailInVarArgFunc: false 2232 savePoint: '' 2233 restorePoint: '' 2234fixedStack: 2235stack: 2236constants: 2237body: | 2238 bb.0.entry: 2239 liveins: $x3, $x4 2240 2241 %1 = COPY $x4 2242 %0 = COPY $x3 2243 %2 = COPY %1.sub_32 2244 %3 = ADDI %2, 1 2245 %5 = IMPLICIT_DEF 2246 %4 = INSERT_SUBREG %5, killed %3, 1 2247 %6 = RLDIC killed %4, 1, 31 2248 %7 = LHZX %0, killed %6 :: (load (s16) from %ir.arrayidx, !tbaa !6) 2249 %8 = ADDI %2, 2 2250 %10 = IMPLICIT_DEF 2251 %9 = INSERT_SUBREG %10, killed %8, 1 2252 %11 = LI8 31440 2253 %12,%17 = LHZUX %0, killed %11 :: (load (s16) from %ir.arrayidx3, !tbaa !6) 2254 ; CHECK: LHZU 31440, %0 2255 ; CHECK-LATE: lhzu 5, 31440(3) 2256 %13 = ADD4 killed %12, killed %7 2257 %15 = IMPLICIT_DEF 2258 %14 = INSERT_SUBREG %15, killed %13, 1 2259 %16 = RLWINM8 killed %14, 0, 16, 31 2260 $x3 = COPY %16 2261 BLR8 implicit $lr8, implicit $rm, implicit $x3 2262 2263... 2264--- 2265name: testLHZX 2266# CHECK-ALL: name: testLHZX 2267alignment: 16 2268exposesReturnsTwice: false 2269legalized: false 2270regBankSelected: false 2271selected: false 2272tracksRegLiveness: true 2273registers: 2274 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2275 - { id: 1, class: g8rc, preferred-register: '' } 2276 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2277 - { id: 3, class: gprc, preferred-register: '' } 2278 - { id: 4, class: g8rc, preferred-register: '' } 2279 - { id: 5, class: g8rc, preferred-register: '' } 2280 - { id: 6, class: g8rc, preferred-register: '' } 2281 - { id: 7, class: gprc, preferred-register: '' } 2282 - { id: 8, class: gprc, preferred-register: '' } 2283 - { id: 9, class: g8rc, preferred-register: '' } 2284 - { id: 10, class: g8rc, preferred-register: '' } 2285 - { id: 11, class: g8rc, preferred-register: '' } 2286 - { id: 12, class: gprc, preferred-register: '' } 2287 - { id: 13, class: gprc, preferred-register: '' } 2288 - { id: 14, class: g8rc, preferred-register: '' } 2289 - { id: 15, class: g8rc, preferred-register: '' } 2290 - { id: 16, class: g8rc, preferred-register: '' } 2291liveins: 2292 - { reg: '$x3', virtual-reg: '%0' } 2293 - { reg: '$x4', virtual-reg: '%1' } 2294frameInfo: 2295 isFrameAddressTaken: false 2296 isReturnAddressTaken: false 2297 hasStackMap: false 2298 hasPatchPoint: false 2299 stackSize: 0 2300 offsetAdjustment: 0 2301 maxAlignment: 0 2302 adjustsStack: false 2303 hasCalls: false 2304 stackProtector: '' 2305 maxCallFrameSize: 4294967295 2306 hasOpaqueSPAdjustment: false 2307 hasVAStart: false 2308 hasMustTailInVarArgFunc: false 2309 savePoint: '' 2310 restorePoint: '' 2311fixedStack: 2312stack: 2313constants: 2314body: | 2315 bb.0.entry: 2316 liveins: $x3, $x4 2317 2318 %1 = COPY $x4 2319 %0 = COPY $x3 2320 %2 = COPY %1.sub_32 2321 %3 = ADDI %2, 1 2322 %5 = IMPLICIT_DEF 2323 %4 = INSERT_SUBREG %5, killed %3, 1 2324 %6 = RLDIC killed %4, 1, 31 2325 %7 = LHZX %0, killed %6 :: (load (s16) from %ir.arrayidx, !tbaa !6) 2326 %8 = ADDI %2, 2 2327 %10 = IMPLICIT_DEF 2328 %9 = INSERT_SUBREG %10, killed %8, 1 2329 %11 = LI8 882 2330 %12 = LHZX %0, killed %11 :: (load (s16) from %ir.arrayidx3, !tbaa !6) 2331 ; CHECK: LHZ 882, %0 2332 ; CHECK-LATE: lhz 3, 882(3) 2333 %13 = ADD4 killed %12, killed %7 2334 %15 = IMPLICIT_DEF 2335 %14 = INSERT_SUBREG %15, killed %13, 1 2336 %16 = RLWINM8 killed %14, 0, 16, 31 2337 $x3 = COPY %16 2338 BLR8 implicit $lr8, implicit $rm, implicit $x3 2339 2340... 2341--- 2342name: testLHAUX 2343# CHECK-ALL: name: testLHAUX 2344alignment: 16 2345exposesReturnsTwice: false 2346legalized: false 2347regBankSelected: false 2348selected: false 2349tracksRegLiveness: true 2350registers: 2351 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2352 - { id: 1, class: g8rc, preferred-register: '' } 2353 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2354 - { id: 3, class: gprc, preferred-register: '' } 2355 - { id: 4, class: g8rc, preferred-register: '' } 2356 - { id: 5, class: g8rc, preferred-register: '' } 2357 - { id: 6, class: g8rc, preferred-register: '' } 2358 - { id: 7, class: gprc, preferred-register: '' } 2359 - { id: 8, class: gprc, preferred-register: '' } 2360 - { id: 9, class: g8rc, preferred-register: '' } 2361 - { id: 10, class: g8rc, preferred-register: '' } 2362 - { id: 11, class: g8rc, preferred-register: '' } 2363 - { id: 12, class: gprc, preferred-register: '' } 2364 - { id: 13, class: gprc, preferred-register: '' } 2365 - { id: 14, class: g8rc, preferred-register: '' } 2366 - { id: 15, class: g8rc, preferred-register: '' } 2367 - { id: 16, class: g8rc, preferred-register: '' } 2368 - { id: 17, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2369liveins: 2370 - { reg: '$x3', virtual-reg: '%0' } 2371 - { reg: '$x4', virtual-reg: '%1' } 2372frameInfo: 2373 isFrameAddressTaken: false 2374 isReturnAddressTaken: false 2375 hasStackMap: false 2376 hasPatchPoint: false 2377 stackSize: 0 2378 offsetAdjustment: 0 2379 maxAlignment: 0 2380 adjustsStack: false 2381 hasCalls: false 2382 stackProtector: '' 2383 maxCallFrameSize: 4294967295 2384 hasOpaqueSPAdjustment: false 2385 hasVAStart: false 2386 hasMustTailInVarArgFunc: false 2387 savePoint: '' 2388 restorePoint: '' 2389fixedStack: 2390stack: 2391constants: 2392body: | 2393 bb.0.entry: 2394 liveins: $x3, $x4 2395 2396 %1 = COPY $x4 2397 %0 = COPY $x3 2398 %2 = COPY %1.sub_32 2399 %3 = ADDI %2, 1 2400 %5 = IMPLICIT_DEF 2401 %4 = INSERT_SUBREG %5, killed %3, 1 2402 %6 = RLDIC %4, 1, 31 2403 %7 = LHZX %0, killed %6 :: (load (s16) from %ir.arrayidx, !tbaa !6) 2404 %8 = ADDI %2, 2 2405 %10 = IMPLICIT_DEF 2406 %9 = INSERT_SUBREG %10, killed %8, 1 2407 %11 = LI8 400 2408 %12,%17 = LHAUX %0, killed %11 :: (load (s16) from %ir.arrayidx3, !tbaa !6) 2409 ; CHECK: LHAU 400, %0 2410 ; CHECK-LATE: lhau 5, 400(3) 2411 %13 = ADD4 killed %12, killed %7 2412 %15 = IMPLICIT_DEF 2413 %14 = INSERT_SUBREG %15, killed %13, 1 2414 %16 = EXTSH8 killed %14 2415 $x3 = COPY %16 2416 BLR8 implicit $lr8, implicit $rm, implicit $x3 2417 2418... 2419--- 2420name: testLHAX 2421# CHECK-ALL: name: testLHAX 2422alignment: 16 2423exposesReturnsTwice: false 2424legalized: false 2425regBankSelected: false 2426selected: false 2427tracksRegLiveness: true 2428registers: 2429 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2430 - { id: 1, class: g8rc, preferred-register: '' } 2431 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2432 - { id: 3, class: gprc, preferred-register: '' } 2433 - { id: 4, class: g8rc, preferred-register: '' } 2434 - { id: 5, class: g8rc, preferred-register: '' } 2435 - { id: 6, class: g8rc, preferred-register: '' } 2436 - { id: 7, class: gprc, preferred-register: '' } 2437 - { id: 8, class: gprc, preferred-register: '' } 2438 - { id: 9, class: g8rc, preferred-register: '' } 2439 - { id: 10, class: g8rc, preferred-register: '' } 2440 - { id: 11, class: g8rc, preferred-register: '' } 2441 - { id: 12, class: gprc, preferred-register: '' } 2442 - { id: 13, class: gprc, preferred-register: '' } 2443 - { id: 14, class: g8rc, preferred-register: '' } 2444 - { id: 15, class: g8rc, preferred-register: '' } 2445 - { id: 16, class: g8rc, preferred-register: '' } 2446liveins: 2447 - { reg: '$x3', virtual-reg: '%0' } 2448 - { reg: '$x4', virtual-reg: '%1' } 2449frameInfo: 2450 isFrameAddressTaken: false 2451 isReturnAddressTaken: false 2452 hasStackMap: false 2453 hasPatchPoint: false 2454 stackSize: 0 2455 offsetAdjustment: 0 2456 maxAlignment: 0 2457 adjustsStack: false 2458 hasCalls: false 2459 stackProtector: '' 2460 maxCallFrameSize: 4294967295 2461 hasOpaqueSPAdjustment: false 2462 hasVAStart: false 2463 hasMustTailInVarArgFunc: false 2464 savePoint: '' 2465 restorePoint: '' 2466fixedStack: 2467stack: 2468constants: 2469body: | 2470 bb.0.entry: 2471 liveins: $x3, $x4 2472 2473 %1 = COPY $x4 2474 %0 = COPY $x3 2475 %2 = COPY %1.sub_32 2476 %3 = ADDI %2, 1 2477 %5 = IMPLICIT_DEF 2478 %4 = INSERT_SUBREG %5, killed %3, 1 2479 %6 = LI8 -999 2480 %7 = LHAX %0, killed %6 :: (load (s16) from %ir.arrayidx, !tbaa !6) 2481 ; CHECK: LHA -999, %0 2482 ; CHECK-LATE: lha 4, -999(3) 2483 %8 = ADDI %2, 2 2484 %10 = IMPLICIT_DEF 2485 %9 = INSERT_SUBREG %10, killed %8, 1 2486 %11 = LI8 999 2487 %12 = LHAX %0, killed %11 :: (load (s16) from %ir.arrayidx3, !tbaa !6) 2488 ; CHECK: LHA 999, %0 2489 ; CHECK-LATE: lha 3, 999(3) 2490 %13 = ADD4 killed %12, killed %7 2491 %15 = IMPLICIT_DEF 2492 %14 = INSERT_SUBREG %15, killed %13, 1 2493 %16 = EXTSH8 killed %14 2494 $x3 = COPY %16 2495 BLR8 implicit $lr8, implicit $rm, implicit $x3 2496 2497... 2498--- 2499name: testLWZUX 2500# CHECK-ALL: name: testLWZUX 2501alignment: 16 2502exposesReturnsTwice: false 2503legalized: false 2504regBankSelected: false 2505selected: false 2506tracksRegLiveness: true 2507registers: 2508 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2509 - { id: 1, class: g8rc, preferred-register: '' } 2510 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2511 - { id: 3, class: gprc, preferred-register: '' } 2512 - { id: 4, class: g8rc, preferred-register: '' } 2513 - { id: 5, class: g8rc, preferred-register: '' } 2514 - { id: 6, class: g8rc, preferred-register: '' } 2515 - { id: 7, class: gprc, preferred-register: '' } 2516 - { id: 8, class: gprc, preferred-register: '' } 2517 - { id: 9, class: g8rc, preferred-register: '' } 2518 - { id: 10, class: g8rc, preferred-register: '' } 2519 - { id: 11, class: g8rc, preferred-register: '' } 2520 - { id: 12, class: gprc, preferred-register: '' } 2521 - { id: 13, class: gprc, preferred-register: '' } 2522 - { id: 14, class: g8rc, preferred-register: '' } 2523 - { id: 15, class: g8rc, preferred-register: '' } 2524 - { id: 16, class: g8rc, preferred-register: '' } 2525 - { id: 17, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2526 - { id: 18, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2527liveins: 2528 - { reg: '$x3', virtual-reg: '%0' } 2529 - { reg: '$x4', virtual-reg: '%1' } 2530frameInfo: 2531 isFrameAddressTaken: false 2532 isReturnAddressTaken: false 2533 hasStackMap: false 2534 hasPatchPoint: false 2535 stackSize: 0 2536 offsetAdjustment: 0 2537 maxAlignment: 0 2538 adjustsStack: false 2539 hasCalls: false 2540 stackProtector: '' 2541 maxCallFrameSize: 4294967295 2542 hasOpaqueSPAdjustment: false 2543 hasVAStart: false 2544 hasMustTailInVarArgFunc: false 2545 savePoint: '' 2546 restorePoint: '' 2547fixedStack: 2548stack: 2549constants: 2550body: | 2551 bb.0.entry: 2552 liveins: $x3, $x4 2553 2554 %1 = COPY $x4 2555 %0 = COPY $x3 2556 %2 = COPY %1.sub_32 2557 %3 = ADDI %2, 1 2558 %5 = IMPLICIT_DEF 2559 %4 = INSERT_SUBREG %5, killed %3, 1 2560 %6 = LI8 889 2561 %7,%17 = LWZUX %0, killed %6 :: (load (s32) from %ir.arrayidx, !tbaa !8) 2562 ; CHECK: LWZU 889, %0 2563 ; CHECK-LATE: lwzu {{[0-9]+}}, 889({{[0-9]+}}) 2564 %8 = ADDI %2, 2 2565 %10 = IMPLICIT_DEF 2566 %9 = INSERT_SUBREG %10, killed %8, 1 2567 %11 = LI8 -2 2568 %12,%18 = LWZUX %0, killed %11 :: (load (s32) from %ir.arrayidx3, !tbaa !8) 2569 ; CHECK: LWZU -2, %0 2570 ; CHECK-LATE: lwzu {{[0-9]+}}, -2({{[0-9]+}}) 2571 %13 = ADD4 killed %12, killed %7 2572 %15 = IMPLICIT_DEF 2573 %14 = INSERT_SUBREG %15, killed %13, 1 2574 %16 = RLDICL killed %14, 0, 32 2575 $x3 = COPY %16 2576 BLR8 implicit $lr8, implicit $rm, implicit $x3 2577 2578... 2579--- 2580name: testLWZX 2581# CHECK-ALL: name: testLWZX 2582alignment: 16 2583exposesReturnsTwice: false 2584legalized: false 2585regBankSelected: false 2586selected: false 2587tracksRegLiveness: true 2588registers: 2589 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2590 - { id: 1, class: g8rc, preferred-register: '' } 2591 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2592 - { id: 3, class: gprc, preferred-register: '' } 2593 - { id: 4, class: g8rc, preferred-register: '' } 2594 - { id: 5, class: g8rc, preferred-register: '' } 2595 - { id: 6, class: g8rc, preferred-register: '' } 2596 - { id: 7, class: gprc, preferred-register: '' } 2597 - { id: 8, class: gprc, preferred-register: '' } 2598 - { id: 9, class: g8rc, preferred-register: '' } 2599 - { id: 10, class: g8rc, preferred-register: '' } 2600 - { id: 11, class: g8rc, preferred-register: '' } 2601 - { id: 12, class: gprc, preferred-register: '' } 2602 - { id: 13, class: gprc, preferred-register: '' } 2603 - { id: 14, class: g8rc, preferred-register: '' } 2604 - { id: 15, class: g8rc, preferred-register: '' } 2605 - { id: 16, class: g8rc, preferred-register: '' } 2606liveins: 2607 - { reg: '$x3', virtual-reg: '%0' } 2608 - { reg: '$x4', virtual-reg: '%1' } 2609frameInfo: 2610 isFrameAddressTaken: false 2611 isReturnAddressTaken: false 2612 hasStackMap: false 2613 hasPatchPoint: false 2614 stackSize: 0 2615 offsetAdjustment: 0 2616 maxAlignment: 0 2617 adjustsStack: false 2618 hasCalls: false 2619 stackProtector: '' 2620 maxCallFrameSize: 4294967295 2621 hasOpaqueSPAdjustment: false 2622 hasVAStart: false 2623 hasMustTailInVarArgFunc: false 2624 savePoint: '' 2625 restorePoint: '' 2626fixedStack: 2627stack: 2628constants: 2629body: | 2630 bb.0.entry: 2631 liveins: $x3, $x4 2632 2633 %1 = COPY $x4 2634 %0 = LI8 1000 2635 %2 = COPY %1.sub_32 2636 %3 = ADDI %2, 1 2637 %5 = IMPLICIT_DEF 2638 %4 = INSERT_SUBREG %5, killed %3, 1 2639 %6 = RLDIC %4, 2, 30 2640 %7 = LWZX %0, killed %6 :: (load (s32) from %ir.arrayidx, !tbaa !8) 2641 ; CHECK: LWZ 1000, killed %6 2642 ; CHECK-LATE: lwz 5, 1000(5) 2643 %8 = ADDI %2, 2 2644 %10 = IMPLICIT_DEF 2645 %9 = INSERT_SUBREG %10, killed %8, 1 2646 %11 = RLDIC %9, 2, 30 2647 %12 = LWZX %0, killed %11 :: (load (s32) from %ir.arrayidx3, !tbaa !8) 2648 ; CHECK: LWZ 1000, killed %11 2649 ; CHECK-LATE: lwz 3, 1000(4) 2650 %13 = ADD4 killed %12, killed %7 2651 %15 = IMPLICIT_DEF 2652 %14 = INSERT_SUBREG %15, killed %13, 1 2653 %16 = RLDICL killed %14, 0, 32 2654 $x3 = COPY %16 2655 BLR8 implicit $lr8, implicit $rm, implicit $x3 2656 2657... 2658--- 2659name: testLWAX 2660# CHECK-ALL: name: testLWAX 2661alignment: 16 2662exposesReturnsTwice: false 2663legalized: false 2664regBankSelected: false 2665selected: false 2666tracksRegLiveness: true 2667registers: 2668 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2669 - { id: 1, class: g8rc, preferred-register: '' } 2670 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2671 - { id: 3, class: gprc, preferred-register: '' } 2672 - { id: 4, class: g8rc, preferred-register: '' } 2673 - { id: 5, class: g8rc, preferred-register: '' } 2674 - { id: 6, class: g8rc, preferred-register: '' } 2675 - { id: 7, class: g8rc, preferred-register: '' } 2676 - { id: 8, class: gprc, preferred-register: '' } 2677 - { id: 9, class: g8rc, preferred-register: '' } 2678 - { id: 10, class: g8rc, preferred-register: '' } 2679 - { id: 11, class: g8rc, preferred-register: '' } 2680 - { id: 12, class: g8rc, preferred-register: '' } 2681 - { id: 13, class: g8rc, preferred-register: '' } 2682liveins: 2683 - { reg: '$x3', virtual-reg: '%0' } 2684 - { reg: '$x4', virtual-reg: '%1' } 2685frameInfo: 2686 isFrameAddressTaken: false 2687 isReturnAddressTaken: false 2688 hasStackMap: false 2689 hasPatchPoint: false 2690 stackSize: 0 2691 offsetAdjustment: 0 2692 maxAlignment: 0 2693 adjustsStack: false 2694 hasCalls: false 2695 stackProtector: '' 2696 maxCallFrameSize: 4294967295 2697 hasOpaqueSPAdjustment: false 2698 hasVAStart: false 2699 hasMustTailInVarArgFunc: false 2700 savePoint: '' 2701 restorePoint: '' 2702fixedStack: 2703stack: 2704constants: 2705body: | 2706 bb.0.entry: 2707 liveins: $x3, $x4 2708 2709 %1 = COPY $x4 2710 %0 = LI8 444 2711 %2 = COPY %1.sub_32 2712 %3 = ADDI %2, 1 2713 %5 = IMPLICIT_DEF 2714 %4 = INSERT_SUBREG %5, killed %3, 1 2715 %6 = RLDIC %4, 2, 30 2716 %7 = LWAX %0, killed %6 :: (load (s32) from %ir.arrayidx, !tbaa !8) 2717 ; CHECK: LWA 444, killed %6 2718 ; CHECK-LATE: lwa 5, 444(5) 2719 %8 = ADDI %2, 2 2720 %10 = IMPLICIT_DEF 2721 %9 = INSERT_SUBREG %10, killed %8, 1 2722 %11 = RLDIC %9, 2, 30 2723 %12 = LWAX %0, killed %11 :: (load (s32) from %ir.arrayidx3, !tbaa !8) 2724 ; CHECK: LWA 444, killed %11 2725 ; CHECK-LATE: lwa 3, 444(4) 2726 %13 = ADD8 killed %12, killed %7 2727 $x3 = COPY %13 2728 BLR8 implicit $lr8, implicit $rm, implicit $x3 2729 2730... 2731--- 2732name: testLDUX 2733# CHECK-ALL: name: testLDUX 2734alignment: 16 2735exposesReturnsTwice: false 2736legalized: false 2737regBankSelected: false 2738selected: false 2739tracksRegLiveness: true 2740registers: 2741 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2742 - { id: 1, class: g8rc, preferred-register: '' } 2743 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2744 - { id: 3, class: gprc, preferred-register: '' } 2745 - { id: 4, class: g8rc, preferred-register: '' } 2746 - { id: 5, class: g8rc, preferred-register: '' } 2747 - { id: 6, class: g8rc, preferred-register: '' } 2748 - { id: 7, class: g8rc, preferred-register: '' } 2749 - { id: 8, class: gprc, preferred-register: '' } 2750 - { id: 9, class: g8rc, preferred-register: '' } 2751 - { id: 10, class: g8rc, preferred-register: '' } 2752 - { id: 11, class: g8rc, preferred-register: '' } 2753 - { id: 12, class: g8rc, preferred-register: '' } 2754 - { id: 13, class: g8rc, preferred-register: '' } 2755 - { id: 14, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2756 - { id: 15, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2757liveins: 2758 - { reg: '$x3', virtual-reg: '%0' } 2759 - { reg: '$x4', virtual-reg: '%1' } 2760frameInfo: 2761 isFrameAddressTaken: false 2762 isReturnAddressTaken: false 2763 hasStackMap: false 2764 hasPatchPoint: false 2765 stackSize: 0 2766 offsetAdjustment: 0 2767 maxAlignment: 0 2768 adjustsStack: false 2769 hasCalls: false 2770 stackProtector: '' 2771 maxCallFrameSize: 4294967295 2772 hasOpaqueSPAdjustment: false 2773 hasVAStart: false 2774 hasMustTailInVarArgFunc: false 2775 savePoint: '' 2776 restorePoint: '' 2777fixedStack: 2778stack: 2779constants: 2780body: | 2781 bb.0.entry: 2782 liveins: $x3, $x4 2783 2784 %1 = COPY $x4 2785 %0 = COPY $x3 2786 %2 = COPY %1.sub_32 2787 %3 = ADDI %2, 1 2788 %5 = IMPLICIT_DEF 2789 %4 = INSERT_SUBREG %5, killed %3, 1 2790 %6 = LI8 100 2791 %7,%14 = LDUX %0, killed %6 :: (load (s64) from %ir.arrayidx, !tbaa !10) 2792 ; CHECK: LDU 100, %0 2793 ; CHECK-LATE: ldu {{[0-9]+}}, 100({{[0-9]+}}) 2794 %8 = ADDI %2, 2 2795 %10 = IMPLICIT_DEF 2796 %9 = INSERT_SUBREG %10, killed %8, 1 2797 %11 = LI8 200 2798 %12,%15 = LDUX %0, killed %11 :: (load (s64) from %ir.arrayidx3, !tbaa !10) 2799 ; CHECK: LDU 200, %0 2800 ; CHECK-LATE: ldu {{[0-9]+}}, 200({{[0-9]+}}) 2801 %13 = ADD8 killed %12, killed %7 2802 $x3 = COPY %13 2803 BLR8 implicit $lr8, implicit $rm, implicit $x3 2804 2805... 2806--- 2807name: testLDX 2808# CHECK-ALL: name: testLDX 2809alignment: 16 2810exposesReturnsTwice: false 2811legalized: false 2812regBankSelected: false 2813selected: false 2814tracksRegLiveness: true 2815registers: 2816 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2817 - { id: 1, class: g8rc, preferred-register: '' } 2818 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2819 - { id: 3, class: gprc, preferred-register: '' } 2820 - { id: 4, class: g8rc, preferred-register: '' } 2821 - { id: 5, class: g8rc, preferred-register: '' } 2822 - { id: 6, class: g8rc, preferred-register: '' } 2823 - { id: 7, class: g8rc, preferred-register: '' } 2824 - { id: 8, class: gprc, preferred-register: '' } 2825 - { id: 9, class: g8rc, preferred-register: '' } 2826 - { id: 10, class: g8rc, preferred-register: '' } 2827 - { id: 11, class: g8rc, preferred-register: '' } 2828 - { id: 12, class: g8rc, preferred-register: '' } 2829 - { id: 13, class: g8rc, preferred-register: '' } 2830liveins: 2831 - { reg: '$x3', virtual-reg: '%0' } 2832 - { reg: '$x4', virtual-reg: '%1' } 2833frameInfo: 2834 isFrameAddressTaken: false 2835 isReturnAddressTaken: false 2836 hasStackMap: false 2837 hasPatchPoint: false 2838 stackSize: 0 2839 offsetAdjustment: 0 2840 maxAlignment: 0 2841 adjustsStack: false 2842 hasCalls: false 2843 stackProtector: '' 2844 maxCallFrameSize: 4294967295 2845 hasOpaqueSPAdjustment: false 2846 hasVAStart: false 2847 hasMustTailInVarArgFunc: false 2848 savePoint: '' 2849 restorePoint: '' 2850fixedStack: 2851stack: 2852constants: 2853body: | 2854 bb.0.entry: 2855 liveins: $x3, $x4 2856 2857 %1 = COPY $x4 2858 %0 = COPY $x3 2859 %2 = COPY %1.sub_32 2860 %3 = ADDI %2, 1 2861 %5 = IMPLICIT_DEF 2862 %4 = INSERT_SUBREG %5, killed %3, 1 2863 %6 = LI8 120 2864 %7 = LDX %0, killed %6 :: (load (s64) from %ir.arrayidx, !tbaa !10) 2865 ; CHECK: LD 120, %0 2866 ; CHECK-LATE: ld 4, 120(3) 2867 %8 = ADDI %2, 2 2868 %10 = IMPLICIT_DEF 2869 %9 = INSERT_SUBREG %10, killed %8, 1 2870 %11 = LI8 280 2871 %12 = LDX %0, killed %11 :: (load (s64) from %ir.arrayidx3, !tbaa !10) 2872 ; CHECK: LD 280, %0 2873 ; CHECK-LATE: ld 3, 280(3) 2874 %13 = ADD8 killed %12, killed %7 2875 $x3 = COPY %13 2876 BLR8 implicit $lr8, implicit $rm, implicit $x3 2877 2878... 2879--- 2880name: testLFDUX 2881# CHECK-ALL: name: testLFDUX 2882alignment: 16 2883exposesReturnsTwice: false 2884legalized: false 2885regBankSelected: false 2886selected: false 2887tracksRegLiveness: true 2888registers: 2889 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2890 - { id: 1, class: g8rc, preferred-register: '' } 2891 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2892 - { id: 3, class: gprc, preferred-register: '' } 2893 - { id: 4, class: g8rc, preferred-register: '' } 2894 - { id: 5, class: g8rc, preferred-register: '' } 2895 - { id: 6, class: g8rc, preferred-register: '' } 2896 - { id: 7, class: f8rc, preferred-register: '' } 2897 - { id: 8, class: gprc, preferred-register: '' } 2898 - { id: 9, class: g8rc, preferred-register: '' } 2899 - { id: 10, class: g8rc, preferred-register: '' } 2900 - { id: 11, class: g8rc, preferred-register: '' } 2901 - { id: 12, class: f8rc, preferred-register: '' } 2902 - { id: 13, class: f8rc, preferred-register: '' } 2903 - { id: 14, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2904 - { id: 15, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2905liveins: 2906 - { reg: '$x3', virtual-reg: '%0' } 2907 - { reg: '$x4', virtual-reg: '%1' } 2908frameInfo: 2909 isFrameAddressTaken: false 2910 isReturnAddressTaken: false 2911 hasStackMap: false 2912 hasPatchPoint: false 2913 stackSize: 0 2914 offsetAdjustment: 0 2915 maxAlignment: 0 2916 adjustsStack: false 2917 hasCalls: false 2918 stackProtector: '' 2919 maxCallFrameSize: 4294967295 2920 hasOpaqueSPAdjustment: false 2921 hasVAStart: false 2922 hasMustTailInVarArgFunc: false 2923 savePoint: '' 2924 restorePoint: '' 2925fixedStack: 2926stack: 2927constants: 2928body: | 2929 bb.0.entry: 2930 liveins: $x3, $x4 2931 2932 %1 = COPY $x4 2933 %0 = COPY $x3 2934 %2 = COPY %1.sub_32 2935 %3 = ADDI %2, 1 2936 %5 = IMPLICIT_DEF 2937 %4 = INSERT_SUBREG %5, killed %3, 1 2938 %6 = LI8 440 2939 %7,%14 = LFDUX %0, killed %6 :: (load (s64) from %ir.arrayidx, !tbaa !12) 2940 ; CHECK: LFDU 440, %0 2941 ; CHECK-LATE: lfdu {{[0-9]+}}, 440({{[0-9]+}}) 2942 %8 = ADDI %2, 2 2943 %10 = IMPLICIT_DEF 2944 %9 = INSERT_SUBREG %10, killed %8, 1 2945 %11 = LI8 16 2946 %12,%15 = LFDUX %0, killed %11 :: (load (s64) from %ir.arrayidx3, !tbaa !12) 2947 ; CHECK: LFDU 16, %0 2948 ; CHECK-LATE: lfdu {{[0-9]+}}, 16({{[0-9]+}}) 2949 %13 = FADD killed %7, killed %12, implicit $rm 2950 $f1 = COPY %13 2951 BLR8 implicit $lr8, implicit $rm, implicit $f1 2952 2953... 2954--- 2955name: testLFDX 2956# CHECK-ALL: name: testLFDX 2957alignment: 16 2958exposesReturnsTwice: false 2959legalized: false 2960regBankSelected: false 2961selected: false 2962tracksRegLiveness: true 2963registers: 2964 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 2965 - { id: 1, class: g8rc, preferred-register: '' } 2966 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 2967 - { id: 3, class: gprc, preferred-register: '' } 2968 - { id: 4, class: g8rc, preferred-register: '' } 2969 - { id: 5, class: g8rc, preferred-register: '' } 2970 - { id: 6, class: g8rc, preferred-register: '' } 2971 - { id: 7, class: f8rc, preferred-register: '' } 2972 - { id: 8, class: gprc, preferred-register: '' } 2973 - { id: 9, class: g8rc, preferred-register: '' } 2974 - { id: 10, class: g8rc, preferred-register: '' } 2975 - { id: 11, class: g8rc, preferred-register: '' } 2976 - { id: 12, class: f8rc, preferred-register: '' } 2977 - { id: 13, class: f8rc, preferred-register: '' } 2978liveins: 2979 - { reg: '$x3', virtual-reg: '%0' } 2980 - { reg: '$x4', virtual-reg: '%1' } 2981frameInfo: 2982 isFrameAddressTaken: false 2983 isReturnAddressTaken: false 2984 hasStackMap: false 2985 hasPatchPoint: false 2986 stackSize: 0 2987 offsetAdjustment: 0 2988 maxAlignment: 0 2989 adjustsStack: false 2990 hasCalls: false 2991 stackProtector: '' 2992 maxCallFrameSize: 4294967295 2993 hasOpaqueSPAdjustment: false 2994 hasVAStart: false 2995 hasMustTailInVarArgFunc: false 2996 savePoint: '' 2997 restorePoint: '' 2998fixedStack: 2999stack: 3000constants: 3001body: | 3002 bb.0.entry: 3003 liveins: $x3, $x4 3004 3005 %1 = COPY $x4 3006 %0 = LI8 -20 3007 %2 = COPY %1.sub_32 3008 %3 = ADDI %2, 1 3009 %5 = IMPLICIT_DEF 3010 %4 = INSERT_SUBREG %5, killed %3, 1 3011 %6 = RLDIC %4, 3, 29 3012 %7 = LFDX %0, killed %6 :: (load (s64) from %ir.arrayidx, !tbaa !12) 3013 ; CHECK: LFD -20, killed %6 3014 ; CHECK-LATE: lfd {{[0-9]+}}, -20({{[0-9]+}}) 3015 %8 = ADDI %2, 2 3016 %10 = IMPLICIT_DEF 3017 %9 = INSERT_SUBREG %10, killed %8, 1 3018 %11 = RLDIC %9, 3, 29 3019 %12 = LFDX %0, killed %11 :: (load (s64) from %ir.arrayidx3, !tbaa !12) 3020 ; CHECK: LFD -20, killed %11 3021 ; CHECK-LATE: lfd {{[0-9]+}}, -20({{[0-9]+}}) 3022 %13 = FADD killed %7, killed %12, implicit $rm 3023 $f1 = COPY %13 3024 BLR8 implicit $lr8, implicit $rm, implicit $f1 3025 3026... 3027--- 3028name: testLFSUX 3029# CHECK-ALL: name: testLFSUX 3030alignment: 16 3031exposesReturnsTwice: false 3032legalized: false 3033regBankSelected: false 3034selected: false 3035tracksRegLiveness: true 3036registers: 3037 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3038 - { id: 1, class: g8rc, preferred-register: '' } 3039 - { id: 2, class: g8rc, preferred-register: '' } 3040 - { id: 3, class: f8rc, preferred-register: '' } 3041 - { id: 4, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3042 - { id: 5, class: f8rc, preferred-register: '' } 3043 - { id: 6, class: g8rc, preferred-register: '' } 3044 - { id: 7, class: gprc, preferred-register: '' } 3045 - { id: 8, class: f8rc, preferred-register: '' } 3046 - { id: 9, class: f8rc, preferred-register: '' } 3047 - { id: 10, class: f8rc, preferred-register: '' } 3048 - { id: 11, class: g8rc, preferred-register: '' } 3049 - { id: 12, class: gprc, preferred-register: '' } 3050 - { id: 13, class: f8rc, preferred-register: '' } 3051 - { id: 14, class: f8rc, preferred-register: '' } 3052 - { id: 15, class: f8rc, preferred-register: '' } 3053 - { id: 16, class: g8rc, preferred-register: '' } 3054 - { id: 17, class: gprc, preferred-register: '' } 3055 - { id: 18, class: f8rc, preferred-register: '' } 3056 - { id: 19, class: f8rc, preferred-register: '' } 3057 - { id: 20, class: f8rc, preferred-register: '' } 3058 - { id: 21, class: g8rc, preferred-register: '' } 3059 - { id: 22, class: gprc, preferred-register: '' } 3060 - { id: 23, class: g8rc, preferred-register: '' } 3061 - { id: 24, class: vrrc, preferred-register: '' } 3062liveins: 3063 - { reg: '$x3', virtual-reg: '%0' } 3064 - { reg: '$x4', virtual-reg: '%1' } 3065frameInfo: 3066 isFrameAddressTaken: false 3067 isReturnAddressTaken: false 3068 hasStackMap: false 3069 hasPatchPoint: false 3070 stackSize: 0 3071 offsetAdjustment: 0 3072 maxAlignment: 16 3073 adjustsStack: false 3074 hasCalls: false 3075 stackProtector: '' 3076 maxCallFrameSize: 4294967295 3077 hasOpaqueSPAdjustment: false 3078 hasVAStart: false 3079 hasMustTailInVarArgFunc: false 3080 savePoint: '' 3081 restorePoint: '' 3082fixedStack: 3083stack: 3084 - { id: 0, name: '', type: default, offset: 0, size: 16, alignment: 16, 3085 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 3086 local-offset: -16, debug-info-variable: '', debug-info-expression: '', 3087 debug-info-location: '' } 3088 - { id: 1, name: '', type: default, offset: 0, size: 4, alignment: 4, 3089 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 3090 local-offset: -20, debug-info-variable: '', debug-info-expression: '', 3091 debug-info-location: '' } 3092 - { id: 2, name: '', type: default, offset: 0, size: 4, alignment: 4, 3093 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 3094 local-offset: -24, debug-info-variable: '', debug-info-expression: '', 3095 debug-info-location: '' } 3096 - { id: 3, name: '', type: default, offset: 0, size: 4, alignment: 4, 3097 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 3098 local-offset: -28, debug-info-variable: '', debug-info-expression: '', 3099 debug-info-location: '' } 3100 - { id: 4, name: '', type: default, offset: 0, size: 4, alignment: 4, 3101 stack-id: default, callee-saved-register: '', callee-saved-restored: true, 3102 local-offset: -32, debug-info-variable: '', debug-info-expression: '', 3103 debug-info-location: '' } 3104constants: 3105body: | 3106 bb.0.entry: 3107 liveins: $x3, $x4 3108 3109 %1 = COPY $x4 3110 %0 = COPY $x3 3111 %2 = LI8 72 3112 %3, %4 = LFSUX %0, killed %2 :: (load (s32) from %ir.arrayidx, !tbaa !14) 3113 ; CHECK: LFSU 72, %0 3114 ; CHECK-LATE: lfsu 0, 72(3) 3115 %5 = FCTIWUZ killed %3, implicit $rm 3116 %6 = ADDI8 %stack.4, 0 3117 STFIWX killed %5, $zero8, killed %6 3118 %7 = LWZ 0, %stack.4 :: (load (s32) from %stack.4) 3119 %8 = LFS 4, %4 :: (load (s32) from %ir.3, !tbaa !14) 3120 %10 = FCTIWUZ %8, implicit $rm 3121 %11 = ADDI8 %stack.1, 0 3122 STFIWX killed %10, $zero8, killed %11 3123 %12 = LWZ 0, %stack.1 :: (load (s32) from %stack.1) 3124 %13 = LFS 8, %4 :: (load (s32) from %ir.5, !tbaa !14) 3125 %15 = FCTIWUZ %13, implicit $rm 3126 %16 = ADDI8 %stack.2, 0 3127 STFIWX killed %15, $zero8, killed %16 3128 %17 = LWZ 0, %stack.2 :: (load (s32) from %stack.2) 3129 %18 = LFS 12, %4 :: (load (s32) from %ir.7, !tbaa !14) 3130 %20 = FCTIWUZ %18, implicit $rm 3131 %21 = ADDI8 %stack.3, 0 3132 STFIWX killed %20, $zero8, killed %21 3133 %22 = LWZ 0, %stack.3 :: (load (s32) from %stack.3) 3134 STW killed %7, 0, %stack.0 :: (store (s32) into %stack.0, align 16) 3135 STW killed %22, 12, %stack.0 :: (store (s32) into %stack.0 + 12) 3136 STW killed %17, 8, %stack.0 :: (store (s32) into %stack.0 + 8, align 8) 3137 STW killed %12, 4, %stack.0 :: (store (s32) into %stack.0 + 4) 3138 %23 = ADDI8 %stack.0, 0 3139 %24 = LVX $zero8, killed %23 :: (load (s128) from %stack.0) 3140 $v2 = COPY %24 3141 BLR8 implicit $lr8, implicit $rm, implicit $v2 3142 3143... 3144--- 3145name: testLFSX 3146# CHECK-ALL: name: testLFSX 3147alignment: 16 3148exposesReturnsTwice: false 3149legalized: false 3150regBankSelected: false 3151selected: false 3152tracksRegLiveness: true 3153registers: 3154 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3155 - { id: 1, class: g8rc, preferred-register: '' } 3156 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 3157 - { id: 3, class: gprc, preferred-register: '' } 3158 - { id: 4, class: g8rc, preferred-register: '' } 3159 - { id: 5, class: g8rc, preferred-register: '' } 3160 - { id: 6, class: g8rc, preferred-register: '' } 3161 - { id: 7, class: f4rc, preferred-register: '' } 3162 - { id: 8, class: gprc, preferred-register: '' } 3163 - { id: 9, class: g8rc, preferred-register: '' } 3164 - { id: 10, class: g8rc, preferred-register: '' } 3165 - { id: 11, class: g8rc, preferred-register: '' } 3166 - { id: 12, class: f4rc, preferred-register: '' } 3167 - { id: 13, class: f4rc, preferred-register: '' } 3168liveins: 3169 - { reg: '$x3', virtual-reg: '%0' } 3170 - { reg: '$x4', virtual-reg: '%1' } 3171frameInfo: 3172 isFrameAddressTaken: false 3173 isReturnAddressTaken: false 3174 hasStackMap: false 3175 hasPatchPoint: false 3176 stackSize: 0 3177 offsetAdjustment: 0 3178 maxAlignment: 0 3179 adjustsStack: false 3180 hasCalls: false 3181 stackProtector: '' 3182 maxCallFrameSize: 4294967295 3183 hasOpaqueSPAdjustment: false 3184 hasVAStart: false 3185 hasMustTailInVarArgFunc: false 3186 savePoint: '' 3187 restorePoint: '' 3188fixedStack: 3189stack: 3190constants: 3191body: | 3192 bb.0.entry: 3193 liveins: $x3, $x4 3194 3195 %1 = COPY $x4 3196 %0 = COPY $x3 3197 %2 = COPY %1.sub_32 3198 %3 = ADDI %2, 1 3199 %5 = IMPLICIT_DEF 3200 %4 = INSERT_SUBREG %5, killed %3, 1 3201 %6 = LI8 88 3202 %7 = LFSX %0, killed %6 :: (load (s32) from %ir.arrayidx, !tbaa !14) 3203 ; CHECK: LFS 88, %0 3204 ; CHECK-LATE: lfs 0, 88(3) 3205 %8 = ADDI %2, 2 3206 %10 = IMPLICIT_DEF 3207 %9 = INSERT_SUBREG %10, killed %8, 1 3208 %11 = LI8 -88 3209 %12 = LFSX %0, killed %11 :: (load (s32) from %ir.arrayidx3, !tbaa !14) 3210 ; CHECK: LFS -88, %0 3211 ; CHECK-LATE: lfs 1, -88(3) 3212 %13 = FADDS killed %7, killed %12, implicit $rm 3213 $f1 = COPY %13 3214 BLR8 implicit $lr8, implicit $rm, implicit $f1 3215 3216... 3217--- 3218name: testLXSDX 3219# CHECK-ALL: name: testLXSDX 3220alignment: 16 3221exposesReturnsTwice: false 3222legalized: false 3223regBankSelected: false 3224selected: false 3225tracksRegLiveness: true 3226registers: 3227 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3228 - { id: 1, class: g8rc, preferred-register: '' } 3229 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 3230 - { id: 3, class: gprc, preferred-register: '' } 3231 - { id: 4, class: g8rc, preferred-register: '' } 3232 - { id: 5, class: g8rc, preferred-register: '' } 3233 - { id: 6, class: g8rc, preferred-register: '' } 3234 - { id: 7, class: vsfrc, preferred-register: '' } 3235 - { id: 8, class: gprc, preferred-register: '' } 3236 - { id: 9, class: g8rc, preferred-register: '' } 3237 - { id: 10, class: g8rc, preferred-register: '' } 3238 - { id: 11, class: g8rc, preferred-register: '' } 3239 - { id: 12, class: vsfrc, preferred-register: '' } 3240 - { id: 13, class: vsfrc, preferred-register: '' } 3241liveins: 3242 - { reg: '$x3', virtual-reg: '%0' } 3243 - { reg: '$x4', virtual-reg: '%1' } 3244frameInfo: 3245 isFrameAddressTaken: false 3246 isReturnAddressTaken: false 3247 hasStackMap: false 3248 hasPatchPoint: false 3249 stackSize: 0 3250 offsetAdjustment: 0 3251 maxAlignment: 0 3252 adjustsStack: false 3253 hasCalls: false 3254 stackProtector: '' 3255 maxCallFrameSize: 4294967295 3256 hasOpaqueSPAdjustment: false 3257 hasVAStart: false 3258 hasMustTailInVarArgFunc: false 3259 savePoint: '' 3260 restorePoint: '' 3261fixedStack: 3262stack: 3263constants: 3264body: | 3265 bb.0.entry: 3266 liveins: $x3, $x4 3267 3268 %1 = COPY $x4 3269 %0 = COPY $x3 3270 %2 = COPY %1.sub_32 3271 %3 = ADDI %2, 1 3272 %5 = IMPLICIT_DEF 3273 %4 = INSERT_SUBREG %5, killed %3, 1 3274 %6 = LI8 100 3275 %7 = LXSDX %0, killed %6, implicit $rm :: (load (s64) from %ir.arrayidx, !tbaa !12) 3276 ; CHECK: DFLOADf64 100, %0 3277 ; CHECK-LATE: lfd 0, 100(3) 3278 %8 = ADDI %2, 2 3279 %10 = IMPLICIT_DEF 3280 %9 = INSERT_SUBREG %10, killed %8, 1 3281 %11 = LI8 -120 3282 %12 = LXSDX %0, killed %11, implicit $rm :: (load (s64) from %ir.arrayidx3, !tbaa !12) 3283 ; CHECK: DFLOADf64 -120, %0 3284 ; CHECK-LATE: lfd 1, -120(3) 3285 %13 = XSADDDP killed %7, killed %12, implicit $rm 3286 $f1 = COPY %13 3287 BLR8 implicit $lr8, implicit $rm, implicit $f1 3288 3289... 3290--- 3291name: testLXSSPX 3292# CHECK-ALL: name: testLXSSPX 3293alignment: 16 3294exposesReturnsTwice: false 3295legalized: false 3296regBankSelected: false 3297selected: false 3298tracksRegLiveness: true 3299registers: 3300 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3301 - { id: 1, class: g8rc, preferred-register: '' } 3302 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 3303 - { id: 3, class: gprc, preferred-register: '' } 3304 - { id: 4, class: g8rc, preferred-register: '' } 3305 - { id: 5, class: g8rc, preferred-register: '' } 3306 - { id: 6, class: g8rc, preferred-register: '' } 3307 - { id: 7, class: vssrc, preferred-register: '' } 3308 - { id: 8, class: gprc, preferred-register: '' } 3309 - { id: 9, class: g8rc, preferred-register: '' } 3310 - { id: 10, class: g8rc, preferred-register: '' } 3311 - { id: 11, class: g8rc, preferred-register: '' } 3312 - { id: 12, class: vssrc, preferred-register: '' } 3313 - { id: 13, class: vssrc, preferred-register: '' } 3314liveins: 3315 - { reg: '$x3', virtual-reg: '%0' } 3316 - { reg: '$x4', virtual-reg: '%1' } 3317frameInfo: 3318 isFrameAddressTaken: false 3319 isReturnAddressTaken: false 3320 hasStackMap: false 3321 hasPatchPoint: false 3322 stackSize: 0 3323 offsetAdjustment: 0 3324 maxAlignment: 0 3325 adjustsStack: false 3326 hasCalls: false 3327 stackProtector: '' 3328 maxCallFrameSize: 4294967295 3329 hasOpaqueSPAdjustment: false 3330 hasVAStart: false 3331 hasMustTailInVarArgFunc: false 3332 savePoint: '' 3333 restorePoint: '' 3334fixedStack: 3335stack: 3336constants: 3337body: | 3338 bb.0.entry: 3339 liveins: $x3, $x4 3340 3341 %1 = COPY $x4 3342 %0 = COPY $x3 3343 %2 = COPY %1.sub_32 3344 %3 = ADDI %2, 1 3345 %5 = IMPLICIT_DEF 3346 %4 = INSERT_SUBREG %5, killed %3, 1 3347 %6 = LI8 96 3348 %7 = LXSSPX %0, killed %6 :: (load (s32) from %ir.arrayidx, !tbaa !14) 3349 ; CHECK: DFLOADf32 96, %0 3350 ; CHECK-LATE: lfs 0, 96(3) 3351 %8 = ADDI %2, 2 3352 %10 = IMPLICIT_DEF 3353 %9 = INSERT_SUBREG %10, killed %8, 1 3354 %11 = LI8 -92 3355 %12 = LXSSPX %0, killed %11 :: (load (s32) from %ir.arrayidx3, !tbaa !14) 3356 ; CHECK: DFLOADf32 -92, %0 3357 ; CHECK-LATE: lfs 1, -92(3) 3358 %13 = XSADDSP killed %7, killed %12 3359 $f1 = COPY %13 3360 BLR8 implicit $lr8, implicit $rm, implicit $f1 3361 3362... 3363--- 3364name: testLXVX 3365# CHECK-ALL: name: testLXVX 3366alignment: 16 3367exposesReturnsTwice: false 3368legalized: false 3369regBankSelected: false 3370selected: false 3371tracksRegLiveness: true 3372registers: 3373 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3374 - { id: 1, class: g8rc, preferred-register: '' } 3375 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 3376 - { id: 3, class: gprc, preferred-register: '' } 3377 - { id: 4, class: g8rc, preferred-register: '' } 3378 - { id: 5, class: g8rc, preferred-register: '' } 3379 - { id: 6, class: g8rc, preferred-register: '' } 3380 - { id: 7, class: vrrc, preferred-register: '' } 3381 - { id: 8, class: gprc, preferred-register: '' } 3382 - { id: 9, class: g8rc, preferred-register: '' } 3383 - { id: 10, class: g8rc, preferred-register: '' } 3384 - { id: 11, class: g8rc, preferred-register: '' } 3385 - { id: 12, class: vrrc, preferred-register: '' } 3386 - { id: 13, class: vrrc, preferred-register: '' } 3387liveins: 3388 - { reg: '$x3', virtual-reg: '%0' } 3389 - { reg: '$x4', virtual-reg: '%1' } 3390frameInfo: 3391 isFrameAddressTaken: false 3392 isReturnAddressTaken: false 3393 hasStackMap: false 3394 hasPatchPoint: false 3395 stackSize: 0 3396 offsetAdjustment: 0 3397 maxAlignment: 0 3398 adjustsStack: false 3399 hasCalls: false 3400 stackProtector: '' 3401 maxCallFrameSize: 4294967295 3402 hasOpaqueSPAdjustment: false 3403 hasVAStart: false 3404 hasMustTailInVarArgFunc: false 3405 savePoint: '' 3406 restorePoint: '' 3407fixedStack: 3408stack: 3409constants: 3410body: | 3411 bb.0.entry: 3412 liveins: $x3, $x4 3413 3414 %1 = COPY $x4 3415 %0 = COPY $x3 3416 %2 = COPY %1.sub_32 3417 %3 = ADDI %2, 1 3418 %5 = IMPLICIT_DEF 3419 %4 = INSERT_SUBREG %5, killed %3, 1 3420 %6 = LI8 32 3421 %7 = LXVX %0, killed %6 :: (load (s128) from %ir.arrayidx, !tbaa !3) 3422 ; CHECK: LXV 32, %0 3423 ; CHECK-LATE: lxv 34, 32(3) 3424 %8 = ADDI %2, 2 3425 %10 = IMPLICIT_DEF 3426 %9 = INSERT_SUBREG %10, killed %8, 1 3427 %11 = LI8 -16 3428 %12 = LXVX %0, killed %11 :: (load (s128) from %ir.arrayidx3, !tbaa !3) 3429 ; CHECK: LXV -16, %0 3430 ; CHECK-LATE: lxv 35, -16(3) 3431 %13 = VADDUWM killed %12, killed %7 3432 $v2 = COPY %13 3433 BLR8 implicit $lr8, implicit $rm, implicit $v2 3434 3435... 3436--- 3437name: testOR 3438# CHECK-ALL: name: testOR 3439alignment: 16 3440exposesReturnsTwice: false 3441legalized: false 3442regBankSelected: false 3443selected: false 3444tracksRegLiveness: true 3445registers: 3446 - { id: 0, class: gprc, preferred-register: '' } 3447 - { id: 1, class: g8rc, preferred-register: '' } 3448 - { id: 2, class: gprc, preferred-register: '' } 3449 - { id: 3, class: gprc, preferred-register: '' } 3450liveins: 3451 - { reg: '$x3', virtual-reg: '%0' } 3452 - { reg: '$x4', virtual-reg: '%1' } 3453frameInfo: 3454 isFrameAddressTaken: false 3455 isReturnAddressTaken: false 3456 hasStackMap: false 3457 hasPatchPoint: false 3458 stackSize: 0 3459 offsetAdjustment: 0 3460 maxAlignment: 0 3461 adjustsStack: false 3462 hasCalls: false 3463 stackProtector: '' 3464 maxCallFrameSize: 4294967295 3465 hasOpaqueSPAdjustment: false 3466 hasVAStart: false 3467 hasMustTailInVarArgFunc: false 3468 savePoint: '' 3469 restorePoint: '' 3470fixedStack: 3471stack: 3472constants: 3473body: | 3474 bb.0.entry: 3475 liveins: $x3, $x4 3476 3477 %1 = COPY $x4 3478 %0 = LI 99 3479 %3 = COPY %1.sub_32 3480 %2 = OR %0, %3 3481 ; CHECK: ORI %3, 99 3482 ; CHECK-LATE: ori 3, 4, 99 3483 $x3 = EXTSW_32_64 %2 3484 BLR8 implicit $lr8, implicit $rm, implicit $x3 3485 3486... 3487--- 3488name: testOR8 3489# CHECK-ALL: name: testOR8 3490alignment: 16 3491exposesReturnsTwice: false 3492legalized: false 3493regBankSelected: false 3494selected: false 3495tracksRegLiveness: true 3496registers: 3497 - { id: 0, class: g8rc, preferred-register: '' } 3498 - { id: 1, class: g8rc, preferred-register: '' } 3499 - { id: 2, class: g8rc, preferred-register: '' } 3500liveins: 3501 - { reg: '$x3', virtual-reg: '%0' } 3502 - { reg: '$x4', virtual-reg: '%1' } 3503frameInfo: 3504 isFrameAddressTaken: false 3505 isReturnAddressTaken: false 3506 hasStackMap: false 3507 hasPatchPoint: false 3508 stackSize: 0 3509 offsetAdjustment: 0 3510 maxAlignment: 0 3511 adjustsStack: false 3512 hasCalls: false 3513 stackProtector: '' 3514 maxCallFrameSize: 4294967295 3515 hasOpaqueSPAdjustment: false 3516 hasVAStart: false 3517 hasMustTailInVarArgFunc: false 3518 savePoint: '' 3519 restorePoint: '' 3520fixedStack: 3521stack: 3522constants: 3523body: | 3524 bb.0.entry: 3525 liveins: $x3, $x4 3526 3527 %1 = COPY $x4 3528 %0 = LI8 777 3529 %2 = OR8 %1, %0 3530 ; CHECK: ORI8 %1, 777 3531 ; CHECK-LATE: ori 3, 4, 777 3532 $x3 = COPY %2 3533 BLR8 implicit $lr8, implicit $rm, implicit $x3 3534 3535... 3536--- 3537name: testORI 3538# CHECK-ALL: name: testORI 3539alignment: 16 3540exposesReturnsTwice: false 3541legalized: false 3542regBankSelected: false 3543selected: false 3544tracksRegLiveness: true 3545registers: 3546 - { id: 0, class: gprc, preferred-register: '' } 3547 - { id: 1, class: gprc, preferred-register: '' } 3548liveins: 3549 - { reg: '$x3', virtual-reg: '%0' } 3550frameInfo: 3551 isFrameAddressTaken: false 3552 isReturnAddressTaken: false 3553 hasStackMap: false 3554 hasPatchPoint: false 3555 stackSize: 0 3556 offsetAdjustment: 0 3557 maxAlignment: 0 3558 adjustsStack: false 3559 hasCalls: false 3560 stackProtector: '' 3561 maxCallFrameSize: 4294967295 3562 hasOpaqueSPAdjustment: false 3563 hasVAStart: false 3564 hasMustTailInVarArgFunc: false 3565 savePoint: '' 3566 restorePoint: '' 3567fixedStack: 3568stack: 3569constants: 3570body: | 3571 bb.0.entry: 3572 liveins: $x3 3573 3574 %0 = LI 777 3575 %1 = ORI %0, 88 3576 ; CHECK: LI 857 3577 ; CHECK-LATE: li 3, 857 3578 $x3 = EXTSW_32_64 %1 3579 BLR8 implicit $lr8, implicit $rm, implicit $x3 3580 3581... 3582--- 3583name: testORI8 3584# CHECK-ALL: name: testORI8 3585alignment: 16 3586exposesReturnsTwice: false 3587legalized: false 3588regBankSelected: false 3589selected: false 3590tracksRegLiveness: true 3591registers: 3592 - { id: 0, class: g8rc, preferred-register: '' } 3593 - { id: 1, class: g8rc, preferred-register: '' } 3594liveins: 3595 - { reg: '$x3', virtual-reg: '%0' } 3596frameInfo: 3597 isFrameAddressTaken: false 3598 isReturnAddressTaken: false 3599 hasStackMap: false 3600 hasPatchPoint: false 3601 stackSize: 0 3602 offsetAdjustment: 0 3603 maxAlignment: 0 3604 adjustsStack: false 3605 hasCalls: false 3606 stackProtector: '' 3607 maxCallFrameSize: 4294967295 3608 hasOpaqueSPAdjustment: false 3609 hasVAStart: false 3610 hasMustTailInVarArgFunc: false 3611 savePoint: '' 3612 restorePoint: '' 3613fixedStack: 3614stack: 3615constants: 3616body: | 3617 bb.0.entry: 3618 liveins: $x3 3619 3620 %0 = LI8 8721 3621 %1 = ORI8 %0, 99 3622 ; CHECK: LI8 8819 3623 ; CHECK-LATE: li 3, 8819 3624 $x3 = COPY %1 3625 BLR8 implicit $lr8, implicit $rm, implicit $x3 3626 3627... 3628--- 3629name: testRLDCL 3630# CHECK-ALL: name: testRLDCL 3631alignment: 16 3632exposesReturnsTwice: false 3633legalized: false 3634regBankSelected: false 3635selected: false 3636tracksRegLiveness: true 3637registers: 3638 - { id: 0, class: g8rc, preferred-register: '' } 3639 - { id: 1, class: g8rc, preferred-register: '' } 3640 - { id: 2, class: gprc, preferred-register: '' } 3641 - { id: 3, class: gprc, preferred-register: '' } 3642 - { id: 4, class: g8rc, preferred-register: '' } 3643liveins: 3644 - { reg: '$x3', virtual-reg: '%0' } 3645 - { reg: '$x4', virtual-reg: '%1' } 3646frameInfo: 3647 isFrameAddressTaken: false 3648 isReturnAddressTaken: false 3649 hasStackMap: false 3650 hasPatchPoint: false 3651 stackSize: 0 3652 offsetAdjustment: 0 3653 maxAlignment: 0 3654 adjustsStack: false 3655 hasCalls: false 3656 stackProtector: '' 3657 maxCallFrameSize: 4294967295 3658 hasOpaqueSPAdjustment: false 3659 hasVAStart: false 3660 hasMustTailInVarArgFunc: false 3661 savePoint: '' 3662 restorePoint: '' 3663fixedStack: 3664stack: 3665constants: 3666body: | 3667 bb.0.entry: 3668 liveins: $x3, $x4 3669 3670 %1 = COPY $x4 3671 %0 = COPY $x3 3672 %2 = COPY %1.sub_32 3673 %3 = LI 14 3674 %4 = RLDCL %0, killed %3, 0 3675 ; CHECK: RLDICL %0, 14, 0 3676 ; CHECK-LATE: rotldi 3, 3, 14 3677 $x3 = COPY %4 3678 BLR8 implicit $lr8, implicit $rm, implicit $x3 3679 3680... 3681--- 3682name: testRLDCL_rec 3683# CHECK-ALL: name: testRLDCL_rec 3684alignment: 16 3685exposesReturnsTwice: false 3686legalized: false 3687regBankSelected: false 3688selected: false 3689tracksRegLiveness: true 3690registers: 3691 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3692 - { id: 1, class: g8rc, preferred-register: '' } 3693 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3694 - { id: 3, class: gprc, preferred-register: '' } 3695 - { id: 4, class: g8rc, preferred-register: '' } 3696 - { id: 5, class: crrc, preferred-register: '' } 3697 - { id: 6, class: g8rc, preferred-register: '' } 3698liveins: 3699 - { reg: '$x3', virtual-reg: '%0' } 3700 - { reg: '$x4', virtual-reg: '%1' } 3701frameInfo: 3702 isFrameAddressTaken: false 3703 isReturnAddressTaken: false 3704 hasStackMap: false 3705 hasPatchPoint: false 3706 stackSize: 0 3707 offsetAdjustment: 0 3708 maxAlignment: 0 3709 adjustsStack: false 3710 hasCalls: false 3711 stackProtector: '' 3712 maxCallFrameSize: 4294967295 3713 hasOpaqueSPAdjustment: false 3714 hasVAStart: false 3715 hasMustTailInVarArgFunc: false 3716 savePoint: '' 3717 restorePoint: '' 3718fixedStack: 3719stack: 3720constants: 3721body: | 3722 bb.0.entry: 3723 liveins: $x3, $x4 3724 3725 %1 = COPY $x4 3726 %0 = COPY $x3 3727 %2 = RLDICL %1, 0, 58 3728 %3 = LI 37 3729 %4 = RLDCL_rec %0, killed %3, 0, implicit-def $cr0 3730 ; CHECK: RLDICL_rec %0, 37, 0, implicit-def $cr0 3731 ; CHECK-LATE: rotldi. 5, 3, 37 3732 %5 = COPY killed $cr0 3733 %6 = ISEL8 %2, %0, %5.sub_eq 3734 $x3 = COPY %6 3735 BLR8 implicit $lr8, implicit $rm, implicit $x3 3736 3737... 3738--- 3739name: testRLDCR 3740# CHECK-ALL: name: testRLDCR 3741alignment: 16 3742exposesReturnsTwice: false 3743legalized: false 3744regBankSelected: false 3745selected: false 3746tracksRegLiveness: true 3747registers: 3748 - { id: 0, class: g8rc, preferred-register: '' } 3749 - { id: 1, class: g8rc, preferred-register: '' } 3750 - { id: 2, class: gprc, preferred-register: '' } 3751 - { id: 3, class: gprc, preferred-register: '' } 3752 - { id: 4, class: g8rc, preferred-register: '' } 3753liveins: 3754 - { reg: '$x3', virtual-reg: '%0' } 3755 - { reg: '$x4', virtual-reg: '%1' } 3756frameInfo: 3757 isFrameAddressTaken: false 3758 isReturnAddressTaken: false 3759 hasStackMap: false 3760 hasPatchPoint: false 3761 stackSize: 0 3762 offsetAdjustment: 0 3763 maxAlignment: 0 3764 adjustsStack: false 3765 hasCalls: false 3766 stackProtector: '' 3767 maxCallFrameSize: 4294967295 3768 hasOpaqueSPAdjustment: false 3769 hasVAStart: false 3770 hasMustTailInVarArgFunc: false 3771 savePoint: '' 3772 restorePoint: '' 3773fixedStack: 3774stack: 3775constants: 3776body: | 3777 bb.0.entry: 3778 liveins: $x3, $x4 3779 3780 %1 = COPY $x4 3781 %0 = COPY $x3 3782 %2 = COPY %1.sub_32 3783 %3 = LI 0 3784 %4 = RLDCR %0, killed %3, 0 3785 ; CHECK: RLDICR %0, 0, 0 3786 ; CHECK-LATE: rldicr 3, 3, 0, 0 3787 $x3 = COPY %4 3788 BLR8 implicit $lr8, implicit $rm, implicit $x3 3789 3790... 3791--- 3792name: testRLDCR_rec 3793# CHECK-ALL: name: testRLDCR_rec 3794alignment: 16 3795exposesReturnsTwice: false 3796legalized: false 3797regBankSelected: false 3798selected: false 3799tracksRegLiveness: true 3800registers: 3801 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3802 - { id: 1, class: g8rc, preferred-register: '' } 3803 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3804 - { id: 3, class: gprc, preferred-register: '' } 3805 - { id: 4, class: g8rc, preferred-register: '' } 3806 - { id: 5, class: crrc, preferred-register: '' } 3807 - { id: 6, class: g8rc, preferred-register: '' } 3808liveins: 3809 - { reg: '$x3', virtual-reg: '%0' } 3810 - { reg: '$x4', virtual-reg: '%1' } 3811frameInfo: 3812 isFrameAddressTaken: false 3813 isReturnAddressTaken: false 3814 hasStackMap: false 3815 hasPatchPoint: false 3816 stackSize: 0 3817 offsetAdjustment: 0 3818 maxAlignment: 0 3819 adjustsStack: false 3820 hasCalls: false 3821 stackProtector: '' 3822 maxCallFrameSize: 4294967295 3823 hasOpaqueSPAdjustment: false 3824 hasVAStart: false 3825 hasMustTailInVarArgFunc: false 3826 savePoint: '' 3827 restorePoint: '' 3828fixedStack: 3829stack: 3830constants: 3831body: | 3832 bb.0.entry: 3833 liveins: $x3, $x4 3834 3835 %1 = COPY $x4 3836 %0 = COPY $x3 3837 %2 = RLDICL %1, 0, 58 3838 %3 = LI 18 3839 %4 = RLDCR_rec %0, killed %3, 0, implicit-def $cr0 3840 ; CHECK: RLDICR_rec %0, 18, 0, implicit-def $cr0 3841 ; CHECK-LATE: rldicr. 5, 3, 18, 0 3842 %5 = COPY killed $cr0 3843 %6 = ISEL8 %2, %0, %5.sub_eq 3844 $x3 = COPY %6 3845 BLR8 implicit $lr8, implicit $rm, implicit $x3 3846 3847... 3848--- 3849name: testRLDICL 3850# CHECK-ALL: name: testRLDICL 3851alignment: 16 3852exposesReturnsTwice: false 3853legalized: false 3854regBankSelected: false 3855selected: false 3856tracksRegLiveness: true 3857registers: 3858 - { id: 0, class: g8rc, preferred-register: '' } 3859 - { id: 1, class: g8rc, preferred-register: '' } 3860liveins: 3861 - { reg: '$x3', virtual-reg: '%0' } 3862frameInfo: 3863 isFrameAddressTaken: false 3864 isReturnAddressTaken: false 3865 hasStackMap: false 3866 hasPatchPoint: false 3867 stackSize: 0 3868 offsetAdjustment: 0 3869 maxAlignment: 0 3870 adjustsStack: false 3871 hasCalls: false 3872 stackProtector: '' 3873 maxCallFrameSize: 4294967295 3874 hasOpaqueSPAdjustment: false 3875 hasVAStart: false 3876 hasMustTailInVarArgFunc: false 3877 savePoint: '' 3878 restorePoint: '' 3879fixedStack: 3880stack: 3881constants: 3882body: | 3883 bb.0.entry: 3884 liveins: $x3 3885 3886 %0 = LI8 -1 3887 %1 = RLDICL %0, 53, 49 3888 ; CHECK: LI8 32767 3889 ; CHECK-LATE: li 3, 32767 3890 $x3 = COPY %1 3891 BLR8 implicit $lr8, implicit $rm, implicit $x3 3892 3893... 3894--- 3895name: testRLDICL_MB0 3896# CHECK-ALL: name: testRLDICL_MB0 3897alignment: 16 3898exposesReturnsTwice: false 3899legalized: false 3900regBankSelected: false 3901selected: false 3902tracksRegLiveness: true 3903registers: 3904 - { id: 0, class: g8rc, preferred-register: '' } 3905 - { id: 1, class: g8rc, preferred-register: '' } 3906liveins: 3907 - { reg: '$x3', virtual-reg: '%0' } 3908frameInfo: 3909 isFrameAddressTaken: false 3910 isReturnAddressTaken: false 3911 hasStackMap: false 3912 hasPatchPoint: false 3913 stackSize: 0 3914 offsetAdjustment: 0 3915 maxAlignment: 0 3916 adjustsStack: false 3917 hasCalls: false 3918 stackProtector: '' 3919 maxCallFrameSize: 4294967295 3920 hasOpaqueSPAdjustment: false 3921 hasVAStart: false 3922 hasMustTailInVarArgFunc: false 3923 savePoint: '' 3924 restorePoint: '' 3925fixedStack: 3926stack: 3927constants: 3928body: | 3929 bb.0.entry: 3930 liveins: $x3 3931 3932 %0 = LI8 32 3933 %1 = RLDICL %0, 60, 0 3934 ; CHECK: LI8 2 3935 ; CHECK-LATE: li 3, 2 3936 $x3 = COPY %1 3937 BLR8 implicit $lr8, implicit $rm, implicit $x3 3938 3939... 3940--- 3941name: testRLDICL_rec 3942# CHECK-ALL: name: testRLDICL_rec 3943alignment: 16 3944exposesReturnsTwice: false 3945legalized: false 3946regBankSelected: false 3947selected: false 3948tracksRegLiveness: true 3949registers: 3950 - { id: 0, class: g8rc, preferred-register: '' } 3951 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3952 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 3953 - { id: 3, class: crrc, preferred-register: '' } 3954 - { id: 4, class: g8rc, preferred-register: '' } 3955liveins: 3956 - { reg: '$x3', virtual-reg: '%0' } 3957 - { reg: '$x4', virtual-reg: '%1' } 3958frameInfo: 3959 isFrameAddressTaken: false 3960 isReturnAddressTaken: false 3961 hasStackMap: false 3962 hasPatchPoint: false 3963 stackSize: 0 3964 offsetAdjustment: 0 3965 maxAlignment: 0 3966 adjustsStack: false 3967 hasCalls: false 3968 stackProtector: '' 3969 maxCallFrameSize: 4294967295 3970 hasOpaqueSPAdjustment: false 3971 hasVAStart: false 3972 hasMustTailInVarArgFunc: false 3973 savePoint: '' 3974 restorePoint: '' 3975fixedStack: 3976stack: 3977constants: 3978body: | 3979 bb.0.entry: 3980 liveins: $x3, $x4 3981 3982 %1 = COPY $x4 3983 %0 = LI8 -1 3984 %2 = RLDICL_rec %0, 53, 48, implicit-def $cr0 3985 ; CHECK: ANDI8_rec %0, 65535 3986 ; CHECK-LATE: li 3, -1 3987 ; CHECK-LATE: andi. 3, 3, 65535 3988 %3 = COPY killed $cr0 3989 %4 = ISEL8 %1, %2, %3.sub_eq 3990 $x3 = COPY %4 3991 BLR8 implicit $lr8, implicit $rm, implicit $x3 3992 3993... 3994--- 3995name: testRLDICL_rec2 3996# CHECK-ALL: name: testRLDICL_rec2 3997alignment: 16 3998exposesReturnsTwice: false 3999legalized: false 4000regBankSelected: false 4001selected: false 4002tracksRegLiveness: true 4003registers: 4004 - { id: 0, class: g8rc, preferred-register: '' } 4005 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4006 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4007 - { id: 3, class: crrc, preferred-register: '' } 4008 - { id: 4, class: g8rc, preferred-register: '' } 4009liveins: 4010 - { reg: '$x3', virtual-reg: '%0' } 4011 - { reg: '$x4', virtual-reg: '%1' } 4012frameInfo: 4013 isFrameAddressTaken: false 4014 isReturnAddressTaken: false 4015 hasStackMap: false 4016 hasPatchPoint: false 4017 stackSize: 0 4018 offsetAdjustment: 0 4019 maxAlignment: 0 4020 adjustsStack: false 4021 hasCalls: false 4022 stackProtector: '' 4023 maxCallFrameSize: 4294967295 4024 hasOpaqueSPAdjustment: false 4025 hasVAStart: false 4026 hasMustTailInVarArgFunc: false 4027 savePoint: '' 4028 restorePoint: '' 4029fixedStack: 4030stack: 4031constants: 4032body: | 4033 bb.0.entry: 4034 liveins: $x3, $x4 4035 4036 %1 = COPY $x4 4037 %0 = LI8 200 4038 %2 = RLDICL_rec %0, 61, 3, implicit-def $cr0 4039 ; CHECK: LI8 25 4040 ; CHECK: ANDI8_rec %0, 25 4041 ; CHECK-LATE-NOT: andi. 4042 %3 = COPY killed $cr0 4043 %4 = ISEL8 %1, %2, %3.sub_eq 4044 $x3 = COPY %4 4045 BLR8 implicit $lr8, implicit $rm, implicit $x3 4046 4047... 4048--- 4049name: testRLDICL_rec3 4050# CHECK-ALL: name: testRLDICL_rec3 4051alignment: 16 4052exposesReturnsTwice: false 4053legalized: false 4054regBankSelected: false 4055selected: false 4056tracksRegLiveness: true 4057registers: 4058 - { id: 0, class: g8rc, preferred-register: '' } 4059 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4060 - { id: 2, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4061 - { id: 3, class: crrc, preferred-register: '' } 4062 - { id: 4, class: g8rc, preferred-register: '' } 4063liveins: 4064 - { reg: '$x3', virtual-reg: '%0' } 4065 - { reg: '$x4', virtual-reg: '%1' } 4066frameInfo: 4067 isFrameAddressTaken: false 4068 isReturnAddressTaken: false 4069 hasStackMap: false 4070 hasPatchPoint: false 4071 stackSize: 0 4072 offsetAdjustment: 0 4073 maxAlignment: 0 4074 adjustsStack: false 4075 hasCalls: false 4076 stackProtector: '' 4077 maxCallFrameSize: 4294967295 4078 hasOpaqueSPAdjustment: false 4079 hasVAStart: false 4080 hasMustTailInVarArgFunc: false 4081 savePoint: '' 4082 restorePoint: '' 4083fixedStack: 4084stack: 4085constants: 4086body: | 4087 bb.0.entry: 4088 liveins: $x3, $x4 4089 4090 %1 = COPY $x4 4091 %0 = LI8 2 4092 %2 = RLDICL_rec %0, 32, 32, implicit-def $cr0 4093 ; CHECK: ANDI8_rec %0, 0 4094 ; CHECK-LATE: li 3, 2 4095 ; CHECK-LATE: andi. 3, 3, 0 4096 %3 = COPY killed $cr0 4097 %4 = ISEL8 %1, %2, %3.sub_eq 4098 $x3 = COPY %4 4099 BLR8 implicit $lr8, implicit $rm, implicit $x3 4100 4101... 4102--- 4103name: testRLWINM 4104# CHECK-ALL: name: testRLWINM 4105alignment: 16 4106exposesReturnsTwice: false 4107legalized: false 4108regBankSelected: false 4109selected: false 4110tracksRegLiveness: true 4111registers: 4112 - { id: 0, class: g8rc, preferred-register: '' } 4113 - { id: 1, class: gprc, preferred-register: '' } 4114 - { id: 2, class: gprc, preferred-register: '' } 4115 - { id: 3, class: g8rc, preferred-register: '' } 4116 - { id: 4, class: gprc, preferred-register: '' } 4117liveins: 4118 - { reg: '$x3', virtual-reg: '%0' } 4119frameInfo: 4120 isFrameAddressTaken: false 4121 isReturnAddressTaken: false 4122 hasStackMap: false 4123 hasPatchPoint: false 4124 stackSize: 0 4125 offsetAdjustment: 0 4126 maxAlignment: 0 4127 adjustsStack: false 4128 hasCalls: false 4129 stackProtector: '' 4130 maxCallFrameSize: 4294967295 4131 hasOpaqueSPAdjustment: false 4132 hasVAStart: false 4133 hasMustTailInVarArgFunc: false 4134 savePoint: '' 4135 restorePoint: '' 4136fixedStack: 4137stack: 4138constants: 4139body: | 4140 bb.0.entry: 4141 liveins: $x3 4142 4143 %0 = COPY $x3 4144 %1 = COPY %0.sub_32 4145 %3 = IMPLICIT_DEF 4146 %2 = LI 17 4147 %4 = RLWINM killed %2, 4, 20, 27 4148 ; CHECK: LI 272 4149 ; CHECK-LATE: li 3, 272 4150 $x3 = EXTSW_32_64 %4 4151 BLR8 implicit $lr8, implicit $rm, implicit $x3 4152 4153... 4154--- 4155name: testRLWINMFullReg 4156# CHECK-ALL: name: testRLWINMFullReg 4157alignment: 16 4158exposesReturnsTwice: false 4159legalized: false 4160regBankSelected: false 4161selected: false 4162tracksRegLiveness: true 4163registers: 4164 - { id: 0, class: g8rc, preferred-register: '' } 4165 - { id: 1, class: gprc, preferred-register: '' } 4166 - { id: 2, class: gprc, preferred-register: '' } 4167 - { id: 3, class: g8rc, preferred-register: '' } 4168 - { id: 4, class: gprc, preferred-register: '' } 4169liveins: 4170 - { reg: '$x3', virtual-reg: '%0' } 4171frameInfo: 4172 isFrameAddressTaken: false 4173 isReturnAddressTaken: false 4174 hasStackMap: false 4175 hasPatchPoint: false 4176 stackSize: 0 4177 offsetAdjustment: 0 4178 maxAlignment: 0 4179 adjustsStack: false 4180 hasCalls: false 4181 stackProtector: '' 4182 maxCallFrameSize: 4294967295 4183 hasOpaqueSPAdjustment: false 4184 hasVAStart: false 4185 hasMustTailInVarArgFunc: false 4186 savePoint: '' 4187 restorePoint: '' 4188fixedStack: 4189stack: 4190constants: 4191body: | 4192 bb.0.entry: 4193 liveins: $x3 4194 4195 %0 = COPY $x3 4196 %1 = COPY %0.sub_32 4197 %3 = IMPLICIT_DEF 4198 %2 = LI 2 4199 %4 = RLWINM killed %2, 31, 0, 31 4200 ; CHECK: LI 1 4201 ; CHECK-LATE: li 3, 1 4202 $x3 = EXTSW_32_64 %4 4203 BLR8 implicit $lr8, implicit $rm, implicit $x3 4204 4205... 4206--- 4207name: testRLWINMFullRegOutOfRange 4208# CHECK-ALL: name: testRLWINMFullRegOutOfRange 4209alignment: 16 4210exposesReturnsTwice: false 4211legalized: false 4212regBankSelected: false 4213selected: false 4214tracksRegLiveness: true 4215registers: 4216 - { id: 0, class: g8rc, preferred-register: '' } 4217 - { id: 1, class: gprc, preferred-register: '' } 4218 - { id: 2, class: gprc, preferred-register: '' } 4219 - { id: 3, class: g8rc, preferred-register: '' } 4220 - { id: 4, class: gprc, preferred-register: '' } 4221liveins: 4222 - { reg: '$x3', virtual-reg: '%0' } 4223frameInfo: 4224 isFrameAddressTaken: false 4225 isReturnAddressTaken: false 4226 hasStackMap: false 4227 hasPatchPoint: false 4228 stackSize: 0 4229 offsetAdjustment: 0 4230 maxAlignment: 0 4231 adjustsStack: false 4232 hasCalls: false 4233 stackProtector: '' 4234 maxCallFrameSize: 4294967295 4235 hasOpaqueSPAdjustment: false 4236 hasVAStart: false 4237 hasMustTailInVarArgFunc: false 4238 savePoint: '' 4239 restorePoint: '' 4240fixedStack: 4241stack: 4242constants: 4243body: | 4244 bb.0.entry: 4245 liveins: $x3 4246 4247 %0 = COPY $x3 4248 %1 = COPY %0.sub_32 4249 %3 = IMPLICIT_DEF 4250 %2 = LI 1 4251 %4 = RLWINM killed %2, 31, 0, 31 4252 ; CHECK: RLWINM killed %2, 31, 0, 31 4253 ; CHECK-LATE: rotlwi 3, 3, 31 4254 $x3 = EXTSW_32_64 %4 4255 BLR8 implicit $lr8, implicit $rm, implicit $x3 4256 4257... 4258--- 4259name: testRLWINM8 4260# CHECK-ALL: name: testRLWINM8 4261alignment: 16 4262exposesReturnsTwice: false 4263legalized: false 4264regBankSelected: false 4265selected: false 4266tracksRegLiveness: true 4267registers: 4268 - { id: 0, class: g8rc, preferred-register: '' } 4269 - { id: 1, class: g8rc, preferred-register: '' } 4270liveins: 4271 - { reg: '$x3', virtual-reg: '%0' } 4272frameInfo: 4273 isFrameAddressTaken: false 4274 isReturnAddressTaken: false 4275 hasStackMap: false 4276 hasPatchPoint: false 4277 stackSize: 0 4278 offsetAdjustment: 0 4279 maxAlignment: 0 4280 adjustsStack: false 4281 hasCalls: false 4282 stackProtector: '' 4283 maxCallFrameSize: 4294967295 4284 hasOpaqueSPAdjustment: false 4285 hasVAStart: false 4286 hasMustTailInVarArgFunc: false 4287 savePoint: '' 4288 restorePoint: '' 4289fixedStack: 4290stack: 4291constants: 4292body: | 4293 bb.0.entry: 4294 liveins: $x3 4295 4296 %0 = LI8 234 4297 %1 = RLWINM8 %0, 4, 20, 27 4298 ; CHECK: LI8 3744 4299 ; CHECK-LATE: li 3, 3744 4300 $x3 = COPY %1 4301 BLR8 implicit $lr8, implicit $rm, implicit $x3 4302 4303... 4304--- 4305name: testRLWINM_rec 4306# CHECK-ALL: name: testRLWINM_rec 4307alignment: 16 4308exposesReturnsTwice: false 4309legalized: false 4310regBankSelected: false 4311selected: false 4312tracksRegLiveness: true 4313registers: 4314 - { id: 0, class: g8rc, preferred-register: '' } 4315 - { id: 1, class: g8rc, preferred-register: '' } 4316 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 4317 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 4318 - { id: 4, class: gprc, preferred-register: '' } 4319 - { id: 5, class: crrc, preferred-register: '' } 4320 - { id: 6, class: gprc, preferred-register: '' } 4321 - { id: 7, class: g8rc, preferred-register: '' } 4322 - { id: 8, class: g8rc, preferred-register: '' } 4323 - { id: 9, class: g8rc, preferred-register: '' } 4324liveins: 4325 - { reg: '$x3', virtual-reg: '%0' } 4326 - { reg: '$x4', virtual-reg: '%1' } 4327frameInfo: 4328 isFrameAddressTaken: false 4329 isReturnAddressTaken: false 4330 hasStackMap: false 4331 hasPatchPoint: false 4332 stackSize: 0 4333 offsetAdjustment: 0 4334 maxAlignment: 0 4335 adjustsStack: false 4336 hasCalls: false 4337 stackProtector: '' 4338 maxCallFrameSize: 4294967295 4339 hasOpaqueSPAdjustment: false 4340 hasVAStart: false 4341 hasMustTailInVarArgFunc: false 4342 savePoint: '' 4343 restorePoint: '' 4344fixedStack: 4345stack: 4346constants: 4347body: | 4348 bb.0.entry: 4349 liveins: $x3, $x4 4350 4351 %1 = COPY $x4 4352 %0 = COPY $x3 4353 %2 = COPY %1.sub_32 4354 %3 = LI -22 4355 %4 = RLWINM_rec %3, 0, 24, 31, implicit-def $cr0 4356 ; CHECK: LI -22 4357 ; CHECK: ANDI_rec %3, 65514 4358 ; CHECK-LATE: li 3, -22 4359 ; CHECK-LATE: andi. 5, 3, 234 4360 %5 = COPY killed $cr0 4361 %6 = ISEL %2, %3, %5.sub_eq 4362 %8 = IMPLICIT_DEF 4363 %7 = INSERT_SUBREG %8, killed %6, 1 4364 %9 = RLDICL killed %7, 0, 32 4365 $x3 = COPY %9 4366 BLR8 implicit $lr8, implicit $rm, implicit $x3 4367 4368... 4369--- 4370name: testRLWINM_rec2 4371# CHECK-ALL: name: testRLWINM_rec2 4372alignment: 16 4373exposesReturnsTwice: false 4374legalized: false 4375regBankSelected: false 4376selected: false 4377tracksRegLiveness: true 4378registers: 4379 - { id: 0, class: g8rc, preferred-register: '' } 4380 - { id: 1, class: g8rc, preferred-register: '' } 4381 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 4382 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 4383 - { id: 4, class: gprc, preferred-register: '' } 4384 - { id: 5, class: crrc, preferred-register: '' } 4385 - { id: 6, class: gprc, preferred-register: '' } 4386 - { id: 7, class: g8rc, preferred-register: '' } 4387 - { id: 8, class: g8rc, preferred-register: '' } 4388 - { id: 9, class: g8rc, preferred-register: '' } 4389liveins: 4390 - { reg: '$x3', virtual-reg: '%0' } 4391 - { reg: '$x4', virtual-reg: '%1' } 4392frameInfo: 4393 isFrameAddressTaken: false 4394 isReturnAddressTaken: false 4395 hasStackMap: false 4396 hasPatchPoint: false 4397 stackSize: 0 4398 offsetAdjustment: 0 4399 maxAlignment: 0 4400 adjustsStack: false 4401 hasCalls: false 4402 stackProtector: '' 4403 maxCallFrameSize: 4294967295 4404 hasOpaqueSPAdjustment: false 4405 hasVAStart: false 4406 hasMustTailInVarArgFunc: false 4407 savePoint: '' 4408 restorePoint: '' 4409fixedStack: 4410stack: 4411constants: 4412body: | 4413 bb.0.entry: 4414 liveins: $x3, $x4 4415 4416 %1 = COPY $x4 4417 %0 = COPY $x3 4418 %2 = COPY %1.sub_32 4419 %3 = LI -22 4420 %4 = RLWINM_rec %3, 5, 24, 31, implicit-def $cr0 4421 ; CHECK: LI -22 4422 ; CHECK-NOT: ANDI8_rec %3, 65514 4423 ; CHECK-LATE-NOT: andi. 4424 %5 = COPY killed $cr0 4425 %6 = ISEL %2, %3, %5.sub_eq 4426 %8 = IMPLICIT_DEF 4427 %7 = INSERT_SUBREG %8, killed %6, 1 4428 %9 = RLDICL killed %7, 0, 32 4429 $x3 = COPY %9 4430 BLR8 implicit $lr8, implicit $rm, implicit $x3 4431 4432... 4433--- 4434name: testRLWINM8_rec 4435# CHECK-ALL: name: testRLWINM8_rec 4436alignment: 16 4437exposesReturnsTwice: false 4438legalized: false 4439regBankSelected: false 4440selected: false 4441tracksRegLiveness: true 4442registers: 4443 - { id: 0, class: g8rc, preferred-register: '' } 4444 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4445 - { id: 2, class: g8rc, preferred-register: '' } 4446 - { id: 3, class: g8rc, preferred-register: '' } 4447 - { id: 4, class: g8rc, preferred-register: '' } 4448 - { id: 5, class: g8rc, preferred-register: '' } 4449 - { id: 6, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4450 - { id: 7, class: crrc, preferred-register: '' } 4451 - { id: 8, class: g8rc, preferred-register: '' } 4452liveins: 4453 - { reg: '$x3', virtual-reg: '%0' } 4454 - { reg: '$x4', virtual-reg: '%1' } 4455frameInfo: 4456 isFrameAddressTaken: false 4457 isReturnAddressTaken: false 4458 hasStackMap: false 4459 hasPatchPoint: false 4460 stackSize: 0 4461 offsetAdjustment: 0 4462 maxAlignment: 0 4463 adjustsStack: false 4464 hasCalls: false 4465 stackProtector: '' 4466 maxCallFrameSize: 4294967295 4467 hasOpaqueSPAdjustment: false 4468 hasVAStart: false 4469 hasMustTailInVarArgFunc: false 4470 savePoint: '' 4471 restorePoint: '' 4472fixedStack: 4473stack: 4474constants: 4475body: | 4476 bb.0.entry: 4477 liveins: $x3, $x4 4478 4479 %1 = COPY $x4 4480 %0 = COPY $x3 4481 %2 = LI8 -18 4482 %3 = RLWINM8_rec %2, 4, 20, 27, implicit-def $cr0 4483 ; CHECK: ANDI8_rec %2, 3808 4484 ; CHECK-LATE: li 3, -18 4485 ; CHECK-LATE: andi. 3, 3, 3808 4486 %7 = COPY killed $cr0 4487 %6 = RLDICL killed %3, 0, 32 4488 %8 = ISEL8 %1, %6, %7.sub_eq 4489 $x3 = COPY %8 4490 BLR8 implicit $lr8, implicit $rm, implicit $x3 4491 4492... 4493--- 4494name: testSLD 4495# CHECK-ALL: name: testSLD 4496alignment: 16 4497exposesReturnsTwice: false 4498legalized: false 4499regBankSelected: false 4500selected: false 4501tracksRegLiveness: true 4502registers: 4503 - { id: 0, class: g8rc, preferred-register: '' } 4504 - { id: 1, class: g8rc, preferred-register: '' } 4505 - { id: 2, class: gprc, preferred-register: '' } 4506 - { id: 3, class: g8rc, preferred-register: '' } 4507liveins: 4508 - { reg: '$x3', virtual-reg: '%0' } 4509 - { reg: '$x4', virtual-reg: '%1' } 4510frameInfo: 4511 isFrameAddressTaken: false 4512 isReturnAddressTaken: false 4513 hasStackMap: false 4514 hasPatchPoint: false 4515 stackSize: 0 4516 offsetAdjustment: 0 4517 maxAlignment: 0 4518 adjustsStack: false 4519 hasCalls: false 4520 stackProtector: '' 4521 maxCallFrameSize: 4294967295 4522 hasOpaqueSPAdjustment: false 4523 hasVAStart: false 4524 hasMustTailInVarArgFunc: false 4525 savePoint: '' 4526 restorePoint: '' 4527fixedStack: 4528stack: 4529constants: 4530body: | 4531 bb.0.entry: 4532 liveins: $x3, $x4 4533 4534 %1 = COPY $x4 4535 %0 = COPY $x3 4536 %2 = LI 13 4537 %3 = SLD %0, killed %2 4538 ; CHECK: RLDICR %0, 13, 50 4539 ; CHECK-LATE: sldi 3, 3, 13 4540 $x3 = COPY %3 4541 BLR8 implicit $lr8, implicit $rm, implicit $x3 4542 4543... 4544--- 4545name: testSLD_rec 4546# CHECK-ALL: name: testSLD_rec 4547alignment: 16 4548exposesReturnsTwice: false 4549legalized: false 4550regBankSelected: false 4551selected: false 4552tracksRegLiveness: true 4553registers: 4554 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4555 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4556 - { id: 2, class: gprc, preferred-register: '' } 4557 - { id: 3, class: g8rc, preferred-register: '' } 4558 - { id: 4, class: crrc, preferred-register: '' } 4559 - { id: 5, class: g8rc, preferred-register: '' } 4560liveins: 4561 - { reg: '$x3', virtual-reg: '%0' } 4562 - { reg: '$x4', virtual-reg: '%1' } 4563frameInfo: 4564 isFrameAddressTaken: false 4565 isReturnAddressTaken: false 4566 hasStackMap: false 4567 hasPatchPoint: false 4568 stackSize: 0 4569 offsetAdjustment: 0 4570 maxAlignment: 0 4571 adjustsStack: false 4572 hasCalls: false 4573 stackProtector: '' 4574 maxCallFrameSize: 4294967295 4575 hasOpaqueSPAdjustment: false 4576 hasVAStart: false 4577 hasMustTailInVarArgFunc: false 4578 savePoint: '' 4579 restorePoint: '' 4580fixedStack: 4581stack: 4582constants: 4583body: | 4584 bb.0.entry: 4585 liveins: $x3, $x4 4586 4587 %1 = COPY $x4 4588 %0 = COPY $x3 4589 %2 = LI 17 4590 %3 = SLD_rec %0, killed %2, implicit-def $cr0 4591 ; CHECK: RLDICR_rec %0, 17, 46, implicit-def $cr0 4592 ; CHECK-LATE: rldicr. 5, 3, 17, 46 4593 %4 = COPY killed $cr0 4594 %5 = ISEL8 %1, %0, %4.sub_eq 4595 $x3 = COPY %5 4596 BLR8 implicit $lr8, implicit $rm, implicit $x3 4597 4598... 4599--- 4600name: testSRD 4601# CHECK-ALL: name: testSRD 4602alignment: 16 4603exposesReturnsTwice: false 4604legalized: false 4605regBankSelected: false 4606selected: false 4607tracksRegLiveness: true 4608registers: 4609 - { id: 0, class: g8rc, preferred-register: '' } 4610 - { id: 1, class: g8rc, preferred-register: '' } 4611 - { id: 2, class: gprc, preferred-register: '' } 4612 - { id: 3, class: g8rc, preferred-register: '' } 4613liveins: 4614 - { reg: '$x3', virtual-reg: '%0' } 4615 - { reg: '$x4', virtual-reg: '%1' } 4616frameInfo: 4617 isFrameAddressTaken: false 4618 isReturnAddressTaken: false 4619 hasStackMap: false 4620 hasPatchPoint: false 4621 stackSize: 0 4622 offsetAdjustment: 0 4623 maxAlignment: 0 4624 adjustsStack: false 4625 hasCalls: false 4626 stackProtector: '' 4627 maxCallFrameSize: 4294967295 4628 hasOpaqueSPAdjustment: false 4629 hasVAStart: false 4630 hasMustTailInVarArgFunc: false 4631 savePoint: '' 4632 restorePoint: '' 4633fixedStack: 4634stack: 4635constants: 4636body: | 4637 bb.0.entry: 4638 liveins: $x3, $x4 4639 4640 %1 = COPY $x4 4641 %0 = COPY $x3 4642 %2 = LI 4 4643 %3 = SRD %0, killed %2 4644 ; CHECK: RLDICL %0, 60, 4 4645 ; CHECK-LATE: rldicl 3, 3, 60, 4 4646 $x3 = COPY %3 4647 BLR8 implicit $lr8, implicit $rm, implicit $x3 4648 4649... 4650--- 4651name: testSRD_rec 4652# CHECK-ALL: name: testSRD_rec 4653alignment: 16 4654exposesReturnsTwice: false 4655legalized: false 4656regBankSelected: false 4657selected: false 4658tracksRegLiveness: true 4659registers: 4660 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4661 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 4662 - { id: 2, class: gprc, preferred-register: '' } 4663 - { id: 3, class: g8rc, preferred-register: '' } 4664 - { id: 4, class: crrc, preferred-register: '' } 4665 - { id: 5, class: g8rc, preferred-register: '' } 4666liveins: 4667 - { reg: '$x3', virtual-reg: '%0' } 4668 - { reg: '$x4', virtual-reg: '%1' } 4669frameInfo: 4670 isFrameAddressTaken: false 4671 isReturnAddressTaken: false 4672 hasStackMap: false 4673 hasPatchPoint: false 4674 stackSize: 0 4675 offsetAdjustment: 0 4676 maxAlignment: 0 4677 adjustsStack: false 4678 hasCalls: false 4679 stackProtector: '' 4680 maxCallFrameSize: 4294967295 4681 hasOpaqueSPAdjustment: false 4682 hasVAStart: false 4683 hasMustTailInVarArgFunc: false 4684 savePoint: '' 4685 restorePoint: '' 4686fixedStack: 4687stack: 4688constants: 4689body: | 4690 bb.0.entry: 4691 liveins: $x3, $x4 4692 4693 %1 = COPY $x4 4694 %0 = COPY $x3 4695 %2 = LI 17 4696 %3 = SRD_rec %0, killed %2, implicit-def $cr0 4697 ; CHECK: RLDICL_rec %0, 47, 17, implicit-def $cr0 4698 ; CHECK-LATE: rldicl. 5, 3, 47, 17 4699 %4 = COPY killed $cr0 4700 %5 = ISEL8 %1, %0, %4.sub_eq 4701 $x3 = COPY %5 4702 BLR8 implicit $lr8, implicit $rm, implicit $x3 4703 4704... 4705--- 4706name: testSLW 4707# CHECK-ALL: name: testSLW 4708alignment: 16 4709exposesReturnsTwice: false 4710legalized: false 4711regBankSelected: false 4712selected: false 4713tracksRegLiveness: true 4714registers: 4715 - { id: 0, class: g8rc, preferred-register: '' } 4716 - { id: 1, class: g8rc, preferred-register: '' } 4717 - { id: 2, class: gprc, preferred-register: '' } 4718 - { id: 3, class: g8rc, preferred-register: '' } 4719 - { id: 4, class: g8rc, preferred-register: '' } 4720 - { id: 5, class: gprc, preferred-register: '' } 4721 - { id: 6, class: g8rc, preferred-register: '' } 4722 - { id: 7, class: g8rc, preferred-register: '' } 4723 - { id: 8, class: gprc, preferred-register: '' } 4724liveins: 4725 - { reg: '$x3', virtual-reg: '%0' } 4726 - { reg: '$x4', virtual-reg: '%1' } 4727frameInfo: 4728 isFrameAddressTaken: false 4729 isReturnAddressTaken: false 4730 hasStackMap: false 4731 hasPatchPoint: false 4732 stackSize: 0 4733 offsetAdjustment: 0 4734 maxAlignment: 0 4735 adjustsStack: false 4736 hasCalls: false 4737 stackProtector: '' 4738 maxCallFrameSize: 4294967295 4739 hasOpaqueSPAdjustment: false 4740 hasVAStart: false 4741 hasMustTailInVarArgFunc: false 4742 savePoint: '' 4743 restorePoint: '' 4744fixedStack: 4745stack: 4746constants: 4747body: | 4748 bb.0.entry: 4749 liveins: $x3, $x4 4750 4751 %1 = COPY $x4 4752 %0 = COPY $x3 4753 %2 = COPY %1.sub_32 4754 %5 = LI 21 4755 %8 = SLW killed %2, killed %5 4756 ; CHECK: RLWINM killed %2, 21, 0, 10 4757 ; CHECK-LATE: slwi 3, 4, 21 4758 $x3 = EXTSW_32_64 %8 4759 BLR8 implicit $lr8, implicit $rm, implicit $x3 4760 4761... 4762--- 4763name: testSLW_rec 4764# CHECK-ALL: name: testSLW_rec 4765alignment: 16 4766exposesReturnsTwice: false 4767legalized: false 4768regBankSelected: false 4769selected: false 4770tracksRegLiveness: true 4771registers: 4772 - { id: 0, class: g8rc, preferred-register: '' } 4773 - { id: 1, class: g8rc, preferred-register: '' } 4774 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 4775 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 4776 - { id: 4, class: gprc, preferred-register: '' } 4777 - { id: 5, class: crrc, preferred-register: '' } 4778 - { id: 6, class: gprc, preferred-register: '' } 4779 - { id: 7, class: g8rc, preferred-register: '' } 4780 - { id: 8, class: g8rc, preferred-register: '' } 4781 - { id: 9, class: g8rc, preferred-register: '' } 4782liveins: 4783 - { reg: '$x3', virtual-reg: '%0' } 4784 - { reg: '$x4', virtual-reg: '%1' } 4785frameInfo: 4786 isFrameAddressTaken: false 4787 isReturnAddressTaken: false 4788 hasStackMap: false 4789 hasPatchPoint: false 4790 stackSize: 0 4791 offsetAdjustment: 0 4792 maxAlignment: 0 4793 adjustsStack: false 4794 hasCalls: false 4795 stackProtector: '' 4796 maxCallFrameSize: 4294967295 4797 hasOpaqueSPAdjustment: false 4798 hasVAStart: false 4799 hasMustTailInVarArgFunc: false 4800 savePoint: '' 4801 restorePoint: '' 4802fixedStack: 4803stack: 4804constants: 4805body: | 4806 bb.0.entry: 4807 liveins: $x3, $x4 4808 4809 %1 = COPY $x4 4810 %0 = COPY $x3 4811 %2 = LI 11 4812 %3 = COPY %0.sub_32 4813 %4 = SLW_rec %3, %2, implicit-def $cr0 4814 ; CHECK: RLWINM_rec %3, 11, 0, 20, implicit-def $cr0 4815 ; CHECK-LATE: rlwinm. 5, 3, 11, 0, 20 4816 %5 = COPY killed $cr0 4817 %6 = ISEL %2, %3, %5.sub_eq 4818 %8 = IMPLICIT_DEF 4819 %7 = INSERT_SUBREG %8, killed %6, 1 4820 %9 = RLDICL killed %7, 0, 32 4821 $x3 = COPY %9 4822 BLR8 implicit $lr8, implicit $rm, implicit $x3 4823 4824... 4825--- 4826name: testSRW 4827# CHECK-ALL: name: testSRW 4828alignment: 16 4829exposesReturnsTwice: false 4830legalized: false 4831regBankSelected: false 4832selected: false 4833tracksRegLiveness: true 4834registers: 4835 - { id: 0, class: g8rc, preferred-register: '' } 4836 - { id: 1, class: g8rc, preferred-register: '' } 4837 - { id: 2, class: gprc, preferred-register: '' } 4838 - { id: 3, class: g8rc, preferred-register: '' } 4839 - { id: 4, class: g8rc, preferred-register: '' } 4840 - { id: 5, class: gprc, preferred-register: '' } 4841 - { id: 6, class: g8rc, preferred-register: '' } 4842 - { id: 7, class: g8rc, preferred-register: '' } 4843 - { id: 8, class: gprc, preferred-register: '' } 4844liveins: 4845 - { reg: '$x3', virtual-reg: '%0' } 4846 - { reg: '$x4', virtual-reg: '%1' } 4847frameInfo: 4848 isFrameAddressTaken: false 4849 isReturnAddressTaken: false 4850 hasStackMap: false 4851 hasPatchPoint: false 4852 stackSize: 0 4853 offsetAdjustment: 0 4854 maxAlignment: 0 4855 adjustsStack: false 4856 hasCalls: false 4857 stackProtector: '' 4858 maxCallFrameSize: 4294967295 4859 hasOpaqueSPAdjustment: false 4860 hasVAStart: false 4861 hasMustTailInVarArgFunc: false 4862 savePoint: '' 4863 restorePoint: '' 4864fixedStack: 4865stack: 4866constants: 4867body: | 4868 bb.0.entry: 4869 liveins: $x3, $x4 4870 4871 %1 = COPY $x4 4872 %0 = COPY $x3 4873 %2 = LI 8 4874 %5 = COPY %0.sub_32 4875 %8 = SRW killed %5, killed %2 4876 ; CHECK: RLWINM killed %5, 24, 8, 31 4877 ; CHECK-LATE: srwi 3, 3, 8 4878 $x3 = EXTSW_32_64 %8 4879 BLR8 implicit $lr8, implicit $rm, implicit $x3 4880 4881... 4882--- 4883name: testSRW_rec 4884# CHECK-ALL: name: testSRW_rec 4885alignment: 16 4886exposesReturnsTwice: false 4887legalized: false 4888regBankSelected: false 4889selected: false 4890tracksRegLiveness: true 4891registers: 4892 - { id: 0, class: g8rc, preferred-register: '' } 4893 - { id: 1, class: g8rc, preferred-register: '' } 4894 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 4895 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 4896 - { id: 4, class: gprc, preferred-register: '' } 4897 - { id: 5, class: crrc, preferred-register: '' } 4898 - { id: 6, class: gprc, preferred-register: '' } 4899 - { id: 7, class: g8rc, preferred-register: '' } 4900 - { id: 8, class: g8rc, preferred-register: '' } 4901 - { id: 9, class: g8rc, preferred-register: '' } 4902liveins: 4903 - { reg: '$x3', virtual-reg: '%0' } 4904 - { reg: '$x4', virtual-reg: '%1' } 4905frameInfo: 4906 isFrameAddressTaken: false 4907 isReturnAddressTaken: false 4908 hasStackMap: false 4909 hasPatchPoint: false 4910 stackSize: 0 4911 offsetAdjustment: 0 4912 maxAlignment: 0 4913 adjustsStack: false 4914 hasCalls: false 4915 stackProtector: '' 4916 maxCallFrameSize: 4294967295 4917 hasOpaqueSPAdjustment: false 4918 hasVAStart: false 4919 hasMustTailInVarArgFunc: false 4920 savePoint: '' 4921 restorePoint: '' 4922fixedStack: 4923stack: 4924constants: 4925body: | 4926 bb.0.entry: 4927 liveins: $x3, $x4 4928 4929 %1 = COPY $x4 4930 %0 = COPY $x3 4931 %2 = LI 7 4932 %3 = COPY %0.sub_32 4933 %4 = SRW_rec %3, %2, implicit-def $cr0 4934 ; CHECK: RLWINM_rec %3, 25, 7, 31 4935 ; CHECK-LATE: rlwinm. 5, 3, 25, 7, 31 4936 %5 = COPY killed $cr0 4937 %6 = ISEL %2, %3, %5.sub_eq 4938 %8 = IMPLICIT_DEF 4939 %7 = INSERT_SUBREG %8, killed %6, 1 4940 %9 = RLDICL killed %7, 0, 32 4941 $x3 = COPY %9 4942 BLR8 implicit $lr8, implicit $rm, implicit $x3 4943 4944... 4945--- 4946name: testSRAW 4947# CHECK-ALL: name: testSRAW 4948alignment: 16 4949exposesReturnsTwice: false 4950legalized: false 4951regBankSelected: false 4952selected: false 4953tracksRegLiveness: true 4954registers: 4955 - { id: 0, class: g8rc, preferred-register: '' } 4956 - { id: 1, class: g8rc, preferred-register: '' } 4957 - { id: 2, class: gprc, preferred-register: '' } 4958 - { id: 3, class: gprc, preferred-register: '' } 4959 - { id: 4, class: gprc, preferred-register: '' } 4960 - { id: 5, class: g8rc, preferred-register: '' } 4961liveins: 4962 - { reg: '$x3', virtual-reg: '%0' } 4963 - { reg: '$x4', virtual-reg: '%1' } 4964frameInfo: 4965 isFrameAddressTaken: false 4966 isReturnAddressTaken: false 4967 hasStackMap: false 4968 hasPatchPoint: false 4969 stackSize: 0 4970 offsetAdjustment: 0 4971 maxAlignment: 0 4972 adjustsStack: false 4973 hasCalls: false 4974 stackProtector: '' 4975 maxCallFrameSize: 4294967295 4976 hasOpaqueSPAdjustment: false 4977 hasVAStart: false 4978 hasMustTailInVarArgFunc: false 4979 savePoint: '' 4980 restorePoint: '' 4981fixedStack: 4982stack: 4983constants: 4984body: | 4985 bb.0.entry: 4986 liveins: $x3, $x4 4987 4988 %1 = COPY $x4 4989 %0 = COPY $x3 4990 %2 = LI 15 4991 %3 = COPY %0.sub_32 4992 %4 = SRAW killed %3, killed %2, implicit-def dead $carry 4993 ; CHECK: SRAWI killed %3, 15, implicit-def dead $carry 4994 ; CHECK-LATE: srawi 3, 3, 15 4995 %5 = EXTSW_32_64 killed %4 4996 $x3 = COPY %5 4997 BLR8 implicit $lr8, implicit $rm, implicit $x3 4998 4999... 5000--- 5001name: testSRAW_rec 5002# CHECK-ALL: name: testSRAW_rec 5003alignment: 16 5004exposesReturnsTwice: false 5005legalized: false 5006regBankSelected: false 5007selected: false 5008tracksRegLiveness: true 5009registers: 5010 - { id: 0, class: g8rc, preferred-register: '' } 5011 - { id: 1, class: g8rc, preferred-register: '' } 5012 - { id: 2, class: gprc_and_gprc_nor0, preferred-register: '' } 5013 - { id: 3, class: gprc, preferred-register: '' } 5014 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 5015 - { id: 5, class: crrc, preferred-register: '' } 5016 - { id: 6, class: gprc, preferred-register: '' } 5017 - { id: 7, class: g8rc, preferred-register: '' } 5018liveins: 5019 - { reg: '$x3', virtual-reg: '%0' } 5020 - { reg: '$x4', virtual-reg: '%1' } 5021frameInfo: 5022 isFrameAddressTaken: false 5023 isReturnAddressTaken: false 5024 hasStackMap: false 5025 hasPatchPoint: false 5026 stackSize: 0 5027 offsetAdjustment: 0 5028 maxAlignment: 0 5029 adjustsStack: false 5030 hasCalls: false 5031 stackProtector: '' 5032 maxCallFrameSize: 4294967295 5033 hasOpaqueSPAdjustment: false 5034 hasVAStart: false 5035 hasMustTailInVarArgFunc: false 5036 savePoint: '' 5037 restorePoint: '' 5038fixedStack: 5039stack: 5040constants: 5041body: | 5042 bb.0.entry: 5043 liveins: $x3, $x4 5044 5045 %1 = COPY $x4 5046 %0 = COPY $x3 5047 %2 = LI 8 5048 %3 = COPY %0.sub_32 5049 %4 = SRAW_rec killed %3, %2, implicit-def dead $carry, implicit-def $cr0 5050 ; CHECK: SRAWI_rec killed %3, 8, implicit-def dead $carry, implicit-def $cr0 5051 ; CHECK-LATE: srawi. 3, 3, 8 5052 %5 = COPY killed $cr0 5053 %6 = ISEL %2, %4, %5.sub_eq 5054 %7 = EXTSW_32_64 killed %6 5055 $x3 = COPY %7 5056 BLR8 implicit $lr8, implicit $rm, implicit $x3 5057 5058... 5059--- 5060name: testSRAD 5061# CHECK-ALL: name: testSRAD 5062alignment: 16 5063exposesReturnsTwice: false 5064legalized: false 5065regBankSelected: false 5066selected: false 5067tracksRegLiveness: true 5068registers: 5069 - { id: 0, class: g8rc, preferred-register: '' } 5070 - { id: 1, class: g8rc, preferred-register: '' } 5071 - { id: 2, class: gprc, preferred-register: '' } 5072 - { id: 3, class: g8rc, preferred-register: '' } 5073liveins: 5074 - { reg: '$x3', virtual-reg: '%0' } 5075 - { reg: '$x4', virtual-reg: '%1' } 5076frameInfo: 5077 isFrameAddressTaken: false 5078 isReturnAddressTaken: false 5079 hasStackMap: false 5080 hasPatchPoint: false 5081 stackSize: 0 5082 offsetAdjustment: 0 5083 maxAlignment: 0 5084 adjustsStack: false 5085 hasCalls: false 5086 stackProtector: '' 5087 maxCallFrameSize: 4294967295 5088 hasOpaqueSPAdjustment: false 5089 hasVAStart: false 5090 hasMustTailInVarArgFunc: false 5091 savePoint: '' 5092 restorePoint: '' 5093fixedStack: 5094stack: 5095constants: 5096body: | 5097 bb.0.entry: 5098 liveins: $x3, $x4 5099 5100 %1 = COPY $x4 5101 %0 = COPY $x3 5102 %2 = LI 44 5103 %3 = SRAD %0, killed %2, implicit-def dead $carry 5104 ; CHECK: SRADI %0, 44, implicit-def dead $carry 5105 ; CHECK-LATE: sradi 3, 3, 44 5106 $x3 = COPY %3 5107 BLR8 implicit $lr8, implicit $rm, implicit $x3 5108 5109... 5110--- 5111name: testSRAD_rec 5112# CHECK-ALL: name: testSRAD_rec 5113alignment: 16 5114exposesReturnsTwice: false 5115legalized: false 5116regBankSelected: false 5117selected: false 5118tracksRegLiveness: true 5119registers: 5120 - { id: 0, class: g8rc, preferred-register: '' } 5121 - { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5122 - { id: 2, class: gprc, preferred-register: '' } 5123 - { id: 3, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5124 - { id: 4, class: crrc, preferred-register: '' } 5125 - { id: 5, class: g8rc, preferred-register: '' } 5126liveins: 5127 - { reg: '$x3', virtual-reg: '%0' } 5128 - { reg: '$x4', virtual-reg: '%1' } 5129frameInfo: 5130 isFrameAddressTaken: false 5131 isReturnAddressTaken: false 5132 hasStackMap: false 5133 hasPatchPoint: false 5134 stackSize: 0 5135 offsetAdjustment: 0 5136 maxAlignment: 0 5137 adjustsStack: false 5138 hasCalls: false 5139 stackProtector: '' 5140 maxCallFrameSize: 4294967295 5141 hasOpaqueSPAdjustment: false 5142 hasVAStart: false 5143 hasMustTailInVarArgFunc: false 5144 savePoint: '' 5145 restorePoint: '' 5146fixedStack: 5147stack: 5148constants: 5149body: | 5150 bb.0.entry: 5151 liveins: $x3, $x4 5152 5153 %1 = COPY $x4 5154 %0 = COPY $x3 5155 %2 = LI 61 5156 %3 = SRAD_rec %0, killed %2, implicit-def dead $carry, implicit-def $cr0 5157 ; CHECK: SRADI_rec %0, 61, implicit-def dead $carry, implicit-def $cr0 5158 ; CHECK-LATE: sradi. 3, 3, 61 5159 %4 = COPY killed $cr0 5160 %5 = ISEL8 %1, %3, %4.sub_eq 5161 $x3 = COPY %5 5162 BLR8 implicit $lr8, implicit $rm, implicit $x3 5163 5164... 5165--- 5166name: testSTBUX 5167# CHECK-ALL: name: testSTBUX 5168alignment: 16 5169exposesReturnsTwice: false 5170legalized: false 5171regBankSelected: false 5172selected: false 5173tracksRegLiveness: true 5174registers: 5175 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5176 - { id: 1, class: g8rc, preferred-register: '' } 5177 - { id: 2, class: g8rc, preferred-register: '' } 5178 - { id: 3, class: gprc, preferred-register: '' } 5179 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 5180 - { id: 5, class: gprc, preferred-register: '' } 5181 - { id: 6, class: g8rc, preferred-register: '' } 5182 - { id: 7, class: g8rc, preferred-register: '' } 5183 - { id: 8, class: g8rc, preferred-register: '' } 5184 - { id: 9, class: gprc, preferred-register: '' } 5185 - { id: 10, class: g8rc, preferred-register: '' } 5186 - { id: 11, class: g8rc, preferred-register: '' } 5187 - { id: 12, class: g8rc, preferred-register: '' } 5188 - { id: 13, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5189 - { id: 14, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5190liveins: 5191 - { reg: '$x3', virtual-reg: '%0' } 5192 - { reg: '$x4', virtual-reg: '%1' } 5193 - { reg: '$x5', virtual-reg: '%2' } 5194frameInfo: 5195 isFrameAddressTaken: false 5196 isReturnAddressTaken: false 5197 hasStackMap: false 5198 hasPatchPoint: false 5199 stackSize: 0 5200 offsetAdjustment: 0 5201 maxAlignment: 0 5202 adjustsStack: false 5203 hasCalls: false 5204 stackProtector: '' 5205 maxCallFrameSize: 4294967295 5206 hasOpaqueSPAdjustment: false 5207 hasVAStart: false 5208 hasMustTailInVarArgFunc: false 5209 savePoint: '' 5210 restorePoint: '' 5211fixedStack: 5212stack: 5213constants: 5214body: | 5215 bb.0.entry: 5216 liveins: $x3, $x4, $x5 5217 5218 %2 = COPY $x5 5219 %1 = COPY $x4 5220 %0 = COPY $x3 5221 %3 = COPY %1.sub_32 5222 %4 = COPY %2.sub_32 5223 %5 = ADDI %4, 1 5224 %7 = IMPLICIT_DEF 5225 %6 = INSERT_SUBREG %7, killed %5, 1 5226 %8 = LI8 966 5227 %13 = STBUX %3, %0, killed %8 :: (store (s8) into %ir.arrayidx, !tbaa !3) 5228 ; CHECK: STBU %3, 966, %0 5229 ; CHECK-LATE: {{[0-9]+}}, 966({{[0-9]+}}) 5230 %9 = ADDI %4, 2 5231 %11 = IMPLICIT_DEF 5232 %10 = INSERT_SUBREG %11, killed %9, 1 5233 %12 = LI8 777 5234 %14 = STBUX %3, %0, killed %12 :: (store (s8) into %ir.arrayidx3, !tbaa !3) 5235 ; CHECK: STBU %3, 777, %0 5236 ; CHECK-LATE: {{[0-9]+}}, 777({{[0-9]+}}) 5237 BLR8 implicit $lr8, implicit $rm 5238 5239... 5240--- 5241name: testSTBX 5242# CHECK-ALL: name: testSTBX 5243alignment: 16 5244exposesReturnsTwice: false 5245legalized: false 5246regBankSelected: false 5247selected: false 5248tracksRegLiveness: true 5249registers: 5250 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5251 - { id: 1, class: g8rc, preferred-register: '' } 5252 - { id: 2, class: g8rc, preferred-register: '' } 5253 - { id: 3, class: gprc, preferred-register: '' } 5254 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 5255 - { id: 5, class: gprc, preferred-register: '' } 5256 - { id: 6, class: g8rc, preferred-register: '' } 5257 - { id: 7, class: g8rc, preferred-register: '' } 5258 - { id: 8, class: g8rc, preferred-register: '' } 5259 - { id: 9, class: gprc, preferred-register: '' } 5260 - { id: 10, class: g8rc, preferred-register: '' } 5261 - { id: 11, class: g8rc, preferred-register: '' } 5262 - { id: 12, class: g8rc, preferred-register: '' } 5263liveins: 5264 - { reg: '$x3', virtual-reg: '%0' } 5265 - { reg: '$x4', virtual-reg: '%1' } 5266 - { reg: '$x5', virtual-reg: '%2' } 5267frameInfo: 5268 isFrameAddressTaken: false 5269 isReturnAddressTaken: false 5270 hasStackMap: false 5271 hasPatchPoint: false 5272 stackSize: 0 5273 offsetAdjustment: 0 5274 maxAlignment: 0 5275 adjustsStack: false 5276 hasCalls: false 5277 stackProtector: '' 5278 maxCallFrameSize: 4294967295 5279 hasOpaqueSPAdjustment: false 5280 hasVAStart: false 5281 hasMustTailInVarArgFunc: false 5282 savePoint: '' 5283 restorePoint: '' 5284fixedStack: 5285stack: 5286constants: 5287body: | 5288 bb.0.entry: 5289 liveins: $x3, $x4, $x5 5290 5291 %2 = COPY $x5 5292 %1 = COPY $x4 5293 %0 = LI8 975 5294 %3 = COPY %1.sub_32 5295 %4 = COPY %2.sub_32 5296 %5 = ADDI %4, 1 5297 %7 = IMPLICIT_DEF 5298 %6 = INSERT_SUBREG %7, killed %5, 1 5299 %8 = RLDICL killed %6, 0, 32 5300 STBX %3, %0, killed %8 :: (store (s8) into %ir.arrayidx, !tbaa !3) 5301 ; CHECK: STB %3, 975, killed %8 5302 ; CHECK-LATE: stb 4, 975(6) 5303 %9 = ADDI %4, 2 5304 %11 = IMPLICIT_DEF 5305 %10 = INSERT_SUBREG %11, killed %9, 1 5306 %12 = RLDICL killed %10, 0, 32 5307 STBX %3, %0, killed %12 :: (store (s8) into %ir.arrayidx3, !tbaa !3) 5308 ; CHECK: STB %3, 975, killed %12 5309 ; CHECK-LATE: stb 4, 975(5) 5310 BLR8 implicit $lr8, implicit $rm 5311 5312... 5313--- 5314name: testSTHUX 5315# CHECK-ALL: name: testSTHUX 5316alignment: 16 5317exposesReturnsTwice: false 5318legalized: false 5319regBankSelected: false 5320selected: false 5321tracksRegLiveness: true 5322registers: 5323 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5324 - { id: 1, class: g8rc, preferred-register: '' } 5325 - { id: 2, class: g8rc, preferred-register: '' } 5326 - { id: 3, class: gprc, preferred-register: '' } 5327 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 5328 - { id: 5, class: gprc, preferred-register: '' } 5329 - { id: 6, class: g8rc, preferred-register: '' } 5330 - { id: 7, class: g8rc, preferred-register: '' } 5331 - { id: 8, class: g8rc, preferred-register: '' } 5332 - { id: 9, class: gprc, preferred-register: '' } 5333 - { id: 10, class: g8rc, preferred-register: '' } 5334 - { id: 11, class: g8rc, preferred-register: '' } 5335 - { id: 12, class: g8rc, preferred-register: '' } 5336 - { id: 13, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5337 - { id: 14, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5338liveins: 5339 - { reg: '$x3', virtual-reg: '%0' } 5340 - { reg: '$x4', virtual-reg: '%1' } 5341 - { reg: '$x5', virtual-reg: '%2' } 5342frameInfo: 5343 isFrameAddressTaken: false 5344 isReturnAddressTaken: false 5345 hasStackMap: false 5346 hasPatchPoint: false 5347 stackSize: 0 5348 offsetAdjustment: 0 5349 maxAlignment: 0 5350 adjustsStack: false 5351 hasCalls: false 5352 stackProtector: '' 5353 maxCallFrameSize: 4294967295 5354 hasOpaqueSPAdjustment: false 5355 hasVAStart: false 5356 hasMustTailInVarArgFunc: false 5357 savePoint: '' 5358 restorePoint: '' 5359fixedStack: 5360stack: 5361constants: 5362body: | 5363 bb.0.entry: 5364 liveins: $x3, $x4, $x5 5365 5366 %2 = COPY $x5 5367 %1 = COPY $x4 5368 %0 = COPY $x3 5369 %3 = COPY %1.sub_32 5370 %4 = COPY %2.sub_32 5371 %5 = ADDI %4, 1 5372 %7 = IMPLICIT_DEF 5373 %6 = INSERT_SUBREG %7, killed %5, 1 5374 %8 = LI8 32000 5375 %13 = STHUX %3, %0, killed %8 :: (store (s16) into %ir.arrayidx, !tbaa !6) 5376 ; CHECK: STHU %3, 32000, %0 5377 ; CHECK-LATE: sthu {{[0-9]+}}, 32000({{[0-9]+}}) 5378 %9 = ADDI %4, 2 5379 %11 = IMPLICIT_DEF 5380 %10 = INSERT_SUBREG %11, killed %9, 1 5381 %12 = LI8 -761 5382 %14 = STHUX %3, %0, killed %12 :: (store (s16) into %ir.arrayidx3, !tbaa !6) 5383 ; CHECK: STHU %3, -761, %0 5384 ; CHECK-LATE: sthu {{[0-9]+}}, -761({{[0-9]+}}) 5385 BLR8 implicit $lr8, implicit $rm 5386 5387... 5388--- 5389name: testSTHX 5390# CHECK-ALL: name: testSTHX 5391alignment: 16 5392exposesReturnsTwice: false 5393legalized: false 5394regBankSelected: false 5395selected: false 5396tracksRegLiveness: true 5397registers: 5398 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5399 - { id: 1, class: g8rc, preferred-register: '' } 5400 - { id: 2, class: g8rc, preferred-register: '' } 5401 - { id: 3, class: gprc, preferred-register: '' } 5402 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 5403 - { id: 5, class: gprc, preferred-register: '' } 5404 - { id: 6, class: g8rc, preferred-register: '' } 5405 - { id: 7, class: g8rc, preferred-register: '' } 5406 - { id: 8, class: g8rc, preferred-register: '' } 5407 - { id: 9, class: gprc, preferred-register: '' } 5408 - { id: 10, class: g8rc, preferred-register: '' } 5409 - { id: 11, class: g8rc, preferred-register: '' } 5410 - { id: 12, class: g8rc, preferred-register: '' } 5411liveins: 5412 - { reg: '$x3', virtual-reg: '%0' } 5413 - { reg: '$x4', virtual-reg: '%1' } 5414 - { reg: '$x5', virtual-reg: '%2' } 5415frameInfo: 5416 isFrameAddressTaken: false 5417 isReturnAddressTaken: false 5418 hasStackMap: false 5419 hasPatchPoint: false 5420 stackSize: 0 5421 offsetAdjustment: 0 5422 maxAlignment: 0 5423 adjustsStack: false 5424 hasCalls: false 5425 stackProtector: '' 5426 maxCallFrameSize: 4294967295 5427 hasOpaqueSPAdjustment: false 5428 hasVAStart: false 5429 hasMustTailInVarArgFunc: false 5430 savePoint: '' 5431 restorePoint: '' 5432fixedStack: 5433stack: 5434constants: 5435body: | 5436 bb.0.entry: 5437 liveins: $x3, $x4, $x5 5438 5439 %2 = COPY $x5 5440 %1 = COPY $x4 5441 %0 = COPY $x3 5442 %3 = COPY %1.sub_32 5443 %4 = COPY %2.sub_32 5444 %5 = ADDI %4, 1 5445 %7 = IMPLICIT_DEF 5446 %6 = INSERT_SUBREG %7, killed %5, 1 5447 %8 = LI8 900 5448 STHX %3, %0, killed %8 :: (store (s8) into %ir.arrayidx, !tbaa !3) 5449 ; CHECK: STH %3, 900, %0 5450 ; CHECK-LATE: sth {{[0-9]+}}, 900({{[0-9]+}}) 5451 %9 = ADDI %4, 2 5452 %11 = IMPLICIT_DEF 5453 %10 = INSERT_SUBREG %11, killed %9, 1 5454 %12 = LI8 -900 5455 STHX %3, %0, killed %12 :: (store (s8) into %ir.arrayidx3, !tbaa !3) 5456 ; CHECK: STH %3, -900, %0 5457 ; CHECK-LATE: sth {{[0-9]+}}, -900({{[0-9]+}}) 5458 BLR8 implicit $lr8, implicit $rm 5459 5460... 5461--- 5462name: testSTWUX 5463# CHECK-ALL: name: testSTWUX 5464alignment: 16 5465exposesReturnsTwice: false 5466legalized: false 5467regBankSelected: false 5468selected: false 5469tracksRegLiveness: true 5470registers: 5471 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5472 - { id: 1, class: g8rc, preferred-register: '' } 5473 - { id: 2, class: g8rc, preferred-register: '' } 5474 - { id: 3, class: gprc, preferred-register: '' } 5475 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 5476 - { id: 5, class: gprc, preferred-register: '' } 5477 - { id: 6, class: g8rc, preferred-register: '' } 5478 - { id: 7, class: g8rc, preferred-register: '' } 5479 - { id: 8, class: g8rc, preferred-register: '' } 5480 - { id: 9, class: gprc, preferred-register: '' } 5481 - { id: 10, class: g8rc, preferred-register: '' } 5482 - { id: 11, class: g8rc, preferred-register: '' } 5483 - { id: 12, class: g8rc, preferred-register: '' } 5484 - { id: 13, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5485 - { id: 14, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5486liveins: 5487 - { reg: '$x3', virtual-reg: '%0' } 5488 - { reg: '$x4', virtual-reg: '%1' } 5489 - { reg: '$x5', virtual-reg: '%2' } 5490frameInfo: 5491 isFrameAddressTaken: false 5492 isReturnAddressTaken: false 5493 hasStackMap: false 5494 hasPatchPoint: false 5495 stackSize: 0 5496 offsetAdjustment: 0 5497 maxAlignment: 0 5498 adjustsStack: false 5499 hasCalls: false 5500 stackProtector: '' 5501 maxCallFrameSize: 4294967295 5502 hasOpaqueSPAdjustment: false 5503 hasVAStart: false 5504 hasMustTailInVarArgFunc: false 5505 savePoint: '' 5506 restorePoint: '' 5507fixedStack: 5508stack: 5509constants: 5510body: | 5511 bb.0.entry: 5512 liveins: $x3, $x4, $x5 5513 5514 %2 = COPY $x5 5515 %1 = COPY $x4 5516 %0 = COPY $x3 5517 %3 = COPY %1.sub_32 5518 %4 = COPY %2.sub_32 5519 %5 = ADDI %4, 1 5520 %7 = IMPLICIT_DEF 5521 %6 = INSERT_SUBREG %7, killed %5, 1 5522 %8 = LI8 111 5523 %13 = STWUX %3, %0, killed %8 :: (store (s32) into %ir.arrayidx, !tbaa !8) 5524 ; CHECK: STWU %3, 111, %0 5525 ; CHECK-LATE: stwu {{[0-9]+}}, 111({{[0-9]+}}) 5526 %9 = ADDI %4, 2 5527 %11 = IMPLICIT_DEF 5528 %10 = INSERT_SUBREG %11, killed %9, 1 5529 %12 = LI8 0 5530 %14 = STWUX %3, %0, killed %12 :: (store (s32) into %ir.arrayidx3, !tbaa !8) 5531 ; CHECK: STWU %3, 0, %0 5532 ; CHECK-LATE: stwu {{[0-9]+}}, 0({{[0-9]+}}) 5533 BLR8 implicit $lr8, implicit $rm 5534 5535... 5536--- 5537name: testSTWX 5538# CHECK-ALL: name: testSTWX 5539alignment: 16 5540exposesReturnsTwice: false 5541legalized: false 5542regBankSelected: false 5543selected: false 5544tracksRegLiveness: true 5545registers: 5546 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5547 - { id: 1, class: g8rc, preferred-register: '' } 5548 - { id: 2, class: g8rc, preferred-register: '' } 5549 - { id: 3, class: gprc, preferred-register: '' } 5550 - { id: 4, class: gprc_and_gprc_nor0, preferred-register: '' } 5551 - { id: 5, class: gprc, preferred-register: '' } 5552 - { id: 6, class: g8rc, preferred-register: '' } 5553 - { id: 7, class: g8rc, preferred-register: '' } 5554 - { id: 8, class: g8rc, preferred-register: '' } 5555 - { id: 9, class: gprc, preferred-register: '' } 5556 - { id: 10, class: g8rc, preferred-register: '' } 5557 - { id: 11, class: g8rc, preferred-register: '' } 5558 - { id: 12, class: g8rc, preferred-register: '' } 5559liveins: 5560 - { reg: '$x3', virtual-reg: '%0' } 5561 - { reg: '$x4', virtual-reg: '%1' } 5562 - { reg: '$x5', virtual-reg: '%2' } 5563frameInfo: 5564 isFrameAddressTaken: false 5565 isReturnAddressTaken: false 5566 hasStackMap: false 5567 hasPatchPoint: false 5568 stackSize: 0 5569 offsetAdjustment: 0 5570 maxAlignment: 0 5571 adjustsStack: false 5572 hasCalls: false 5573 stackProtector: '' 5574 maxCallFrameSize: 4294967295 5575 hasOpaqueSPAdjustment: false 5576 hasVAStart: false 5577 hasMustTailInVarArgFunc: false 5578 savePoint: '' 5579 restorePoint: '' 5580fixedStack: 5581stack: 5582constants: 5583body: | 5584 bb.0.entry: 5585 liveins: $x3, $x4, $x5 5586 5587 %2 = COPY $x5 5588 %1 = COPY $x4 5589 %0 = COPY $x3 5590 %3 = COPY %1.sub_32 5591 %4 = COPY %2.sub_32 5592 %5 = ADDI %4, 1 5593 %7 = IMPLICIT_DEF 5594 %6 = INSERT_SUBREG %7, killed %5, 1 5595 %8 = LI8 2 5596 STWX %3, %0, killed %8 :: (store (s32) into %ir.arrayidx, !tbaa !8) 5597 ; CHECK: STW %3, 2, %0 5598 ; CHECK-LATE: stw 4, 2(3) 5599 %9 = ADDI %4, 2 5600 %11 = IMPLICIT_DEF 5601 %10 = INSERT_SUBREG %11, killed %9, 1 5602 %12 = LI8 99 5603 STWX %3, %0, killed %12 :: (store (s32) into %ir.arrayidx3, !tbaa !8) 5604 ; CHECK: STW %3, 99, %0 5605 ; CHECK-LATE: stw 4, 99(3) 5606 BLR8 implicit $lr8, implicit $rm 5607 5608... 5609--- 5610name: testSTDUX 5611# CHECK-ALL: name: testSTDUX 5612alignment: 16 5613exposesReturnsTwice: false 5614legalized: false 5615regBankSelected: false 5616selected: false 5617tracksRegLiveness: true 5618registers: 5619 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5620 - { id: 1, class: g8rc, preferred-register: '' } 5621 - { id: 2, class: g8rc, preferred-register: '' } 5622 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 5623 - { id: 4, class: gprc, preferred-register: '' } 5624 - { id: 5, class: g8rc, preferred-register: '' } 5625 - { id: 6, class: g8rc, preferred-register: '' } 5626 - { id: 7, class: g8rc, preferred-register: '' } 5627 - { id: 8, class: gprc, preferred-register: '' } 5628 - { id: 9, class: g8rc, preferred-register: '' } 5629 - { id: 10, class: g8rc, preferred-register: '' } 5630 - { id: 11, class: g8rc, preferred-register: '' } 5631 - { id: 12, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5632 - { id: 13, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5633liveins: 5634 - { reg: '$x3', virtual-reg: '%0' } 5635 - { reg: '$x4', virtual-reg: '%1' } 5636 - { reg: '$x5', virtual-reg: '%2' } 5637frameInfo: 5638 isFrameAddressTaken: false 5639 isReturnAddressTaken: false 5640 hasStackMap: false 5641 hasPatchPoint: false 5642 stackSize: 0 5643 offsetAdjustment: 0 5644 maxAlignment: 0 5645 adjustsStack: false 5646 hasCalls: false 5647 stackProtector: '' 5648 maxCallFrameSize: 4294967295 5649 hasOpaqueSPAdjustment: false 5650 hasVAStart: false 5651 hasMustTailInVarArgFunc: false 5652 savePoint: '' 5653 restorePoint: '' 5654fixedStack: 5655stack: 5656constants: 5657body: | 5658 bb.0.entry: 5659 liveins: $x3, $x4, $x5 5660 5661 %2 = COPY $x5 5662 %1 = COPY $x4 5663 %0 = COPY $x3 5664 %3 = COPY %2.sub_32 5665 %4 = ADDI %3, 1 5666 %6 = IMPLICIT_DEF 5667 %5 = INSERT_SUBREG %6, killed %4, 1 5668 %7 = LI8 444 5669 %12 = STDUX %1, %0, killed %7 :: (store (s64) into %ir.arrayidx, !tbaa !10) 5670 ; CHECK: STDU %1, 444, %0 5671 ; CHECK-LATE: stdu {{[0-9]+}}, 444({{[0-9]+}}) 5672 %8 = ADDI %3, 2 5673 %10 = IMPLICIT_DEF 5674 %9 = INSERT_SUBREG %10, killed %8, 1 5675 %11 = LI8 -8 5676 %13 = STDUX %1, %0, killed %11 :: (store (s64) into %ir.arrayidx3, !tbaa !10) 5677 ; CHECK: STDU %1, -8, %0 5678 ; CHECK-LATE: stdu {{[0-9]+}}, -8({{[0-9]+}}) 5679 BLR8 implicit $lr8, implicit $rm 5680 5681... 5682--- 5683name: testSTDX 5684# CHECK-ALL: name: testSTDX 5685alignment: 16 5686exposesReturnsTwice: false 5687legalized: false 5688regBankSelected: false 5689selected: false 5690tracksRegLiveness: true 5691registers: 5692 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5693 - { id: 1, class: g8rc, preferred-register: '' } 5694 - { id: 2, class: g8rc, preferred-register: '' } 5695 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 5696 - { id: 4, class: gprc, preferred-register: '' } 5697 - { id: 5, class: g8rc, preferred-register: '' } 5698 - { id: 6, class: g8rc, preferred-register: '' } 5699 - { id: 7, class: g8rc, preferred-register: '' } 5700 - { id: 8, class: gprc, preferred-register: '' } 5701 - { id: 9, class: g8rc, preferred-register: '' } 5702 - { id: 10, class: g8rc, preferred-register: '' } 5703 - { id: 11, class: g8rc, preferred-register: '' } 5704liveins: 5705 - { reg: '$x3', virtual-reg: '%0' } 5706 - { reg: '$x4', virtual-reg: '%1' } 5707 - { reg: '$x5', virtual-reg: '%2' } 5708frameInfo: 5709 isFrameAddressTaken: false 5710 isReturnAddressTaken: false 5711 hasStackMap: false 5712 hasPatchPoint: false 5713 stackSize: 0 5714 offsetAdjustment: 0 5715 maxAlignment: 0 5716 adjustsStack: false 5717 hasCalls: false 5718 stackProtector: '' 5719 maxCallFrameSize: 4294967295 5720 hasOpaqueSPAdjustment: false 5721 hasVAStart: false 5722 hasMustTailInVarArgFunc: false 5723 savePoint: '' 5724 restorePoint: '' 5725fixedStack: 5726stack: 5727constants: 5728body: | 5729 bb.0.entry: 5730 liveins: $x3, $x4, $x5 5731 5732 %2 = COPY $x5 5733 %1 = COPY $x4 5734 %0 = LI8 1000 5735 %3 = COPY %2.sub_32 5736 %4 = ADDI %3, 1 5737 %6 = IMPLICIT_DEF 5738 %5 = INSERT_SUBREG %6, killed %4, 1 5739 %7 = LI8 900 5740 STDX %1, %0, killed %7 :: (store (s64) into %ir.arrayidx, !tbaa !10) 5741 ; CHECK: STD %1, 1000, killed %7 5742 ; CHECK-LATE: {{[0-9]+}}, 1000({{[0-9]+}}) 5743 %8 = ADDI %3, 2 5744 %10 = IMPLICIT_DEF 5745 %9 = INSERT_SUBREG %10, killed %8, 1 5746 %11 = LI8 -900 5747 STDX %1, %0, killed %11 :: (store (s64) into %ir.arrayidx3, !tbaa !10) 5748 ; CHECK: STD %1, 1000, killed %11 5749 ; CHECK-LATE: {{[0-9]+}}, 1000({{[0-9]+}}) 5750 BLR8 implicit $lr8, implicit $rm 5751 5752... 5753--- 5754name: testSTFSX 5755# CHECK-ALL: name: testSTFSX 5756alignment: 16 5757exposesReturnsTwice: false 5758legalized: false 5759regBankSelected: false 5760selected: false 5761tracksRegLiveness: true 5762registers: 5763 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5764 - { id: 1, class: f4rc, preferred-register: '' } 5765 - { id: 2, class: g8rc, preferred-register: '' } 5766 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 5767 - { id: 4, class: gprc, preferred-register: '' } 5768 - { id: 5, class: g8rc, preferred-register: '' } 5769 - { id: 6, class: g8rc, preferred-register: '' } 5770 - { id: 7, class: g8rc, preferred-register: '' } 5771 - { id: 8, class: gprc, preferred-register: '' } 5772 - { id: 9, class: g8rc, preferred-register: '' } 5773 - { id: 10, class: g8rc, preferred-register: '' } 5774 - { id: 11, class: g8rc, preferred-register: '' } 5775liveins: 5776 - { reg: '$x3', virtual-reg: '%0' } 5777 - { reg: '$f1', virtual-reg: '%1' } 5778 - { reg: '$x5', virtual-reg: '%2' } 5779frameInfo: 5780 isFrameAddressTaken: false 5781 isReturnAddressTaken: false 5782 hasStackMap: false 5783 hasPatchPoint: false 5784 stackSize: 0 5785 offsetAdjustment: 0 5786 maxAlignment: 0 5787 adjustsStack: false 5788 hasCalls: false 5789 stackProtector: '' 5790 maxCallFrameSize: 4294967295 5791 hasOpaqueSPAdjustment: false 5792 hasVAStart: false 5793 hasMustTailInVarArgFunc: false 5794 savePoint: '' 5795 restorePoint: '' 5796fixedStack: 5797stack: 5798constants: 5799body: | 5800 bb.0.entry: 5801 liveins: $x3, $f1, $x5 5802 5803 %2 = COPY $x5 5804 %1 = COPY $f1 5805 %0 = COPY $x3 5806 %3 = COPY %2.sub_32 5807 %4 = ADDI %3, 1 5808 %6 = IMPLICIT_DEF 5809 %5 = INSERT_SUBREG %6, killed %4, 1 5810 %7 = LI8 400 5811 STFSX %1, %0, killed %7 :: (store (s32) into %ir.arrayidx, !tbaa !14) 5812 ; CHECK: STFS %1, 400, %0 5813 ; CHECK-LATE: stfs 1, 400(3) 5814 %8 = ADDI %3, 2 5815 %10 = IMPLICIT_DEF 5816 %9 = INSERT_SUBREG %10, killed %8, 1 5817 %11 = LI8 -401 5818 STFSX %1, %0, killed %11 :: (store (s32) into %ir.arrayidx3, !tbaa !14) 5819 ; CHECK: STFS %1, -401, %0 5820 ; CHECK-LATE: stfs 1, -401(3) 5821 BLR8 implicit $lr8, implicit $rm 5822 5823... 5824--- 5825name: testSTFSUX 5826# CHECK-ALL: name: testSTFSUX 5827alignment: 16 5828exposesReturnsTwice: false 5829legalized: false 5830regBankSelected: false 5831selected: false 5832tracksRegLiveness: true 5833registers: 5834 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5835 - { id: 1, class: f4rc, preferred-register: '' } 5836 - { id: 2, class: g8rc, preferred-register: '' } 5837 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 5838 - { id: 4, class: gprc, preferred-register: '' } 5839 - { id: 5, class: g8rc, preferred-register: '' } 5840 - { id: 6, class: g8rc, preferred-register: '' } 5841 - { id: 7, class: g8rc, preferred-register: '' } 5842 - { id: 8, class: gprc, preferred-register: '' } 5843 - { id: 9, class: g8rc, preferred-register: '' } 5844 - { id: 10, class: g8rc, preferred-register: '' } 5845 - { id: 11, class: g8rc, preferred-register: '' } 5846 - { id: 12, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5847 - { id: 13, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5848liveins: 5849 - { reg: '$x3', virtual-reg: '%0' } 5850 - { reg: '$f1', virtual-reg: '%1' } 5851 - { reg: '$x5', virtual-reg: '%2' } 5852frameInfo: 5853 isFrameAddressTaken: false 5854 isReturnAddressTaken: false 5855 hasStackMap: false 5856 hasPatchPoint: false 5857 stackSize: 0 5858 offsetAdjustment: 0 5859 maxAlignment: 0 5860 adjustsStack: false 5861 hasCalls: false 5862 stackProtector: '' 5863 maxCallFrameSize: 4294967295 5864 hasOpaqueSPAdjustment: false 5865 hasVAStart: false 5866 hasMustTailInVarArgFunc: false 5867 savePoint: '' 5868 restorePoint: '' 5869fixedStack: 5870stack: 5871constants: 5872body: | 5873 bb.0.entry: 5874 liveins: $x3, $f1, $x5 5875 5876 %2 = COPY $x5 5877 %1 = COPY $f1 5878 %0 = COPY $x3 5879 %3 = COPY %2.sub_32 5880 %4 = ADDI %3, 1 5881 %6 = IMPLICIT_DEF 5882 %5 = INSERT_SUBREG %6, killed %4, 1 5883 %7 = LI8 111 5884 %12 = STFSUX %1, %0, killed %7 :: (store (s32) into %ir.arrayidx, !tbaa !14) 5885 ; CHECK: STFSU %1, 111, %0 5886 ; CHECK-LATE: stfsu {{[0-9]+}}, 111({{[0-9]+}}) 5887 %8 = ADDI %3, 2 5888 %10 = IMPLICIT_DEF 5889 %9 = INSERT_SUBREG %10, killed %8, 1 5890 %11 = LI8 987 5891 %13 = STFSUX %1, %0, killed %11 :: (store (s32) into %ir.arrayidx3, !tbaa !14) 5892 ; CHECK: STFSU %1, 987, %0 5893 ; CHECK-LATE: stfsu {{[0-9]+}}, 987({{[0-9]+}}) 5894 BLR8 implicit $lr8, implicit $rm 5895 5896... 5897--- 5898name: testSTFDX 5899# CHECK-ALL: name: testSTFDX 5900alignment: 16 5901exposesReturnsTwice: false 5902legalized: false 5903regBankSelected: false 5904selected: false 5905tracksRegLiveness: true 5906registers: 5907 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5908 - { id: 1, class: f8rc, preferred-register: '' } 5909 - { id: 2, class: g8rc, preferred-register: '' } 5910 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 5911 - { id: 4, class: gprc, preferred-register: '' } 5912 - { id: 5, class: g8rc, preferred-register: '' } 5913 - { id: 6, class: g8rc, preferred-register: '' } 5914 - { id: 7, class: g8rc, preferred-register: '' } 5915 - { id: 8, class: gprc, preferred-register: '' } 5916 - { id: 9, class: g8rc, preferred-register: '' } 5917 - { id: 10, class: g8rc, preferred-register: '' } 5918 - { id: 11, class: g8rc, preferred-register: '' } 5919liveins: 5920 - { reg: '$x3', virtual-reg: '%0' } 5921 - { reg: '$f1', virtual-reg: '%1' } 5922 - { reg: '$x5', virtual-reg: '%2' } 5923frameInfo: 5924 isFrameAddressTaken: false 5925 isReturnAddressTaken: false 5926 hasStackMap: false 5927 hasPatchPoint: false 5928 stackSize: 0 5929 offsetAdjustment: 0 5930 maxAlignment: 0 5931 adjustsStack: false 5932 hasCalls: false 5933 stackProtector: '' 5934 maxCallFrameSize: 4294967295 5935 hasOpaqueSPAdjustment: false 5936 hasVAStart: false 5937 hasMustTailInVarArgFunc: false 5938 savePoint: '' 5939 restorePoint: '' 5940fixedStack: 5941stack: 5942constants: 5943body: | 5944 bb.0.entry: 5945 liveins: $x3, $f1, $x5 5946 5947 %2 = COPY $x5 5948 %1 = COPY $f1 5949 %0 = COPY $x3 5950 %3 = COPY %2.sub_32 5951 %4 = ADDI %3, 1 5952 %6 = IMPLICIT_DEF 5953 %5 = INSERT_SUBREG %6, killed %4, 1 5954 %7 = LI8 876 5955 STFDX %1, %0, killed %7 :: (store (s64) into %ir.arrayidx, !tbaa !12) 5956 ; CHECK: STFD %1, 876, %0 5957 ; CHECK-LATE: stfd 1, 876(3) 5958 %8 = ADDI %3, 2 5959 %10 = IMPLICIT_DEF 5960 %9 = INSERT_SUBREG %10, killed %8, 1 5961 %11 = LI8 -873 5962 STFDX %1, %0, killed %11 :: (store (s64) into %ir.arrayidx3, !tbaa !12) 5963 ; CHECK: STFD %1, -873, %0 5964 ; CHECK-LATE: stfd 1, -873(3) 5965 BLR8 implicit $lr8, implicit $rm 5966 5967... 5968--- 5969name: testSTFDUX 5970# CHECK-ALL: name: testSTFDUX 5971alignment: 16 5972exposesReturnsTwice: false 5973legalized: false 5974regBankSelected: false 5975selected: false 5976tracksRegLiveness: true 5977registers: 5978 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5979 - { id: 1, class: f8rc, preferred-register: '' } 5980 - { id: 2, class: g8rc, preferred-register: '' } 5981 - { id: 3, class: gprc_and_gprc_nor0, preferred-register: '' } 5982 - { id: 4, class: gprc, preferred-register: '' } 5983 - { id: 5, class: g8rc, preferred-register: '' } 5984 - { id: 6, class: g8rc, preferred-register: '' } 5985 - { id: 7, class: g8rc, preferred-register: '' } 5986 - { id: 8, class: gprc, preferred-register: '' } 5987 - { id: 9, class: g8rc, preferred-register: '' } 5988 - { id: 10, class: g8rc, preferred-register: '' } 5989 - { id: 11, class: g8rc, preferred-register: '' } 5990 - { id: 12, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5991 - { id: 13, class: g8rc_and_g8rc_nox0, preferred-register: '' } 5992liveins: 5993 - { reg: '$x3', virtual-reg: '%0' } 5994 - { reg: '$f1', virtual-reg: '%1' } 5995 - { reg: '$x5', virtual-reg: '%2' } 5996frameInfo: 5997 isFrameAddressTaken: false 5998 isReturnAddressTaken: false 5999 hasStackMap: false 6000 hasPatchPoint: false 6001 stackSize: 0 6002 offsetAdjustment: 0 6003 maxAlignment: 0 6004 adjustsStack: false 6005 hasCalls: false 6006 stackProtector: '' 6007 maxCallFrameSize: 4294967295 6008 hasOpaqueSPAdjustment: false 6009 hasVAStart: false 6010 hasMustTailInVarArgFunc: false 6011 savePoint: '' 6012 restorePoint: '' 6013fixedStack: 6014stack: 6015constants: 6016body: | 6017 bb.0.entry: 6018 liveins: $x3, $f1, $x5 6019 6020 %2 = COPY $x5 6021 %1 = COPY $f1 6022 %0 = COPY $x3 6023 %3 = COPY %2.sub_32 6024 %4 = ADDI %3, 1 6025 %6 = IMPLICIT_DEF 6026 %5 = INSERT_SUBREG %6, killed %4, 1 6027 %7 = LI8 -9038 6028 %12 = STFDUX %1, %0, killed %7 :: (store (s64) into %ir.arrayidx, !tbaa !12) 6029 ; CHECK: STFDU %1, -9038, %0 6030 ; CHECK-LATE: stfdu {{[0-9]+}}, -9038({{[0-9]+}}) 6031 %8 = ADDI %3, 2 6032 %10 = IMPLICIT_DEF 6033 %9 = INSERT_SUBREG %10, killed %8, 1 6034 %11 = LI8 6477 6035 %13 = STFDUX %1, %0, killed %11 :: (store (s64) into %ir.arrayidx3, !tbaa !12) 6036 ; CHECK: STFDU %1, 6477, %0 6037 ; CHECK-LATE: stfdu {{[0-9]+}}, 6477({{[0-9]+}}) 6038 BLR8 implicit $lr8, implicit $rm 6039 6040... 6041--- 6042name: testSTXSSPX 6043# CHECK-ALL: name: testSTXSSPX 6044alignment: 16 6045exposesReturnsTwice: false 6046legalized: false 6047regBankSelected: false 6048selected: false 6049tracksRegLiveness: true 6050registers: 6051 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 6052 - { id: 1, class: vssrc, preferred-register: '' } 6053 - { id: 2, class: g8rc, preferred-register: '' } 6054 - { id: 3, class: g8rc, preferred-register: '' } 6055liveins: 6056 - { reg: '$x3', virtual-reg: '%0' } 6057 - { reg: '$f1', virtual-reg: '%1' } 6058 - { reg: '$x5', virtual-reg: '%2' } 6059frameInfo: 6060 isFrameAddressTaken: false 6061 isReturnAddressTaken: false 6062 hasStackMap: false 6063 hasPatchPoint: false 6064 stackSize: 0 6065 offsetAdjustment: 0 6066 maxAlignment: 0 6067 adjustsStack: false 6068 hasCalls: false 6069 stackProtector: '' 6070 maxCallFrameSize: 4294967295 6071 hasOpaqueSPAdjustment: false 6072 hasVAStart: false 6073 hasMustTailInVarArgFunc: false 6074 savePoint: '' 6075 restorePoint: '' 6076fixedStack: 6077stack: 6078constants: 6079body: | 6080 bb.0.entry: 6081 liveins: $x3, $f1, $x5 6082 6083 %2 = COPY $x5 6084 %1 = COPY $f1 6085 %0 = COPY $x3 6086 %3 = LI8 444 6087 STXSSPX %1, %0, killed %3 :: (store (s32) into %ir.arrayidx, !tbaa !14) 6088 ; CHECK: DFSTOREf32 %1, 444, %0 6089 ; CHECK-LATE: stfs 1, 444(3) 6090 BLR8 implicit $lr8, implicit $rm 6091 6092... 6093--- 6094name: testSTXSDX 6095# CHECK-ALL: name: testSTXSDX 6096alignment: 16 6097exposesReturnsTwice: false 6098legalized: false 6099regBankSelected: false 6100selected: false 6101tracksRegLiveness: true 6102registers: 6103 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 6104 - { id: 1, class: vsfrc, preferred-register: '' } 6105 - { id: 2, class: g8rc, preferred-register: '' } 6106 - { id: 3, class: g8rc, preferred-register: '' } 6107liveins: 6108 - { reg: '$x3', virtual-reg: '%0' } 6109 - { reg: '$f1', virtual-reg: '%1' } 6110 - { reg: '$x5', virtual-reg: '%2' } 6111frameInfo: 6112 isFrameAddressTaken: false 6113 isReturnAddressTaken: false 6114 hasStackMap: false 6115 hasPatchPoint: false 6116 stackSize: 0 6117 offsetAdjustment: 0 6118 maxAlignment: 0 6119 adjustsStack: false 6120 hasCalls: false 6121 stackProtector: '' 6122 maxCallFrameSize: 4294967295 6123 hasOpaqueSPAdjustment: false 6124 hasVAStart: false 6125 hasMustTailInVarArgFunc: false 6126 savePoint: '' 6127 restorePoint: '' 6128fixedStack: 6129stack: 6130constants: 6131body: | 6132 bb.0.entry: 6133 liveins: $x3, $f1, $x5 6134 6135 %2 = COPY $x5 6136 %1 = COPY $f1 6137 %0 = COPY $x3 6138 %3 = LI8 4 6139 STXSDX %1, %0, killed %3, implicit $rm :: (store (s64) into %ir.arrayidx, !tbaa !12) 6140 ; CHECK: DFSTOREf64 %1, 4, %0 6141 ; CHECK-LATE: stfd 1, 4(3) 6142 BLR8 implicit $lr8, implicit $rm 6143 6144... 6145--- 6146name: testSTXVX 6147# CHECK-ALL: name: testSTXVX 6148alignment: 16 6149exposesReturnsTwice: false 6150legalized: false 6151regBankSelected: false 6152selected: false 6153tracksRegLiveness: true 6154registers: 6155 - { id: 0, class: g8rc_and_g8rc_nox0, preferred-register: '' } 6156 - { id: 1, class: vrrc, preferred-register: '' } 6157 - { id: 2, class: g8rc, preferred-register: '' } 6158 - { id: 3, class: g8rc, preferred-register: '' } 6159liveins: 6160 - { reg: '$x3', virtual-reg: '%0' } 6161 - { reg: '$v2', virtual-reg: '%1' } 6162 - { reg: '$x7', virtual-reg: '%2' } 6163frameInfo: 6164 isFrameAddressTaken: false 6165 isReturnAddressTaken: false 6166 hasStackMap: false 6167 hasPatchPoint: false 6168 stackSize: 0 6169 offsetAdjustment: 0 6170 maxAlignment: 0 6171 adjustsStack: false 6172 hasCalls: false 6173 stackProtector: '' 6174 maxCallFrameSize: 4294967295 6175 hasOpaqueSPAdjustment: false 6176 hasVAStart: false 6177 hasMustTailInVarArgFunc: false 6178 savePoint: '' 6179 restorePoint: '' 6180fixedStack: 6181stack: 6182constants: 6183body: | 6184 bb.0.entry: 6185 liveins: $x3, $v2, $x7 6186 6187 %2 = COPY $x7 6188 %1 = COPY $v2 6189 %0 = LI8 16 6190 %3 = RLDICR %2, 4, 59 6191 STXVX %1, %0, killed %3 :: (store (s128) into %ir.arrayidx, !tbaa !3) 6192 ; CHECK: STXV %1, 16, killed %3 6193 ; CHECK-LATE: stxv 34, 16(4) 6194 BLR8 implicit $lr8, implicit $rm 6195 6196... 6197--- 6198name: testSUBFC 6199# CHECK-ALL: name: testSUBFC 6200alignment: 16 6201exposesReturnsTwice: false 6202legalized: false 6203regBankSelected: false 6204selected: false 6205tracksRegLiveness: true 6206registers: 6207 - { id: 0, class: gprc, preferred-register: '' } 6208 - { id: 1, class: g8rc, preferred-register: '' } 6209 - { id: 2, class: g8rc, preferred-register: '' } 6210 - { id: 3, class: g8rc, preferred-register: '' } 6211 - { id: 4, class: gprc, preferred-register: '' } 6212 - { id: 5, class: gprc, preferred-register: '' } 6213 - { id: 6, class: gprc, preferred-register: '' } 6214 - { id: 7, class: gprc, preferred-register: '' } 6215 - { id: 8, class: gprc, preferred-register: '' } 6216liveins: 6217 - { reg: '$x3', virtual-reg: '%0' } 6218 - { reg: '$x4', virtual-reg: '%1' } 6219 - { reg: '$x5', virtual-reg: '%2' } 6220 - { reg: '$x6', virtual-reg: '%3' } 6221frameInfo: 6222 isFrameAddressTaken: false 6223 isReturnAddressTaken: false 6224 hasStackMap: false 6225 hasPatchPoint: false 6226 stackSize: 0 6227 offsetAdjustment: 0 6228 maxAlignment: 0 6229 adjustsStack: false 6230 hasCalls: false 6231 stackProtector: '' 6232 maxCallFrameSize: 4294967295 6233 hasOpaqueSPAdjustment: false 6234 hasVAStart: false 6235 hasMustTailInVarArgFunc: false 6236 savePoint: '' 6237 restorePoint: '' 6238fixedStack: 6239stack: 6240constants: 6241body: | 6242 bb.0.entry: 6243 liveins: $x3, $x4, $x5, $x6 6244 6245 %3 = COPY $x6 6246 %2 = COPY $x5 6247 %1 = COPY $x4 6248 %6 = COPY %3.sub_32 6249 %7 = COPY %2.sub_32 6250 %8 = COPY %1.sub_32 6251 %0 = LI 55 6252 %4 = SUBFC %7, %0, implicit-def $carry 6253 ; CHECK: SUBFIC %7, 55 6254 ; CHECK-LATE: subfic 3, 5, 55 6255 %5 = SUBFE %6, %8, implicit-def dead $carry, implicit $carry 6256 $x3 = EXTSW_32_64 %4 6257 $x4 = EXTSW_32_64 %5 6258 BLR8 implicit $lr8, implicit $rm, implicit $x3, implicit $x4 6259 6260... 6261--- 6262name: testSUBFC8 6263# CHECK-ALL: name: testSUBFC8 6264alignment: 16 6265exposesReturnsTwice: false 6266legalized: false 6267regBankSelected: false 6268selected: false 6269tracksRegLiveness: true 6270registers: 6271 - { id: 0, class: g8rc, preferred-register: '' } 6272 - { id: 1, class: g8rc, preferred-register: '' } 6273 - { id: 2, class: g8rc, preferred-register: '' } 6274 - { id: 3, class: g8rc, preferred-register: '' } 6275 - { id: 4, class: g8rc, preferred-register: '' } 6276 - { id: 5, class: g8rc, preferred-register: '' } 6277liveins: 6278 - { reg: '$x3', virtual-reg: '%0' } 6279 - { reg: '$x4', virtual-reg: '%1' } 6280 - { reg: '$x5', virtual-reg: '%2' } 6281 - { reg: '$x6', virtual-reg: '%3' } 6282frameInfo: 6283 isFrameAddressTaken: false 6284 isReturnAddressTaken: false 6285 hasStackMap: false 6286 hasPatchPoint: false 6287 stackSize: 0 6288 offsetAdjustment: 0 6289 maxAlignment: 0 6290 adjustsStack: false 6291 hasCalls: false 6292 stackProtector: '' 6293 maxCallFrameSize: 4294967295 6294 hasOpaqueSPAdjustment: false 6295 hasVAStart: false 6296 hasMustTailInVarArgFunc: false 6297 savePoint: '' 6298 restorePoint: '' 6299fixedStack: 6300stack: 6301constants: 6302body: | 6303 bb.0.entry: 6304 liveins: $x3, $x4, $x5, $x6 6305 6306 %3 = COPY $x6 6307 %2 = COPY $x5 6308 %1 = COPY $x4 6309 %0 = LI8 7635 6310 %4 = SUBFC8 %2, %0, implicit-def $carry 6311 ; CHECK: SUBFIC8 %2, 7635 6312 ; CHECK-LATE: subfic 3, 5, 7635 6313 %5 = SUBFE8 %3, %1, implicit-def dead $carry, implicit $carry 6314 $x3 = COPY %4 6315 $x4 = COPY %5 6316 BLR8 implicit $lr8, implicit $rm, implicit $x3, implicit $x4 6317 6318... 6319--- 6320name: testXOR 6321# CHECK-ALL: name: testXOR 6322alignment: 16 6323exposesReturnsTwice: false 6324legalized: false 6325regBankSelected: false 6326selected: false 6327tracksRegLiveness: true 6328registers: 6329 - { id: 0, class: g8rc, preferred-register: '' } 6330 - { id: 1, class: gprc, preferred-register: '' } 6331 - { id: 2, class: gprc, preferred-register: '' } 6332 - { id: 3, class: gprc, preferred-register: '' } 6333liveins: 6334 - { reg: '$x3', virtual-reg: '%0' } 6335 - { reg: '$x4', virtual-reg: '%1' } 6336frameInfo: 6337 isFrameAddressTaken: false 6338 isReturnAddressTaken: false 6339 hasStackMap: false 6340 hasPatchPoint: false 6341 stackSize: 0 6342 offsetAdjustment: 0 6343 maxAlignment: 0 6344 adjustsStack: false 6345 hasCalls: false 6346 stackProtector: '' 6347 maxCallFrameSize: 4294967295 6348 hasOpaqueSPAdjustment: false 6349 hasVAStart: false 6350 hasMustTailInVarArgFunc: false 6351 savePoint: '' 6352 restorePoint: '' 6353fixedStack: 6354stack: 6355constants: 6356body: | 6357 bb.0.entry: 6358 liveins: $x3, $x4 6359 6360 %1 = LI 10101 6361 %0 = COPY $x3 6362 %3 = COPY %0.sub_32 6363 %2 = XOR %1, %3 6364 ; CHECK: XORI %3, 10101 6365 ; CHECK-LATE: 3, 3, 10101 6366 $x3 = EXTSW_32_64 %2 6367 BLR8 implicit $lr8, implicit $rm, implicit $x3 6368 6369... 6370--- 6371name: testXOR8 6372# CHECK-ALL: name: testXOR8 6373alignment: 16 6374exposesReturnsTwice: false 6375legalized: false 6376regBankSelected: false 6377selected: false 6378tracksRegLiveness: true 6379registers: 6380 - { id: 0, class: g8rc, preferred-register: '' } 6381 - { id: 1, class: g8rc, preferred-register: '' } 6382 - { id: 2, class: g8rc, preferred-register: '' } 6383liveins: 6384 - { reg: '$x3', virtual-reg: '%0' } 6385 - { reg: '$x4', virtual-reg: '%1' } 6386frameInfo: 6387 isFrameAddressTaken: false 6388 isReturnAddressTaken: false 6389 hasStackMap: false 6390 hasPatchPoint: false 6391 stackSize: 0 6392 offsetAdjustment: 0 6393 maxAlignment: 0 6394 adjustsStack: false 6395 hasCalls: false 6396 stackProtector: '' 6397 maxCallFrameSize: 4294967295 6398 hasOpaqueSPAdjustment: false 6399 hasVAStart: false 6400 hasMustTailInVarArgFunc: false 6401 savePoint: '' 6402 restorePoint: '' 6403fixedStack: 6404stack: 6405constants: 6406body: | 6407 bb.0.entry: 6408 liveins: $x3, $x4 6409 6410 %1 = COPY $x4 6411 %0 = LI8 5535 6412 %2 = XOR8 %1, %0 6413 ; CHECK: XORI8 %1, 5535 6414 ; CHECK-LATE: xori 3, 4, 5535 6415 $x3 = COPY %2 6416 BLR8 implicit $lr8, implicit $rm, implicit $x3 6417 6418... 6419--- 6420name: testXORI 6421# CHECK-ALL: name: testXORI 6422alignment: 16 6423exposesReturnsTwice: false 6424legalized: false 6425regBankSelected: false 6426selected: false 6427tracksRegLiveness: true 6428registers: 6429 - { id: 0, class: gprc, preferred-register: '' } 6430 - { id: 1, class: gprc, preferred-register: '' } 6431liveins: 6432 - { reg: '$x3', virtual-reg: '%0' } 6433frameInfo: 6434 isFrameAddressTaken: false 6435 isReturnAddressTaken: false 6436 hasStackMap: false 6437 hasPatchPoint: false 6438 stackSize: 0 6439 offsetAdjustment: 0 6440 maxAlignment: 0 6441 adjustsStack: false 6442 hasCalls: false 6443 stackProtector: '' 6444 maxCallFrameSize: 4294967295 6445 hasOpaqueSPAdjustment: false 6446 hasVAStart: false 6447 hasMustTailInVarArgFunc: false 6448 savePoint: '' 6449 restorePoint: '' 6450fixedStack: 6451stack: 6452constants: 6453body: | 6454 bb.0.entry: 6455 liveins: $x3 6456 6457 %0 = LI 871 6458 %1 = XORI %0, 17 6459 ; CHECK: LI 886 6460 ; CHECK-LATE: li 3, 886 6461 $x3 = EXTSW_32_64 %1 6462 BLR8 implicit $lr8, implicit $rm, implicit $x3 6463 6464... 6465--- 6466name: testXOR8I 6467# CHECK-ALL: name: testXOR8I 6468alignment: 16 6469exposesReturnsTwice: false 6470legalized: false 6471regBankSelected: false 6472selected: false 6473tracksRegLiveness: true 6474registers: 6475 - { id: 0, class: g8rc, preferred-register: '' } 6476 - { id: 1, class: g8rc, preferred-register: '' } 6477liveins: 6478 - { reg: '$x3', virtual-reg: '%0' } 6479frameInfo: 6480 isFrameAddressTaken: false 6481 isReturnAddressTaken: false 6482 hasStackMap: false 6483 hasPatchPoint: false 6484 stackSize: 0 6485 offsetAdjustment: 0 6486 maxAlignment: 0 6487 adjustsStack: false 6488 hasCalls: false 6489 stackProtector: '' 6490 maxCallFrameSize: 4294967295 6491 hasOpaqueSPAdjustment: false 6492 hasVAStart: false 6493 hasMustTailInVarArgFunc: false 6494 savePoint: '' 6495 restorePoint: '' 6496fixedStack: 6497stack: 6498constants: 6499body: | 6500 bb.0.entry: 6501 liveins: $x3 6502 6503 %0 = LI8 453 6504 %1 = XORI8 %0, 17 6505 ; CHECK: LI8 468 6506 ; CHECK-LATE: li 3, 468 6507 $x3 = COPY %1 6508 BLR8 implicit $lr8, implicit $rm, implicit $x3 6509 6510... 6511