1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s
2
3;;; Test or vm intrinsic instructions
4;;;
5;;; Note:
6;;;   We test ORM*mm and ORM*yy instructions.
7
8; Function Attrs: nounwind readnone
9define fastcc <256 x i1> @orm_mmm(<256 x i1> %0, <256 x i1> %1) {
10; CHECK-LABEL: orm_mmm:
11; CHECK:       # %bb.0:
12; CHECK-NEXT:    orm %vm1, %vm1, %vm2
13; CHECK-NEXT:    b.l.t (, %s10)
14  %3 = tail call <256 x i1> @llvm.ve.vl.orm.mmm(<256 x i1> %0, <256 x i1> %1)
15  ret <256 x i1> %3
16}
17
18; Function Attrs: nounwind readnone
19declare <256 x i1> @llvm.ve.vl.orm.mmm(<256 x i1>, <256 x i1>)
20
21; Function Attrs: nounwind readnone
22define fastcc <512 x i1> @orm_MMM(<512 x i1> %0, <512 x i1> %1) {
23; CHECK-LABEL: orm_MMM:
24; CHECK:       # %bb.0:
25; CHECK-NEXT:    orm %vm2, %vm2, %vm4
26; CHECK-NEXT:    orm %vm3, %vm3, %vm5
27; CHECK-NEXT:    b.l.t (, %s10)
28  %3 = tail call <512 x i1> @llvm.ve.vl.orm.MMM(<512 x i1> %0, <512 x i1> %1)
29  ret <512 x i1> %3
30}
31
32; Function Attrs: nounwind readnone
33declare <512 x i1> @llvm.ve.vl.orm.MMM(<512 x i1>, <512 x i1>)
34