1// RUN: not llvm-mc -triple=thumbv8m.main -mattr=+cdecp0 -mattr=+cdecp1 -show-encoding < %s 2>%t | FileCheck %s 2// RUN: FileCheck <%t --check-prefix=ERROR %s 3 4// CHECK-LABEL: test_gcp 5test_gcp: 6// CHECK-NEXT: mrc p3, #1, r3, c15, c15, #5 @ encoding: [0x3f,0xee,0xbf,0x33] 7mrc p3, #1, r3, c15, c15, #5 8// CHECK-NEXT: mcr2 p3, #2, r2, c7, c11, #7 @ encoding: [0x47,0xfe,0xfb,0x23] 9mcr2 p3, #2, r2, c7, c11, #7 10 11// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 12mrc p0, #1, r2, c3, c4, #5 13// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 14ldc2 p1, c8, [r1, #4] 15// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 16ldc2 p0, c7, [r2] 17// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 18ldc2 p1, c6, [r3, #-224] 19// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 20ldc2 p0, c5, [r4, #-120]! 21// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 22ldc2l p1, c2, [r7, #4] 23// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 24ldc2l p0, c1, [r8] 25// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 26ldc2l p1, c0, [r9, #-224] 27// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 28ldc2l p0, c1, [r10, #-120]! 29// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 30stc2 p1, c8, [r1, #4] 31// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 32stc2 p0, c7, [r2] 33// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 34stc2 p1, c6, [r3, #-224] 35// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 36stc2 p0, c5, [r4, #-120]! 37// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 38stc2l p1, c2, [r7, #4] 39// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 40stc2l p0, c1, [r8] 41// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 42stc2l p1, c0, [r9, #-224] 43// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as GCP 44stc2l p0, c1, [r10, #-120]! 45 46// CHECK-LABEL: test_predication1: 47test_predication1: 48ittt eq 49// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable 50cx1 p0, r3, #8191 51// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable 52cx2 p0, r2, r3, #123 53// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable 54cx3 p0, r1, r5, r7, #63 55nop 56nop 57nop 58ittt eq 59// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable 60cx1d p0, r0, r1, #8191 61// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable 62cx2d p0, r0, r1, r3, #123 63// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable 64cx3d p0, r0, r1, r5, r7, #63 65nop 66nop 67nop 68 69// CHECK-LABEL: test_predication2: 70test_predication2: 71// CHECK: itte eq @ encoding: [0x06,0xbf] 72itte eq 73// CHECK-NEXT: cx1aeq p0, r3, #8191 @ encoding: [0x3f,0xfe,0xbf,0x30] 74cx1aeq p0, r3, #8191 75// CHECK-NEXT: cx2aeq p0, r2, r3, #123 @ encoding: [0x43,0xfe,0xbb,0x20] 76cx2aeq p0, r2, r3, #123 77// CHECK-NEXT: cx3ane p0, r1, r5, r7, #63 @ encoding: [0xf5,0xfe,0xb1,0x70] 78cx3ane p0, r1, r5, r7, #63 79// CHECK-NEXT: itte eq @ encoding: [0x06,0xbf] 80itte eq 81// CHECK-NEXT: cx1daeq p0, r0, r1, #8191 @ encoding: [0x3f,0xfe,0xff,0x00] 82cx1daeq p0, r0, r1, #8191 83// CHECK-NEXT: cx2daeq p0, r0, r1, r3, #123 @ encoding: [0x43,0xfe,0xfb,0x00] 84cx2daeq p0, r0, r1, r3, #123 85// CHECK-NEXT: cx3dane p0, r0, r1, r5, r7, #63 @ encoding: [0xf5,0xfe,0xf0,0x70] 86cx3dane p0, r0, r1, r5, r7, #63 87 88 89// CHECK-LABEL: test_cx1: 90test_cx1: 91// CHECK-NEXT: cx1 p0, r3, #8191 @ encoding: [0x3f,0xee,0xbf,0x30] 92cx1 p0, r3, #8191 93// CHECK-NEXT: cx1a p1, r2, #0 @ encoding: [0x00,0xfe,0x00,0x21] 94cx1a p1, r2, #0 95// CHECK-NEXT: cx1d p0, r4, r5, #1234 @ encoding: [0x09,0xee,0xd2,0x40] 96cx1d p0, r4, r5, #1234 97// CHECK-NEXT: cx1da p1, r2, r3, #1234 @ encoding: [0x09,0xfe,0xd2,0x21] 98cx1da p1, r2, r3, #1234 99// CHECK-NEXT: cx1 p0, apsr_nzcv, #8191 @ encoding: [0x3f,0xee,0xbf,0xf0] 100cx1 p0, apsr_nzcv, #8191 101// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be in the range [p0, p7] 102cx1 p8, r1, #1234 103// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: coprocessor must be configured as CDE 104cx1 p2, r0, #1 105// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,8191] 106cx1 p0, r1, #8192 107// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a register in the range [r0, r12], r14 or apsr_nzcv 108cx1 p0, r13, #1234 109// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a consecutive register 110cx1d p1, r0, #1234, #123 111// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an even-numbered register in the range [r0, r10] 112cx1d p1, r1, #1234 113// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a consecutive register 114cx1d p1, r2, r4, #1234 115// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an even-numbered register in the range [r0, r10] 116cx1da p0, r1, #1234 117// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 118cx1 p0, r0, r0, #1234 119// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 120cx1d p0, r0, r1, r2, #1234 121// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 122cx1a p0, r0, r2, #1234 123 124// CHECK-LABEL: test_cx2: 125test_cx2: 126// CHECK-NEXT: cx2 p0, r3, r7, #0 @ encoding: [0x47,0xee,0x00,0x30] 127cx2 p0, r3, r7, #0 128// CHECK-NEXT: cx2a p0, r1, r4, #511 @ encoding: [0x74,0xfe,0xbf,0x10] 129cx2a p0, r1, r4, #511 130// CHECK-NEXT: cx2d p0, r2, r3, r1, #123 @ encoding: [0x41,0xee,0xfb,0x20] 131cx2d p0, r2, r3, r1, #123 132// CHECK-NEXT: cx2da p0, r2, r3, r7, #123 @ encoding: [0x47,0xfe,0xfb,0x20] 133cx2da p0, r2, r3, r7, #123 134// CHECK-NEXT: cx2da p1, r10, r11, apsr_nzcv, #123 @ encoding: [0x4f,0xfe,0xfb,0xa1] 135cx2da p1, r10, r11, apsr_nzcv, #123 136 137// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,511] 138cx2 p0, r1, r4, #512 139// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an even-numbered register in the range [r0, r10] 140cx2d p0, r12, r7, #123 141// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an even-numbered register in the range [r0, r10] 142cx2da p0, r7, r7, #123 143// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an even-numbered register in the range [r0, r10] 144cx2da p1, apsr_nzcv, r7, #123 145// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 146cx2 p0, r0, r0, r7, #1 147// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a consecutive register 148cx2d p0, r0, r0, r7, #1 149// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 150cx2a p0, r0, r2, r7, #1 151// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a consecutive register 152cx2da p0, r0, r2, r7, #1 153 154// CHECK-LABEL: test_cx3: 155test_cx3: 156// CHECK-NEXT: cx3 p0, r1, r2, r3, #0 @ encoding: [0x82,0xee,0x01,0x30] 157cx3 p0, r1, r2, r3, #0 158// CHECK-NEXT: cx3a p0, r1, r5, r7, #63 @ encoding: [0xf5,0xfe,0xb1,0x70] 159cx3a p0, r1, r5, r7, #63 160// CHECK-NEXT: cx3d p1, r0, r1, r7, r1, #12 @ encoding: [0x97,0xee,0xc0,0x11] 161cx3d p1, r0, r1, r7, r1, #12 162// CHECK-NEXT: cx3da p0, r8, r9, r2, r3, #12 @ encoding: [0x92,0xfe,0xc8,0x30] 163cx3da p0, r8, r9, r2, r3, #12 164// CHECK-NEXT: cx3 p1, apsr_nzcv, r7, apsr_nzcv, #12 @ encoding: [0x97,0xee,0x8f,0xf1] 165cx3 p1, apsr_nzcv, r7, apsr_nzcv, #12 166// CHECK-NEXT: cx3d p0, r8, r9, apsr_nzcv, apsr_nzcv, #12 @ encoding: [0x9f,0xee,0xc8,0xf0] 167cx3d p0, r8, r9, apsr_nzcv, apsr_nzcv, #12 168 169// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,63] 170cx3 p0, r1, r5, r7, #64 171// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an even-numbered register in the range [r0, r10] 172cx3da p1, r14, r2, r3, #12 173// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a register in the range [r0, r12], r14 or apsr_nzcv 174cx3a p0, r15, r2, r3, #12 175// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 176cx2 p0, r0, r0, r7, r3, #1 177// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a consecutive register 178cx2d p0, r0, r0, r7, r3, #1 179// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 180cx3a p0, r1, r2, r5, r7, #63 181// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a consecutive register 182cx3da p0, r8, apsr_nzcv, r2, r3, #12 183 184// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 185vcx1 p0, s0, #0 186// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 187vcx1 p0, d0, #0 188// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 189vcx1 p0, q0, #0 190// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 191vcx1a p0, s0, #0 192// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 193vcx1a p0, d0, #0 194// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 195vcx1a p0, q0, #0 196// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 197vcx2 p0, s0, s1, #0 198// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 199vcx2 p0, d0, d1, #0 200// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 201vcx2 p0, q0, q1, #0 202// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 203vcx2a p0, s0, s1, #0 204// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 205vcx2a p0, d0, d1, #0 206// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 207vcx2 p0, q0, q1, #0 208// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 209vcx3 p0, s0, s1, s2, #0 210// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 211vcx3 p0, d0, d1, d2, #0 212// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 213vcx3 p0, q0, q1, q2, #0 214// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 215vcx3a p0, s0, s1, s2, #0 216// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 217vcx3a p0, d0, d1, d2, #0 218// ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction 219vcx3a p0, q0, q1, q2, #0 220