1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX7 %s 3; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX8 %s 4; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -slp-vectorizer %s | FileCheck -check-prefixes=GCN,GFX8 %s 5 6define <2 x half> @round_v2f16(<2 x half> %arg) { 7; GFX7-LABEL: @round_v2f16( 8; GFX7-NEXT: bb: 9; GFX7-NEXT: [[T:%.*]] = extractelement <2 x half> [[ARG:%.*]], i64 0 10; GFX7-NEXT: [[T1:%.*]] = tail call half @llvm.round.f16(half [[T]]) 11; GFX7-NEXT: [[T2:%.*]] = insertelement <2 x half> undef, half [[T1]], i64 0 12; GFX7-NEXT: [[T3:%.*]] = extractelement <2 x half> [[ARG]], i64 1 13; GFX7-NEXT: [[T4:%.*]] = tail call half @llvm.round.f16(half [[T3]]) 14; GFX7-NEXT: [[T5:%.*]] = insertelement <2 x half> [[T2]], half [[T4]], i64 1 15; GFX7-NEXT: ret <2 x half> [[T5]] 16; 17; GFX8-LABEL: @round_v2f16( 18; GFX8-NEXT: bb: 19; GFX8-NEXT: [[TMP0:%.*]] = call <2 x half> @llvm.round.v2f16(<2 x half> [[ARG:%.*]]) 20; GFX8-NEXT: ret <2 x half> [[TMP0]] 21; 22bb: 23 %t = extractelement <2 x half> %arg, i64 0 24 %t1 = tail call half @llvm.round.half(half %t) 25 %t2 = insertelement <2 x half> undef, half %t1, i64 0 26 %t3 = extractelement <2 x half> %arg, i64 1 27 %t4 = tail call half @llvm.round.half(half %t3) 28 %t5 = insertelement <2 x half> %t2, half %t4, i64 1 29 ret <2 x half> %t5 30} 31 32 33define <2 x float> @round_v2f32(<2 x float> %arg) { 34; GCN-LABEL: @round_v2f32( 35; GCN-NEXT: bb: 36; GCN-NEXT: [[T:%.*]] = extractelement <2 x float> [[ARG:%.*]], i64 0 37; GCN-NEXT: [[T1:%.*]] = tail call float @llvm.round.f32(float [[T]]) 38; GCN-NEXT: [[T2:%.*]] = insertelement <2 x float> undef, float [[T1]], i64 0 39; GCN-NEXT: [[T3:%.*]] = extractelement <2 x float> [[ARG]], i64 1 40; GCN-NEXT: [[T4:%.*]] = tail call float @llvm.round.f32(float [[T3]]) 41; GCN-NEXT: [[T5:%.*]] = insertelement <2 x float> [[T2]], float [[T4]], i64 1 42; GCN-NEXT: ret <2 x float> [[T5]] 43; 44bb: 45 %t = extractelement <2 x float> %arg, i64 0 46 %t1 = tail call float @llvm.round.f32(float %t) 47 %t2 = insertelement <2 x float> undef, float %t1, i64 0 48 %t3 = extractelement <2 x float> %arg, i64 1 49 %t4 = tail call float @llvm.round.f32(float %t3) 50 %t5 = insertelement <2 x float> %t2, float %t4, i64 1 51 ret <2 x float> %t5 52} 53 54declare half @llvm.round.half(half) #0 55declare float @llvm.round.f32(float) #0 56 57attributes #0 = { nounwind readnone speculatable willreturn } 58