1import("//llvm/utils/TableGen/tablegen.gni") 2 3tablegen("AMDGPUGenAsmWriter") { 4 visibility = [ ":MCTargetDesc" ] 5 args = [ "-gen-asm-writer" ] 6 td_file = "../AMDGPU.td" 7} 8 9tablegen("AMDGPUGenInstrInfo") { 10 visibility = [ ":tablegen" ] 11 args = [ "-gen-instr-info" ] 12 td_file = "../AMDGPU.td" 13} 14 15tablegen("AMDGPUGenMCCodeEmitter") { 16 visibility = [ ":MCTargetDesc" ] 17 args = [ "-gen-emitter" ] 18 td_file = "../AMDGPU.td" 19} 20 21tablegen("AMDGPUGenRegisterInfo") { 22 visibility = [ ":tablegen" ] 23 args = [ "-gen-register-info" ] 24 td_file = "../AMDGPU.td" 25} 26 27tablegen("AMDGPUGenSubtargetInfo") { 28 visibility = [ ":tablegen" ] 29 args = [ "-gen-subtarget" ] 30 td_file = "../AMDGPU.td" 31} 32 33tablegen("R600GenAsmWriter") { 34 visibility = [ ":MCTargetDesc" ] 35 args = [ "-gen-asm-writer" ] 36 td_file = "../R600.td" 37} 38 39tablegen("R600GenInstrInfo") { 40 visibility = [ ":tablegen" ] 41 args = [ "-gen-instr-info" ] 42 td_file = "../R600.td" 43} 44 45tablegen("R600GenMCCodeEmitter") { 46 visibility = [ ":MCTargetDesc" ] 47 args = [ "-gen-emitter" ] 48 td_file = "../R600.td" 49} 50 51tablegen("R600GenRegisterInfo") { 52 visibility = [ ":tablegen" ] 53 args = [ "-gen-register-info" ] 54 td_file = "../R600.td" 55} 56 57tablegen("R600GenSubtargetInfo") { 58 visibility = [ ":tablegen" ] 59 args = [ "-gen-subtarget" ] 60 td_file = "../R600.td" 61} 62 63# This should contain tablegen targets generating .inc files included 64# by other targets. .inc files only used by .cpp files in this directory 65# should be in deps on the static_library instead. 66group("tablegen") { 67 visibility = [ 68 ":MCTargetDesc", 69 "../Utils", 70 ] 71 public_deps = [ 72 ":AMDGPUGenInstrInfo", 73 ":AMDGPUGenRegisterInfo", 74 ":AMDGPUGenSubtargetInfo", 75 ":R600GenInstrInfo", 76 ":R600GenRegisterInfo", 77 ":R600GenSubtargetInfo", 78 ] 79} 80 81static_library("MCTargetDesc") { 82 output_name = "LLVMAMDGPUDesc" 83 public_deps = [ ":tablegen" ] 84 deps = [ 85 ":AMDGPUGenAsmWriter", 86 ":AMDGPUGenMCCodeEmitter", 87 ":R600GenAsmWriter", 88 ":R600GenMCCodeEmitter", 89 "//llvm/lib/BinaryFormat", 90 "//llvm/lib/IR", 91 "//llvm/lib/MC", 92 "//llvm/lib/Support", 93 "//llvm/lib/Target/AMDGPU/TargetInfo", 94 "//llvm/lib/Target/AMDGPU/Utils", 95 ] 96 include_dirs = [ ".." ] 97 sources = [ 98 "AMDGPUAsmBackend.cpp", 99 "AMDGPUELFObjectWriter.cpp", 100 "AMDGPUELFStreamer.cpp", 101 "AMDGPUInstPrinter.cpp", 102 "AMDGPUMCAsmInfo.cpp", 103 "AMDGPUMCCodeEmitter.cpp", 104 "AMDGPUMCTargetDesc.cpp", 105 "AMDGPUTargetStreamer.cpp", 106 "R600MCCodeEmitter.cpp", 107 "R600MCTargetDesc.cpp", 108 "SIMCCodeEmitter.cpp", 109 ] 110} 111