1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null
5 #include <arm_sve.h>
6
test_svldnf1ub_s16(svbool_t pg,const uint8_t * base)7 svint16_t test_svldnf1ub_s16(svbool_t pg, const uint8_t *base)
8 {
9 // CHECK-LABEL: test_svldnf1ub_s16
10 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
11 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %base)
12 // CHECK: %[[ZEXT:.*]] = zext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
13 // CHECK: ret <vscale x 8 x i16> %[[ZEXT]]
14 return svldnf1ub_s16(pg, base);
15 }
16
test_svldnf1ub_s32(svbool_t pg,const uint8_t * base)17 svint32_t test_svldnf1ub_s32(svbool_t pg, const uint8_t *base)
18 {
19 // CHECK-LABEL: test_svldnf1ub_s32
20 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
21 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base)
22 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
23 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
24 return svldnf1ub_s32(pg, base);
25 }
26
test_svldnf1ub_s64(svbool_t pg,const uint8_t * base)27 svint64_t test_svldnf1ub_s64(svbool_t pg, const uint8_t *base)
28 {
29 // CHECK-LABEL: test_svldnf1ub_s64
30 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
31 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base)
32 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
33 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
34 return svldnf1ub_s64(pg, base);
35 }
36
test_svldnf1ub_u16(svbool_t pg,const uint8_t * base)37 svuint16_t test_svldnf1ub_u16(svbool_t pg, const uint8_t *base)
38 {
39 // CHECK-LABEL: test_svldnf1ub_u16
40 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
41 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %base)
42 // CHECK: %[[ZEXT:.*]] = zext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
43 // CHECK: ret <vscale x 8 x i16> %[[ZEXT]]
44 return svldnf1ub_u16(pg, base);
45 }
46
test_svldnf1ub_u32(svbool_t pg,const uint8_t * base)47 svuint32_t test_svldnf1ub_u32(svbool_t pg, const uint8_t *base)
48 {
49 // CHECK-LABEL: test_svldnf1ub_u32
50 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
51 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %base)
52 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
53 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
54 return svldnf1ub_u32(pg, base);
55 }
56
test_svldnf1ub_u64(svbool_t pg,const uint8_t * base)57 svuint64_t test_svldnf1ub_u64(svbool_t pg, const uint8_t *base)
58 {
59 // CHECK-LABEL: test_svldnf1ub_u64
60 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
61 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %base)
62 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
63 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
64 return svldnf1ub_u64(pg, base);
65 }
66
test_svldnf1ub_vnum_s16(svbool_t pg,const uint8_t * base,int64_t vnum)67 svint16_t test_svldnf1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum)
68 {
69 // CHECK-LABEL: test_svldnf1ub_vnum_s16
70 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
71 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 8 x i8>*
72 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i8>, <vscale x 8 x i8>* %[[BITCAST]], i64 %vnum, i64 0
73 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %[[GEP]])
74 // CHECK: %[[ZEXT:.*]] = zext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
75 // CHECK: ret <vscale x 8 x i16> %[[ZEXT]]
76 return svldnf1ub_vnum_s16(pg, base, vnum);
77 }
78
test_svldnf1ub_vnum_s32(svbool_t pg,const uint8_t * base,int64_t vnum)79 svint32_t test_svldnf1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum)
80 {
81 // CHECK-LABEL: test_svldnf1ub_vnum_s32
82 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
83 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 4 x i8>*
84 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i8>, <vscale x 4 x i8>* %[[BITCAST]], i64 %vnum, i64 0
85 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %[[GEP]])
86 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
87 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
88 return svldnf1ub_vnum_s32(pg, base, vnum);
89 }
90
test_svldnf1ub_vnum_s64(svbool_t pg,const uint8_t * base,int64_t vnum)91 svint64_t test_svldnf1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum)
92 {
93 // CHECK-LABEL: test_svldnf1ub_vnum_s64
94 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
95 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
96 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0
97 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]])
98 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
99 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
100 return svldnf1ub_vnum_s64(pg, base, vnum);
101 }
102
test_svldnf1ub_vnum_u16(svbool_t pg,const uint8_t * base,int64_t vnum)103 svuint16_t test_svldnf1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnum)
104 {
105 // CHECK-LABEL: test_svldnf1ub_vnum_u16
106 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
107 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 8 x i8>*
108 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 8 x i8>, <vscale x 8 x i8>* %[[BITCAST]], i64 %vnum, i64 0
109 // CHECK: %[[LOAD:.*]] = call <vscale x 8 x i8> @llvm.aarch64.sve.ldnf1.nxv8i8(<vscale x 8 x i1> %[[PG]], i8* %[[GEP]])
110 // CHECK: %[[ZEXT:.*]] = zext <vscale x 8 x i8> %[[LOAD]] to <vscale x 8 x i16>
111 // CHECK: ret <vscale x 8 x i16> %[[ZEXT]]
112 return svldnf1ub_vnum_u16(pg, base, vnum);
113 }
114
test_svldnf1ub_vnum_u32(svbool_t pg,const uint8_t * base,int64_t vnum)115 svuint32_t test_svldnf1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnum)
116 {
117 // CHECK-LABEL: test_svldnf1ub_vnum_u32
118 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
119 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 4 x i8>*
120 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 4 x i8>, <vscale x 4 x i8>* %[[BITCAST]], i64 %vnum, i64 0
121 // CHECK: %[[LOAD:.*]] = call <vscale x 4 x i8> @llvm.aarch64.sve.ldnf1.nxv4i8(<vscale x 4 x i1> %[[PG]], i8* %[[GEP]])
122 // CHECK: %[[ZEXT:.*]] = zext <vscale x 4 x i8> %[[LOAD]] to <vscale x 4 x i32>
123 // CHECK: ret <vscale x 4 x i32> %[[ZEXT]]
124 return svldnf1ub_vnum_u32(pg, base, vnum);
125 }
126
test_svldnf1ub_vnum_u64(svbool_t pg,const uint8_t * base,int64_t vnum)127 svuint64_t test_svldnf1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnum)
128 {
129 // CHECK-LABEL: test_svldnf1ub_vnum_u64
130 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
131 // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to <vscale x 2 x i8>*
132 // CHECK-DAG: %[[GEP:.*]] = getelementptr <vscale x 2 x i8>, <vscale x 2 x i8>* %[[BITCAST]], i64 %vnum, i64 0
133 // CHECK: %[[LOAD:.*]] = call <vscale x 2 x i8> @llvm.aarch64.sve.ldnf1.nxv2i8(<vscale x 2 x i1> %[[PG]], i8* %[[GEP]])
134 // CHECK: %[[ZEXT:.*]] = zext <vscale x 2 x i8> %[[LOAD]] to <vscale x 2 x i64>
135 // CHECK: ret <vscale x 2 x i64> %[[ZEXT]]
136 return svldnf1ub_vnum_u64(pg, base, vnum);
137 }
138