1 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
7
8 #include <arm_sve.h>
9
10 #ifdef SVE_OVERLOADED_FORMS
11 // A simple used,unused... macro, long enough to represent any SVE builtin.
12 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
13 #else
14 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
15 #endif
16
test_svhadd_s8_m(svbool_t pg,svint8_t op1,svint8_t op2)17 svint8_t test_svhadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2)
18 {
19 // CHECK-LABEL: test_svhadd_s8_m
20 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.shadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
21 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
22 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
23 // expected-warning@+1 {{implicit declaration of function 'svhadd_s8_m'}}
24 return SVE_ACLE_FUNC(svhadd,_s8,_m,)(pg, op1, op2);
25 }
26
test_svhadd_s16_m(svbool_t pg,svint16_t op1,svint16_t op2)27 svint16_t test_svhadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2)
28 {
29 // CHECK-LABEL: test_svhadd_s16_m
30 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
31 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.shadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
32 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
33 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
34 // expected-warning@+1 {{implicit declaration of function 'svhadd_s16_m'}}
35 return SVE_ACLE_FUNC(svhadd,_s16,_m,)(pg, op1, op2);
36 }
37
test_svhadd_s32_m(svbool_t pg,svint32_t op1,svint32_t op2)38 svint32_t test_svhadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2)
39 {
40 // CHECK-LABEL: test_svhadd_s32_m
41 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
42 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.shadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
43 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
44 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
45 // expected-warning@+1 {{implicit declaration of function 'svhadd_s32_m'}}
46 return SVE_ACLE_FUNC(svhadd,_s32,_m,)(pg, op1, op2);
47 }
48
test_svhadd_s64_m(svbool_t pg,svint64_t op1,svint64_t op2)49 svint64_t test_svhadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2)
50 {
51 // CHECK-LABEL: test_svhadd_s64_m
52 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
53 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.shadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
54 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
55 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
56 // expected-warning@+1 {{implicit declaration of function 'svhadd_s64_m'}}
57 return SVE_ACLE_FUNC(svhadd,_s64,_m,)(pg, op1, op2);
58 }
59
test_svhadd_u8_m(svbool_t pg,svuint8_t op1,svuint8_t op2)60 svuint8_t test_svhadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2)
61 {
62 // CHECK-LABEL: test_svhadd_u8_m
63 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uhadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
64 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
65 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
66 // expected-warning@+1 {{implicit declaration of function 'svhadd_u8_m'}}
67 return SVE_ACLE_FUNC(svhadd,_u8,_m,)(pg, op1, op2);
68 }
69
test_svhadd_u16_m(svbool_t pg,svuint16_t op1,svuint16_t op2)70 svuint16_t test_svhadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2)
71 {
72 // CHECK-LABEL: test_svhadd_u16_m
73 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
74 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uhadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
75 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
76 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
77 // expected-warning@+1 {{implicit declaration of function 'svhadd_u16_m'}}
78 return SVE_ACLE_FUNC(svhadd,_u16,_m,)(pg, op1, op2);
79 }
80
test_svhadd_u32_m(svbool_t pg,svuint32_t op1,svuint32_t op2)81 svuint32_t test_svhadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2)
82 {
83 // CHECKA-LABEL: test_svhadd_u32_m
84 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
85 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uhadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
86 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
87 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
88 // expected-warning@+1 {{implicit declaration of function 'svhadd_u32_m'}}
89 return SVE_ACLE_FUNC(svhadd,_u32,_m,)(pg, op1, op2);
90 }
91
test_svhadd_u64_m(svbool_t pg,svuint64_t op1,svuint64_t op2)92 svuint64_t test_svhadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2)
93 {
94 // CHECK-LABEL: test_svhadd_u64_m
95 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
96 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uhadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
97 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
98 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
99 // expected-warning@+1 {{implicit declaration of function 'svhadd_u64_m'}}
100 return SVE_ACLE_FUNC(svhadd,_u64,_m,)(pg, op1, op2);
101 }
102
test_svhadd_n_s8_m(svbool_t pg,svint8_t op1,int8_t op2)103 svint8_t test_svhadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2)
104 {
105 // CHECK-LABEL: test_svhadd_n_s8_m
106 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
107 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.shadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
108 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
109 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
110 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s8_m'}}
111 return SVE_ACLE_FUNC(svhadd,_n_s8,_m,)(pg, op1, op2);
112 }
113
test_svhadd_n_s16_m(svbool_t pg,svint16_t op1,int16_t op2)114 svint16_t test_svhadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2)
115 {
116 // CHECK-LABEL: test_svhadd_n_s16_m
117 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
118 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
119 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.shadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
120 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
121 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
122 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s16_m'}}
123 return SVE_ACLE_FUNC(svhadd,_n_s16,_m,)(pg, op1, op2);
124 }
125
test_svhadd_n_s32_m(svbool_t pg,svint32_t op1,int32_t op2)126 svint32_t test_svhadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2)
127 {
128 // CHECK-LABEL: test_svhadd_n_s32_m
129 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
130 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
131 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.shadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
132 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
133 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
134 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s32_m'}}
135 return SVE_ACLE_FUNC(svhadd,_n_s32,_m,)(pg, op1, op2);
136 }
137
test_svhadd_n_s64_m(svbool_t pg,svint64_t op1,int64_t op2)138 svint64_t test_svhadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2)
139 {
140 // CHECK-LABEL: test_svhadd_n_s64_m
141 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
142 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
143 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.shadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
144 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
145 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
146 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s64_m'}}
147 return SVE_ACLE_FUNC(svhadd,_n_s64,_m,)(pg, op1, op2);
148 }
149
test_svhadd_n_u8_m(svbool_t pg,svuint8_t op1,uint8_t op2)150 svuint8_t test_svhadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2)
151 {
152 // CHECK-LABEL: test_svhadd_n_u8_m
153 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
154 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uhadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
155 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
156 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
157 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u8_m'}}
158 return SVE_ACLE_FUNC(svhadd,_n_u8,_m,)(pg, op1, op2);
159 }
160
test_svhadd_n_u16_m(svbool_t pg,svuint16_t op1,uint16_t op2)161 svuint16_t test_svhadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2)
162 {
163 // CHECK-LABEL: test_svhadd_n_u16_m
164 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
165 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
166 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uhadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
167 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
168 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
169 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u16_m'}}
170 return SVE_ACLE_FUNC(svhadd,_n_u16,_m,)(pg, op1, op2);
171 }
172
test_svhadd_n_u32_m(svbool_t pg,svuint32_t op1,uint32_t op2)173 svuint32_t test_svhadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2)
174 {
175 // CHECK-LABEL: test_svhadd_n_u32_m
176 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
177 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
178 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uhadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
179 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
180 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
181 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u32_m'}}
182 return SVE_ACLE_FUNC(svhadd,_n_u32,_m,)(pg, op1, op2);
183 }
184
test_svhadd_n_u64_m(svbool_t pg,svuint64_t op1,uint64_t op2)185 svuint64_t test_svhadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2)
186 {
187 // CHECK-LABEL: test_svhadd_n_u64_m
188 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
189 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
190 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uhadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
191 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
192 // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}}
193 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u64_m'}}
194 return SVE_ACLE_FUNC(svhadd,_n_u64,_m,)(pg, op1, op2);
195 }
196
test_svhadd_s8_z(svbool_t pg,svint8_t op1,svint8_t op2)197 svint8_t test_svhadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2)
198 {
199 // CHECK-LABEL: test_svhadd_s8_z
200 // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
201 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.shadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
202 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
203 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
204 // expected-warning@+1 {{implicit declaration of function 'svhadd_s8_z'}}
205 return SVE_ACLE_FUNC(svhadd,_s8,_z,)(pg, op1, op2);
206 }
207
test_svhadd_s16_z(svbool_t pg,svint16_t op1,svint16_t op2)208 svint16_t test_svhadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2)
209 {
210 // CHECK-LABEL: test_svhadd_s16_z
211 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
212 // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
213 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.shadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
214 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
215 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
216 // expected-warning@+1 {{implicit declaration of function 'svhadd_s16_z'}}
217 return SVE_ACLE_FUNC(svhadd,_s16,_z,)(pg, op1, op2);
218 }
219
test_svhadd_s32_z(svbool_t pg,svint32_t op1,svint32_t op2)220 svint32_t test_svhadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2)
221 {
222 // CHECK-LABEL: test_svhadd_s32_z
223 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
224 // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
225 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.shadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
226 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
227 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
228 // expected-warning@+1 {{implicit declaration of function 'svhadd_s32_z'}}
229 return SVE_ACLE_FUNC(svhadd,_s32,_z,)(pg, op1, op2);
230 }
231
test_svhadd_s64_z(svbool_t pg,svint64_t op1,svint64_t op2)232 svint64_t test_svhadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2)
233 {
234 // CHECK-LABEL: test_svhadd_s64_z
235 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
236 // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
237 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.shadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
238 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
239 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
240 // expected-warning@+1 {{implicit declaration of function 'svhadd_s64_z'}}
241 return SVE_ACLE_FUNC(svhadd,_s64,_z,)(pg, op1, op2);
242 }
243
test_svhadd_u8_z(svbool_t pg,svuint8_t op1,svuint8_t op2)244 svuint8_t test_svhadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2)
245 {
246 // CHECK-LABEL: test_svhadd_u8_z
247 // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
248 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uhadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
249 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
250 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
251 // expected-warning@+1 {{implicit declaration of function 'svhadd_u8_z'}}
252 return SVE_ACLE_FUNC(svhadd,_u8,_z,)(pg, op1, op2);
253 }
254
test_svhadd_u16_z(svbool_t pg,svuint16_t op1,svuint16_t op2)255 svuint16_t test_svhadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2)
256 {
257 // CHECK-LABEL: test_svhadd_u16_z
258 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
259 // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
260 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uhadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
261 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
262 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
263 // expected-warning@+1 {{implicit declaration of function 'svhadd_u16_z'}}
264 return SVE_ACLE_FUNC(svhadd,_u16,_z,)(pg, op1, op2);
265 }
266
test_svhadd_u32_z(svbool_t pg,svuint32_t op1,svuint32_t op2)267 svuint32_t test_svhadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2)
268 {
269 // CHECKA-LABEL: test_svhadd_u32_z
270 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
271 // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
272 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uhadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
273 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
274 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
275 // expected-warning@+1 {{implicit declaration of function 'svhadd_u32_z'}}
276 return SVE_ACLE_FUNC(svhadd,_u32,_z,)(pg, op1, op2);
277 }
278
test_svhadd_u64_z(svbool_t pg,svuint64_t op1,svuint64_t op2)279 svuint64_t test_svhadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2)
280 {
281 // CHECK-LABEL: test_svhadd_u64_z
282 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
283 // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
284 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uhadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
285 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
286 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
287 // expected-warning@+1 {{implicit declaration of function 'svhadd_u64_z'}}
288 return SVE_ACLE_FUNC(svhadd,_u64,_z,)(pg, op1, op2);
289 }
290
test_svhadd_n_s8_z(svbool_t pg,svint8_t op1,int8_t op2)291 svint8_t test_svhadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2)
292 {
293 // CHECK-LABEL: test_svhadd_n_s8_z
294 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
295 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
296 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.shadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
297 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
298 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
299 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s8_z'}}
300 return SVE_ACLE_FUNC(svhadd,_n_s8,_z,)(pg, op1, op2);
301 }
302
test_svhadd_n_s16_z(svbool_t pg,svint16_t op1,int16_t op2)303 svint16_t test_svhadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2)
304 {
305 // CHECK-LABEL: test_svhadd_n_s16_z
306 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
307 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
308 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
309 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.shadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
310 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
311 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
312 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s16_z'}}
313 return SVE_ACLE_FUNC(svhadd,_n_s16,_z,)(pg, op1, op2);
314 }
315
test_svhadd_n_s32_z(svbool_t pg,svint32_t op1,int32_t op2)316 svint32_t test_svhadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2)
317 {
318 // CHECK-LABEL: test_svhadd_n_s32_z
319 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
320 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
321 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
322 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.shadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
323 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
324 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
325 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s32_z'}}
326 return SVE_ACLE_FUNC(svhadd,_n_s32,_z,)(pg, op1, op2);
327 }
328
test_svhadd_n_s64_z(svbool_t pg,svint64_t op1,int64_t op2)329 svint64_t test_svhadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2)
330 {
331 // CHECK-LABEL: test_svhadd_n_s64_z
332 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
333 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
334 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
335 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.shadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
336 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
337 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
338 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s64_z'}}
339 return SVE_ACLE_FUNC(svhadd,_n_s64,_z,)(pg, op1, op2);
340 }
341
test_svhadd_n_u8_z(svbool_t pg,svuint8_t op1,uint8_t op2)342 svuint8_t test_svhadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2)
343 {
344 // CHECK-LABEL: test_svhadd_n_u8_z
345 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
346 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
347 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uhadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
348 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
349 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
350 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u8_z'}}
351 return SVE_ACLE_FUNC(svhadd,_n_u8,_z,)(pg, op1, op2);
352 }
353
test_svhadd_n_u16_z(svbool_t pg,svuint16_t op1,uint16_t op2)354 svuint16_t test_svhadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2)
355 {
356 // CHECK-LABEL: test_svhadd_n_u16_z
357 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
358 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
359 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
360 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uhadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
361 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
362 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
363 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u16_z'}}
364 return SVE_ACLE_FUNC(svhadd,_n_u16,_z,)(pg, op1, op2);
365 }
366
test_svhadd_n_u32_z(svbool_t pg,svuint32_t op1,uint32_t op2)367 svuint32_t test_svhadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2)
368 {
369 // CHECK-LABEL: test_svhadd_n_u32_z
370 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
371 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
372 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
373 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uhadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
374 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
375 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
376 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u32_z'}}
377 return SVE_ACLE_FUNC(svhadd,_n_u32,_z,)(pg, op1, op2);
378 }
379
test_svhadd_n_u64_z(svbool_t pg,svuint64_t op1,uint64_t op2)380 svuint64_t test_svhadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2)
381 {
382 // CHECK-LABEL: test_svhadd_n_u64_z
383 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
384 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
385 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
386 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uhadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
387 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
388 // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}}
389 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u64_z'}}
390 return SVE_ACLE_FUNC(svhadd,_n_u64,_z,)(pg, op1, op2);
391 }
392
test_svhadd_s8_x(svbool_t pg,svint8_t op1,svint8_t op2)393 svint8_t test_svhadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2)
394 {
395 // CHECK-LABEL: test_svhadd_s8_x
396 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.shadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
397 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
398 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
399 // expected-warning@+1 {{implicit declaration of function 'svhadd_s8_x'}}
400 return SVE_ACLE_FUNC(svhadd,_s8,_x,)(pg, op1, op2);
401 }
402
test_svhadd_s16_x(svbool_t pg,svint16_t op1,svint16_t op2)403 svint16_t test_svhadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2)
404 {
405 // CHECK-LABEL: test_svhadd_s16_x
406 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
407 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.shadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
408 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
409 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
410 // expected-warning@+1 {{implicit declaration of function 'svhadd_s16_x'}}
411 return SVE_ACLE_FUNC(svhadd,_s16,_x,)(pg, op1, op2);
412 }
413
test_svhadd_s32_x(svbool_t pg,svint32_t op1,svint32_t op2)414 svint32_t test_svhadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2)
415 {
416 // CHECK-LABEL: test_svhadd_s32_x
417 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
418 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.shadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
419 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
420 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
421 // expected-warning@+1 {{implicit declaration of function 'svhadd_s32_x'}}
422 return SVE_ACLE_FUNC(svhadd,_s32,_x,)(pg, op1, op2);
423 }
424
test_svhadd_s64_x(svbool_t pg,svint64_t op1,svint64_t op2)425 svint64_t test_svhadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2)
426 {
427 // CHECK-LABEL: test_svhadd_s64_x
428 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
429 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.shadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
430 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
431 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
432 // expected-warning@+1 {{implicit declaration of function 'svhadd_s64_x'}}
433 return SVE_ACLE_FUNC(svhadd,_s64,_x,)(pg, op1, op2);
434 }
435
test_svhadd_u8_x(svbool_t pg,svuint8_t op1,svuint8_t op2)436 svuint8_t test_svhadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2)
437 {
438 // CHECK-LABEL: test_svhadd_u8_x
439 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uhadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
440 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
441 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
442 // expected-warning@+1 {{implicit declaration of function 'svhadd_u8_x'}}
443 return SVE_ACLE_FUNC(svhadd,_u8,_x,)(pg, op1, op2);
444 }
445
test_svhadd_u16_x(svbool_t pg,svuint16_t op1,svuint16_t op2)446 svuint16_t test_svhadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2)
447 {
448 // CHECK-LABEL: test_svhadd_u16_x
449 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
450 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uhadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
451 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
452 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
453 // expected-warning@+1 {{implicit declaration of function 'svhadd_u16_x'}}
454 return SVE_ACLE_FUNC(svhadd,_u16,_x,)(pg, op1, op2);
455 }
456
test_svhadd_u32_x(svbool_t pg,svuint32_t op1,svuint32_t op2)457 svuint32_t test_svhadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2)
458 {
459 // CHECKA-LABEL: test_svhadd_u32_x
460 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
461 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uhadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
462 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
463 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
464 // expected-warning@+1 {{implicit declaration of function 'svhadd_u32_x'}}
465 return SVE_ACLE_FUNC(svhadd,_u32,_x,)(pg, op1, op2);
466 }
467
test_svhadd_u64_x(svbool_t pg,svuint64_t op1,svuint64_t op2)468 svuint64_t test_svhadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2)
469 {
470 // CHECK-LABEL: test_svhadd_u64_x
471 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
472 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uhadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
473 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
474 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
475 // expected-warning@+1 {{implicit declaration of function 'svhadd_u64_x'}}
476 return SVE_ACLE_FUNC(svhadd,_u64,_x,)(pg, op1, op2);
477 }
478
test_svhadd_n_s8_x(svbool_t pg,svint8_t op1,int8_t op2)479 svint8_t test_svhadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2)
480 {
481 // CHECK-LABEL: test_svhadd_n_s8_x
482 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
483 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.shadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
484 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
485 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
486 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s8_x'}}
487 return SVE_ACLE_FUNC(svhadd,_n_s8,_x,)(pg, op1, op2);
488 }
489
test_svhadd_n_s16_x(svbool_t pg,svint16_t op1,int16_t op2)490 svint16_t test_svhadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2)
491 {
492 // CHECK-LABEL: test_svhadd_n_s16_x
493 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
494 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
495 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.shadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
496 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
497 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
498 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s16_x'}}
499 return SVE_ACLE_FUNC(svhadd,_n_s16,_x,)(pg, op1, op2);
500 }
501
test_svhadd_n_s32_x(svbool_t pg,svint32_t op1,int32_t op2)502 svint32_t test_svhadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2)
503 {
504 // CHECK-LABEL: test_svhadd_n_s32_x
505 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
506 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
507 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.shadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
508 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
509 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
510 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s32_x'}}
511 return SVE_ACLE_FUNC(svhadd,_n_s32,_x,)(pg, op1, op2);
512 }
513
test_svhadd_n_s64_x(svbool_t pg,svint64_t op1,int64_t op2)514 svint64_t test_svhadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2)
515 {
516 // CHECK-LABEL: test_svhadd_n_s64_x
517 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
518 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
519 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.shadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
520 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
521 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
522 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s64_x'}}
523 return SVE_ACLE_FUNC(svhadd,_n_s64,_x,)(pg, op1, op2);
524 }
525
test_svhadd_n_u8_x(svbool_t pg,svuint8_t op1,uint8_t op2)526 svuint8_t test_svhadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2)
527 {
528 // CHECK-LABEL: test_svhadd_n_u8_x
529 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
530 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uhadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
531 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
532 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
533 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u8_x'}}
534 return SVE_ACLE_FUNC(svhadd,_n_u8,_x,)(pg, op1, op2);
535 }
536
test_svhadd_n_u16_x(svbool_t pg,svuint16_t op1,uint16_t op2)537 svuint16_t test_svhadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2)
538 {
539 // CHECK-LABEL: test_svhadd_n_u16_x
540 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
541 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
542 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uhadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
543 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
544 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
545 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u16_x'}}
546 return SVE_ACLE_FUNC(svhadd,_n_u16,_x,)(pg, op1, op2);
547 }
548
test_svhadd_n_u32_x(svbool_t pg,svuint32_t op1,uint32_t op2)549 svuint32_t test_svhadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2)
550 {
551 // CHECK-LABEL: test_svhadd_n_u32_x
552 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
553 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
554 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uhadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
555 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
556 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
557 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u32_x'}}
558 return SVE_ACLE_FUNC(svhadd,_n_u32,_x,)(pg, op1, op2);
559 }
560
test_svhadd_n_u64_x(svbool_t pg,svuint64_t op1,uint64_t op2)561 svuint64_t test_svhadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
562 {
563 // CHECK-LABEL: test_svhadd_n_u64_x
564 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
565 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
566 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uhadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
567 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
568 // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}}
569 // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u64_x'}}
570 return SVE_ACLE_FUNC(svhadd,_n_u64,_x,)(pg, op1, op2);
571 }
572