1 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
2 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
3 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
4 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s
5 // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s
6 // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s
7
8 #include <arm_sve.h>
9
10 #ifdef SVE_OVERLOADED_FORMS
11 // A simple used,unused... macro, long enough to represent any SVE builtin.
12 #define SVE_ACLE_FUNC(A1,A2_UNUSED,A3,A4_UNUSED) A1##A3
13 #else
14 #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4
15 #endif
16
test_svqadd_s8_m(svbool_t pg,svint8_t op1,svint8_t op2)17 svint8_t test_svqadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2)
18 {
19 // CHECK-LABEL: test_svqadd_s8_m
20 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
21 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
22 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
23 // expected-warning@+1 {{implicit declaration of function 'svqadd_s8_m'}}
24 return SVE_ACLE_FUNC(svqadd,_s8,_m,)(pg, op1, op2);
25 }
26
test_svqadd_s16_m(svbool_t pg,svint16_t op1,svint16_t op2)27 svint16_t test_svqadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2)
28 {
29 // CHECK-LABEL: test_svqadd_s16_m
30 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
31 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
32 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
33 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
34 // expected-warning@+1 {{implicit declaration of function 'svqadd_s16_m'}}
35 return SVE_ACLE_FUNC(svqadd,_s16,_m,)(pg, op1, op2);
36 }
37
test_svqadd_s32_m(svbool_t pg,svint32_t op1,svint32_t op2)38 svint32_t test_svqadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2)
39 {
40 // CHECK-LABEL: test_svqadd_s32_m
41 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
42 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
43 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
44 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
45 // expected-warning@+1 {{implicit declaration of function 'svqadd_s32_m'}}
46 return SVE_ACLE_FUNC(svqadd,_s32,_m,)(pg, op1, op2);
47 }
48
test_svqadd_s64_m(svbool_t pg,svint64_t op1,svint64_t op2)49 svint64_t test_svqadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2)
50 {
51 // CHECK-LABEL: test_svqadd_s64_m
52 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
53 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
54 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
55 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
56 // expected-warning@+1 {{implicit declaration of function 'svqadd_s64_m'}}
57 return SVE_ACLE_FUNC(svqadd,_s64,_m,)(pg, op1, op2);
58 }
59
test_svqadd_u8_m(svbool_t pg,svuint8_t op1,svuint8_t op2)60 svuint8_t test_svqadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2)
61 {
62 // CHECK-LABEL: test_svqadd_u8_m
63 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
64 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
65 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
66 // expected-warning@+1 {{implicit declaration of function 'svqadd_u8_m'}}
67 return SVE_ACLE_FUNC(svqadd,_u8,_m,)(pg, op1, op2);
68 }
69
test_svqadd_u16_m(svbool_t pg,svuint16_t op1,svuint16_t op2)70 svuint16_t test_svqadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2)
71 {
72 // CHECK-LABEL: test_svqadd_u16_m
73 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
74 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
75 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
76 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
77 // expected-warning@+1 {{implicit declaration of function 'svqadd_u16_m'}}
78 return SVE_ACLE_FUNC(svqadd,_u16,_m,)(pg, op1, op2);
79 }
80
test_svqadd_u32_m(svbool_t pg,svuint32_t op1,svuint32_t op2)81 svuint32_t test_svqadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2)
82 {
83 // CHECKA-LABEL: test_svqadd_u32_m
84 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
85 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
86 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
87 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
88 // expected-warning@+1 {{implicit declaration of function 'svqadd_u32_m'}}
89 return SVE_ACLE_FUNC(svqadd,_u32,_m,)(pg, op1, op2);
90 }
91
test_svqadd_u64_m(svbool_t pg,svuint64_t op1,svuint64_t op2)92 svuint64_t test_svqadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2)
93 {
94 // CHECK-LABEL: test_svqadd_u64_m
95 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
96 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
97 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
98 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
99 // expected-warning@+1 {{implicit declaration of function 'svqadd_u64_m'}}
100 return SVE_ACLE_FUNC(svqadd,_u64,_m,)(pg, op1, op2);
101 }
102
test_svqadd_n_s8_m(svbool_t pg,svint8_t op1,int8_t op2)103 svint8_t test_svqadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2)
104 {
105 // CHECK-LABEL: test_svqadd_n_s8_m
106 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
107 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
108 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
109 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
110 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s8_m'}}
111 return SVE_ACLE_FUNC(svqadd,_n_s8,_m,)(pg, op1, op2);
112 }
113
test_svqadd_n_s16_m(svbool_t pg,svint16_t op1,int16_t op2)114 svint16_t test_svqadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2)
115 {
116 // CHECK-LABEL: test_svqadd_n_s16_m
117 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
118 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
119 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
120 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
121 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
122 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s16_m'}}
123 return SVE_ACLE_FUNC(svqadd,_n_s16,_m,)(pg, op1, op2);
124 }
125
test_svqadd_n_s32_m(svbool_t pg,svint32_t op1,int32_t op2)126 svint32_t test_svqadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2)
127 {
128 // CHECK-LABEL: test_svqadd_n_s32_m
129 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
130 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
131 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
132 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
133 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
134 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s32_m'}}
135 return SVE_ACLE_FUNC(svqadd,_n_s32,_m,)(pg, op1, op2);
136 }
137
test_svqadd_n_s64_m(svbool_t pg,svint64_t op1,int64_t op2)138 svint64_t test_svqadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2)
139 {
140 // CHECK-LABEL: test_svqadd_n_s64_m
141 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
142 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
143 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
144 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
145 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
146 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s64_m'}}
147 return SVE_ACLE_FUNC(svqadd,_n_s64,_m,)(pg, op1, op2);
148 }
149
test_svqadd_n_u8_m(svbool_t pg,svuint8_t op1,uint8_t op2)150 svuint8_t test_svqadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2)
151 {
152 // CHECK-LABEL: test_svqadd_n_u8_m
153 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
154 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
155 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
156 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
157 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u8_m'}}
158 return SVE_ACLE_FUNC(svqadd,_n_u8,_m,)(pg, op1, op2);
159 }
160
test_svqadd_n_u16_m(svbool_t pg,svuint16_t op1,uint16_t op2)161 svuint16_t test_svqadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2)
162 {
163 // CHECK-LABEL: test_svqadd_n_u16_m
164 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
165 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
166 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
167 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
168 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
169 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u16_m'}}
170 return SVE_ACLE_FUNC(svqadd,_n_u16,_m,)(pg, op1, op2);
171 }
172
test_svqadd_n_u32_m(svbool_t pg,svuint32_t op1,uint32_t op2)173 svuint32_t test_svqadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2)
174 {
175 // CHECK-LABEL: test_svqadd_n_u32_m
176 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
177 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
178 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
179 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
180 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
181 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u32_m'}}
182 return SVE_ACLE_FUNC(svqadd,_n_u32,_m,)(pg, op1, op2);
183 }
184
test_svqadd_n_u64_m(svbool_t pg,svuint64_t op1,uint64_t op2)185 svuint64_t test_svqadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2)
186 {
187 // CHECK-LABEL: test_svqadd_n_u64_m
188 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
189 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
190 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
191 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
192 // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}}
193 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u64_m'}}
194 return SVE_ACLE_FUNC(svqadd,_n_u64,_m,)(pg, op1, op2);
195 }
196
test_svqadd_s8_z(svbool_t pg,svint8_t op1,svint8_t op2)197 svint8_t test_svqadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2)
198 {
199 // CHECK-LABEL: test_svqadd_s8_z
200 // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
201 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
202 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
203 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
204 // expected-warning@+1 {{implicit declaration of function 'svqadd_s8_z'}}
205 return SVE_ACLE_FUNC(svqadd,_s8,_z,)(pg, op1, op2);
206 }
207
test_svqadd_s16_z(svbool_t pg,svint16_t op1,svint16_t op2)208 svint16_t test_svqadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2)
209 {
210 // CHECK-LABEL: test_svqadd_s16_z
211 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
212 // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
213 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
214 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
215 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
216 // expected-warning@+1 {{implicit declaration of function 'svqadd_s16_z'}}
217 return SVE_ACLE_FUNC(svqadd,_s16,_z,)(pg, op1, op2);
218 }
219
test_svqadd_s32_z(svbool_t pg,svint32_t op1,svint32_t op2)220 svint32_t test_svqadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2)
221 {
222 // CHECK-LABEL: test_svqadd_s32_z
223 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
224 // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
225 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
226 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
227 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
228 // expected-warning@+1 {{implicit declaration of function 'svqadd_s32_z'}}
229 return SVE_ACLE_FUNC(svqadd,_s32,_z,)(pg, op1, op2);
230 }
231
test_svqadd_s64_z(svbool_t pg,svint64_t op1,svint64_t op2)232 svint64_t test_svqadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2)
233 {
234 // CHECK-LABEL: test_svqadd_s64_z
235 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
236 // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
237 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
238 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
239 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
240 // expected-warning@+1 {{implicit declaration of function 'svqadd_s64_z'}}
241 return SVE_ACLE_FUNC(svqadd,_s64,_z,)(pg, op1, op2);
242 }
243
test_svqadd_u8_z(svbool_t pg,svuint8_t op1,svuint8_t op2)244 svuint8_t test_svqadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2)
245 {
246 // CHECK-LABEL: test_svqadd_u8_z
247 // CHECK: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
248 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %op2)
249 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
250 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
251 // expected-warning@+1 {{implicit declaration of function 'svqadd_u8_z'}}
252 return SVE_ACLE_FUNC(svqadd,_u8,_z,)(pg, op1, op2);
253 }
254
test_svqadd_u16_z(svbool_t pg,svuint16_t op1,svuint16_t op2)255 svuint16_t test_svqadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2)
256 {
257 // CHECK-LABEL: test_svqadd_u16_z
258 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
259 // CHECK: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
260 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %op2)
261 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
262 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
263 // expected-warning@+1 {{implicit declaration of function 'svqadd_u16_z'}}
264 return SVE_ACLE_FUNC(svqadd,_u16,_z,)(pg, op1, op2);
265 }
266
test_svqadd_u32_z(svbool_t pg,svuint32_t op1,svuint32_t op2)267 svuint32_t test_svqadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2)
268 {
269 // CHECKA-LABEL: test_svqadd_u32_z
270 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
271 // CHECK: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
272 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %op2)
273 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
274 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
275 // expected-warning@+1 {{implicit declaration of function 'svqadd_u32_z'}}
276 return SVE_ACLE_FUNC(svqadd,_u32,_z,)(pg, op1, op2);
277 }
278
test_svqadd_u64_z(svbool_t pg,svuint64_t op1,svuint64_t op2)279 svuint64_t test_svqadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2)
280 {
281 // CHECK-LABEL: test_svqadd_u64_z
282 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
283 // CHECK: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
284 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %op2)
285 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
286 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
287 // expected-warning@+1 {{implicit declaration of function 'svqadd_u64_z'}}
288 return SVE_ACLE_FUNC(svqadd,_u64,_z,)(pg, op1, op2);
289 }
290
test_svqadd_n_s8_z(svbool_t pg,svint8_t op1,int8_t op2)291 svint8_t test_svqadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2)
292 {
293 // CHECK-LABEL: test_svqadd_n_s8_z
294 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
295 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
296 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
297 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
298 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s8_z'}}
299 return SVE_ACLE_FUNC(svqadd,_n_s8,_z,)(pg, op1, op2);
300 }
301
test_svqadd_n_s16_z(svbool_t pg,svint16_t op1,int16_t op2)302 svint16_t test_svqadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2)
303 {
304 // CHECK-LABEL: test_svqadd_n_s16_z
305 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
306 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
307 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
308 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
309 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
310 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
311 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s16_z'}}
312 return SVE_ACLE_FUNC(svqadd,_n_s16,_z,)(pg, op1, op2);
313 }
314
test_svqadd_n_s32_z(svbool_t pg,svint32_t op1,int32_t op2)315 svint32_t test_svqadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2)
316 {
317 // CHECK-LABEL: test_svqadd_n_s32_z
318 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
319 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
320 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
321 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
322 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
323 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
324 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s32_z'}}
325 return SVE_ACLE_FUNC(svqadd,_n_s32,_z,)(pg, op1, op2);
326 }
327
test_svqadd_n_s64_z(svbool_t pg,svint64_t op1,int64_t op2)328 svint64_t test_svqadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2)
329 {
330 // CHECK-LABEL: test_svqadd_n_s64_z
331 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
332 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
333 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
334 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
335 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
336 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
337 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s64_z'}}
338 return SVE_ACLE_FUNC(svqadd,_n_s64,_z,)(pg, op1, op2);
339 }
340
test_svqadd_n_u8_z(svbool_t pg,svuint8_t op1,uint8_t op2)341 svuint8_t test_svqadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2)
342 {
343 // CHECK-LABEL: test_svqadd_n_u8_z
344 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
345 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sel.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> zeroinitializer)
346 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %[[SEL]], <vscale x 16 x i8> %[[DUP]])
347 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
348 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
349 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u8_z'}}
350 return SVE_ACLE_FUNC(svqadd,_n_u8,_z,)(pg, op1, op2);
351 }
352
test_svqadd_n_u16_z(svbool_t pg,svuint16_t op1,uint16_t op2)353 svuint16_t test_svqadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2)
354 {
355 // CHECK-LABEL: test_svqadd_n_u16_z
356 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
357 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
358 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sel.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> zeroinitializer)
359 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %[[SEL]], <vscale x 8 x i16> %[[DUP]])
360 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
361 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
362 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u16_z'}}
363 return SVE_ACLE_FUNC(svqadd,_n_u16,_z,)(pg, op1, op2);
364 }
365
test_svqadd_n_u32_z(svbool_t pg,svuint32_t op1,uint32_t op2)366 svuint32_t test_svqadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2)
367 {
368 // CHECK-LABEL: test_svqadd_n_u32_z
369 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
370 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
371 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sel.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> zeroinitializer)
372 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %[[SEL]], <vscale x 4 x i32> %[[DUP]])
373 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
374 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
375 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u32_z'}}
376 return SVE_ACLE_FUNC(svqadd,_n_u32,_z,)(pg, op1, op2);
377 }
378
test_svqadd_n_u64_z(svbool_t pg,svuint64_t op1,uint64_t op2)379 svuint64_t test_svqadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2)
380 {
381 // CHECK-LABEL: test_svqadd_n_u64_z
382 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
383 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
384 // CHECK-DAG: %[[SEL:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sel.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> zeroinitializer)
385 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %[[SEL]], <vscale x 2 x i64> %[[DUP]])
386 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
387 // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}}
388 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u64_z'}}
389 return SVE_ACLE_FUNC(svqadd,_n_u64,_z,)(pg, op1, op2);
390 }
391
test_svqadd_s8_x(svbool_t pg,svint8_t op1,svint8_t op2)392 svint8_t test_svqadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2)
393 {
394 // CHECK-LABEL: test_svqadd_s8_x
395 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
396 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
397 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
398 // expected-warning@+1 {{implicit declaration of function 'svqadd_s8_x'}}
399 return SVE_ACLE_FUNC(svqadd,_s8,_x,)(pg, op1, op2);
400 }
401
test_svqadd_s16_x(svbool_t pg,svint16_t op1,svint16_t op2)402 svint16_t test_svqadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2)
403 {
404 // CHECK-LABEL: test_svqadd_s16_x
405 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
406 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
407 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
408 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
409 // expected-warning@+1 {{implicit declaration of function 'svqadd_s16_x'}}
410 return SVE_ACLE_FUNC(svqadd,_s16,_x,)(pg, op1, op2);
411 }
412
test_svqadd_s32_x(svbool_t pg,svint32_t op1,svint32_t op2)413 svint32_t test_svqadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2)
414 {
415 // CHECK-LABEL: test_svqadd_s32_x
416 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
417 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
418 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
419 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
420 // expected-warning@+1 {{implicit declaration of function 'svqadd_s32_x'}}
421 return SVE_ACLE_FUNC(svqadd,_s32,_x,)(pg, op1, op2);
422 }
423
test_svqadd_s64_x(svbool_t pg,svint64_t op1,svint64_t op2)424 svint64_t test_svqadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2)
425 {
426 // CHECK-LABEL: test_svqadd_s64_x
427 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
428 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
429 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
430 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
431 // expected-warning@+1 {{implicit declaration of function 'svqadd_s64_x'}}
432 return SVE_ACLE_FUNC(svqadd,_s64,_x,)(pg, op1, op2);
433 }
434
test_svqadd_u8_x(svbool_t pg,svuint8_t op1,svuint8_t op2)435 svuint8_t test_svqadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2)
436 {
437 // CHECK-LABEL: test_svqadd_u8_x
438 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %op2)
439 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
440 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
441 // expected-warning@+1 {{implicit declaration of function 'svqadd_u8_x'}}
442 return SVE_ACLE_FUNC(svqadd,_u8,_x,)(pg, op1, op2);
443 }
444
test_svqadd_u16_x(svbool_t pg,svuint16_t op1,svuint16_t op2)445 svuint16_t test_svqadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2)
446 {
447 // CHECK-LABEL: test_svqadd_u16_x
448 // CHECK: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
449 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %op2)
450 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
451 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
452 // expected-warning@+1 {{implicit declaration of function 'svqadd_u16_x'}}
453 return SVE_ACLE_FUNC(svqadd,_u16,_x,)(pg, op1, op2);
454 }
455
test_svqadd_u32_x(svbool_t pg,svuint32_t op1,svuint32_t op2)456 svuint32_t test_svqadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2)
457 {
458 // CHECKA-LABEL: test_svqadd_u32_x
459 // CHECK: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
460 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %op2)
461 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
462 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
463 // expected-warning@+1 {{implicit declaration of function 'svqadd_u32_x'}}
464 return SVE_ACLE_FUNC(svqadd,_u32,_x,)(pg, op1, op2);
465 }
466
test_svqadd_u64_x(svbool_t pg,svuint64_t op1,svuint64_t op2)467 svuint64_t test_svqadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2)
468 {
469 // CHECK-LABEL: test_svqadd_u64_x
470 // CHECK: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
471 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %op2)
472 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
473 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
474 // expected-warning@+1 {{implicit declaration of function 'svqadd_u64_x'}}
475 return SVE_ACLE_FUNC(svqadd,_u64,_x,)(pg, op1, op2);
476 }
477
test_svqadd_n_s8_x(svbool_t pg,svint8_t op1,int8_t op2)478 svint8_t test_svqadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2)
479 {
480 // CHECK-LABEL: test_svqadd_n_s8_x
481 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
482 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.sqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
483 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
484 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
485 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s8_x'}}
486 return SVE_ACLE_FUNC(svqadd,_n_s8,_x,)(pg, op1, op2);
487 }
488
test_svqadd_n_s16_x(svbool_t pg,svint16_t op1,int16_t op2)489 svint16_t test_svqadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2)
490 {
491 // CHECK-LABEL: test_svqadd_n_s16_x
492 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
493 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
494 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.sqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
495 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
496 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
497 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s16_x'}}
498 return SVE_ACLE_FUNC(svqadd,_n_s16,_x,)(pg, op1, op2);
499 }
500
test_svqadd_n_s32_x(svbool_t pg,svint32_t op1,int32_t op2)501 svint32_t test_svqadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2)
502 {
503 // CHECK-LABEL: test_svqadd_n_s32_x
504 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
505 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
506 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.sqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
507 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
508 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
509 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s32_x'}}
510 return SVE_ACLE_FUNC(svqadd,_n_s32,_x,)(pg, op1, op2);
511 }
512
test_svqadd_n_s64_x(svbool_t pg,svint64_t op1,int64_t op2)513 svint64_t test_svqadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2)
514 {
515 // CHECK-LABEL: test_svqadd_n_s64_x
516 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
517 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
518 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.sqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
519 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
520 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
521 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s64_x'}}
522 return SVE_ACLE_FUNC(svqadd,_n_s64,_x,)(pg, op1, op2);
523 }
524
test_svqadd_n_u8_x(svbool_t pg,svuint8_t op1,uint8_t op2)525 svuint8_t test_svqadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2)
526 {
527 // CHECK-LABEL: test_svqadd_n_u8_x
528 // CHECK: %[[DUP:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2)
529 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.uqadd.nxv16i8(<vscale x 16 x i1> %pg, <vscale x 16 x i8> %op1, <vscale x 16 x i8> %[[DUP]])
530 // CHECK: ret <vscale x 16 x i8> %[[INTRINSIC]]
531 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
532 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u8_x'}}
533 return SVE_ACLE_FUNC(svqadd,_n_u8,_x,)(pg, op1, op2);
534 }
535
test_svqadd_n_u16_x(svbool_t pg,svuint16_t op1,uint16_t op2)536 svuint16_t test_svqadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2)
537 {
538 // CHECK-LABEL: test_svqadd_n_u16_x
539 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2)
540 // CHECK-DAG: %[[PG:.*]] = call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %pg)
541 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 8 x i16> @llvm.aarch64.sve.uqadd.nxv8i16(<vscale x 8 x i1> %[[PG]], <vscale x 8 x i16> %op1, <vscale x 8 x i16> %[[DUP]])
542 // CHECK: ret <vscale x 8 x i16> %[[INTRINSIC]]
543 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
544 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u16_x'}}
545 return SVE_ACLE_FUNC(svqadd,_n_u16,_x,)(pg, op1, op2);
546 }
547
test_svqadd_n_u32_x(svbool_t pg,svuint32_t op1,uint32_t op2)548 svuint32_t test_svqadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2)
549 {
550 // CHECK-LABEL: test_svqadd_n_u32_x
551 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2)
552 // CHECK-DAG: %[[PG:.*]] = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %pg)
553 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 4 x i32> @llvm.aarch64.sve.uqadd.nxv4i32(<vscale x 4 x i1> %[[PG]], <vscale x 4 x i32> %op1, <vscale x 4 x i32> %[[DUP]])
554 // CHECK: ret <vscale x 4 x i32> %[[INTRINSIC]]
555 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
556 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u32_x'}}
557 return SVE_ACLE_FUNC(svqadd,_n_u32,_x,)(pg, op1, op2);
558 }
559
test_svqadd_n_u64_x(svbool_t pg,svuint64_t op1,uint64_t op2)560 svuint64_t test_svqadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2)
561 {
562 // CHECK-LABEL: test_svqadd_n_u64_x
563 // CHECK-DAG: %[[DUP:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2)
564 // CHECK-DAG: %[[PG:.*]] = call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %pg)
565 // CHECK: %[[INTRINSIC:.*]] = call <vscale x 2 x i64> @llvm.aarch64.sve.uqadd.nxv2i64(<vscale x 2 x i1> %[[PG]], <vscale x 2 x i64> %op1, <vscale x 2 x i64> %[[DUP]])
566 // CHECK: ret <vscale x 2 x i64> %[[INTRINSIC]]
567 // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}}
568 // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u64_x'}}
569 return SVE_ACLE_FUNC(svqadd,_n_u64,_x,)(pg, op1, op2);
570 }
571