1
2 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s
3 // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix=CHECK --check-prefix=CHECK-50 %s
5
6 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
7 // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
9
10 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck %s
11 // RUN: %clang_cc1 -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
12 // RUN: %clang_cc1 -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
13
14 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s
16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
17 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
18 // expected-no-diagnostics
19 #ifndef HEADER
20 #define HEADER
21
22 _Bool bv, bx;
23 char cv, cx;
24 unsigned char ucv, ucx;
25 short sv, sx;
26 unsigned short usv, usx;
27 int iv, ix;
28 unsigned int uiv, uix;
29 long lv, lx;
30 unsigned long ulv, ulx;
31 long long llv, llx;
32 unsigned long long ullv, ullx;
33 float fv, fx;
34 double dv, dx;
35 long double ldv, ldx;
36 _Complex int civ, cix;
37 _Complex float cfv, cfx;
38 _Complex double cdv, cdx;
39
40 typedef int int4 __attribute__((__vector_size__(16)));
41 int4 int4x;
42
43 struct BitFields {
44 int : 32;
45 int a : 31;
46 } bfx;
47
48 struct BitFields_packed {
49 int : 32;
50 int a : 31;
51 } __attribute__ ((__packed__)) bfx_packed;
52
53 struct BitFields2 {
54 int : 31;
55 int a : 1;
56 } bfx2;
57
58 struct BitFields2_packed {
59 int : 31;
60 int a : 1;
61 } __attribute__ ((__packed__)) bfx2_packed;
62
63 struct BitFields3 {
64 int : 11;
65 int a : 14;
66 } bfx3;
67
68 struct BitFields3_packed {
69 int : 11;
70 int a : 14;
71 } __attribute__ ((__packed__)) bfx3_packed;
72
73 struct BitFields4 {
74 short : 16;
75 int a: 1;
76 long b : 7;
77 } bfx4;
78
79 struct BitFields4_packed {
80 short : 16;
81 int a: 1;
82 long b : 7;
83 } __attribute__ ((__packed__)) bfx4_packed;
84
85 typedef float float2 __attribute__((ext_vector_type(2)));
86 float2 float2x;
87
88 // Register "0" is currently an invalid register for global register variables.
89 // Use "esp" instead of "0".
90 // register int rix __asm__("0");
91 register int rix __asm__("esp");
92
main()93 int main() {
94 // CHECK: [[PREV:%.+]] = atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1
95 // CHECK: store i8 [[PREV]], i8* @{{.+}},
96 #pragma omp atomic capture
97 bv = bx++;
98 // CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1
99 // CHECK: add nsw i32 %{{.+}}, 1
100 // CHECK: store i8 %{{.+}}, i8* @{{.+}},
101 #pragma omp atomic capture
102 cv = ++cx;
103 // CHECK: [[PREV:%.+]] = atomicrmw sub i8* @{{.+}}, i8 1 monotonic, align 1
104 // CHECK: store i8 [[PREV]], i8* @{{.+}},
105 #pragma omp atomic capture
106 ucv = ucx--;
107 // CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic, align 2
108 // CHECK: sub nsw i32 %{{.+}}, 1
109 // CHECK: store i16 %{{.+}}, i16* @{{.+}},
110 #pragma omp atomic capture
111 sv = --sx;
112 // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}},
113 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32
114 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2
115 // CHECK: br label %[[CONT:.+]]
116 // CHECK: [[CONT]]
117 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
118 // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32
119 // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]]
120 // CHECK: [[DESIRED_CALC:%.+]] = trunc i32 [[ADD]] to i16
121 // CHECK: store i16 [[DESIRED_CALC]], i16* [[TEMP:%.+]],
122 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
123 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2
124 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
125 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
126 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
127 // CHECK: [[EXIT]]
128 // CHECK: store i16 [[DESIRED_CALC]], i16* @{{.+}},
129 #pragma omp atomic capture
130 sv = usx += usv;
131 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
132 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4
133 // CHECK: br label %[[CONT:.+]]
134 // CHECK: [[CONT]]
135 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
136 // CHECK: [[DESIRED_CALC:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]]
137 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
138 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
139 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
140 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
141 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
142 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
143 // CHECK: [[EXIT]]
144 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
145 #pragma omp atomic capture
146 uiv = ix *= iv;
147 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
148 // CHECK: [[PREV:%.+]] = atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4
149 // CHECK: store i32 [[PREV]], i32* @{{.+}},
150 #pragma omp atomic capture
151 {iv = uix; uix -= uiv;}
152 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
153 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4
154 // CHECK: br label %[[CONT:.+]]
155 // CHECK: [[CONT]]
156 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
157 // CHECK: [[DESIRED_CALC:%.+]] = shl i32 [[EXPECTED]], [[EXPR]]
158 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
159 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
160 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
161 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
162 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
163 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
164 // CHECK: [[EXIT]]
165 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
166 #pragma omp atomic capture
167 {ix <<= iv; uiv = ix;}
168 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}},
169 // CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4
170 // CHECK: br label %[[CONT:.+]]
171 // CHECK: [[CONT]]
172 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
173 // CHECK: [[DESIRED_CALC:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]]
174 // CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]],
175 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]],
176 // CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
177 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0
178 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
179 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
180 // CHECK: [[EXIT]]
181 // CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}},
182 #pragma omp atomic capture
183 iv = uix >>= uiv;
184 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
185 // CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic, align 8
186 // CHECK: br label %[[CONT:.+]]
187 // CHECK: [[CONT]]
188 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
189 // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]]
190 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
191 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
192 // CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
193 // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0
194 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
195 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
196 // CHECK: [[EXIT]]
197 // CHECK: store i64 [[EXPECTED]], i64* @{{.+}},
198 #pragma omp atomic capture
199 {ulv = lx; lx /= lv;}
200 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
201 // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
202 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]]
203 // CHECK: store i64 [[DESIRED]], i64* @{{.+}},
204 #pragma omp atomic capture
205 {ulx &= ulv; lv = ulx;}
206 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
207 // CHECK: [[OLD:%.+]] = atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
208 // CHECK: [[DESIRED:%.+]] = xor i64 [[OLD]], [[EXPR]]
209 // CHECK: store i64 [[DESIRED]], i64* @{{.+}},
210 #pragma omp atomic capture
211 ullv = llx ^= llv;
212 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
213 // CHECK: [[OLD:%.+]] = atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
214 // CHECK: [[DESIRED:%.+]] = or i64 [[OLD]], [[EXPR]]
215 // CHECK: store i64 [[DESIRED]], i64* @{{.+}},
216 #pragma omp atomic capture
217 llv = ullx |= ullv;
218 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
219 // CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4
220 // CHECK: br label %[[CONT:.+]]
221 // CHECK: [[CONT]]
222 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
223 // CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32*
224 // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float
225 // CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]]
226 // CHECK: store float [[ADD]], float* [[TEMP]],
227 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]],
228 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
229 // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0
230 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
231 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
232 // CHECK: [[EXIT]]
233 // CHECK: [[CAST:%.+]] = fpext float [[ADD]] to double
234 // CHECK: store double [[CAST]], double* @{{.+}},
235 #pragma omp atomic capture
236 dv = fx = fx + fv;
237 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
238 // CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8
239 // CHECK: br label %[[CONT:.+]]
240 // CHECK: [[CONT]]
241 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
242 // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
243 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
244 // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]]
245 // CHECK: store double [[SUB]], double* [[TEMP]],
246 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]],
247 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
248 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
249 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
250 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
251 // CHECK: [[EXIT]]
252 // CHECK: [[CAST:%.+]] = fptrunc double [[OLD]] to float
253 // CHECK: store float [[CAST]], float* @{{.+}},
254 #pragma omp atomic capture
255 {fv = dx; dx = dv - dx;}
256 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
257 // CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16
258 // CHECK: br label %[[CONT:.+]]
259 // CHECK: [[CONT]]
260 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
261 // CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
262 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]]
263 // CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
264 // CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]]
265 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]]
266 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]]
267 // CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]]
268 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]]
269 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16
270 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0
271 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
272 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
273 // CHECK: [[EXIT]]
274 // CHECK: [[CAST:%.+]] = fptrunc x86_fp80 [[MUL]] to double
275 // CHECK: store double [[CAST]], double* @{{.+}},
276 #pragma omp atomic capture
277 {ldx = ldx * ldv; dv = ldx;}
278 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0)
279 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1)
280 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
281 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
282 // CHECK: br label %[[CONT:.+]]
283 // CHECK: [[CONT]]
284 // CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
285 // CHECK: [[LD_RE:%.+]] = load i32, i32* [[LD_RE_ADDR]]
286 // CHECK: [[LD_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
287 // CHECK: [[LD_IM:%.+]] = load i32, i32* [[LD_IM_ADDR]]
288 // <Skip checks for complex calculations>
289 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
290 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
291 // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]]
292 // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]]
293 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
294 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
295 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
296 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
297 // CHECK: [[EXIT]]
298 // CHECK: [[RE_CAST:%.+]] = sitofp i32 [[NEW_RE]] to float
299 // CHECK: [[IM_CAST:%.+]] = sitofp i32 [[NEW_IM]] to float
300 // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0),
301 // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1),
302 #pragma omp atomic capture
303 cfv = cix = civ / cix;
304 // CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0)
305 // CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1)
306 // CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8*
307 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
308 // CHECK: br label %[[CONT:.+]]
309 // CHECK: [[CONT]]
310 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0
311 // CHECK: [[X_RE_OLD:%.+]] = load float, float* [[X_RE_ADDR]]
312 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1
313 // CHECK: [[X_IM_OLD:%.+]] = load float, float* [[X_IM_ADDR]]
314 // <Skip checks for complex calculations>
315 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
316 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1
317 // CHECK: store float [[NEW_RE:%.+]], float* [[X_RE_ADDR]]
318 // CHECK: store float [[NEW_IM:%.+]], float* [[X_IM_ADDR]]
319 // CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8*
320 // CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8*
321 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
322 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
323 // CHECK: [[EXIT]]
324 // CHECK: [[RE_CAST:%.+]] = fptosi float [[X_RE_OLD]] to i32
325 // CHECK: [[IM_CAST:%.+]] = fptosi float [[X_IM_OLD]] to i32
326 // CHECK: store i32 [[RE_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
327 // CHECK: store i32 [[IM_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
328 #pragma omp atomic capture
329 {civ = cfx; cfx = cfv + cfx;}
330 // CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0)
331 // CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1)
332 // CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8*
333 // CHECK: call void @__atomic_load(i64 16, i8* bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 5)
334 // CHECK: br label %[[CONT:.+]]
335 // CHECK: [[CONT]]
336 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0
337 // CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]]
338 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1
339 // CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]]
340 // <Skip checks for complex calculations>
341 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
342 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1
343 // CHECK: store double [[NEW_RE:%.+]], double* [[X_RE_ADDR]]
344 // CHECK: store double [[NEW_IM:%.+]], double* [[X_IM_ADDR]]
345 // CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8*
346 // CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8*
347 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 16, i8* bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 5, i32 5)
348 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
349 // CHECK: [[EXIT]]
350 // CHECK: [[RE_CAST:%.+]] = fptrunc double [[NEW_RE]] to float
351 // CHECK: [[IM_CAST:%.+]] = fptrunc double [[NEW_IM]] to float
352 // CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0),
353 // CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1),
354 // CHECK-50: call{{.*}} @__kmpc_flush(
355 #pragma omp atomic capture seq_cst
356 {cdx = cdx - cdv; cfv = cdx;}
357 // CHECK: [[BV:%.+]] = load i8, i8* @{{.+}}
358 // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1
359 // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64
360 // CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8
361 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]]
362 // CHECK: store i64 [[DESIRED]], i64* @{{.+}},
363 #pragma omp atomic capture
364 ulv = ulx = ulx & bv;
365 // CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1
366 // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32
367 // CHECK: [[X:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic, align 1
368 // CHECK: br label %[[CONT:.+]]
369 // CHECK: [[CONT]]
370 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
371 // CHECK: [[OLD_BOOL:%.+]] = trunc i8 [[EXPECTED]] to i1
372 // CHECK: [[X_RVAL:%.+]] = zext i1 [[OLD_BOOL]] to i32
373 // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]]
374 // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0
375 // CHECK: [[NEW:%.+]] = zext i1 [[CAST]] to i8
376 // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]],
377 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
378 // CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1
379 // CHECK: [[OLD:%.+]] = extractvalue { i8, i1 } [[RES]], 0
380 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
381 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
382 // CHECK: [[EXIT]]
383 // CHECK: [[OLD_I8:%.+]] = zext i1 [[OLD_BOOL]] to i8
384 // CHECK: store i8 [[OLD_I8]], i8* @{{.+}},
385 #pragma omp atomic capture
386 {bv = bx; bx = cv & bx;}
387 // CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}},
388 // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32
389 // CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst, align 1
390 // CHECK: br label %[[CONT:.+]]
391 // CHECK: [[CONT]]
392 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
393 // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32
394 // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]]
395 // CHECK: [[NEW:%.+]] = trunc i32 [[ASHR]] to i8
396 // CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]],
397 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
398 // CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1
399 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
400 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
401 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
402 // CHECK: [[EXIT]]
403 // CHECK: store i8 [[NEW]], i8* @{{.+}},
404 // CHECK-50: call{{.*}} @__kmpc_flush(
405 #pragma omp atomic capture, seq_cst
406 {cx = cx >> ucv; cv = cx;}
407 // CHECK: [[SV:%.+]] = load i16, i16* @{{.+}},
408 // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32
409 // CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic, align 8
410 // CHECK: br label %[[CONT:.+]]
411 // CHECK: [[CONT]]
412 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
413 // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32
414 // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]]
415 // CHECK: [[NEW:%.+]] = sext i32 [[SHL]] to i64
416 // CHECK: store i64 [[NEW]], i64* [[TEMP:%.+]],
417 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
418 // CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
419 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
420 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
421 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
422 // CHECK: [[EXIT]]
423 // CHECK: store i64 [[NEW]], i64* @{{.+}},
424 #pragma omp atomic capture
425 ulv = ulx = sv << ulx;
426 // CHECK: [[USV:%.+]] = load i16, i16* @{{.+}},
427 // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64
428 // CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic, align 8
429 // CHECK: br label %[[CONT:.+]]
430 // CHECK: [[CONT]]
431 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
432 // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]]
433 // CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]],
434 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]],
435 // CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
436 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
437 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
438 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
439 // CHECK: [[EXIT]]
440 // CHECK: store i64 [[EXPECTED]], i64* @{{.+}},
441 #pragma omp atomic capture
442 {lv = lx; lx = lx % usv;}
443 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
444 // CHECK: [[OLD:%.+]] = atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst, align 4
445 // CHECK: [[DESIRED:%.+]] = or i32 [[EXPR]], [[OLD]]
446 // CHECK: store i32 [[DESIRED]], i32* @{{.+}},
447 // CHECK-50: call{{.*}} @__kmpc_flush(
448 #pragma omp atomic seq_cst, capture
449 {uix = iv | uix; uiv = uix;}
450 // CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}
451 // CHECK: [[OLD:%.+]] = atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4
452 // CHECK: [[DESIRED:%.+]] = and i32 [[OLD]], [[EXPR]]
453 // CHECK: store i32 [[DESIRED]], i32* @{{.+}},
454 #pragma omp atomic capture
455 iv = ix = ix & uiv;
456 // CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}},
457 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
458 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
459 // CHECK: br label %[[CONT:.+]]
460 // CHECK: [[CONT]]
461 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
462 // CHECK: [[OLD_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
463 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
464 // CHECK: [[OLD_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
465 // <Skip checks for complex calculations>
466 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
467 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
468 // CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]]
469 // CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]]
470 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
471 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
472 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
473 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
474 // CHECK: [[EXIT]]
475 // CHECK: store i32 [[OLD_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
476 // CHECK: store i32 [[OLD_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
477 #pragma omp atomic capture
478 {civ = cix; cix = lv + cix;}
479 // CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}},
480 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float
481 // CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4
482 // CHECK: br label %[[CONT:.+]]
483 // CHECK: [[CONT]]
484 // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
485 // CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32*
486 // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float
487 // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]]
488 // CHECK: store float [[MUL]], float* [[TEMP]],
489 // CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]],
490 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4
491 // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0
492 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1
493 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
494 // CHECK: [[EXIT]]
495 // CHECK: store float [[MUL]], float* @{{.+}},
496 #pragma omp atomic capture
497 {fx = fx * ulv; fv = fx;}
498 // CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}},
499 // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double
500 // CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8
501 // CHECK: br label %[[CONT:.+]]
502 // CHECK: [[CONT]]
503 // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
504 // CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64*
505 // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double
506 // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]]
507 // CHECK: store double [[DIV]], double* [[TEMP]],
508 // CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]],
509 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8
510 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0
511 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1
512 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
513 // CHECK: [[EXIT]]
514 // CHECK: store double [[DIV]], double* @{{.+}},
515 #pragma omp atomic capture
516 dv = dx /= llv;
517 // CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}},
518 // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80
519 // CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16
520 // CHECK: br label %[[CONT:.+]]
521 // CHECK: [[CONT]]
522 // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
523 // CHECK: [[TEMP_I1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128*
524 // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I1]],
525 // CHECK: [[TEMP_I:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128*
526 // CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I]],
527 // CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]],
528 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]]
529 // CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]]
530 // CHECK: [[DESIRED:%.+]] = load i128, i128* [[TEMP_I1]]
531 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16
532 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0
533 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1
534 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
535 // CHECK: [[EXIT]]
536 // CHECK: store x86_fp80 [[OLD]], x86_fp80* @{{.+}},
537 #pragma omp atomic capture
538 {ldv = ldx; ldx -= ullv;}
539 // CHECK: [[EXPR:%.+]] = load float, float* @{{.+}},
540 // CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8*
541 // CHECK: call void @__atomic_load(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* [[BITCAST]], i32 0)
542 // CHECK: br label %[[CONT:.+]]
543 // CHECK: [[CONT]]
544 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0
545 // CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]]
546 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1
547 // CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]]
548 // <Skip checks for complex calculations>
549 // CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0
550 // CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1
551 // CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]]
552 // CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]]
553 // CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8*
554 // CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8*
555 // CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 8, i8* bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* [[EXPECTED]], i8* [[DESIRED]], i32 0, i32 0)
556 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
557 // CHECK: [[EXIT]]
558 // CHECK: store i32 [[NEW_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0),
559 // CHECK: store i32 [[NEW_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1),
560 #pragma omp atomic capture
561 {cix = fv / cix; civ = cix;}
562 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
563 // CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2
564 // CHECK: br label %[[CONT:.+]]
565 // CHECK: [[CONT]]
566 // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
567 // CHECK: [[CONV:%.+]] = sext i16 [[EXPECTED]] to i32
568 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double
569 // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]]
570 // CHECK: [[NEW:%.+]] = fptosi double [[ADD]] to i16
571 // CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]],
572 // CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]],
573 // CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2
574 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0
575 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1
576 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
577 // CHECK: [[EXIT]]
578 // CHECK: store i16 [[NEW]], i16* @{{.+}},
579 #pragma omp atomic capture
580 sv = sx = sx + dv;
581 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}},
582 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1
583 // CHECK: br label %[[CONT:.+]]
584 // CHECK: [[CONT]]
585 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
586 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
587 // CHECK: [[CONV:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
588 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to x86_fp80
589 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]]
590 // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000
591 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
592 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
593 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
594 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1
595 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
596 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
597 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
598 // CHECK: [[EXIT]]
599 // CHECK: [[EXPECTED_I8:%.+]] = zext i1 [[BOOL_EXPECTED]] to i8
600 // CHECK: store i8 [[EXPECTED_I8]], i8* @{{.+}},
601 #pragma omp atomic capture
602 {bv = bx; bx = ldv * bx;}
603 // CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0),
604 // CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1),
605 // CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1
606 // CHECK: br label %[[CONT:.+]]
607 // CHECK: [[CONT]]
608 // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ]
609 // CHECK: [[BOOL_EXPECTED:%.+]] = trunc i8 [[EXPECTED]] to i1
610 // CHECK: [[X_RVAL:%.+]] = zext i1 [[BOOL_EXPECTED]] to i32
611 // CHECK: [[SUB_RE:%.+]] = sub i32 [[EXPR_RE:%.+]], [[X_RVAL]]
612 // CHECK: [[SUB_IM:%.+]] = sub i32 [[EXPR_IM:%.+]], 0
613 // CHECK: icmp ne i32 [[SUB_RE]], 0
614 // CHECK: icmp ne i32 [[SUB_IM]], 0
615 // CHECK: [[BOOL_DESIRED:%.+]] = or i1
616 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
617 // CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]],
618 // CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]],
619 // CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1
620 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0
621 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1
622 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]]
623 // CHECK: [[EXIT]]
624 // CHECK: [[DESIRED_I8:%.+]] = zext i1 [[BOOL_DESIRED]] to i8
625 // CHECK: store i8 [[DESIRED_I8]], i8* @{{.+}},
626 #pragma omp atomic capture
627 {bx = civ - bx; bv = bx;}
628 // CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}}
629 // CHECK: load i8, i8*
630 // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32
631 // CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16
632 // CHECK: br label %[[CONT:.+]]
633 // CHECK: [[CONT]]
634 // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
635 // CHECK: [[TEMP_I:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128*
636 // CHECK: store i128 [[OLD_I128]], i128* [[TEMP_I]],
637 // CHECK: [[LD:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32>
638 // CHECK: store <4 x i32> [[LD]], <4 x i32>* [[TEMP1:%.+]],
639 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP1]]
640 // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]]
641 // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]]
642 // CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]]
643 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]]
644 // CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]]
645 // CHECK: [[NEW_I128:%.+]] = load i128, i128* [[TEMP_I]],
646 // CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16
647 // CHECK: [[FAILED_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0
648 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1
649 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
650 // CHECK: [[EXIT]]
651 // CHECK: store i32 [[OR]], i32* @{{.+}},
652 #pragma omp atomic capture
653 {int4x[sv] |= bv; iv = int4x[sv];}
654 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
655 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4
656 // CHECK: br label %[[CONT:.+]]
657 // CHECK: [[CONT]]
658 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
659 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
660 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
661 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
662 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
663 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
664 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
665 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
666 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
667 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
668 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
669 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
670 // CHECK: [[BF_SET:%.+]] = or i32 [[BF_CLEAR]], [[BF_VALUE]]
671 // CHECK: store i32 [[BF_SET]], i32* [[TEMP1]],
672 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]],
673 // CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
674 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
675 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
676 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
677 // CHECK: [[EXIT]]
678 // CHECK: store i32 [[CONV]], i32* @{{.+}},
679 #pragma omp atomic capture
680 iv = bfx.a = bfx.a - ldv;
681 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
682 // CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8*
683 // CHECK: call void @__atomic_load(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST]], i32 0)
684 // CHECK: br label %[[CONT:.+]]
685 // CHECK: [[CONT]]
686 // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]],
687 // CHECK: store i32 [[OLD]], i32* [[TEMP1:%.+]],
688 // CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]],
689 // CHECK: store i32 [[OLD]], i32* [[TEMP:%.+]],
690 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
691 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1
692 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1
693 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
694 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
695 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32
696 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
697 // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647
698 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648
699 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
700 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
701 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8*
702 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8*
703 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 4, i8* getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0)
704 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
705 // CHECK: [[EXIT]]
706 // CHECK: store i32 [[A_ASHR]], i32* @{{.+}},
707 #pragma omp atomic capture
708 {iv = bfx_packed.a; bfx_packed.a *= ldv;}
709 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
710 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4
711 // CHECK: br label %[[CONT:.+]]
712 // CHECK: [[CONT]]
713 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
714 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
715 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
716 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
717 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31
718 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
719 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]]
720 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32
721 // CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]],
722 // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1
723 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31
724 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647
725 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
726 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
727 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
728 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
729 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
730 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
731 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
732 // CHECK: [[EXIT]]
733 // CHECK: store i32 [[CONV]], i32* @{{.+}},
734 #pragma omp atomic capture
735 {bfx2.a -= ldv; iv = bfx2.a;}
736 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
737 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1
738 // CHECK: br label %[[CONT:.+]]
739 // CHECK: [[CONT]]
740 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
741 // CHECK: [[BITCAST_NEW:%.+]] = bitcast i32* %{{.+}} to i8*
742 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST_NEW]],
743 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
744 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
745 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
746 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7
747 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32
748 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
749 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]]
750 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
751 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8
752 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST_NEW]],
753 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1
754 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7
755 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127
756 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
757 // CHECK: store i8 %{{.+}}, i8* [[BITCAST_NEW]]
758 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST_NEW]]
759 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
760 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
761 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
762 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
763 // CHECK: [[EXIT]]
764 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
765 #pragma omp atomic capture
766 iv = bfx2_packed.a = ldv / bfx2_packed.a;
767 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
768 // CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4
769 // CHECK: br label %[[CONT:.+]]
770 // CHECK: [[CONT]]
771 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
772 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]],
773 // CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]],
774 // CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]],
775 // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7
776 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18
777 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80
778 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]]
779 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32
780 // CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]],
781 // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383
782 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11
783 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385
784 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]]
785 // CHECK: store i32 %{{.+}}, i32* [[TEMP1]]
786 // CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]]
787 // CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4
788 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0
789 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1
790 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
791 // CHECK: [[EXIT]]
792 // CHECK: store i32 [[A_ASHR]], i32* @{{.+}},
793 #pragma omp atomic capture
794 {iv = bfx3.a; bfx3.a /= ldv;}
795 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
796 // CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24*
797 // CHECK: [[BITCAST:%.+]] = bitcast i24* [[LDTEMP]] to i8*
798 // CHECK: call void @__atomic_load(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST]], i32 0)
799 // CHECK: br label %[[CONT:.+]]
800 // CHECK: [[CONT]]
801 // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]],
802 // CHECK: store i24 [[OLD]], i24* [[BITCAST2:%.+]],
803 // CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]],
804 // CHECK: store i24 [[OLD]], i24* [[BITCAST1:%.+]],
805 // CHECK: [[A_LD:%.+]] = load i24, i24* [[BITCAST1]],
806 // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7
807 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10
808 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32
809 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80
810 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]]
811 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32
812 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24
813 // CHECK: [[BF_LD:%.+]] = load i24, i24* [[BITCAST2]],
814 // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383
815 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3
816 // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065
817 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]]
818 // CHECK: store i24 %{{.+}}, i24* [[BITCAST2]]
819 // CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8*
820 // CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8*
821 // CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 3, i8* getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* [[BITCAST_TEMP_OLD_BF_ADDR]], i8* [[BITCAST_TEMP_NEW_BF_ADDR]], i32 0, i32 0)
822 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
823 // CHECK: [[EXIT]]
824 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
825 #pragma omp atomic capture
826 {bfx3_packed.a += ldv; iv = bfx3_packed.a;}
827 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
828 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8
829 // CHECK: br label %[[CONT:.+]]
830 // CHECK: [[CONT]]
831 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
832 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
833 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
834 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
835 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47
836 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63
837 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32
838 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST:%.+]] to x86_fp80
839 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]]
840 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32
841 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64
842 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
843 // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1
844 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16
845 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537
846 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]]
847 // CHECK: store i64 %{{.+}}, i64* [[TEMP1]]
848 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
849 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8
850 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
851 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
852 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
853 // CHECK: [[EXIT]]
854 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
855 #pragma omp atomic relaxed capture
856 iv = bfx4.a = bfx4.a * ldv;
857 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
858 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1
859 // CHECK: br label %[[CONT:.+]]
860 // CHECK: [[CONT]]
861 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
862 // CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8*
863 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
864 // CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8*
865 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
866 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
867 // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7
868 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7
869 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32
870 // CHECK: [[CONV:%.+]] = sitofp i32 [[CAST]] to x86_fp80
871 // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]]
872 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32
873 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8
874 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
875 // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1
876 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2
877 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
878 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
879 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
880 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1
881 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
882 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
883 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
884 // CHECK: [[EXIT]]
885 // CHECK: store i32 [[CAST]], i32* @{{.+}},
886 #pragma omp atomic capture relaxed
887 {iv = bfx4_packed.a; bfx4_packed.a -= ldv;}
888 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
889 // CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8
890 // CHECK: br label %[[CONT:.+]]
891 // CHECK: [[CONT]]
892 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
893 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]],
894 // CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]],
895 // CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]],
896 // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40
897 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57
898 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80
899 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]]
900 // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64
901 // CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]],
902 // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127
903 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17
904 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145
905 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]]
906 // CHECK: store i64 [[VAL]], i64* [[TEMP1]]
907 // CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]]
908 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] release monotonic, align 8
909 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0
910 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
911 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
912 // CHECK: [[EXIT]]
913 // CHECK: [[NEW_VAL:%.+]] = trunc i64 [[CONV]] to i32
914 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
915 // CHECK-50: call{{.*}} @__kmpc_flush(
916 #pragma omp atomic capture release
917 {bfx4.b /= ldv; iv = bfx4.b;}
918 // CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}
919 // CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) acquire, align 1
920 // CHECK: br label %[[CONT:.+]]
921 // CHECK: [[CONT]]
922 // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ]
923 // CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8*
924 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]],
925 // CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8*
926 // CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]],
927 // CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]],
928 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1
929 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64
930 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80
931 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]]
932 // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64
933 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8
934 // CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]],
935 // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127
936 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1
937 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1
938 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]]
939 // CHECK: store i8 %{{.+}}, i8* [[BITCAST1]]
940 // CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]]
941 // CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] acquire acquire, align 1
942 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0
943 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1
944 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
945 // CHECK: [[EXIT]]
946 // CHECK: [[NEW_VAL_I32:%.+]] = trunc i64 [[NEW_VAL]] to i32
947 // CHECK: store i32 [[NEW_VAL_I32]], i32* @{{.+}},
948 // CHECK-50: call{{.*}} @__kmpc_flush(
949 #pragma omp atomic capture acquire
950 iv = bfx4_packed.b += ldv;
951 // CHECK: load i64, i64*
952 // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float
953 // CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) acquire, align 8
954 // CHECK: br label %[[CONT:.+]]
955 // CHECK: [[CONT]]
956 // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ]
957 // CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP1:%.+]] to i64*
958 // CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]],
959 // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float>
960 // CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]],
961 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]]
962 // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0
963 // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]]
964 // CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP1]],
965 // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0
966 // CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP1]]
967 // CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]]
968 // CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] acq_rel acquire, align 8
969 // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0
970 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1
971 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]]
972 // CHECK: [[EXIT]]
973 // CHECK: store float [[X]], float* @{{.+}},
974 // CHECK-50: call{{.*}} @__kmpc_flush(
975 #pragma omp atomic capture acq_rel
976 {fv = float2x.x; float2x.x = ulv - float2x.x;}
977 // CHECK: [[EXPR:%.+]] = load double, double* @{{.+}},
978 // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]])
979 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double
980 // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]]
981 // CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32
982 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]])
983 // CHECK: store i32 [[NEW_VAL]], i32* @{{.+}},
984 // CHECK-50: call{{.*}} @__kmpc_flush(
985 #pragma omp atomic capture seq_cst
986 {rix = dv / rix; iv = rix;}
987 // CHECK: [[OLD_VAL:%.+]] = atomicrmw xchg i32* @{{.+}}, i32 5 monotonic, align 4
988 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[OLD_VAL]])
989 #pragma omp atomic capture
990 {rix = ix; ix = 5;}
991 return 0;
992 }
993 #endif
994