1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \
3; RUN:   -mtriple=powerpc64le-linux-gnu < %s | FileCheck \
4; RUN:   -check-prefix=CHECK-LE %s
5
6declare i64 @llvm.abs.i64(i64, i1 immarg)
7declare <2 x i64> @llvm.abs.v2i64(<2 x i64>, i1)
8declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
9declare <8 x i16> @llvm.abs.v8i16(<8 x i16>, i1)
10declare <16 x i8> @llvm.abs.v16i8(<16 x i8>, i1)
11
12define i64@neg_abs(i64 %x) {
13; CHECK-LE-LABEL: neg_abs:
14; CHECK-LE:       # %bb.0:
15; CHECK-LE-NEXT:    sradi r4, r3, 63
16; CHECK-LE-NEXT:    xor r3, r3, r4
17; CHECK-LE-NEXT:    sub r3, r4, r3
18; CHECK-LE-NEXT:    blr
19  %abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
20  %neg = sub nsw i64 0, %abs
21  ret i64 %neg
22}
23
24define <2 x i64> @neg_abs_v2i64(<2 x i64> %0) {
25; CHECK-LE-LABEL: neg_abs_v2i64:
26; CHECK-LE:       # %bb.0:
27; CHECK-LE-NEXT:    xxlxor vs35, vs35, vs35
28; CHECK-LE-NEXT:    vsubudm v3, v3, v2
29; CHECK-LE-NEXT:    vminsd v2, v2, v3
30; CHECK-LE-NEXT:    blr
31  %abs = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %0, i1 true)
32  %neg.abs = sub <2 x i64> zeroinitializer, %abs
33  ret <2 x i64> %neg.abs
34}
35
36define <4 x i32> @neg_abs_v4i32(<4 x i32> %0) {
37; CHECK-LE-LABEL: neg_abs_v4i32:
38; CHECK-LE:       # %bb.0:
39; CHECK-LE-NEXT:    xxlxor vs35, vs35, vs35
40; CHECK-LE-NEXT:    vsubuwm v3, v3, v2
41; CHECK-LE-NEXT:    vminsw v2, v2, v3
42; CHECK-LE-NEXT:    blr
43  %abs = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %0, i1 true)
44  %neg.abs = sub <4 x i32> zeroinitializer, %abs
45  ret <4 x i32> %neg.abs
46}
47
48define <8 x i16> @neg_abs_v8i16(<8 x i16> %0) {
49; CHECK-LE-LABEL: neg_abs_v8i16:
50; CHECK-LE:       # %bb.0:
51; CHECK-LE-NEXT:    xxlxor vs35, vs35, vs35
52; CHECK-LE-NEXT:    vsubuhm v3, v3, v2
53; CHECK-LE-NEXT:    vminsh v2, v2, v3
54; CHECK-LE-NEXT:    blr
55  %abs = call <8 x i16> @llvm.abs.v8i16(<8 x i16> %0, i1 true)
56  %neg.abs = sub <8 x i16> zeroinitializer, %abs
57  ret <8 x i16> %neg.abs
58}
59
60define <16 x i8> @neg_abs_v16i8(<16 x i8> %0) {
61; CHECK-LE-LABEL: neg_abs_v16i8:
62; CHECK-LE:       # %bb.0:
63; CHECK-LE-NEXT:    xxlxor vs35, vs35, vs35
64; CHECK-LE-NEXT:    vsububm v3, v3, v2
65; CHECK-LE-NEXT:    vminsb v2, v2, v3
66; CHECK-LE-NEXT:    blr
67  %abs = call <16 x i8> @llvm.abs.v16i8(<16 x i8> %0, i1 true)
68  %neg.abs = sub <16 x i8> zeroinitializer, %abs
69  ret <16 x i8> %neg.abs
70}
71