1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ 3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 4; RUN: FileCheck %s 5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \ 6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \ 7; RUN: FileCheck %s --check-prefix=CHECK-BE 8 9; This test case tests spilling the CR LT bit on Power10. On Power10, this is 10; achieved by setb %reg, %CRREG (lt bit) -> stw %reg, $FI instead of: 11; mfocrf %reg, %CRREG -> rlwinm %reg1, %reg, $SH, 0, 0 -> stw %reg1, $FI. 12 13; Without fine-grained control over clobbering individual CR bits, 14; it is difficult to produce a concise test case that will ensure a specific 15; bit of any CR field is spilled. We need to test the spilling of a CR bit 16; other than the LT bit. Hence this test case is rather complex. 17 18%0 = type { %1 } 19%1 = type { %0*, %0*, %0*, i32 } 20 21@call_1 = external dso_local unnamed_addr global i32, align 4 22declare %0* @call_2() local_unnamed_addr 23declare i32 @call_3() local_unnamed_addr 24declare void @call_4() local_unnamed_addr 25 26define dso_local void @P10_Spill_CR_LT() local_unnamed_addr { 27; CHECK-LABEL: P10_Spill_CR_LT: 28; CHECK: .localentry P10_Spill_CR_LT, 1 29; CHECK-NEXT: # %bb.0: # %bb 30; CHECK-NEXT: mflr r0 31; CHECK-NEXT: mfcr r12 32; CHECK-NEXT: std r0, 16(r1) 33; CHECK-NEXT: stw r12, 8(r1) 34; CHECK-NEXT: stdu r1, -80(r1) 35; CHECK-NEXT: .cfi_def_cfa_offset 80 36; CHECK-NEXT: .cfi_offset lr, 16 37; CHECK-NEXT: .cfi_offset r30, -16 38; CHECK-NEXT: .cfi_offset cr2, 8 39; CHECK-NEXT: .cfi_offset cr3, 8 40; CHECK-NEXT: .cfi_offset cr4, 8 41; CHECK-NEXT: std r30, 64(r1) # 8-byte Folded Spill 42; CHECK-NEXT: bl call_2@notoc 43; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_13 44; CHECK-NEXT: # %bb.1: # %bb 45; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_14 46; CHECK-NEXT: # %bb.2: # %bb4 47; CHECK-NEXT: cmpdi cr3, r3, 0 48; CHECK-NEXT: # implicit-def: $r30 49; CHECK-NEXT: crnot 4*cr5+lt, 4*cr3+eq 50; CHECK-NEXT: setnbc r3, 4*cr5+lt 51; CHECK-NEXT: stw r3, 60(r1) 52; CHECK-NEXT: lwz r3, 0(r3) 53; CHECK-NEXT: cmpwi cr4, r3, 0 54; CHECK-NEXT: .p2align 4 55; CHECK-NEXT: .LBB0_3: # %bb12 56; CHECK-NEXT: # 57; CHECK-NEXT: bl call_3@notoc 58; CHECK-NEXT: cmpwi r3, 1 59; CHECK-NEXT: crnand 4*cr5+lt, eq, 4*cr4+gt 60; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_8 61; CHECK-NEXT: # %bb.4: # %bb23 62; CHECK-NEXT: # 63; CHECK-NEXT: plwz r3, call_1@PCREL(0), 1 64; CHECK-NEXT: cmplwi r3, 0 65; CHECK-NEXT: bne- cr0, .LBB0_10 66; CHECK-NEXT: # %bb.5: # %bb30 67; CHECK-NEXT: # 68; CHECK-NEXT: bc 12, 4*cr3+eq, .LBB0_9 69; CHECK-NEXT: # %bb.6: # %bb32 70; CHECK-NEXT: # 71; CHECK-NEXT: rlwinm r30, r30, 0, 24, 22 72; CHECK-NEXT: andi. r3, r30, 2 73; CHECK-NEXT: mcrf cr2, cr0 74; CHECK-NEXT: bl call_4@notoc 75; CHECK-NEXT: beq+ cr2, .LBB0_3 76; CHECK-NEXT: # %bb.7: # %bb37 77; CHECK-NEXT: .LBB0_8: # %bb22 78; CHECK-NEXT: .LBB0_9: # %bb35 79; CHECK-NEXT: .LBB0_10: # %bb27 80; CHECK-NEXT: lwz r4, 60(r1) 81; CHECK-NEXT: # implicit-def: $cr5lt 82; CHECK-NEXT: mfocrf r3, 4 83; CHECK-NEXT: rlwimi r3, r4, 12, 20, 20 84; CHECK-NEXT: mtocrf 4, r3 85; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_12 86; CHECK-NEXT: # %bb.11: # %bb28 87; CHECK-NEXT: .LBB0_12: # %bb29 88; CHECK-NEXT: .LBB0_13: # %bb3 89; CHECK-NEXT: .LBB0_14: # %bb2 90; 91; CHECK-BE-LABEL: P10_Spill_CR_LT: 92; CHECK-BE: # %bb.0: # %bb 93; CHECK-BE-NEXT: mflr r0 94; CHECK-BE-NEXT: mfcr r12 95; CHECK-BE-NEXT: std r0, 16(r1) 96; CHECK-BE-NEXT: stw r12, 8(r1) 97; CHECK-BE-NEXT: stdu r1, -160(r1) 98; CHECK-BE-NEXT: .cfi_def_cfa_offset 160 99; CHECK-BE-NEXT: .cfi_offset lr, 16 100; CHECK-BE-NEXT: .cfi_offset r29, -24 101; CHECK-BE-NEXT: .cfi_offset r30, -16 102; CHECK-BE-NEXT: .cfi_offset cr2, 8 103; CHECK-BE-NEXT: .cfi_offset cr2, 8 104; CHECK-BE-NEXT: .cfi_offset cr2, 8 105; CHECK-BE-NEXT: std r29, 136(r1) # 8-byte Folded Spill 106; CHECK-BE-NEXT: std r30, 144(r1) # 8-byte Folded Spill 107; CHECK-BE-NEXT: bl call_2 108; CHECK-BE-NEXT: nop 109; CHECK-BE-NEXT: bc 12, 4*cr5+lt, .LBB0_13 110; CHECK-BE-NEXT: # %bb.1: # %bb 111; CHECK-BE-NEXT: bc 4, 4*cr5+lt, .LBB0_14 112; CHECK-BE-NEXT: # %bb.2: # %bb4 113; CHECK-BE-NEXT: cmpdi cr3, r3, 0 114; CHECK-BE-NEXT: addis r30, r2, call_1@toc@ha 115; CHECK-BE-NEXT: # implicit-def: $r29 116; CHECK-BE-NEXT: crnot 4*cr5+lt, 4*cr3+eq 117; CHECK-BE-NEXT: setnbc r3, 4*cr5+lt 118; CHECK-BE-NEXT: stw r3, 132(r1) 119; CHECK-BE-NEXT: lwz r3, 0(r3) 120; CHECK-BE-NEXT: cmpwi cr4, r3, 0 121; CHECK-BE-NEXT: .p2align 4 122; CHECK-BE-NEXT: .LBB0_3: # %bb12 123; CHECK-BE-NEXT: # 124; CHECK-BE-NEXT: bl call_3 125; CHECK-BE-NEXT: nop 126; CHECK-BE-NEXT: cmpwi r3, 1 127; CHECK-BE-NEXT: crnand 4*cr5+lt, eq, 4*cr4+gt 128; CHECK-BE-NEXT: bc 4, 4*cr5+lt, .LBB0_8 129; CHECK-BE-NEXT: # %bb.4: # %bb23 130; CHECK-BE-NEXT: # 131; CHECK-BE-NEXT: lwz r3, call_1@toc@l(r30) 132; CHECK-BE-NEXT: cmplwi r3, 0 133; CHECK-BE-NEXT: bne- cr0, .LBB0_10 134; CHECK-BE-NEXT: # %bb.5: # %bb30 135; CHECK-BE-NEXT: # 136; CHECK-BE-NEXT: bc 12, 4*cr3+eq, .LBB0_9 137; CHECK-BE-NEXT: # %bb.6: # %bb32 138; CHECK-BE-NEXT: # 139; CHECK-BE-NEXT: rlwinm r29, r29, 0, 24, 22 140; CHECK-BE-NEXT: andi. r3, r29, 2 141; CHECK-BE-NEXT: mcrf cr2, cr0 142; CHECK-BE-NEXT: bl call_4 143; CHECK-BE-NEXT: nop 144; CHECK-BE-NEXT: beq+ cr2, .LBB0_3 145; CHECK-BE-NEXT: # %bb.7: # %bb37 146; CHECK-BE-NEXT: .LBB0_8: # %bb22 147; CHECK-BE-NEXT: .LBB0_9: # %bb35 148; CHECK-BE-NEXT: .LBB0_10: # %bb27 149; CHECK-BE-NEXT: lwz r4, 132(r1) 150; CHECK-BE-NEXT: # implicit-def: $cr5lt 151; CHECK-BE-NEXT: mfocrf r3, 4 152; CHECK-BE-NEXT: rlwimi r3, r4, 12, 20, 20 153; CHECK-BE-NEXT: mtocrf 4, r3 154; CHECK-BE-NEXT: bc 4, 4*cr5+lt, .LBB0_12 155; CHECK-BE-NEXT: # %bb.11: # %bb28 156; CHECK-BE-NEXT: .LBB0_12: # %bb29 157; CHECK-BE-NEXT: .LBB0_13: # %bb3 158; CHECK-BE-NEXT: .LBB0_14: # %bb2 159bb: 160 %tmp = tail call %0* @call_2() 161 %tmp1 = icmp ne %0* %tmp, null 162 switch i32 undef, label %bb4 [ 163 i32 3, label %bb2 164 i32 2, label %bb3 165 ] 166 167bb2: ; preds = %bb 168 unreachable 169 170bb3: ; preds = %bb 171 unreachable 172 173bb4: ; preds = %bb 174 %tmp5 = load i64, i64* undef, align 8 175 %tmp6 = trunc i64 %tmp5 to i32 176 %tmp7 = add i32 0, %tmp6 177 %tmp8 = icmp sgt i32 %tmp7, 0 178 %tmp9 = icmp eq i8 0, 0 179 %tmp10 = zext i1 %tmp9 to i32 180 %tmp11 = icmp eq %0* %tmp, null 181 br label %bb12 182 183bb12: ; preds = %bb38, %bb4 184 %tmp13 = phi i32 [ %tmp10, %bb4 ], [ undef, %bb38 ] 185 %tmp14 = phi i32 [ undef, %bb4 ], [ %tmp17, %bb38 ] 186 %tmp15 = icmp ne i32 %tmp13, 0 187 %tmp16 = and i32 %tmp14, -257 188 %tmp17 = select i1 %tmp15, i32 %tmp16, i32 undef 189 br label %bb18 190 191bb18: ; preds = %bb12 192 %tmp19 = call zeroext i32 @call_3() 193 %tmp20 = icmp eq i32 %tmp19, 1 194 %tmp21 = and i1 %tmp8, %tmp20 195 br i1 %tmp21, label %bb22, label %bb23 196 197bb22: ; preds = %bb18 198 unreachable 199 200bb23: ; preds = %bb18 201 br label %bb24 202 203bb24: ; preds = %bb23 204 %tmp25 = load i32, i32* @call_1, align 4 205 %tmp26 = icmp eq i32 %tmp25, 0 206 br i1 %tmp26, label %bb30, label %bb27 207 208bb27: ; preds = %bb24 209 br i1 %tmp1, label %bb28, label %bb29 210 211bb28: ; preds = %bb27 212 unreachable 213 214bb29: ; preds = %bb27 215 unreachable 216 217bb30: ; preds = %bb24 218 br label %bb31 219 220bb31: ; preds = %bb30 221 br i1 %tmp11, label %bb35, label %bb32 222 223bb32: ; preds = %bb31 224 %tmp33 = and i32 %tmp17, 2 225 %tmp34 = icmp eq i32 %tmp33, 0 226 call void @call_4() 227 br label %bb36 228 229bb35: ; preds = %bb31 230 unreachable 231 232bb36: ; preds = %bb32 233 br i1 %tmp34, label %bb38, label %bb37 234 235bb37: ; preds = %bb36 236 unreachable 237 238bb38: ; preds = %bb36 239 br label %bb12 240} 241 242