1; Test 64-bit GPR stores.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
4
5; Check STG with no displacement.
6define void @f1(i64 *%dst, i64 %val) {
7; CHECK-LABEL: f1:
8; CHECK: stg %r3, 0(%r2)
9; CHECK: br %r14
10  store i64 %val, i64 *%dst
11  ret void
12}
13
14; Check the high end of the aligned STG range.
15define void @f2(i64 *%dst, i64 %val) {
16; CHECK-LABEL: f2:
17; CHECK: stg %r3, 524280(%r2)
18; CHECK: br %r14
19  %ptr = getelementptr i64, i64 *%dst, i64 65535
20  store i64 %val, i64 *%ptr
21  ret void
22}
23
24; Check the next doubleword up, which needs separate address logic.
25; Other sequences besides this one would be OK.
26define void @f3(i64 *%dst, i64 %val) {
27; CHECK-LABEL: f3:
28; CHECK: agfi %r2, 524288
29; CHECK: stg %r3, 0(%r2)
30; CHECK: br %r14
31  %ptr = getelementptr i64, i64 *%dst, i64 65536
32  store i64 %val, i64 *%ptr
33  ret void
34}
35
36; Check the high end of the negative aligned STG range.
37define void @f4(i64 *%dst, i64 %val) {
38; CHECK-LABEL: f4:
39; CHECK: stg %r3, -8(%r2)
40; CHECK: br %r14
41  %ptr = getelementptr i64, i64 *%dst, i64 -1
42  store i64 %val, i64 *%ptr
43  ret void
44}
45
46; Check the low end of the STG range.
47define void @f5(i64 *%dst, i64 %val) {
48; CHECK-LABEL: f5:
49; CHECK: stg %r3, -524288(%r2)
50; CHECK: br %r14
51  %ptr = getelementptr i64, i64 *%dst, i64 -65536
52  store i64 %val, i64 *%ptr
53  ret void
54}
55
56; Check the next doubleword down, which needs separate address logic.
57; Other sequences besides this one would be OK.
58define void @f6(i64 *%dst, i64 %val) {
59; CHECK-LABEL: f6:
60; CHECK: agfi %r2, -524296
61; CHECK: stg %r3, 0(%r2)
62; CHECK: br %r14
63  %ptr = getelementptr i64, i64 *%dst, i64 -65537
64  store i64 %val, i64 *%ptr
65  ret void
66}
67
68; Check that STG allows an index.
69define void @f7(i64 %dst, i64 %index, i64 %val) {
70; CHECK-LABEL: f7:
71; CHECK: stg %r4, 524287({{%r3,%r2|%r2,%r3}})
72; CHECK: br %r14
73  %add1 = add i64 %dst, %index
74  %add2 = add i64 %add1, 524287
75  %ptr = inttoptr i64 %add2 to i64 *
76  store i64 %val, i64 *%ptr
77  ret void
78}
79