1; Test vector logical shift right with vector shift amount.
2;
3; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
4
5; Test a v16i8 shift.
6define <16 x i8> @f1(<16 x i8> %dummy, <16 x i8> %val1, <16 x i8> %val2) {
7; CHECK-LABEL: f1:
8; CHECK: vesrlvb %v24, %v26, %v28
9; CHECK: br %r14
10  %ret = lshr <16 x i8> %val1, %val2
11  ret <16 x i8> %ret
12}
13
14; Test a v8i16 shift.
15define <8 x i16> @f2(<8 x i16> %dummy, <8 x i16> %val1, <8 x i16> %val2) {
16; CHECK-LABEL: f2:
17; CHECK: vesrlvh %v24, %v26, %v28
18; CHECK: br %r14
19  %ret = lshr <8 x i16> %val1, %val2
20  ret <8 x i16> %ret
21}
22
23; Test a v4i32 shift.
24define <4 x i32> @f3(<4 x i32> %dummy, <4 x i32> %val1, <4 x i32> %val2) {
25; CHECK-LABEL: f3:
26; CHECK: vesrlvf %v24, %v26, %v28
27; CHECK: br %r14
28  %ret = lshr <4 x i32> %val1, %val2
29  ret <4 x i32> %ret
30}
31
32; Test a v2i64 shift.
33define <2 x i64> @f4(<2 x i64> %dummy, <2 x i64> %val1, <2 x i64> %val2) {
34; CHECK-LABEL: f4:
35; CHECK: vesrlvg %v24, %v26, %v28
36; CHECK: br %r14
37  %ret = lshr <2 x i64> %val1, %val2
38  ret <2 x i64> %ret
39}
40