1// RUN: llvm-tblgen -gen-global-isel -I %p/../../include -I %p/Common -optimize-match-table=false %s -o %T/context-non-optimized.cpp
2// RUN: FileCheck %s --check-prefixes=CHECK_NOPT -input-file=%T/context-non-optimized.cpp
3// RUN: llvm-tblgen -gen-global-isel -I %p/../../include -I %p/Common -optimize-match-table=true  %s -o %T/context-optimized.cpp
4// RUN: FileCheck %s --check-prefixes=CHECK_OPT -input-file=%T/context-optimized.cpp
5
6
7
8include "llvm/Target/Target.td"
9include "GlobalISelEmitterCommon.td"
10
11def test_atomic_op_frag : PatFrag<(ops node:$ptr, node:$val),
12	                                             (atomic_swap node:$ptr, node:$val)> {
13  let GISelPredicateCode = [{ return !MRI.use_nodbg_empty(MI.getOperand(0).getReg()); }];
14  let IsAtomic = 1;
15  let MemoryVT = i32;
16}
17
18def INSN : I<(outs GPR32:$dst), (ins GPR32Op:$src1, GPR32Op:$src2), []>;
19
20def : Pat<(test_atomic_op_frag GPR32:$ptr, GPR32:$val) ,
21	      (INSN GPR32:$ptr, GPR32:$val)>;
22
23// CHECK_NOPT-LABEL: const int64_t *MyTargetInstructionSelector::getMatchTable() const {
24// CHECK_NOPT-NEXT:  constexpr static int64_t MatchTable0[] = {
25// CHECK_NOPT-NEXT:    GIM_Try, /*On fail goto*//*Label 0*/ 46, // Rule ID 0 //
26// CHECK_NOPT-NEXT:      GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
27// CHECK_NOPT-NEXT:      GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ATOMICRMW_XCHG,
28// CHECK_NOPT-NEXT:      GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
29// CHECK_NOPT-NEXT:      // MIs[0] dst
30// CHECK_NOPT-NEXT:      GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
31// CHECK_NOPT-NEXT:      GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
32// CHECK_NOPT-NEXT:      // MIs[0] ptr
33// CHECK_NOPT-NEXT:      GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
34// CHECK_NOPT-NEXT:      GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID,
35// CHECK_NOPT-NEXT:      // MIs[0] val
36// CHECK_NOPT-NEXT:      GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
37// CHECK_NOPT-NEXT:      GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
38// CHECK_NOPT-NEXT:      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIPFP_MI_Predicate_test_atomic_op_frag,
39// CHECK_NOPT-NEXT:      // (atomic_swap:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)<<P:Predicate_test_atomic_op_frag>>  =>  (INSN:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)
40// CHECK_NOPT-NEXT:      GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/MyTarget::INSN,
41// CHECK_NOPT-NEXT:      GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
42// CHECK_NOPT-NEXT:      // GIR_Coverage, 0,
43// CHECK_NOPT-NEXT:      GIR_Done,
44// CHECK_NOPT-NEXT:    // Label 0: @46
45// CHECK_NOPT-NEXT:    GIM_Reject,
46// CHECK_NOPT-NEXT:    };
47// CHECK_NOPT-NEXT:  return MatchTable0;
48// CHECK_NOPT-NEXT: }
49//
50//
51
52// CHECK_OPT-LABEL: const int64_t *MyTargetInstructionSelector::getMatchTable() const {
53// CHECK_OPT-NEXT:  constexpr static int64_t MatchTable0[] = {
54// CHECK_OPT-NEXT:    GIM_Try, /*On fail goto*//*Label 0*/ 43, // Rule ID 0 //
55// CHECK_OPT-NEXT:      GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ATOMICRMW_XCHG,
56// CHECK_OPT-NEXT:      GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
57// CHECK_OPT-NEXT:      GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
58// CHECK_OPT-NEXT:      GIM_CheckMemorySizeEqualTo, /*MI*/0, /*MMO*/0, /*Size*/4,
59// CHECK_OPT-NEXT:      GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/MyTarget::GPR32RegClassID,
60// CHECK_OPT-NEXT:      // MIs[0] ptr
61// CHECK_OPT-NEXT:      GIM_CheckPointerToAny, /*MI*/0, /*Op*/1, /*SizeInBits*/32,
62// CHECK_OPT-NEXT:      GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/MyTarget::GPR32RegClassID,
63// CHECK_OPT-NEXT:      GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/MyTarget::GPR32RegClassID,
64// CHECK_OPT-NEXT:      GIM_CheckCxxInsnPredicate, /*MI*/0, /*FnId*/GIPFP_MI_Predicate_test_atomic_op_frag,
65// CHECK_OPT-NEXT:      // (atomic_swap:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)<<P:Predicate_test_atomic_op_frag>>  =>  (INSN:{ *:[i32] } GPR32:{ *:[i32] }:$ptr, GPR32:{ *:[i32] }:$val)
66// CHECK_OPT-NEXT:      GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/MyTarget::INSN,
67// CHECK_OPT-NEXT:      GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
68// CHECK_OPT-NEXT:      // GIR_Coverage, 0,
69// CHECK_OPT-NEXT:      GIR_Done,
70// CHECK_OPT-NEXT:    // Label 0: @43
71// CHECK_OPT-NEXT:    GIM_Reject,
72// CHECK_OPT-NEXT:    };
73// CHECK_OPT-NEXT:  return MatchTable0;
74// CHECK_OPT-NEXT: }
75