1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22
23 /* Middle-to-low level generation of rtx code and insns.
24
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
28
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
31
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
37
38 #include "config.h"
39 #include "system.h"
40 #include "coretypes.h"
41 #include "tm.h"
42 #include "toplev.h"
43 #include "rtl.h"
44 #include "tree.h"
45 #include "tm_p.h"
46 #include "flags.h"
47 #include "function.h"
48 #include "expr.h"
49 #include "regs.h"
50 #include "hard-reg-set.h"
51 #include "hashtab.h"
52 #include "insn-config.h"
53 #include "recog.h"
54 #include "real.h"
55 #include "bitmap.h"
56 #include "basic-block.h"
57 #include "ggc.h"
58 #include "debug.h"
59 #include "langhooks.h"
60
61 /* Commonly used modes. */
62
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67
68
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
71
72 static GTY(()) int label_num = 1;
73
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
77
78 static int last_label_num;
79
80 /* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
82
83 static int base_label_num;
84
85 /* Nonzero means do not generate NOTEs for source line numbers. */
86
87 static int no_line_numbers;
88
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
92 of these. */
93
94 rtx global_rtl[GR_MAX];
95
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
101
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
105
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
107
108 rtx const_true_rtx;
109
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
121
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
125
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
130
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
136 same.
137
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
143
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
147
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
151 integers. */
152
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
154
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
157
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
160
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
164
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
168
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
172
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
178
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
194 enum machine_mode);
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
202
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
206
207 /* Returns a hash code for X (which is a really a CONST_INT). */
208
209 static hashval_t
const_int_htab_hash(const void * x)210 const_int_htab_hash (const void *x)
211 {
212 return (hashval_t) INTVAL ((rtx) x);
213 }
214
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
217 HOST_WIDE_INT *). */
218
219 static int
const_int_htab_eq(const void * x,const void * y)220 const_int_htab_eq (const void *x, const void *y)
221 {
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
223 }
224
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
226 static hashval_t
const_double_htab_hash(const void * x)227 const_double_htab_hash (const void *x)
228 {
229 rtx value = (rtx) x;
230 hashval_t h;
231
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
234 else
235 {
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
239 }
240 return h;
241 }
242
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
245 static int
const_double_htab_eq(const void * x,const void * y)246 const_double_htab_eq (const void *x, const void *y)
247 {
248 rtx a = (rtx)x, b = (rtx)y;
249
250 if (GET_MODE (a) != GET_MODE (b))
251 return 0;
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
255 else
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
258 }
259
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
261
262 static hashval_t
mem_attrs_htab_hash(const void * x)263 mem_attrs_htab_hash (const void *x)
264 {
265 mem_attrs *p = (mem_attrs *) x;
266
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
270 ^ (size_t) p->expr);
271 }
272
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
275 mem_attrs *). */
276
277 static int
mem_attrs_htab_eq(const void * x,const void * y)278 mem_attrs_htab_eq (const void *x, const void *y)
279 {
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
282
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
285 }
286
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
289 MEM of mode MODE. */
290
291 static mem_attrs *
get_mem_attrs(HOST_WIDE_INT alias,tree expr,rtx offset,rtx size,unsigned int align,enum machine_mode mode)292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
294 {
295 mem_attrs attrs;
296 void **slot;
297
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
302 && (size == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
306 return 0;
307
308 attrs.alias = alias;
309 attrs.expr = expr;
310 attrs.offset = offset;
311 attrs.size = size;
312 attrs.align = align;
313
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
315 if (*slot == 0)
316 {
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
319 }
320
321 return *slot;
322 }
323
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
325
326 static hashval_t
reg_attrs_htab_hash(const void * x)327 reg_attrs_htab_hash (const void *x)
328 {
329 reg_attrs *p = (reg_attrs *) x;
330
331 return ((p->offset * 1000) ^ (long) p->decl);
332 }
333
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
336 reg_attrs *). */
337
338 static int
reg_attrs_htab_eq(const void * x,const void * y)339 reg_attrs_htab_eq (const void *x, const void *y)
340 {
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
343
344 return (p->decl == q->decl && p->offset == q->offset);
345 }
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
348 MEM of mode MODE. */
349
350 static reg_attrs *
get_reg_attrs(tree decl,int offset)351 get_reg_attrs (tree decl, int offset)
352 {
353 reg_attrs attrs;
354 void **slot;
355
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
358 return 0;
359
360 attrs.decl = decl;
361 attrs.offset = offset;
362
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
364 if (*slot == 0)
365 {
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
368 }
369
370 return *slot;
371 }
372
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
376
377 rtx
gen_raw_REG(enum machine_mode mode,int regno)378 gen_raw_REG (enum machine_mode mode, int regno)
379 {
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
382 return x;
383 }
384
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
388
389 rtx
gen_rtx_CONST_INT(enum machine_mode mode ATTRIBUTE_UNUSED,HOST_WIDE_INT arg)390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
391 {
392 void **slot;
393
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
396
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
400 #endif
401
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
405 if (*slot == 0)
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
407
408 return (rtx) *slot;
409 }
410
411 rtx
gen_int_mode(HOST_WIDE_INT c,enum machine_mode mode)412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
413 {
414 return GEN_INT (trunc_int_for_mode (c, mode));
415 }
416
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
420
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
424 static rtx
lookup_const_double(rtx real)425 lookup_const_double (rtx real)
426 {
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
428 if (*slot == 0)
429 *slot = real;
430
431 return (rtx) *slot;
432 }
433
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
436 rtx
const_double_from_real_value(REAL_VALUE_TYPE value,enum machine_mode mode)437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
438 {
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
441
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
443
444 return lookup_const_double (real);
445 }
446
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
451
452 rtx
immed_double_const(HOST_WIDE_INT i0,HOST_WIDE_INT i1,enum machine_mode mode)453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
454 {
455 rtx value;
456 unsigned int i;
457
458 if (mode != VOIDmode)
459 {
460 int width;
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
466 abort ();
467
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
478 i1 = 0;
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
481 abort ();
482
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
486
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
491
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
495
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
497 CONST_INT.
498
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
503 negative number.
504
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
510
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
513
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
516 }
517
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
520 return GEN_INT (i0);
521
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
525
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
528
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
531
532 return lookup_const_double (value);
533 }
534
535 rtx
gen_rtx_REG(enum machine_mode mode,unsigned int regno)536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
537 {
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
542 assigned to them.
543
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
548
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
551
552 if (mode == Pmode && !reload_in_progress)
553 {
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
561 #endif
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
565 #endif
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
569 #endif
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
575 }
576
577 #if 0
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
580
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
585
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
588
589 if (cfun
590 && cfun->emit
591 && regno_reg_rtx
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
595 #endif
596
597 return gen_raw_REG (mode, regno);
598 }
599
600 rtx
gen_rtx_MEM(enum machine_mode mode,rtx addr)601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
602 {
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
604
605 /* This field is not cleared by the mere allocation of the rtx, so
606 we clear it here. */
607 MEM_ATTRS (rt) = 0;
608
609 return rt;
610 }
611
612 rtx
gen_rtx_SUBREG(enum machine_mode mode,rtx reg,int offset)613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
614 {
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
618 abort ();
619
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
623 #if 0
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
626 abort ();
627 #endif
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
629 }
630
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
633
634 rtx
gen_lowpart_SUBREG(enum machine_mode mode,rtx reg)635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
636 {
637 enum machine_mode inmode;
638
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
641 inmode = mode;
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
644 }
645
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
647 **
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
653 ** in <mode>.
654 **
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
657 **
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
660 **
661 ** ...would be generated by the following C code:
662 **
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
670 */
671
672 /*VARARGS2*/
673 rtx
gen_rtx(enum rtx_code code,enum machine_mode mode,...)674 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
675 {
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
679 va_list p;
680
681 va_start (p, mode);
682
683 switch (code)
684 {
685 case CONST_INT:
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
687 break;
688
689 case CONST_DOUBLE:
690 {
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
693
694 rt_val = immed_double_const (arg0, arg1, mode);
695 }
696 break;
697
698 case REG:
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
700 break;
701
702 case MEM:
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
704 break;
705
706 default:
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
709
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
712 {
713 switch (*fmt++)
714 {
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
717 break;
718
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
721 break;
722
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
725 break;
726
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
729 break;
730
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
734 break;
735
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
738 break;
739
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
742 break;
743
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
746 break;
747
748 default:
749 abort ();
750 }
751 }
752 break;
753 }
754
755 va_end (p);
756 return rt_val;
757 }
758
759 /* gen_rtvec (n, [rt1, ..., rtn])
760 **
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
763 */
764
765 /*VARARGS1*/
766 rtvec
gen_rtvec(int n,...)767 gen_rtvec (int n, ...)
768 {
769 int i, save_n;
770 rtx *vector;
771 va_list p;
772
773 va_start (p, n);
774
775 if (n == 0)
776 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
777
778 vector = alloca (n * sizeof (rtx));
779
780 for (i = 0; i < n; i++)
781 vector[i] = va_arg (p, rtx);
782
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
784 save_n = n;
785 va_end (p);
786
787 return gen_rtvec_v (save_n, vector);
788 }
789
790 rtvec
gen_rtvec_v(int n,rtx * argp)791 gen_rtvec_v (int n, rtx *argp)
792 {
793 int i;
794 rtvec rt_val;
795
796 if (n == 0)
797 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
798
799 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
800
801 for (i = 0; i < n; i++)
802 rt_val->elem[i] = *argp++;
803
804 return rt_val;
805 }
806
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
809
810 rtx
gen_reg_rtx(enum machine_mode mode)811 gen_reg_rtx (enum machine_mode mode)
812 {
813 struct function *f = cfun;
814 rtx val;
815
816 /* Don't let anything called after initial flow analysis create new
817 registers. */
818 if (no_new_pseudos)
819 abort ();
820
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
824 {
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart, imagpart;
831 enum machine_mode partmode = GET_MODE_INNER (mode);
832
833 realpart = gen_reg_rtx (partmode);
834 imagpart = gen_reg_rtx (partmode);
835 return gen_rtx_CONCAT (mode, realpart, imagpart);
836 }
837
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
840
841 if (reg_rtx_no == f->emit->regno_pointer_align_length)
842 {
843 int old_size = f->emit->regno_pointer_align_length;
844 char *new;
845 rtx *new1;
846
847 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
848 memset (new + old_size, 0, old_size);
849 f->emit->regno_pointer_align = (unsigned char *) new;
850
851 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
852 old_size * 2 * sizeof (rtx));
853 memset (new1 + old_size, 0, old_size * sizeof (rtx));
854 regno_reg_rtx = new1;
855
856 f->emit->regno_pointer_align_length = old_size * 2;
857 }
858
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
861 return val;
862 }
863
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
866
867 rtx
gen_rtx_REG_offset(rtx reg,enum machine_mode mode,unsigned int regno,int offset)868 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
869 {
870 rtx new = gen_rtx_REG (mode, regno);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
873 return new;
874 }
875
876 /* Set the decl for MEM to DECL. */
877
878 void
set_reg_attrs_from_mem(rtx reg,rtx mem)879 set_reg_attrs_from_mem (rtx reg, rtx mem)
880 {
881 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
882 REG_ATTRS (reg)
883 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
884 }
885
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
888
889 void
set_reg_attrs_for_parm(rtx parm_rtx,rtx mem)890 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
891 {
892 if (GET_CODE (parm_rtx) == REG)
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
895 {
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
900 {
901 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
906 }
907 }
908 }
909
910 /* Assign the RTX X to declaration T. */
911 void
set_decl_rtl(tree t,rtx x)912 set_decl_rtl (tree t, rtx x)
913 {
914 DECL_CHECK (t)->decl.rtl = x;
915
916 if (!x)
917 return;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
925 {
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
928 if (REG_P (XEXP (x, 1)))
929 REG_ATTRS (XEXP (x, 1))
930 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
931 }
932 if (GET_CODE (x) == PARALLEL)
933 {
934 int i;
935 for (i = 0; i < XVECLEN (x, 0); i++)
936 {
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
940 }
941 }
942 }
943
944 /* Identify REG (which may be a CONCAT) as a user register. */
945
946 void
mark_user_reg(rtx reg)947 mark_user_reg (rtx reg)
948 {
949 if (GET_CODE (reg) == CONCAT)
950 {
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
953 }
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
956 else
957 abort ();
958 }
959
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
962
963 void
mark_reg_pointer(rtx reg,int align)964 mark_reg_pointer (rtx reg, int align)
965 {
966 if (! REG_POINTER (reg))
967 {
968 REG_POINTER (reg) = 1;
969
970 if (align)
971 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
972 }
973 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
974 /* We can no-longer be sure just how aligned this pointer is. */
975 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
976 }
977
978 /* Return 1 plus largest pseudo reg number used in the current function. */
979
980 int
max_reg_num(void)981 max_reg_num (void)
982 {
983 return reg_rtx_no;
984 }
985
986 /* Return 1 + the largest label number used so far in the current function. */
987
988 int
max_label_num(void)989 max_label_num (void)
990 {
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
993 return label_num;
994 }
995
996 /* Return first label number used in this function (if any were used). */
997
998 int
get_first_label_num(void)999 get_first_label_num (void)
1000 {
1001 return first_label_num;
1002 }
1003
1004 /* Return the final regno of X, which is a SUBREG of a hard
1005 register. */
1006 int
subreg_hard_regno(rtx x,int check_mode)1007 subreg_hard_regno (rtx x, int check_mode)
1008 {
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1012
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1017 abort ();
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1020 abort ();
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1022 abort ();
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1026 abort ();
1027 #endif
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1031 abort ();
1032
1033 final_regno = subreg_regno (x);
1034
1035 return final_regno;
1036 }
1037
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1042
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1046
1047 If this is not a case we can handle, return 0. */
1048
1049 rtx
gen_lowpart_common(enum machine_mode mode,rtx x)1050 gen_lowpart_common (enum machine_mode mode, rtx x)
1051 {
1052 int msize = GET_MODE_SIZE (mode);
1053 int xsize;
1054 int offset = 0;
1055 enum machine_mode innermode;
1056
1057 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1058 so we have to make one up. Yuk. */
1059 innermode = GET_MODE (x);
1060 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1061 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1062 else if (innermode == VOIDmode)
1063 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1064
1065 xsize = GET_MODE_SIZE (innermode);
1066
1067 if (innermode == VOIDmode || innermode == BLKmode)
1068 abort ();
1069
1070 if (innermode == mode)
1071 return x;
1072
1073 /* MODE must occupy no more words than the mode of X. */
1074 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1075 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1076 return 0;
1077
1078 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1079 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1080 return 0;
1081
1082 offset = subreg_lowpart_offset (mode, innermode);
1083
1084 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1085 && (GET_MODE_CLASS (mode) == MODE_INT
1086 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1087 {
1088 /* If we are getting the low-order part of something that has been
1089 sign- or zero-extended, we can either just use the object being
1090 extended or make a narrower extension. If we want an even smaller
1091 piece than the size of the object being extended, call ourselves
1092 recursively.
1093
1094 This case is used mostly by combine and cse. */
1095
1096 if (GET_MODE (XEXP (x, 0)) == mode)
1097 return XEXP (x, 0);
1098 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1099 return gen_lowpart_common (mode, XEXP (x, 0));
1100 else if (msize < xsize)
1101 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1102 }
1103 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1104 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1105 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1106 return simplify_gen_subreg (mode, x, innermode, offset);
1107
1108 /* Otherwise, we can't do this. */
1109 return 0;
1110 }
1111
1112 /* Return the constant real or imaginary part (which has mode MODE)
1113 of a complex value X. The IMAGPART_P argument determines whether
1114 the real or complex component should be returned. This function
1115 returns NULL_RTX if the component isn't a constant. */
1116
1117 static rtx
gen_complex_constant_part(enum machine_mode mode,rtx x,int imagpart_p)1118 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1119 {
1120 tree decl, part;
1121
1122 if (GET_CODE (x) == MEM
1123 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1124 {
1125 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1126 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1127 {
1128 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1129 if (TREE_CODE (part) == REAL_CST
1130 || TREE_CODE (part) == INTEGER_CST)
1131 return expand_expr (part, NULL_RTX, mode, 0);
1132 }
1133 }
1134 return NULL_RTX;
1135 }
1136
1137 /* Return the real part (which has mode MODE) of a complex value X.
1138 This always comes at the low address in memory. */
1139
1140 rtx
gen_realpart(enum machine_mode mode,rtx x)1141 gen_realpart (enum machine_mode mode, rtx x)
1142 {
1143 rtx part;
1144
1145 /* Handle complex constants. */
1146 part = gen_complex_constant_part (mode, x, 0);
1147 if (part != NULL_RTX)
1148 return part;
1149
1150 if (WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1152 && REG_P (x)
1153 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1154 internal_error
1155 ("can't access real part of complex value in hard register");
1156 else if (WORDS_BIG_ENDIAN)
1157 return gen_highpart (mode, x);
1158 else
1159 return gen_lowpart (mode, x);
1160 }
1161
1162 /* Return the imaginary part (which has mode MODE) of a complex value X.
1163 This always comes at the high address in memory. */
1164
1165 rtx
gen_imagpart(enum machine_mode mode,rtx x)1166 gen_imagpart (enum machine_mode mode, rtx x)
1167 {
1168 rtx part;
1169
1170 /* Handle complex constants. */
1171 part = gen_complex_constant_part (mode, x, 1);
1172 if (part != NULL_RTX)
1173 return part;
1174
1175 if (WORDS_BIG_ENDIAN)
1176 return gen_lowpart (mode, x);
1177 else if (! WORDS_BIG_ENDIAN
1178 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1179 && REG_P (x)
1180 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1181 internal_error
1182 ("can't access imaginary part of complex value in hard register");
1183 else
1184 return gen_highpart (mode, x);
1185 }
1186
1187 /* Return 1 iff X, assumed to be a SUBREG,
1188 refers to the real part of the complex value in its containing reg.
1189 Complex values are always stored with the real part in the first word,
1190 regardless of WORDS_BIG_ENDIAN. */
1191
1192 int
subreg_realpart_p(rtx x)1193 subreg_realpart_p (rtx x)
1194 {
1195 if (GET_CODE (x) != SUBREG)
1196 abort ();
1197
1198 return ((unsigned int) SUBREG_BYTE (x)
1199 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1200 }
1201
1202 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1203 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1204 least-significant part of X.
1205 MODE specifies how big a part of X to return;
1206 it usually should not be larger than a word.
1207 If X is a MEM whose address is a QUEUED, the value may be so also. */
1208
1209 rtx
gen_lowpart(enum machine_mode mode,rtx x)1210 gen_lowpart (enum machine_mode mode, rtx x)
1211 {
1212 rtx result = gen_lowpart_common (mode, x);
1213
1214 if (result)
1215 return result;
1216 else if (GET_CODE (x) == REG)
1217 {
1218 /* Must be a hard reg that's not valid in MODE. */
1219 result = gen_lowpart_common (mode, copy_to_reg (x));
1220 if (result == 0)
1221 abort ();
1222 return result;
1223 }
1224 else if (GET_CODE (x) == MEM)
1225 {
1226 /* The only additional case we can do is MEM. */
1227 int offset = 0;
1228
1229 /* The following exposes the use of "x" to CSE. */
1230 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1231 && SCALAR_INT_MODE_P (GET_MODE (x))
1232 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1233 GET_MODE_BITSIZE (GET_MODE (x)))
1234 && ! no_new_pseudos)
1235 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1236
1237 if (WORDS_BIG_ENDIAN)
1238 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1239 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1240
1241 if (BYTES_BIG_ENDIAN)
1242 /* Adjust the address so that the address-after-the-data
1243 is unchanged. */
1244 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1245 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1246
1247 return adjust_address (x, mode, offset);
1248 }
1249 else if (GET_CODE (x) == ADDRESSOF)
1250 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1251 else
1252 abort ();
1253 }
1254
1255 /* Like `gen_lowpart', but refer to the most significant part.
1256 This is used to access the imaginary part of a complex number. */
1257
1258 rtx
gen_highpart(enum machine_mode mode,rtx x)1259 gen_highpart (enum machine_mode mode, rtx x)
1260 {
1261 unsigned int msize = GET_MODE_SIZE (mode);
1262 rtx result;
1263
1264 /* This case loses if X is a subreg. To catch bugs early,
1265 complain if an invalid MODE is used even in other cases. */
1266 if (msize > UNITS_PER_WORD
1267 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1268 abort ();
1269
1270 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1271 subreg_highpart_offset (mode, GET_MODE (x)));
1272
1273 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1274 the target if we have a MEM. gen_highpart must return a valid operand,
1275 emitting code if necessary to do so. */
1276 if (result != NULL_RTX && GET_CODE (result) == MEM)
1277 result = validize_mem (result);
1278
1279 if (!result)
1280 abort ();
1281 return result;
1282 }
1283
1284 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1285 be VOIDmode constant. */
1286 rtx
gen_highpart_mode(enum machine_mode outermode,enum machine_mode innermode,rtx exp)1287 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1288 {
1289 if (GET_MODE (exp) != VOIDmode)
1290 {
1291 if (GET_MODE (exp) != innermode)
1292 abort ();
1293 return gen_highpart (outermode, exp);
1294 }
1295 return simplify_gen_subreg (outermode, exp, innermode,
1296 subreg_highpart_offset (outermode, innermode));
1297 }
1298
1299 /* Return offset in bytes to get OUTERMODE low part
1300 of the value in mode INNERMODE stored in memory in target format. */
1301
1302 unsigned int
subreg_lowpart_offset(enum machine_mode outermode,enum machine_mode innermode)1303 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1304 {
1305 unsigned int offset = 0;
1306 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1307
1308 if (difference > 0)
1309 {
1310 if (WORDS_BIG_ENDIAN)
1311 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1312 if (BYTES_BIG_ENDIAN)
1313 offset += difference % UNITS_PER_WORD;
1314 }
1315
1316 return offset;
1317 }
1318
1319 /* Return offset in bytes to get OUTERMODE high part
1320 of the value in mode INNERMODE stored in memory in target format. */
1321 unsigned int
subreg_highpart_offset(enum machine_mode outermode,enum machine_mode innermode)1322 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1323 {
1324 unsigned int offset = 0;
1325 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1326
1327 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1328 abort ();
1329
1330 if (difference > 0)
1331 {
1332 if (! WORDS_BIG_ENDIAN)
1333 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1334 if (! BYTES_BIG_ENDIAN)
1335 offset += difference % UNITS_PER_WORD;
1336 }
1337
1338 return offset;
1339 }
1340
1341 /* Return 1 iff X, assumed to be a SUBREG,
1342 refers to the least significant part of its containing reg.
1343 If X is not a SUBREG, always return 1 (it is its own low part!). */
1344
1345 int
subreg_lowpart_p(rtx x)1346 subreg_lowpart_p (rtx x)
1347 {
1348 if (GET_CODE (x) != SUBREG)
1349 return 1;
1350 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1351 return 0;
1352
1353 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1354 == SUBREG_BYTE (x));
1355 }
1356
1357 /* Return subword OFFSET of operand OP.
1358 The word number, OFFSET, is interpreted as the word number starting
1359 at the low-order address. OFFSET 0 is the low-order word if not
1360 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1361
1362 If we cannot extract the required word, we return zero. Otherwise,
1363 an rtx corresponding to the requested word will be returned.
1364
1365 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1366 reload has completed, a valid address will always be returned. After
1367 reload, if a valid address cannot be returned, we return zero.
1368
1369 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1370 it is the responsibility of the caller.
1371
1372 MODE is the mode of OP in case it is a CONST_INT.
1373
1374 ??? This is still rather broken for some cases. The problem for the
1375 moment is that all callers of this thing provide no 'goal mode' to
1376 tell us to work with. This exists because all callers were written
1377 in a word based SUBREG world.
1378 Now use of this function can be deprecated by simplify_subreg in most
1379 cases.
1380 */
1381
1382 rtx
operand_subword(rtx op,unsigned int offset,int validate_address,enum machine_mode mode)1383 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1384 {
1385 if (mode == VOIDmode)
1386 mode = GET_MODE (op);
1387
1388 if (mode == VOIDmode)
1389 abort ();
1390
1391 /* If OP is narrower than a word, fail. */
1392 if (mode != BLKmode
1393 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1394 return 0;
1395
1396 /* If we want a word outside OP, return zero. */
1397 if (mode != BLKmode
1398 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1399 return const0_rtx;
1400
1401 /* Form a new MEM at the requested address. */
1402 if (GET_CODE (op) == MEM)
1403 {
1404 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1405
1406 if (! validate_address)
1407 return new;
1408
1409 else if (reload_completed)
1410 {
1411 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1412 return 0;
1413 }
1414 else
1415 return replace_equiv_address (new, XEXP (new, 0));
1416 }
1417
1418 /* Rest can be handled by simplify_subreg. */
1419 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1420 }
1421
1422 /* Similar to `operand_subword', but never return 0. If we can't extract
1423 the required subword, put OP into a register and try again. If that fails,
1424 abort. We always validate the address in this case.
1425
1426 MODE is the mode of OP, in case it is CONST_INT. */
1427
1428 rtx
operand_subword_force(rtx op,unsigned int offset,enum machine_mode mode)1429 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1430 {
1431 rtx result = operand_subword (op, offset, 1, mode);
1432
1433 if (result)
1434 return result;
1435
1436 if (mode != BLKmode && mode != VOIDmode)
1437 {
1438 /* If this is a register which can not be accessed by words, copy it
1439 to a pseudo register. */
1440 if (GET_CODE (op) == REG)
1441 op = copy_to_reg (op);
1442 else
1443 op = force_reg (mode, op);
1444 }
1445
1446 result = operand_subword (op, offset, 1, mode);
1447 if (result == 0)
1448 abort ();
1449
1450 return result;
1451 }
1452
1453 /* Given a compare instruction, swap the operands.
1454 A test instruction is changed into a compare of 0 against the operand. */
1455
1456 void
reverse_comparison(rtx insn)1457 reverse_comparison (rtx insn)
1458 {
1459 rtx body = PATTERN (insn);
1460 rtx comp;
1461
1462 if (GET_CODE (body) == SET)
1463 comp = SET_SRC (body);
1464 else
1465 comp = SET_SRC (XVECEXP (body, 0, 0));
1466
1467 if (GET_CODE (comp) == COMPARE)
1468 {
1469 rtx op0 = XEXP (comp, 0);
1470 rtx op1 = XEXP (comp, 1);
1471 XEXP (comp, 0) = op1;
1472 XEXP (comp, 1) = op0;
1473 }
1474 else
1475 {
1476 rtx new = gen_rtx_COMPARE (VOIDmode,
1477 CONST0_RTX (GET_MODE (comp)), comp);
1478 if (GET_CODE (body) == SET)
1479 SET_SRC (body) = new;
1480 else
1481 SET_SRC (XVECEXP (body, 0, 0)) = new;
1482 }
1483 }
1484
1485 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1486 or (2) a component ref of something variable. Represent the later with
1487 a NULL expression. */
1488
1489 static tree
component_ref_for_mem_expr(tree ref)1490 component_ref_for_mem_expr (tree ref)
1491 {
1492 tree inner = TREE_OPERAND (ref, 0);
1493
1494 if (TREE_CODE (inner) == COMPONENT_REF)
1495 inner = component_ref_for_mem_expr (inner);
1496 else
1497 {
1498 tree placeholder_ptr = 0;
1499
1500 /* Now remove any conversions: they don't change what the underlying
1501 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1502 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1503 || TREE_CODE (inner) == NON_LVALUE_EXPR
1504 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1505 || TREE_CODE (inner) == SAVE_EXPR
1506 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1507 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1508 inner = find_placeholder (inner, &placeholder_ptr);
1509 else
1510 inner = TREE_OPERAND (inner, 0);
1511
1512 if (! DECL_P (inner))
1513 inner = NULL_TREE;
1514 }
1515
1516 if (inner == TREE_OPERAND (ref, 0))
1517 return ref;
1518 else
1519 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1520 TREE_OPERAND (ref, 1));
1521 }
1522
1523 /* Returns 1 if both MEM_EXPR can be considered equal
1524 and 0 otherwise. */
1525
1526 int
mem_expr_equal_p(tree expr1,tree expr2)1527 mem_expr_equal_p (tree expr1, tree expr2)
1528 {
1529 if (expr1 == expr2)
1530 return 1;
1531
1532 if (! expr1 || ! expr2)
1533 return 0;
1534
1535 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1536 return 0;
1537
1538 if (TREE_CODE (expr1) == COMPONENT_REF)
1539 return
1540 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1541 TREE_OPERAND (expr2, 0))
1542 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1543 TREE_OPERAND (expr2, 1));
1544
1545 if (TREE_CODE (expr1) == INDIRECT_REF)
1546 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1547 TREE_OPERAND (expr2, 0));
1548
1549 /* Decls with different pointers can't be equal. */
1550 if (DECL_P (expr1))
1551 return 0;
1552
1553 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1554 have been resolved here. */
1555 }
1556
1557 /* Given REF, a MEM, and T, either the type of X or the expression
1558 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1559 if we are making a new object of this type. BITPOS is nonzero if
1560 there is an offset outstanding on T that will be applied later. */
1561
1562 void
set_mem_attributes_minus_bitpos(rtx ref,tree t,int objectp,HOST_WIDE_INT bitpos)1563 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1564 HOST_WIDE_INT bitpos)
1565 {
1566 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1567 tree expr = MEM_EXPR (ref);
1568 rtx offset = MEM_OFFSET (ref);
1569 rtx size = MEM_SIZE (ref);
1570 unsigned int align = MEM_ALIGN (ref);
1571 HOST_WIDE_INT apply_bitpos = 0;
1572 tree type;
1573
1574 /* It can happen that type_for_mode was given a mode for which there
1575 is no language-level type. In which case it returns NULL, which
1576 we can see here. */
1577 if (t == NULL_TREE)
1578 return;
1579
1580 type = TYPE_P (t) ? t : TREE_TYPE (t);
1581 if (type == error_mark_node)
1582 return;
1583
1584 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1585 wrong answer, as it assumes that DECL_RTL already has the right alias
1586 info. Callers should not set DECL_RTL until after the call to
1587 set_mem_attributes. */
1588 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1589 abort ();
1590
1591 /* Get the alias set from the expression or type (perhaps using a
1592 front-end routine) and use it. */
1593 alias = get_alias_set (t);
1594
1595 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1596 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1597 RTX_UNCHANGING_P (ref)
1598 |= ((lang_hooks.honor_readonly
1599 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1600 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1601
1602 /* If we are making an object of this type, or if this is a DECL, we know
1603 that it is a scalar if the type is not an aggregate. */
1604 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1605 MEM_SCALAR_P (ref) = 1;
1606
1607 /* We can set the alignment from the type if we are making an object,
1608 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1609 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1610 align = MAX (align, TYPE_ALIGN (type));
1611
1612 /* If the size is known, we can set that. */
1613 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1614 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1615
1616 /* If T is not a type, we may be able to deduce some more information about
1617 the expression. */
1618 if (! TYPE_P (t))
1619 {
1620 maybe_set_unchanging (ref, t);
1621 if (TREE_THIS_VOLATILE (t))
1622 MEM_VOLATILE_P (ref) = 1;
1623
1624 /* Now remove any conversions: they don't change what the underlying
1625 object is. Likewise for SAVE_EXPR. */
1626 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1627 || TREE_CODE (t) == NON_LVALUE_EXPR
1628 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1629 || TREE_CODE (t) == SAVE_EXPR)
1630 t = TREE_OPERAND (t, 0);
1631
1632 /* If this expression can't be addressed (e.g., it contains a reference
1633 to a non-addressable field), show we don't change its alias set. */
1634 if (! can_address_p (t))
1635 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1636
1637 /* If this is a decl, set the attributes of the MEM from it. */
1638 if (DECL_P (t))
1639 {
1640 expr = t;
1641 offset = const0_rtx;
1642 apply_bitpos = bitpos;
1643 size = (DECL_SIZE_UNIT (t)
1644 && host_integerp (DECL_SIZE_UNIT (t), 1)
1645 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1646 align = DECL_ALIGN (t);
1647 }
1648
1649 /* If this is a constant, we know the alignment. */
1650 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1651 {
1652 align = TYPE_ALIGN (type);
1653 #ifdef CONSTANT_ALIGNMENT
1654 align = CONSTANT_ALIGNMENT (t, align);
1655 #endif
1656 }
1657
1658 /* If this is a field reference and not a bit-field, record it. */
1659 /* ??? There is some information that can be gleened from bit-fields,
1660 such as the word offset in the structure that might be modified.
1661 But skip it for now. */
1662 else if (TREE_CODE (t) == COMPONENT_REF
1663 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1664 {
1665 expr = component_ref_for_mem_expr (t);
1666 offset = const0_rtx;
1667 apply_bitpos = bitpos;
1668 /* ??? Any reason the field size would be different than
1669 the size we got from the type? */
1670 }
1671
1672 /* If this is an array reference, look for an outer field reference. */
1673 else if (TREE_CODE (t) == ARRAY_REF)
1674 {
1675 tree off_tree = size_zero_node;
1676 /* We can't modify t, because we use it at the end of the
1677 function. */
1678 tree t2 = t;
1679
1680 do
1681 {
1682 tree index = TREE_OPERAND (t2, 1);
1683 tree array = TREE_OPERAND (t2, 0);
1684 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1685 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1686 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1687
1688 /* We assume all arrays have sizes that are a multiple of a byte.
1689 First subtract the lower bound, if any, in the type of the
1690 index, then convert to sizetype and multiply by the size of the
1691 array element. */
1692 if (low_bound != 0 && ! integer_zerop (low_bound))
1693 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1694 index, low_bound));
1695
1696 /* If the index has a self-referential type, pass it to a
1697 WITH_RECORD_EXPR; if the component size is, pass our
1698 component to one. */
1699 if (CONTAINS_PLACEHOLDER_P (index))
1700 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1701 if (CONTAINS_PLACEHOLDER_P (unit_size))
1702 unit_size = build (WITH_RECORD_EXPR, sizetype,
1703 unit_size, array);
1704
1705 off_tree
1706 = fold (build (PLUS_EXPR, sizetype,
1707 fold (build (MULT_EXPR, sizetype,
1708 index,
1709 unit_size)),
1710 off_tree));
1711 t2 = TREE_OPERAND (t2, 0);
1712 }
1713 while (TREE_CODE (t2) == ARRAY_REF);
1714
1715 if (DECL_P (t2))
1716 {
1717 expr = t2;
1718 offset = NULL;
1719 if (host_integerp (off_tree, 1))
1720 {
1721 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1722 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1723 align = DECL_ALIGN (t2);
1724 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1725 align = aoff;
1726 offset = GEN_INT (ioff);
1727 apply_bitpos = bitpos;
1728 }
1729 }
1730 else if (TREE_CODE (t2) == COMPONENT_REF)
1731 {
1732 expr = component_ref_for_mem_expr (t2);
1733 if (host_integerp (off_tree, 1))
1734 {
1735 offset = GEN_INT (tree_low_cst (off_tree, 1));
1736 apply_bitpos = bitpos;
1737 }
1738 /* ??? Any reason the field size would be different than
1739 the size we got from the type? */
1740 }
1741 else if (flag_argument_noalias > 1
1742 && TREE_CODE (t2) == INDIRECT_REF
1743 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1744 {
1745 expr = t2;
1746 offset = NULL;
1747 }
1748 }
1749
1750 /* If this is a Fortran indirect argument reference, record the
1751 parameter decl. */
1752 else if (flag_argument_noalias > 1
1753 && TREE_CODE (t) == INDIRECT_REF
1754 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1755 {
1756 expr = t;
1757 offset = NULL;
1758 }
1759 }
1760
1761 /* If we modified OFFSET based on T, then subtract the outstanding
1762 bit position offset. Similarly, increase the size of the accessed
1763 object to contain the negative offset. */
1764 if (apply_bitpos)
1765 {
1766 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1767 if (size)
1768 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1769 }
1770
1771 /* Now set the attributes we computed above. */
1772 MEM_ATTRS (ref)
1773 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1774
1775 /* If this is already known to be a scalar or aggregate, we are done. */
1776 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1777 return;
1778
1779 /* If it is a reference into an aggregate, this is part of an aggregate.
1780 Otherwise we don't know. */
1781 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1782 || TREE_CODE (t) == ARRAY_RANGE_REF
1783 || TREE_CODE (t) == BIT_FIELD_REF)
1784 MEM_IN_STRUCT_P (ref) = 1;
1785 }
1786
1787 void
set_mem_attributes(rtx ref,tree t,int objectp)1788 set_mem_attributes (rtx ref, tree t, int objectp)
1789 {
1790 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1791 }
1792
1793 /* Set the decl for MEM to DECL. */
1794
1795 void
set_mem_attrs_from_reg(rtx mem,rtx reg)1796 set_mem_attrs_from_reg (rtx mem, rtx reg)
1797 {
1798 MEM_ATTRS (mem)
1799 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1800 GEN_INT (REG_OFFSET (reg)),
1801 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1802 }
1803
1804 /* Set the alias set of MEM to SET. */
1805
1806 void
set_mem_alias_set(rtx mem,HOST_WIDE_INT set)1807 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1808 {
1809 #ifdef ENABLE_CHECKING
1810 /* If the new and old alias sets don't conflict, something is wrong. */
1811 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1812 abort ();
1813 #endif
1814
1815 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1816 MEM_SIZE (mem), MEM_ALIGN (mem),
1817 GET_MODE (mem));
1818 }
1819
1820 /* Set the alignment of MEM to ALIGN bits. */
1821
1822 void
set_mem_align(rtx mem,unsigned int align)1823 set_mem_align (rtx mem, unsigned int align)
1824 {
1825 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1826 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1827 GET_MODE (mem));
1828 }
1829
1830 /* Set the expr for MEM to EXPR. */
1831
1832 void
set_mem_expr(rtx mem,tree expr)1833 set_mem_expr (rtx mem, tree expr)
1834 {
1835 MEM_ATTRS (mem)
1836 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1837 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1838 }
1839
1840 /* Set the offset of MEM to OFFSET. */
1841
1842 void
set_mem_offset(rtx mem,rtx offset)1843 set_mem_offset (rtx mem, rtx offset)
1844 {
1845 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1846 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1847 GET_MODE (mem));
1848 }
1849
1850 /* Set the size of MEM to SIZE. */
1851
1852 void
set_mem_size(rtx mem,rtx size)1853 set_mem_size (rtx mem, rtx size)
1854 {
1855 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1856 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1857 GET_MODE (mem));
1858 }
1859
1860 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1861 and its address changed to ADDR. (VOIDmode means don't change the mode.
1862 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1863 returned memory location is required to be valid. The memory
1864 attributes are not changed. */
1865
1866 static rtx
change_address_1(rtx memref,enum machine_mode mode,rtx addr,int validate)1867 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1868 {
1869 rtx new;
1870
1871 if (GET_CODE (memref) != MEM)
1872 abort ();
1873 if (mode == VOIDmode)
1874 mode = GET_MODE (memref);
1875 if (addr == 0)
1876 addr = XEXP (memref, 0);
1877 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1878 && (!validate || memory_address_p (mode, addr)))
1879 return memref;
1880
1881 if (validate)
1882 {
1883 if (reload_in_progress || reload_completed)
1884 {
1885 if (! memory_address_p (mode, addr))
1886 abort ();
1887 }
1888 else
1889 addr = memory_address (mode, addr);
1890 }
1891
1892 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1893 return memref;
1894
1895 new = gen_rtx_MEM (mode, addr);
1896 MEM_COPY_ATTRIBUTES (new, memref);
1897 return new;
1898 }
1899
1900 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1901 way we are changing MEMREF, so we only preserve the alias set. */
1902
1903 rtx
change_address(rtx memref,enum machine_mode mode,rtx addr)1904 change_address (rtx memref, enum machine_mode mode, rtx addr)
1905 {
1906 rtx new = change_address_1 (memref, mode, addr, 1), size;
1907 enum machine_mode mmode = GET_MODE (new);
1908 unsigned int align;
1909
1910 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1911 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1912
1913 /* If there are no changes, just return the original memory reference. */
1914 if (new == memref)
1915 {
1916 if (MEM_ATTRS (memref) == 0
1917 || (MEM_EXPR (memref) == NULL
1918 && MEM_OFFSET (memref) == NULL
1919 && MEM_SIZE (memref) == size
1920 && MEM_ALIGN (memref) == align))
1921 return new;
1922
1923 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1924 MEM_COPY_ATTRIBUTES (new, memref);
1925 }
1926
1927 MEM_ATTRS (new)
1928 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1929
1930 return new;
1931 }
1932
1933 /* Return a memory reference like MEMREF, but with its mode changed
1934 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1935 nonzero, the memory address is forced to be valid.
1936 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1937 and caller is responsible for adjusting MEMREF base register. */
1938
1939 rtx
adjust_address_1(rtx memref,enum machine_mode mode,HOST_WIDE_INT offset,int validate,int adjust)1940 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1941 int validate, int adjust)
1942 {
1943 rtx addr = XEXP (memref, 0);
1944 rtx new;
1945 rtx memoffset = MEM_OFFSET (memref);
1946 rtx size = 0;
1947 unsigned int memalign = MEM_ALIGN (memref);
1948
1949 /* If there are no changes, just return the original memory reference. */
1950 if (mode == GET_MODE (memref) && !offset
1951 && (!validate || memory_address_p (mode, addr)))
1952 return memref;
1953
1954 /* ??? Prefer to create garbage instead of creating shared rtl.
1955 This may happen even if offset is nonzero -- consider
1956 (plus (plus reg reg) const_int) -- so do this always. */
1957 addr = copy_rtx (addr);
1958
1959 if (adjust)
1960 {
1961 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1962 object, we can merge it into the LO_SUM. */
1963 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1964 && offset >= 0
1965 && (unsigned HOST_WIDE_INT) offset
1966 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1967 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1968 plus_constant (XEXP (addr, 1), offset));
1969 else
1970 addr = plus_constant (addr, offset);
1971 }
1972
1973 new = change_address_1 (memref, mode, addr, validate);
1974
1975 /* Compute the new values of the memory attributes due to this adjustment.
1976 We add the offsets and update the alignment. */
1977 if (memoffset)
1978 memoffset = GEN_INT (offset + INTVAL (memoffset));
1979
1980 /* Compute the new alignment by taking the MIN of the alignment and the
1981 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1982 if zero. */
1983 if (offset != 0)
1984 memalign
1985 = MIN (memalign,
1986 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1987
1988 /* We can compute the size in a number of ways. */
1989 if (GET_MODE (new) != BLKmode)
1990 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1991 else if (MEM_SIZE (memref))
1992 size = plus_constant (MEM_SIZE (memref), -offset);
1993
1994 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1995 memoffset, size, memalign, GET_MODE (new));
1996
1997 /* At some point, we should validate that this offset is within the object,
1998 if all the appropriate values are known. */
1999 return new;
2000 }
2001
2002 /* Return a memory reference like MEMREF, but with its mode changed
2003 to MODE and its address changed to ADDR, which is assumed to be
2004 MEMREF offseted by OFFSET bytes. If VALIDATE is
2005 nonzero, the memory address is forced to be valid. */
2006
2007 rtx
adjust_automodify_address_1(rtx memref,enum machine_mode mode,rtx addr,HOST_WIDE_INT offset,int validate)2008 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2009 HOST_WIDE_INT offset, int validate)
2010 {
2011 memref = change_address_1 (memref, VOIDmode, addr, validate);
2012 return adjust_address_1 (memref, mode, offset, validate, 0);
2013 }
2014
2015 /* Return a memory reference like MEMREF, but whose address is changed by
2016 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2017 known to be in OFFSET (possibly 1). */
2018
2019 rtx
offset_address(rtx memref,rtx offset,unsigned HOST_WIDE_INT pow2)2020 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2021 {
2022 rtx new, addr = XEXP (memref, 0);
2023
2024 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2025
2026 /* At this point we don't know _why_ the address is invalid. It
2027 could have secondary memory references, multiplies or anything.
2028
2029 However, if we did go and rearrange things, we can wind up not
2030 being able to recognize the magic around pic_offset_table_rtx.
2031 This stuff is fragile, and is yet another example of why it is
2032 bad to expose PIC machinery too early. */
2033 if (! memory_address_p (GET_MODE (memref), new)
2034 && GET_CODE (addr) == PLUS
2035 && XEXP (addr, 0) == pic_offset_table_rtx)
2036 {
2037 addr = force_reg (GET_MODE (addr), addr);
2038 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2039 }
2040
2041 update_temp_slot_address (XEXP (memref, 0), new);
2042 new = change_address_1 (memref, VOIDmode, new, 1);
2043
2044 /* If there are no changes, just return the original memory reference. */
2045 if (new == memref)
2046 return new;
2047
2048 /* Update the alignment to reflect the offset. Reset the offset, which
2049 we don't know. */
2050 MEM_ATTRS (new)
2051 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2052 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2053 GET_MODE (new));
2054 return new;
2055 }
2056
2057 /* Return a memory reference like MEMREF, but with its address changed to
2058 ADDR. The caller is asserting that the actual piece of memory pointed
2059 to is the same, just the form of the address is being changed, such as
2060 by putting something into a register. */
2061
2062 rtx
replace_equiv_address(rtx memref,rtx addr)2063 replace_equiv_address (rtx memref, rtx addr)
2064 {
2065 /* change_address_1 copies the memory attribute structure without change
2066 and that's exactly what we want here. */
2067 update_temp_slot_address (XEXP (memref, 0), addr);
2068 return change_address_1 (memref, VOIDmode, addr, 1);
2069 }
2070
2071 /* Likewise, but the reference is not required to be valid. */
2072
2073 rtx
replace_equiv_address_nv(rtx memref,rtx addr)2074 replace_equiv_address_nv (rtx memref, rtx addr)
2075 {
2076 return change_address_1 (memref, VOIDmode, addr, 0);
2077 }
2078
2079 /* Return a memory reference like MEMREF, but with its mode widened to
2080 MODE and offset by OFFSET. This would be used by targets that e.g.
2081 cannot issue QImode memory operations and have to use SImode memory
2082 operations plus masking logic. */
2083
2084 rtx
widen_memory_access(rtx memref,enum machine_mode mode,HOST_WIDE_INT offset)2085 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2086 {
2087 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2088 tree expr = MEM_EXPR (new);
2089 rtx memoffset = MEM_OFFSET (new);
2090 unsigned int size = GET_MODE_SIZE (mode);
2091
2092 /* If there are no changes, just return the original memory reference. */
2093 if (new == memref)
2094 return new;
2095
2096 /* If we don't know what offset we were at within the expression, then
2097 we can't know if we've overstepped the bounds. */
2098 if (! memoffset)
2099 expr = NULL_TREE;
2100
2101 while (expr)
2102 {
2103 if (TREE_CODE (expr) == COMPONENT_REF)
2104 {
2105 tree field = TREE_OPERAND (expr, 1);
2106
2107 if (! DECL_SIZE_UNIT (field))
2108 {
2109 expr = NULL_TREE;
2110 break;
2111 }
2112
2113 /* Is the field at least as large as the access? If so, ok,
2114 otherwise strip back to the containing structure. */
2115 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2116 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2117 && INTVAL (memoffset) >= 0)
2118 break;
2119
2120 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2121 {
2122 expr = NULL_TREE;
2123 break;
2124 }
2125
2126 expr = TREE_OPERAND (expr, 0);
2127 memoffset = (GEN_INT (INTVAL (memoffset)
2128 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2129 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2130 / BITS_PER_UNIT)));
2131 }
2132 /* Similarly for the decl. */
2133 else if (DECL_P (expr)
2134 && DECL_SIZE_UNIT (expr)
2135 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2136 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2137 && (! memoffset || INTVAL (memoffset) >= 0))
2138 break;
2139 else
2140 {
2141 /* The widened memory access overflows the expression, which means
2142 that it could alias another expression. Zap it. */
2143 expr = NULL_TREE;
2144 break;
2145 }
2146 }
2147
2148 if (! expr)
2149 memoffset = NULL_RTX;
2150
2151 /* The widened memory may alias other stuff, so zap the alias set. */
2152 /* ??? Maybe use get_alias_set on any remaining expression. */
2153
2154 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2155 MEM_ALIGN (new), mode);
2156
2157 return new;
2158 }
2159
2160 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2161
2162 rtx
gen_label_rtx(void)2163 gen_label_rtx (void)
2164 {
2165 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2166 NULL, label_num++, NULL);
2167 }
2168
2169 /* For procedure integration. */
2170
2171 /* Install new pointers to the first and last insns in the chain.
2172 Also, set cur_insn_uid to one higher than the last in use.
2173 Used for an inline-procedure after copying the insn chain. */
2174
2175 void
set_new_first_and_last_insn(rtx first,rtx last)2176 set_new_first_and_last_insn (rtx first, rtx last)
2177 {
2178 rtx insn;
2179
2180 first_insn = first;
2181 last_insn = last;
2182 cur_insn_uid = 0;
2183
2184 for (insn = first; insn; insn = NEXT_INSN (insn))
2185 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2186
2187 cur_insn_uid++;
2188 }
2189
2190 /* Set the last label number found in the current function.
2191 This is used when belatedly compiling an inline function. */
2192
2193 void
set_new_last_label_num(int last)2194 set_new_last_label_num (int last)
2195 {
2196 base_label_num = label_num;
2197 last_label_num = last;
2198 }
2199
2200 /* Restore all variables describing the current status from the structure *P.
2201 This is used after a nested function. */
2202
2203 void
restore_emit_status(struct function * p ATTRIBUTE_UNUSED)2204 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2205 {
2206 last_label_num = 0;
2207 }
2208
2209 /* Go through all the RTL insn bodies and copy any invalid shared
2210 structure. This routine should only be called once. */
2211
2212 void
unshare_all_rtl(tree fndecl,rtx insn)2213 unshare_all_rtl (tree fndecl, rtx insn)
2214 {
2215 tree decl;
2216
2217 /* Make sure that virtual parameters are not shared. */
2218 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2219 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2220
2221 /* Make sure that virtual stack slots are not shared. */
2222 unshare_all_decls (DECL_INITIAL (fndecl));
2223
2224 /* Unshare just about everything else. */
2225 unshare_all_rtl_in_chain (insn);
2226
2227 /* Make sure the addresses of stack slots found outside the insn chain
2228 (such as, in DECL_RTL of a variable) are not shared
2229 with the insn chain.
2230
2231 This special care is necessary when the stack slot MEM does not
2232 actually appear in the insn chain. If it does appear, its address
2233 is unshared from all else at that point. */
2234 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2235 }
2236
2237 /* Go through all the RTL insn bodies and copy any invalid shared
2238 structure, again. This is a fairly expensive thing to do so it
2239 should be done sparingly. */
2240
2241 void
unshare_all_rtl_again(rtx insn)2242 unshare_all_rtl_again (rtx insn)
2243 {
2244 rtx p;
2245 tree decl;
2246
2247 for (p = insn; p; p = NEXT_INSN (p))
2248 if (INSN_P (p))
2249 {
2250 reset_used_flags (PATTERN (p));
2251 reset_used_flags (REG_NOTES (p));
2252 reset_used_flags (LOG_LINKS (p));
2253 }
2254
2255 /* Make sure that virtual stack slots are not shared. */
2256 reset_used_decls (DECL_INITIAL (cfun->decl));
2257
2258 /* Make sure that virtual parameters are not shared. */
2259 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2260 reset_used_flags (DECL_RTL (decl));
2261
2262 reset_used_flags (stack_slot_list);
2263
2264 unshare_all_rtl (cfun->decl, insn);
2265 }
2266
2267 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2268 Recursively does the same for subexpressions. */
2269
2270 static void
verify_rtx_sharing(rtx orig,rtx insn)2271 verify_rtx_sharing (rtx orig, rtx insn)
2272 {
2273 rtx x = orig;
2274 int i;
2275 enum rtx_code code;
2276 const char *format_ptr;
2277
2278 if (x == 0)
2279 return;
2280
2281 code = GET_CODE (x);
2282
2283 /* These types may be freely shared. */
2284
2285 switch (code)
2286 {
2287 case REG:
2288 case QUEUED:
2289 case CONST_INT:
2290 case CONST_DOUBLE:
2291 case CONST_VECTOR:
2292 case SYMBOL_REF:
2293 case LABEL_REF:
2294 case CODE_LABEL:
2295 case PC:
2296 case CC0:
2297 case SCRATCH:
2298 /* SCRATCH must be shared because they represent distinct values. */
2299 return;
2300
2301 case CONST:
2302 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2303 a LABEL_REF, it isn't sharable. */
2304 if (GET_CODE (XEXP (x, 0)) == PLUS
2305 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2306 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2307 return;
2308 break;
2309
2310 case MEM:
2311 /* A MEM is allowed to be shared if its address is constant. */
2312 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2313 || reload_completed || reload_in_progress)
2314 return;
2315
2316 break;
2317
2318 default:
2319 break;
2320 }
2321
2322 /* This rtx may not be shared. If it has already been seen,
2323 replace it with a copy of itself. */
2324
2325 if (RTX_FLAG (x, used))
2326 {
2327 error ("Invalid rtl sharing found in the insn");
2328 debug_rtx (insn);
2329 error ("Shared rtx");
2330 debug_rtx (x);
2331 abort ();
2332 }
2333 RTX_FLAG (x, used) = 1;
2334
2335 /* Now scan the subexpressions recursively. */
2336
2337 format_ptr = GET_RTX_FORMAT (code);
2338
2339 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2340 {
2341 switch (*format_ptr++)
2342 {
2343 case 'e':
2344 verify_rtx_sharing (XEXP (x, i), insn);
2345 break;
2346
2347 case 'E':
2348 if (XVEC (x, i) != NULL)
2349 {
2350 int j;
2351 int len = XVECLEN (x, i);
2352
2353 for (j = 0; j < len; j++)
2354 {
2355 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2356 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2357 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2358 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2359 else
2360 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2361 }
2362 }
2363 break;
2364 }
2365 }
2366 return;
2367 }
2368
2369 /* Go through all the RTL insn bodies and check that there is no unexpected
2370 sharing in between the subexpressions. */
2371
2372 void
verify_rtl_sharing(void)2373 verify_rtl_sharing (void)
2374 {
2375 rtx p;
2376
2377 for (p = get_insns (); p; p = NEXT_INSN (p))
2378 if (INSN_P (p))
2379 {
2380 reset_used_flags (PATTERN (p));
2381 reset_used_flags (REG_NOTES (p));
2382 reset_used_flags (LOG_LINKS (p));
2383 }
2384
2385 for (p = get_insns (); p; p = NEXT_INSN (p))
2386 if (INSN_P (p))
2387 {
2388 verify_rtx_sharing (PATTERN (p), p);
2389 verify_rtx_sharing (REG_NOTES (p), p);
2390 verify_rtx_sharing (LOG_LINKS (p), p);
2391 }
2392 }
2393
2394 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2395 Assumes the mark bits are cleared at entry. */
2396
2397 void
unshare_all_rtl_in_chain(rtx insn)2398 unshare_all_rtl_in_chain (rtx insn)
2399 {
2400 for (; insn; insn = NEXT_INSN (insn))
2401 if (INSN_P (insn))
2402 {
2403 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2404 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2405 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2406 }
2407 }
2408
2409 /* Go through all virtual stack slots of a function and copy any
2410 shared structure. */
2411 static void
unshare_all_decls(tree blk)2412 unshare_all_decls (tree blk)
2413 {
2414 tree t;
2415
2416 /* Copy shared decls. */
2417 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2418 if (DECL_RTL_SET_P (t))
2419 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2420
2421 /* Now process sub-blocks. */
2422 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2423 unshare_all_decls (t);
2424 }
2425
2426 /* Go through all virtual stack slots of a function and mark them as
2427 not shared. */
2428 static void
reset_used_decls(tree blk)2429 reset_used_decls (tree blk)
2430 {
2431 tree t;
2432
2433 /* Mark decls. */
2434 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2435 if (DECL_RTL_SET_P (t))
2436 reset_used_flags (DECL_RTL (t));
2437
2438 /* Now process sub-blocks. */
2439 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2440 reset_used_decls (t);
2441 }
2442
2443 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2444 placed in the result directly, rather than being copied. MAY_SHARE is
2445 either a MEM of an EXPR_LIST of MEMs. */
2446
2447 rtx
copy_most_rtx(rtx orig,rtx may_share)2448 copy_most_rtx (rtx orig, rtx may_share)
2449 {
2450 rtx copy;
2451 int i, j;
2452 RTX_CODE code;
2453 const char *format_ptr;
2454
2455 if (orig == may_share
2456 || (GET_CODE (may_share) == EXPR_LIST
2457 && in_expr_list_p (may_share, orig)))
2458 return orig;
2459
2460 code = GET_CODE (orig);
2461
2462 switch (code)
2463 {
2464 case REG:
2465 case QUEUED:
2466 case CONST_INT:
2467 case CONST_DOUBLE:
2468 case CONST_VECTOR:
2469 case SYMBOL_REF:
2470 case CODE_LABEL:
2471 case PC:
2472 case CC0:
2473 return orig;
2474 default:
2475 break;
2476 }
2477
2478 copy = rtx_alloc (code);
2479 PUT_MODE (copy, GET_MODE (orig));
2480 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2481 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2482 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2483 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2484 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2485
2486 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2487
2488 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2489 {
2490 switch (*format_ptr++)
2491 {
2492 case 'e':
2493 XEXP (copy, i) = XEXP (orig, i);
2494 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2495 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2496 break;
2497
2498 case 'u':
2499 XEXP (copy, i) = XEXP (orig, i);
2500 break;
2501
2502 case 'E':
2503 case 'V':
2504 XVEC (copy, i) = XVEC (orig, i);
2505 if (XVEC (orig, i) != NULL)
2506 {
2507 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2508 for (j = 0; j < XVECLEN (copy, i); j++)
2509 XVECEXP (copy, i, j)
2510 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2511 }
2512 break;
2513
2514 case 'w':
2515 XWINT (copy, i) = XWINT (orig, i);
2516 break;
2517
2518 case 'n':
2519 case 'i':
2520 XINT (copy, i) = XINT (orig, i);
2521 break;
2522
2523 case 't':
2524 XTREE (copy, i) = XTREE (orig, i);
2525 break;
2526
2527 case 's':
2528 case 'S':
2529 XSTR (copy, i) = XSTR (orig, i);
2530 break;
2531
2532 case '0':
2533 X0ANY (copy, i) = X0ANY (orig, i);
2534 break;
2535
2536 default:
2537 abort ();
2538 }
2539 }
2540 return copy;
2541 }
2542
2543 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2544 Recursively does the same for subexpressions. Uses
2545 copy_rtx_if_shared_1 to reduce stack space. */
2546
2547 rtx
copy_rtx_if_shared(rtx orig)2548 copy_rtx_if_shared (rtx orig)
2549 {
2550 copy_rtx_if_shared_1 (&orig);
2551 return orig;
2552 }
2553
2554 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2555 use. Recursively does the same for subexpressions. */
2556
2557 static void
copy_rtx_if_shared_1(rtx * orig1)2558 copy_rtx_if_shared_1 (rtx *orig1)
2559 {
2560 rtx x;
2561 int i;
2562 enum rtx_code code;
2563 rtx *last_ptr;
2564 const char *format_ptr;
2565 int copied = 0;
2566 int length;
2567
2568 /* Repeat is used to turn tail-recursion into iteration. */
2569 repeat:
2570 x = *orig1;
2571
2572 if (x == 0)
2573 return;
2574
2575 code = GET_CODE (x);
2576
2577 /* These types may be freely shared. */
2578
2579 switch (code)
2580 {
2581 case REG:
2582 case QUEUED:
2583 case CONST_INT:
2584 case CONST_DOUBLE:
2585 case CONST_VECTOR:
2586 case SYMBOL_REF:
2587 case LABEL_REF:
2588 case CODE_LABEL:
2589 case PC:
2590 case CC0:
2591 case SCRATCH:
2592 /* SCRATCH must be shared because they represent distinct values. */
2593 return;
2594
2595 case CONST:
2596 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2597 a LABEL_REF, it isn't sharable. */
2598 if (GET_CODE (XEXP (x, 0)) == PLUS
2599 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2600 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2601 return;
2602 break;
2603
2604 case INSN:
2605 case JUMP_INSN:
2606 case CALL_INSN:
2607 case NOTE:
2608 case BARRIER:
2609 /* The chain of insns is not being copied. */
2610 return;
2611
2612 default:
2613 break;
2614 }
2615
2616 /* This rtx may not be shared. If it has already been seen,
2617 replace it with a copy of itself. */
2618
2619 if (RTX_FLAG (x, used))
2620 {
2621 rtx copy;
2622
2623 copy = rtx_alloc (code);
2624 memcpy (copy, x, RTX_SIZE (code));
2625 x = copy;
2626 copied = 1;
2627 }
2628 RTX_FLAG (x, used) = 1;
2629
2630 /* Now scan the subexpressions recursively.
2631 We can store any replaced subexpressions directly into X
2632 since we know X is not shared! Any vectors in X
2633 must be copied if X was copied. */
2634
2635 format_ptr = GET_RTX_FORMAT (code);
2636 length = GET_RTX_LENGTH (code);
2637 last_ptr = NULL;
2638
2639 for (i = 0; i < length; i++)
2640 {
2641 switch (*format_ptr++)
2642 {
2643 case 'e':
2644 if (last_ptr)
2645 copy_rtx_if_shared_1 (last_ptr);
2646 last_ptr = &XEXP (x, i);
2647 break;
2648
2649 case 'E':
2650 if (XVEC (x, i) != NULL)
2651 {
2652 int j;
2653 int len = XVECLEN (x, i);
2654
2655 /* Copy the vector iff I copied the rtx and the length
2656 is nonzero. */
2657 if (copied && len > 0)
2658 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2659
2660 /* Call recursively on all inside the vector. */
2661 for (j = 0; j < len; j++)
2662 {
2663 if (last_ptr)
2664 copy_rtx_if_shared_1 (last_ptr);
2665 last_ptr = &XVECEXP (x, i, j);
2666 }
2667 }
2668 break;
2669 }
2670 }
2671 *orig1 = x;
2672 if (last_ptr)
2673 {
2674 orig1 = last_ptr;
2675 goto repeat;
2676 }
2677 return;
2678 }
2679
2680 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2681 to look for shared sub-parts. */
2682
2683 void
reset_used_flags(rtx x)2684 reset_used_flags (rtx x)
2685 {
2686 int i, j;
2687 enum rtx_code code;
2688 const char *format_ptr;
2689 int length;
2690
2691 /* Repeat is used to turn tail-recursion into iteration. */
2692 repeat:
2693 if (x == 0)
2694 return;
2695
2696 code = GET_CODE (x);
2697
2698 /* These types may be freely shared so we needn't do any resetting
2699 for them. */
2700
2701 switch (code)
2702 {
2703 case REG:
2704 case QUEUED:
2705 case CONST_INT:
2706 case CONST_DOUBLE:
2707 case CONST_VECTOR:
2708 case SYMBOL_REF:
2709 case CODE_LABEL:
2710 case PC:
2711 case CC0:
2712 return;
2713
2714 case INSN:
2715 case JUMP_INSN:
2716 case CALL_INSN:
2717 case NOTE:
2718 case LABEL_REF:
2719 case BARRIER:
2720 /* The chain of insns is not being copied. */
2721 return;
2722
2723 default:
2724 break;
2725 }
2726
2727 RTX_FLAG (x, used) = 0;
2728
2729 format_ptr = GET_RTX_FORMAT (code);
2730 length = GET_RTX_LENGTH (code);
2731
2732 for (i = 0; i < length; i++)
2733 {
2734 switch (*format_ptr++)
2735 {
2736 case 'e':
2737 if (i == length-1)
2738 {
2739 x = XEXP (x, i);
2740 goto repeat;
2741 }
2742 reset_used_flags (XEXP (x, i));
2743 break;
2744
2745 case 'E':
2746 for (j = 0; j < XVECLEN (x, i); j++)
2747 reset_used_flags (XVECEXP (x, i, j));
2748 break;
2749 }
2750 }
2751 }
2752
2753 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2754 to look for shared sub-parts. */
2755
2756 void
set_used_flags(rtx x)2757 set_used_flags (rtx x)
2758 {
2759 int i, j;
2760 enum rtx_code code;
2761 const char *format_ptr;
2762
2763 if (x == 0)
2764 return;
2765
2766 code = GET_CODE (x);
2767
2768 /* These types may be freely shared so we needn't do any resetting
2769 for them. */
2770
2771 switch (code)
2772 {
2773 case REG:
2774 case QUEUED:
2775 case CONST_INT:
2776 case CONST_DOUBLE:
2777 case CONST_VECTOR:
2778 case SYMBOL_REF:
2779 case CODE_LABEL:
2780 case PC:
2781 case CC0:
2782 return;
2783
2784 case INSN:
2785 case JUMP_INSN:
2786 case CALL_INSN:
2787 case NOTE:
2788 case LABEL_REF:
2789 case BARRIER:
2790 /* The chain of insns is not being copied. */
2791 return;
2792
2793 default:
2794 break;
2795 }
2796
2797 RTX_FLAG (x, used) = 1;
2798
2799 format_ptr = GET_RTX_FORMAT (code);
2800 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2801 {
2802 switch (*format_ptr++)
2803 {
2804 case 'e':
2805 set_used_flags (XEXP (x, i));
2806 break;
2807
2808 case 'E':
2809 for (j = 0; j < XVECLEN (x, i); j++)
2810 set_used_flags (XVECEXP (x, i, j));
2811 break;
2812 }
2813 }
2814 }
2815
2816 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2817 Return X or the rtx for the pseudo reg the value of X was copied into.
2818 OTHER must be valid as a SET_DEST. */
2819
2820 rtx
make_safe_from(rtx x,rtx other)2821 make_safe_from (rtx x, rtx other)
2822 {
2823 while (1)
2824 switch (GET_CODE (other))
2825 {
2826 case SUBREG:
2827 other = SUBREG_REG (other);
2828 break;
2829 case STRICT_LOW_PART:
2830 case SIGN_EXTEND:
2831 case ZERO_EXTEND:
2832 other = XEXP (other, 0);
2833 break;
2834 default:
2835 goto done;
2836 }
2837 done:
2838 if ((GET_CODE (other) == MEM
2839 && ! CONSTANT_P (x)
2840 && GET_CODE (x) != REG
2841 && GET_CODE (x) != SUBREG)
2842 || (GET_CODE (other) == REG
2843 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2844 || reg_mentioned_p (other, x))))
2845 {
2846 rtx temp = gen_reg_rtx (GET_MODE (x));
2847 emit_move_insn (temp, x);
2848 return temp;
2849 }
2850 return x;
2851 }
2852
2853 /* Emission of insns (adding them to the doubly-linked list). */
2854
2855 /* Return the first insn of the current sequence or current function. */
2856
2857 rtx
get_insns(void)2858 get_insns (void)
2859 {
2860 return first_insn;
2861 }
2862
2863 /* Specify a new insn as the first in the chain. */
2864
2865 void
set_first_insn(rtx insn)2866 set_first_insn (rtx insn)
2867 {
2868 if (PREV_INSN (insn) != 0)
2869 abort ();
2870 first_insn = insn;
2871 }
2872
2873 /* Return the last insn emitted in current sequence or current function. */
2874
2875 rtx
get_last_insn(void)2876 get_last_insn (void)
2877 {
2878 return last_insn;
2879 }
2880
2881 /* Specify a new insn as the last in the chain. */
2882
2883 void
set_last_insn(rtx insn)2884 set_last_insn (rtx insn)
2885 {
2886 if (NEXT_INSN (insn) != 0)
2887 abort ();
2888 last_insn = insn;
2889 }
2890
2891 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2892
2893 rtx
get_last_insn_anywhere(void)2894 get_last_insn_anywhere (void)
2895 {
2896 struct sequence_stack *stack;
2897 if (last_insn)
2898 return last_insn;
2899 for (stack = seq_stack; stack; stack = stack->next)
2900 if (stack->last != 0)
2901 return stack->last;
2902 return 0;
2903 }
2904
2905 /* Return the first nonnote insn emitted in current sequence or current
2906 function. This routine looks inside SEQUENCEs. */
2907
2908 rtx
get_first_nonnote_insn(void)2909 get_first_nonnote_insn (void)
2910 {
2911 rtx insn = first_insn;
2912
2913 while (insn)
2914 {
2915 insn = next_insn (insn);
2916 if (insn == 0 || GET_CODE (insn) != NOTE)
2917 break;
2918 }
2919
2920 return insn;
2921 }
2922
2923 /* Return the last nonnote insn emitted in current sequence or current
2924 function. This routine looks inside SEQUENCEs. */
2925
2926 rtx
get_last_nonnote_insn(void)2927 get_last_nonnote_insn (void)
2928 {
2929 rtx insn = last_insn;
2930
2931 while (insn)
2932 {
2933 insn = previous_insn (insn);
2934 if (insn == 0 || GET_CODE (insn) != NOTE)
2935 break;
2936 }
2937
2938 return insn;
2939 }
2940
2941 /* Return a number larger than any instruction's uid in this function. */
2942
2943 int
get_max_uid(void)2944 get_max_uid (void)
2945 {
2946 return cur_insn_uid;
2947 }
2948
2949 /* Renumber instructions so that no instruction UIDs are wasted. */
2950
2951 void
renumber_insns(FILE * stream)2952 renumber_insns (FILE *stream)
2953 {
2954 rtx insn;
2955
2956 /* If we're not supposed to renumber instructions, don't. */
2957 if (!flag_renumber_insns)
2958 return;
2959
2960 /* If there aren't that many instructions, then it's not really
2961 worth renumbering them. */
2962 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2963 return;
2964
2965 cur_insn_uid = 1;
2966
2967 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2968 {
2969 if (stream)
2970 fprintf (stream, "Renumbering insn %d to %d\n",
2971 INSN_UID (insn), cur_insn_uid);
2972 INSN_UID (insn) = cur_insn_uid++;
2973 }
2974 }
2975
2976 /* Return the next insn. If it is a SEQUENCE, return the first insn
2977 of the sequence. */
2978
2979 rtx
next_insn(rtx insn)2980 next_insn (rtx insn)
2981 {
2982 if (insn)
2983 {
2984 insn = NEXT_INSN (insn);
2985 if (insn && GET_CODE (insn) == INSN
2986 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2987 insn = XVECEXP (PATTERN (insn), 0, 0);
2988 }
2989
2990 return insn;
2991 }
2992
2993 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2994 of the sequence. */
2995
2996 rtx
previous_insn(rtx insn)2997 previous_insn (rtx insn)
2998 {
2999 if (insn)
3000 {
3001 insn = PREV_INSN (insn);
3002 if (insn && GET_CODE (insn) == INSN
3003 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3004 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3005 }
3006
3007 return insn;
3008 }
3009
3010 /* Return the next insn after INSN that is not a NOTE. This routine does not
3011 look inside SEQUENCEs. */
3012
3013 rtx
next_nonnote_insn(rtx insn)3014 next_nonnote_insn (rtx insn)
3015 {
3016 while (insn)
3017 {
3018 insn = NEXT_INSN (insn);
3019 if (insn == 0 || GET_CODE (insn) != NOTE)
3020 break;
3021 }
3022
3023 return insn;
3024 }
3025
3026 /* Return the previous insn before INSN that is not a NOTE. This routine does
3027 not look inside SEQUENCEs. */
3028
3029 rtx
prev_nonnote_insn(rtx insn)3030 prev_nonnote_insn (rtx insn)
3031 {
3032 while (insn)
3033 {
3034 insn = PREV_INSN (insn);
3035 if (insn == 0 || GET_CODE (insn) != NOTE)
3036 break;
3037 }
3038
3039 return insn;
3040 }
3041
3042 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3043 or 0, if there is none. This routine does not look inside
3044 SEQUENCEs. */
3045
3046 rtx
next_real_insn(rtx insn)3047 next_real_insn (rtx insn)
3048 {
3049 while (insn)
3050 {
3051 insn = NEXT_INSN (insn);
3052 if (insn == 0 || GET_CODE (insn) == INSN
3053 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3054 break;
3055 }
3056
3057 return insn;
3058 }
3059
3060 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3061 or 0, if there is none. This routine does not look inside
3062 SEQUENCEs. */
3063
3064 rtx
prev_real_insn(rtx insn)3065 prev_real_insn (rtx insn)
3066 {
3067 while (insn)
3068 {
3069 insn = PREV_INSN (insn);
3070 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3071 || GET_CODE (insn) == JUMP_INSN)
3072 break;
3073 }
3074
3075 return insn;
3076 }
3077
3078 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3079 This routine does not look inside SEQUENCEs. */
3080
3081 rtx
last_call_insn(void)3082 last_call_insn (void)
3083 {
3084 rtx insn;
3085
3086 for (insn = get_last_insn ();
3087 insn && GET_CODE (insn) != CALL_INSN;
3088 insn = PREV_INSN (insn))
3089 ;
3090
3091 return insn;
3092 }
3093
3094 /* Find the next insn after INSN that really does something. This routine
3095 does not look inside SEQUENCEs. Until reload has completed, this is the
3096 same as next_real_insn. */
3097
3098 int
active_insn_p(rtx insn)3099 active_insn_p (rtx insn)
3100 {
3101 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3102 || (GET_CODE (insn) == INSN
3103 && (! reload_completed
3104 || (GET_CODE (PATTERN (insn)) != USE
3105 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3106 }
3107
3108 rtx
next_active_insn(rtx insn)3109 next_active_insn (rtx insn)
3110 {
3111 while (insn)
3112 {
3113 insn = NEXT_INSN (insn);
3114 if (insn == 0 || active_insn_p (insn))
3115 break;
3116 }
3117
3118 return insn;
3119 }
3120
3121 /* Find the last insn before INSN that really does something. This routine
3122 does not look inside SEQUENCEs. Until reload has completed, this is the
3123 same as prev_real_insn. */
3124
3125 rtx
prev_active_insn(rtx insn)3126 prev_active_insn (rtx insn)
3127 {
3128 while (insn)
3129 {
3130 insn = PREV_INSN (insn);
3131 if (insn == 0 || active_insn_p (insn))
3132 break;
3133 }
3134
3135 return insn;
3136 }
3137
3138 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3139
3140 rtx
next_label(rtx insn)3141 next_label (rtx insn)
3142 {
3143 while (insn)
3144 {
3145 insn = NEXT_INSN (insn);
3146 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3147 break;
3148 }
3149
3150 return insn;
3151 }
3152
3153 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3154
3155 rtx
prev_label(rtx insn)3156 prev_label (rtx insn)
3157 {
3158 while (insn)
3159 {
3160 insn = PREV_INSN (insn);
3161 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3162 break;
3163 }
3164
3165 return insn;
3166 }
3167
3168 #ifdef HAVE_cc0
3169 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3170 and REG_CC_USER notes so we can find it. */
3171
3172 void
link_cc0_insns(rtx insn)3173 link_cc0_insns (rtx insn)
3174 {
3175 rtx user = next_nonnote_insn (insn);
3176
3177 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3178 user = XVECEXP (PATTERN (user), 0, 0);
3179
3180 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3181 REG_NOTES (user));
3182 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3183 }
3184
3185 /* Return the next insn that uses CC0 after INSN, which is assumed to
3186 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3187 applied to the result of this function should yield INSN).
3188
3189 Normally, this is simply the next insn. However, if a REG_CC_USER note
3190 is present, it contains the insn that uses CC0.
3191
3192 Return 0 if we can't find the insn. */
3193
3194 rtx
next_cc0_user(rtx insn)3195 next_cc0_user (rtx insn)
3196 {
3197 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3198
3199 if (note)
3200 return XEXP (note, 0);
3201
3202 insn = next_nonnote_insn (insn);
3203 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3204 insn = XVECEXP (PATTERN (insn), 0, 0);
3205
3206 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3207 return insn;
3208
3209 return 0;
3210 }
3211
3212 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3213 note, it is the previous insn. */
3214
3215 rtx
prev_cc0_setter(rtx insn)3216 prev_cc0_setter (rtx insn)
3217 {
3218 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3219
3220 if (note)
3221 return XEXP (note, 0);
3222
3223 insn = prev_nonnote_insn (insn);
3224 if (! sets_cc0_p (PATTERN (insn)))
3225 abort ();
3226
3227 return insn;
3228 }
3229 #endif
3230
3231 /* Increment the label uses for all labels present in rtx. */
3232
3233 static void
mark_label_nuses(rtx x)3234 mark_label_nuses (rtx x)
3235 {
3236 enum rtx_code code;
3237 int i, j;
3238 const char *fmt;
3239
3240 code = GET_CODE (x);
3241 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3242 LABEL_NUSES (XEXP (x, 0))++;
3243
3244 fmt = GET_RTX_FORMAT (code);
3245 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3246 {
3247 if (fmt[i] == 'e')
3248 mark_label_nuses (XEXP (x, i));
3249 else if (fmt[i] == 'E')
3250 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3251 mark_label_nuses (XVECEXP (x, i, j));
3252 }
3253 }
3254
3255
3256 /* Try splitting insns that can be split for better scheduling.
3257 PAT is the pattern which might split.
3258 TRIAL is the insn providing PAT.
3259 LAST is nonzero if we should return the last insn of the sequence produced.
3260
3261 If this routine succeeds in splitting, it returns the first or last
3262 replacement insn depending on the value of LAST. Otherwise, it
3263 returns TRIAL. If the insn to be returned can be split, it will be. */
3264
3265 rtx
try_split(rtx pat,rtx trial,int last)3266 try_split (rtx pat, rtx trial, int last)
3267 {
3268 rtx before = PREV_INSN (trial);
3269 rtx after = NEXT_INSN (trial);
3270 int has_barrier = 0;
3271 rtx tem;
3272 rtx note, seq;
3273 int probability;
3274 rtx insn_last, insn;
3275 int njumps = 0;
3276
3277 if (any_condjump_p (trial)
3278 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3279 split_branch_probability = INTVAL (XEXP (note, 0));
3280 probability = split_branch_probability;
3281
3282 seq = split_insns (pat, trial);
3283
3284 split_branch_probability = -1;
3285
3286 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3287 We may need to handle this specially. */
3288 if (after && GET_CODE (after) == BARRIER)
3289 {
3290 has_barrier = 1;
3291 after = NEXT_INSN (after);
3292 }
3293
3294 if (!seq)
3295 return trial;
3296
3297 /* Avoid infinite loop if any insn of the result matches
3298 the original pattern. */
3299 insn_last = seq;
3300 while (1)
3301 {
3302 if (INSN_P (insn_last)
3303 && rtx_equal_p (PATTERN (insn_last), pat))
3304 return trial;
3305 if (!NEXT_INSN (insn_last))
3306 break;
3307 insn_last = NEXT_INSN (insn_last);
3308 }
3309
3310 /* Mark labels. */
3311 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3312 {
3313 if (GET_CODE (insn) == JUMP_INSN)
3314 {
3315 mark_jump_label (PATTERN (insn), insn, 0);
3316 njumps++;
3317 if (probability != -1
3318 && any_condjump_p (insn)
3319 && !find_reg_note (insn, REG_BR_PROB, 0))
3320 {
3321 /* We can preserve the REG_BR_PROB notes only if exactly
3322 one jump is created, otherwise the machine description
3323 is responsible for this step using
3324 split_branch_probability variable. */
3325 if (njumps != 1)
3326 abort ();
3327 REG_NOTES (insn)
3328 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3329 GEN_INT (probability),
3330 REG_NOTES (insn));
3331 }
3332 }
3333 }
3334
3335 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3336 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3337 if (GET_CODE (trial) == CALL_INSN)
3338 {
3339 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3340 if (GET_CODE (insn) == CALL_INSN)
3341 {
3342 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3343 while (*p)
3344 p = &XEXP (*p, 1);
3345 *p = CALL_INSN_FUNCTION_USAGE (trial);
3346 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3347 }
3348 }
3349
3350 /* Copy notes, particularly those related to the CFG. */
3351 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3352 {
3353 switch (REG_NOTE_KIND (note))
3354 {
3355 case REG_EH_REGION:
3356 insn = insn_last;
3357 while (insn != NULL_RTX)
3358 {
3359 if (GET_CODE (insn) == CALL_INSN
3360 || (flag_non_call_exceptions
3361 && may_trap_p (PATTERN (insn))))
3362 REG_NOTES (insn)
3363 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3364 XEXP (note, 0),
3365 REG_NOTES (insn));
3366 insn = PREV_INSN (insn);
3367 }
3368 break;
3369
3370 case REG_NORETURN:
3371 case REG_SETJMP:
3372 case REG_ALWAYS_RETURN:
3373 insn = insn_last;
3374 while (insn != NULL_RTX)
3375 {
3376 if (GET_CODE (insn) == CALL_INSN)
3377 REG_NOTES (insn)
3378 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3379 XEXP (note, 0),
3380 REG_NOTES (insn));
3381 insn = PREV_INSN (insn);
3382 }
3383 break;
3384
3385 case REG_NON_LOCAL_GOTO:
3386 insn = insn_last;
3387 while (insn != NULL_RTX)
3388 {
3389 if (GET_CODE (insn) == JUMP_INSN)
3390 REG_NOTES (insn)
3391 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3392 XEXP (note, 0),
3393 REG_NOTES (insn));
3394 insn = PREV_INSN (insn);
3395 }
3396 break;
3397
3398 default:
3399 break;
3400 }
3401 }
3402
3403 /* If there are LABELS inside the split insns increment the
3404 usage count so we don't delete the label. */
3405 if (GET_CODE (trial) == INSN)
3406 {
3407 insn = insn_last;
3408 while (insn != NULL_RTX)
3409 {
3410 if (GET_CODE (insn) == INSN)
3411 mark_label_nuses (PATTERN (insn));
3412
3413 insn = PREV_INSN (insn);
3414 }
3415 }
3416
3417 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3418
3419 delete_insn (trial);
3420 if (has_barrier)
3421 emit_barrier_after (tem);
3422
3423 /* Recursively call try_split for each new insn created; by the
3424 time control returns here that insn will be fully split, so
3425 set LAST and continue from the insn after the one returned.
3426 We can't use next_active_insn here since AFTER may be a note.
3427 Ignore deleted insns, which can be occur if not optimizing. */
3428 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3429 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3430 tem = try_split (PATTERN (tem), tem, 1);
3431
3432 /* Return either the first or the last insn, depending on which was
3433 requested. */
3434 return last
3435 ? (after ? PREV_INSN (after) : last_insn)
3436 : NEXT_INSN (before);
3437 }
3438
3439 /* Make and return an INSN rtx, initializing all its slots.
3440 Store PATTERN in the pattern slots. */
3441
3442 rtx
make_insn_raw(rtx pattern)3443 make_insn_raw (rtx pattern)
3444 {
3445 rtx insn;
3446
3447 insn = rtx_alloc (INSN);
3448
3449 INSN_UID (insn) = cur_insn_uid++;
3450 PATTERN (insn) = pattern;
3451 INSN_CODE (insn) = -1;
3452 LOG_LINKS (insn) = NULL;
3453 REG_NOTES (insn) = NULL;
3454 INSN_LOCATOR (insn) = 0;
3455 BLOCK_FOR_INSN (insn) = NULL;
3456
3457 #ifdef ENABLE_RTL_CHECKING
3458 if (insn
3459 && INSN_P (insn)
3460 && (returnjump_p (insn)
3461 || (GET_CODE (insn) == SET
3462 && SET_DEST (insn) == pc_rtx)))
3463 {
3464 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3465 debug_rtx (insn);
3466 }
3467 #endif
3468
3469 return insn;
3470 }
3471
3472 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3473
3474 static rtx
make_jump_insn_raw(rtx pattern)3475 make_jump_insn_raw (rtx pattern)
3476 {
3477 rtx insn;
3478
3479 insn = rtx_alloc (JUMP_INSN);
3480 INSN_UID (insn) = cur_insn_uid++;
3481
3482 PATTERN (insn) = pattern;
3483 INSN_CODE (insn) = -1;
3484 LOG_LINKS (insn) = NULL;
3485 REG_NOTES (insn) = NULL;
3486 JUMP_LABEL (insn) = NULL;
3487 INSN_LOCATOR (insn) = 0;
3488 BLOCK_FOR_INSN (insn) = NULL;
3489
3490 return insn;
3491 }
3492
3493 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3494
3495 static rtx
make_call_insn_raw(rtx pattern)3496 make_call_insn_raw (rtx pattern)
3497 {
3498 rtx insn;
3499
3500 insn = rtx_alloc (CALL_INSN);
3501 INSN_UID (insn) = cur_insn_uid++;
3502
3503 PATTERN (insn) = pattern;
3504 INSN_CODE (insn) = -1;
3505 LOG_LINKS (insn) = NULL;
3506 REG_NOTES (insn) = NULL;
3507 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3508 INSN_LOCATOR (insn) = 0;
3509 BLOCK_FOR_INSN (insn) = NULL;
3510
3511 return insn;
3512 }
3513
3514 /* Add INSN to the end of the doubly-linked list.
3515 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3516
3517 void
add_insn(rtx insn)3518 add_insn (rtx insn)
3519 {
3520 PREV_INSN (insn) = last_insn;
3521 NEXT_INSN (insn) = 0;
3522
3523 if (NULL != last_insn)
3524 NEXT_INSN (last_insn) = insn;
3525
3526 if (NULL == first_insn)
3527 first_insn = insn;
3528
3529 last_insn = insn;
3530 }
3531
3532 /* Add INSN into the doubly-linked list after insn AFTER. This and
3533 the next should be the only functions called to insert an insn once
3534 delay slots have been filled since only they know how to update a
3535 SEQUENCE. */
3536
3537 void
add_insn_after(rtx insn,rtx after)3538 add_insn_after (rtx insn, rtx after)
3539 {
3540 rtx next = NEXT_INSN (after);
3541 basic_block bb;
3542
3543 if (optimize && INSN_DELETED_P (after))
3544 abort ();
3545
3546 NEXT_INSN (insn) = next;
3547 PREV_INSN (insn) = after;
3548
3549 if (next)
3550 {
3551 PREV_INSN (next) = insn;
3552 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3553 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3554 }
3555 else if (last_insn == after)
3556 last_insn = insn;
3557 else
3558 {
3559 struct sequence_stack *stack = seq_stack;
3560 /* Scan all pending sequences too. */
3561 for (; stack; stack = stack->next)
3562 if (after == stack->last)
3563 {
3564 stack->last = insn;
3565 break;
3566 }
3567
3568 if (stack == 0)
3569 abort ();
3570 }
3571
3572 if (GET_CODE (after) != BARRIER
3573 && GET_CODE (insn) != BARRIER
3574 && (bb = BLOCK_FOR_INSN (after)))
3575 {
3576 set_block_for_insn (insn, bb);
3577 if (INSN_P (insn))
3578 bb->flags |= BB_DIRTY;
3579 /* Should not happen as first in the BB is always
3580 either NOTE or LABEL. */
3581 if (BB_END (bb) == after
3582 /* Avoid clobbering of structure when creating new BB. */
3583 && GET_CODE (insn) != BARRIER
3584 && (GET_CODE (insn) != NOTE
3585 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3586 BB_END (bb) = insn;
3587 }
3588
3589 NEXT_INSN (after) = insn;
3590 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3591 {
3592 rtx sequence = PATTERN (after);
3593 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3594 }
3595 }
3596
3597 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3598 the previous should be the only functions called to insert an insn once
3599 delay slots have been filled since only they know how to update a
3600 SEQUENCE. */
3601
3602 void
add_insn_before(rtx insn,rtx before)3603 add_insn_before (rtx insn, rtx before)
3604 {
3605 rtx prev = PREV_INSN (before);
3606 basic_block bb;
3607
3608 if (optimize && INSN_DELETED_P (before))
3609 abort ();
3610
3611 PREV_INSN (insn) = prev;
3612 NEXT_INSN (insn) = before;
3613
3614 if (prev)
3615 {
3616 NEXT_INSN (prev) = insn;
3617 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3618 {
3619 rtx sequence = PATTERN (prev);
3620 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3621 }
3622 }
3623 else if (first_insn == before)
3624 first_insn = insn;
3625 else
3626 {
3627 struct sequence_stack *stack = seq_stack;
3628 /* Scan all pending sequences too. */
3629 for (; stack; stack = stack->next)
3630 if (before == stack->first)
3631 {
3632 stack->first = insn;
3633 break;
3634 }
3635
3636 if (stack == 0)
3637 abort ();
3638 }
3639
3640 if (GET_CODE (before) != BARRIER
3641 && GET_CODE (insn) != BARRIER
3642 && (bb = BLOCK_FOR_INSN (before)))
3643 {
3644 set_block_for_insn (insn, bb);
3645 if (INSN_P (insn))
3646 bb->flags |= BB_DIRTY;
3647 /* Should not happen as first in the BB is always
3648 either NOTE or LABEl. */
3649 if (BB_HEAD (bb) == insn
3650 /* Avoid clobbering of structure when creating new BB. */
3651 && GET_CODE (insn) != BARRIER
3652 && (GET_CODE (insn) != NOTE
3653 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3654 abort ();
3655 }
3656
3657 PREV_INSN (before) = insn;
3658 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3659 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3660 }
3661
3662 /* Remove an insn from its doubly-linked list. This function knows how
3663 to handle sequences. */
3664 void
remove_insn(rtx insn)3665 remove_insn (rtx insn)
3666 {
3667 rtx next = NEXT_INSN (insn);
3668 rtx prev = PREV_INSN (insn);
3669 basic_block bb;
3670
3671 if (prev)
3672 {
3673 NEXT_INSN (prev) = next;
3674 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3675 {
3676 rtx sequence = PATTERN (prev);
3677 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3678 }
3679 }
3680 else if (first_insn == insn)
3681 first_insn = next;
3682 else
3683 {
3684 struct sequence_stack *stack = seq_stack;
3685 /* Scan all pending sequences too. */
3686 for (; stack; stack = stack->next)
3687 if (insn == stack->first)
3688 {
3689 stack->first = next;
3690 break;
3691 }
3692
3693 if (stack == 0)
3694 abort ();
3695 }
3696
3697 if (next)
3698 {
3699 PREV_INSN (next) = prev;
3700 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3701 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3702 }
3703 else if (last_insn == insn)
3704 last_insn = prev;
3705 else
3706 {
3707 struct sequence_stack *stack = seq_stack;
3708 /* Scan all pending sequences too. */
3709 for (; stack; stack = stack->next)
3710 if (insn == stack->last)
3711 {
3712 stack->last = prev;
3713 break;
3714 }
3715
3716 if (stack == 0)
3717 abort ();
3718 }
3719 if (GET_CODE (insn) != BARRIER
3720 && (bb = BLOCK_FOR_INSN (insn)))
3721 {
3722 if (INSN_P (insn))
3723 bb->flags |= BB_DIRTY;
3724 if (BB_HEAD (bb) == insn)
3725 {
3726 /* Never ever delete the basic block note without deleting whole
3727 basic block. */
3728 if (GET_CODE (insn) == NOTE)
3729 abort ();
3730 BB_HEAD (bb) = next;
3731 }
3732 if (BB_END (bb) == insn)
3733 BB_END (bb) = prev;
3734 }
3735 }
3736
3737 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3738
3739 void
add_function_usage_to(rtx call_insn,rtx call_fusage)3740 add_function_usage_to (rtx call_insn, rtx call_fusage)
3741 {
3742 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3743 abort ();
3744
3745 /* Put the register usage information on the CALL. If there is already
3746 some usage information, put ours at the end. */
3747 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3748 {
3749 rtx link;
3750
3751 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3752 link = XEXP (link, 1))
3753 ;
3754
3755 XEXP (link, 1) = call_fusage;
3756 }
3757 else
3758 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3759 }
3760
3761 /* Delete all insns made since FROM.
3762 FROM becomes the new last instruction. */
3763
3764 void
delete_insns_since(rtx from)3765 delete_insns_since (rtx from)
3766 {
3767 if (from == 0)
3768 first_insn = 0;
3769 else
3770 NEXT_INSN (from) = 0;
3771 last_insn = from;
3772 }
3773
3774 /* This function is deprecated, please use sequences instead.
3775
3776 Move a consecutive bunch of insns to a different place in the chain.
3777 The insns to be moved are those between FROM and TO.
3778 They are moved to a new position after the insn AFTER.
3779 AFTER must not be FROM or TO or any insn in between.
3780
3781 This function does not know about SEQUENCEs and hence should not be
3782 called after delay-slot filling has been done. */
3783
3784 void
reorder_insns_nobb(rtx from,rtx to,rtx after)3785 reorder_insns_nobb (rtx from, rtx to, rtx after)
3786 {
3787 /* Splice this bunch out of where it is now. */
3788 if (PREV_INSN (from))
3789 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3790 if (NEXT_INSN (to))
3791 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3792 if (last_insn == to)
3793 last_insn = PREV_INSN (from);
3794 if (first_insn == from)
3795 first_insn = NEXT_INSN (to);
3796
3797 /* Make the new neighbors point to it and it to them. */
3798 if (NEXT_INSN (after))
3799 PREV_INSN (NEXT_INSN (after)) = to;
3800
3801 NEXT_INSN (to) = NEXT_INSN (after);
3802 PREV_INSN (from) = after;
3803 NEXT_INSN (after) = from;
3804 if (after == last_insn)
3805 last_insn = to;
3806 }
3807
3808 /* Same as function above, but take care to update BB boundaries. */
3809 void
reorder_insns(rtx from,rtx to,rtx after)3810 reorder_insns (rtx from, rtx to, rtx after)
3811 {
3812 rtx prev = PREV_INSN (from);
3813 basic_block bb, bb2;
3814
3815 reorder_insns_nobb (from, to, after);
3816
3817 if (GET_CODE (after) != BARRIER
3818 && (bb = BLOCK_FOR_INSN (after)))
3819 {
3820 rtx x;
3821 bb->flags |= BB_DIRTY;
3822
3823 if (GET_CODE (from) != BARRIER
3824 && (bb2 = BLOCK_FOR_INSN (from)))
3825 {
3826 if (BB_END (bb2) == to)
3827 BB_END (bb2) = prev;
3828 bb2->flags |= BB_DIRTY;
3829 }
3830
3831 if (BB_END (bb) == after)
3832 BB_END (bb) = to;
3833
3834 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3835 set_block_for_insn (x, bb);
3836 }
3837 }
3838
3839 /* Return the line note insn preceding INSN. */
3840
3841 static rtx
find_line_note(rtx insn)3842 find_line_note (rtx insn)
3843 {
3844 if (no_line_numbers)
3845 return 0;
3846
3847 for (; insn; insn = PREV_INSN (insn))
3848 if (GET_CODE (insn) == NOTE
3849 && NOTE_LINE_NUMBER (insn) >= 0)
3850 break;
3851
3852 return insn;
3853 }
3854
3855 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3856 of the moved insns when debugging. This may insert a note between AFTER
3857 and FROM, and another one after TO. */
3858
3859 void
reorder_insns_with_line_notes(rtx from,rtx to,rtx after)3860 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3861 {
3862 rtx from_line = find_line_note (from);
3863 rtx after_line = find_line_note (after);
3864
3865 reorder_insns (from, to, after);
3866
3867 if (from_line == after_line)
3868 return;
3869
3870 if (from_line)
3871 emit_note_copy_after (from_line, after);
3872 if (after_line)
3873 emit_note_copy_after (after_line, to);
3874 }
3875
3876 /* Remove unnecessary notes from the instruction stream. */
3877
3878 void
remove_unnecessary_notes(void)3879 remove_unnecessary_notes (void)
3880 {
3881 rtx block_stack = NULL_RTX;
3882 rtx eh_stack = NULL_RTX;
3883 rtx insn;
3884 rtx next;
3885 rtx tmp;
3886
3887 /* We must not remove the first instruction in the function because
3888 the compiler depends on the first instruction being a note. */
3889 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3890 {
3891 /* Remember what's next. */
3892 next = NEXT_INSN (insn);
3893
3894 /* We're only interested in notes. */
3895 if (GET_CODE (insn) != NOTE)
3896 continue;
3897
3898 switch (NOTE_LINE_NUMBER (insn))
3899 {
3900 case NOTE_INSN_DELETED:
3901 case NOTE_INSN_LOOP_END_TOP_COND:
3902 remove_insn (insn);
3903 break;
3904
3905 case NOTE_INSN_EH_REGION_BEG:
3906 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3907 break;
3908
3909 case NOTE_INSN_EH_REGION_END:
3910 /* Too many end notes. */
3911 if (eh_stack == NULL_RTX)
3912 abort ();
3913 /* Mismatched nesting. */
3914 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3915 abort ();
3916 tmp = eh_stack;
3917 eh_stack = XEXP (eh_stack, 1);
3918 free_INSN_LIST_node (tmp);
3919 break;
3920
3921 case NOTE_INSN_BLOCK_BEG:
3922 /* By now, all notes indicating lexical blocks should have
3923 NOTE_BLOCK filled in. */
3924 if (NOTE_BLOCK (insn) == NULL_TREE)
3925 abort ();
3926 block_stack = alloc_INSN_LIST (insn, block_stack);
3927 break;
3928
3929 case NOTE_INSN_BLOCK_END:
3930 /* Too many end notes. */
3931 if (block_stack == NULL_RTX)
3932 abort ();
3933 /* Mismatched nesting. */
3934 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3935 abort ();
3936 tmp = block_stack;
3937 block_stack = XEXP (block_stack, 1);
3938 free_INSN_LIST_node (tmp);
3939
3940 /* Scan back to see if there are any non-note instructions
3941 between INSN and the beginning of this block. If not,
3942 then there is no PC range in the generated code that will
3943 actually be in this block, so there's no point in
3944 remembering the existence of the block. */
3945 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3946 {
3947 /* This block contains a real instruction. Note that we
3948 don't include labels; if the only thing in the block
3949 is a label, then there are still no PC values that
3950 lie within the block. */
3951 if (INSN_P (tmp))
3952 break;
3953
3954 /* We're only interested in NOTEs. */
3955 if (GET_CODE (tmp) != NOTE)
3956 continue;
3957
3958 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3959 {
3960 /* We just verified that this BLOCK matches us with
3961 the block_stack check above. Never delete the
3962 BLOCK for the outermost scope of the function; we
3963 can refer to names from that scope even if the
3964 block notes are messed up. */
3965 if (! is_body_block (NOTE_BLOCK (insn))
3966 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3967 {
3968 remove_insn (tmp);
3969 remove_insn (insn);
3970 }
3971 break;
3972 }
3973 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3974 /* There's a nested block. We need to leave the
3975 current block in place since otherwise the debugger
3976 wouldn't be able to show symbols from our block in
3977 the nested block. */
3978 break;
3979 }
3980 }
3981 }
3982
3983 /* Too many begin notes. */
3984 if (block_stack || eh_stack)
3985 abort ();
3986 }
3987
3988
3989 /* Emit insn(s) of given code and pattern
3990 at a specified place within the doubly-linked list.
3991
3992 All of the emit_foo global entry points accept an object
3993 X which is either an insn list or a PATTERN of a single
3994 instruction.
3995
3996 There are thus a few canonical ways to generate code and
3997 emit it at a specific place in the instruction stream. For
3998 example, consider the instruction named SPOT and the fact that
3999 we would like to emit some instructions before SPOT. We might
4000 do it like this:
4001
4002 start_sequence ();
4003 ... emit the new instructions ...
4004 insns_head = get_insns ();
4005 end_sequence ();
4006
4007 emit_insn_before (insns_head, SPOT);
4008
4009 It used to be common to generate SEQUENCE rtl instead, but that
4010 is a relic of the past which no longer occurs. The reason is that
4011 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4012 generated would almost certainly die right after it was created. */
4013
4014 /* Make X be output before the instruction BEFORE. */
4015
4016 rtx
emit_insn_before_noloc(rtx x,rtx before)4017 emit_insn_before_noloc (rtx x, rtx before)
4018 {
4019 rtx last = before;
4020 rtx insn;
4021
4022 #ifdef ENABLE_RTL_CHECKING
4023 if (before == NULL_RTX)
4024 abort ();
4025 #endif
4026
4027 if (x == NULL_RTX)
4028 return last;
4029
4030 switch (GET_CODE (x))
4031 {
4032 case INSN:
4033 case JUMP_INSN:
4034 case CALL_INSN:
4035 case CODE_LABEL:
4036 case BARRIER:
4037 case NOTE:
4038 insn = x;
4039 while (insn)
4040 {
4041 rtx next = NEXT_INSN (insn);
4042 add_insn_before (insn, before);
4043 last = insn;
4044 insn = next;
4045 }
4046 break;
4047
4048 #ifdef ENABLE_RTL_CHECKING
4049 case SEQUENCE:
4050 abort ();
4051 break;
4052 #endif
4053
4054 default:
4055 last = make_insn_raw (x);
4056 add_insn_before (last, before);
4057 break;
4058 }
4059
4060 return last;
4061 }
4062
4063 /* Make an instruction with body X and code JUMP_INSN
4064 and output it before the instruction BEFORE. */
4065
4066 rtx
emit_jump_insn_before_noloc(rtx x,rtx before)4067 emit_jump_insn_before_noloc (rtx x, rtx before)
4068 {
4069 rtx insn, last = NULL_RTX;
4070
4071 #ifdef ENABLE_RTL_CHECKING
4072 if (before == NULL_RTX)
4073 abort ();
4074 #endif
4075
4076 switch (GET_CODE (x))
4077 {
4078 case INSN:
4079 case JUMP_INSN:
4080 case CALL_INSN:
4081 case CODE_LABEL:
4082 case BARRIER:
4083 case NOTE:
4084 insn = x;
4085 while (insn)
4086 {
4087 rtx next = NEXT_INSN (insn);
4088 add_insn_before (insn, before);
4089 last = insn;
4090 insn = next;
4091 }
4092 break;
4093
4094 #ifdef ENABLE_RTL_CHECKING
4095 case SEQUENCE:
4096 abort ();
4097 break;
4098 #endif
4099
4100 default:
4101 last = make_jump_insn_raw (x);
4102 add_insn_before (last, before);
4103 break;
4104 }
4105
4106 return last;
4107 }
4108
4109 /* Make an instruction with body X and code CALL_INSN
4110 and output it before the instruction BEFORE. */
4111
4112 rtx
emit_call_insn_before_noloc(rtx x,rtx before)4113 emit_call_insn_before_noloc (rtx x, rtx before)
4114 {
4115 rtx last = NULL_RTX, insn;
4116
4117 #ifdef ENABLE_RTL_CHECKING
4118 if (before == NULL_RTX)
4119 abort ();
4120 #endif
4121
4122 switch (GET_CODE (x))
4123 {
4124 case INSN:
4125 case JUMP_INSN:
4126 case CALL_INSN:
4127 case CODE_LABEL:
4128 case BARRIER:
4129 case NOTE:
4130 insn = x;
4131 while (insn)
4132 {
4133 rtx next = NEXT_INSN (insn);
4134 add_insn_before (insn, before);
4135 last = insn;
4136 insn = next;
4137 }
4138 break;
4139
4140 #ifdef ENABLE_RTL_CHECKING
4141 case SEQUENCE:
4142 abort ();
4143 break;
4144 #endif
4145
4146 default:
4147 last = make_call_insn_raw (x);
4148 add_insn_before (last, before);
4149 break;
4150 }
4151
4152 return last;
4153 }
4154
4155 /* Make an insn of code BARRIER
4156 and output it before the insn BEFORE. */
4157
4158 rtx
emit_barrier_before(rtx before)4159 emit_barrier_before (rtx before)
4160 {
4161 rtx insn = rtx_alloc (BARRIER);
4162
4163 INSN_UID (insn) = cur_insn_uid++;
4164
4165 add_insn_before (insn, before);
4166 return insn;
4167 }
4168
4169 /* Emit the label LABEL before the insn BEFORE. */
4170
4171 rtx
emit_label_before(rtx label,rtx before)4172 emit_label_before (rtx label, rtx before)
4173 {
4174 /* This can be called twice for the same label as a result of the
4175 confusion that follows a syntax error! So make it harmless. */
4176 if (INSN_UID (label) == 0)
4177 {
4178 INSN_UID (label) = cur_insn_uid++;
4179 add_insn_before (label, before);
4180 }
4181
4182 return label;
4183 }
4184
4185 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4186
4187 rtx
emit_note_before(int subtype,rtx before)4188 emit_note_before (int subtype, rtx before)
4189 {
4190 rtx note = rtx_alloc (NOTE);
4191 INSN_UID (note) = cur_insn_uid++;
4192 NOTE_SOURCE_FILE (note) = 0;
4193 NOTE_LINE_NUMBER (note) = subtype;
4194 BLOCK_FOR_INSN (note) = NULL;
4195
4196 add_insn_before (note, before);
4197 return note;
4198 }
4199
4200 /* Helper for emit_insn_after, handles lists of instructions
4201 efficiently. */
4202
4203 static rtx emit_insn_after_1 (rtx, rtx);
4204
4205 static rtx
emit_insn_after_1(rtx first,rtx after)4206 emit_insn_after_1 (rtx first, rtx after)
4207 {
4208 rtx last;
4209 rtx after_after;
4210 basic_block bb;
4211
4212 if (GET_CODE (after) != BARRIER
4213 && (bb = BLOCK_FOR_INSN (after)))
4214 {
4215 bb->flags |= BB_DIRTY;
4216 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4217 if (GET_CODE (last) != BARRIER)
4218 set_block_for_insn (last, bb);
4219 if (GET_CODE (last) != BARRIER)
4220 set_block_for_insn (last, bb);
4221 if (BB_END (bb) == after)
4222 BB_END (bb) = last;
4223 }
4224 else
4225 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4226 continue;
4227
4228 after_after = NEXT_INSN (after);
4229
4230 NEXT_INSN (after) = first;
4231 PREV_INSN (first) = after;
4232 NEXT_INSN (last) = after_after;
4233 if (after_after)
4234 PREV_INSN (after_after) = last;
4235
4236 if (after == last_insn)
4237 last_insn = last;
4238 return last;
4239 }
4240
4241 /* Make X be output after the insn AFTER. */
4242
4243 rtx
emit_insn_after_noloc(rtx x,rtx after)4244 emit_insn_after_noloc (rtx x, rtx after)
4245 {
4246 rtx last = after;
4247
4248 #ifdef ENABLE_RTL_CHECKING
4249 if (after == NULL_RTX)
4250 abort ();
4251 #endif
4252
4253 if (x == NULL_RTX)
4254 return last;
4255
4256 switch (GET_CODE (x))
4257 {
4258 case INSN:
4259 case JUMP_INSN:
4260 case CALL_INSN:
4261 case CODE_LABEL:
4262 case BARRIER:
4263 case NOTE:
4264 last = emit_insn_after_1 (x, after);
4265 break;
4266
4267 #ifdef ENABLE_RTL_CHECKING
4268 case SEQUENCE:
4269 abort ();
4270 break;
4271 #endif
4272
4273 default:
4274 last = make_insn_raw (x);
4275 add_insn_after (last, after);
4276 break;
4277 }
4278
4279 return last;
4280 }
4281
4282 /* Similar to emit_insn_after, except that line notes are to be inserted so
4283 as to act as if this insn were at FROM. */
4284
4285 void
emit_insn_after_with_line_notes(rtx x,rtx after,rtx from)4286 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4287 {
4288 rtx from_line = find_line_note (from);
4289 rtx after_line = find_line_note (after);
4290 rtx insn = emit_insn_after (x, after);
4291
4292 if (from_line)
4293 emit_note_copy_after (from_line, after);
4294
4295 if (after_line)
4296 emit_note_copy_after (after_line, insn);
4297 }
4298
4299 /* Make an insn of code JUMP_INSN with body X
4300 and output it after the insn AFTER. */
4301
4302 rtx
emit_jump_insn_after_noloc(rtx x,rtx after)4303 emit_jump_insn_after_noloc (rtx x, rtx after)
4304 {
4305 rtx last;
4306
4307 #ifdef ENABLE_RTL_CHECKING
4308 if (after == NULL_RTX)
4309 abort ();
4310 #endif
4311
4312 switch (GET_CODE (x))
4313 {
4314 case INSN:
4315 case JUMP_INSN:
4316 case CALL_INSN:
4317 case CODE_LABEL:
4318 case BARRIER:
4319 case NOTE:
4320 last = emit_insn_after_1 (x, after);
4321 break;
4322
4323 #ifdef ENABLE_RTL_CHECKING
4324 case SEQUENCE:
4325 abort ();
4326 break;
4327 #endif
4328
4329 default:
4330 last = make_jump_insn_raw (x);
4331 add_insn_after (last, after);
4332 break;
4333 }
4334
4335 return last;
4336 }
4337
4338 /* Make an instruction with body X and code CALL_INSN
4339 and output it after the instruction AFTER. */
4340
4341 rtx
emit_call_insn_after_noloc(rtx x,rtx after)4342 emit_call_insn_after_noloc (rtx x, rtx after)
4343 {
4344 rtx last;
4345
4346 #ifdef ENABLE_RTL_CHECKING
4347 if (after == NULL_RTX)
4348 abort ();
4349 #endif
4350
4351 switch (GET_CODE (x))
4352 {
4353 case INSN:
4354 case JUMP_INSN:
4355 case CALL_INSN:
4356 case CODE_LABEL:
4357 case BARRIER:
4358 case NOTE:
4359 last = emit_insn_after_1 (x, after);
4360 break;
4361
4362 #ifdef ENABLE_RTL_CHECKING
4363 case SEQUENCE:
4364 abort ();
4365 break;
4366 #endif
4367
4368 default:
4369 last = make_call_insn_raw (x);
4370 add_insn_after (last, after);
4371 break;
4372 }
4373
4374 return last;
4375 }
4376
4377 /* Make an insn of code BARRIER
4378 and output it after the insn AFTER. */
4379
4380 rtx
emit_barrier_after(rtx after)4381 emit_barrier_after (rtx after)
4382 {
4383 rtx insn = rtx_alloc (BARRIER);
4384
4385 INSN_UID (insn) = cur_insn_uid++;
4386
4387 add_insn_after (insn, after);
4388 return insn;
4389 }
4390
4391 /* Emit the label LABEL after the insn AFTER. */
4392
4393 rtx
emit_label_after(rtx label,rtx after)4394 emit_label_after (rtx label, rtx after)
4395 {
4396 /* This can be called twice for the same label
4397 as a result of the confusion that follows a syntax error!
4398 So make it harmless. */
4399 if (INSN_UID (label) == 0)
4400 {
4401 INSN_UID (label) = cur_insn_uid++;
4402 add_insn_after (label, after);
4403 }
4404
4405 return label;
4406 }
4407
4408 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4409
4410 rtx
emit_note_after(int subtype,rtx after)4411 emit_note_after (int subtype, rtx after)
4412 {
4413 rtx note = rtx_alloc (NOTE);
4414 INSN_UID (note) = cur_insn_uid++;
4415 NOTE_SOURCE_FILE (note) = 0;
4416 NOTE_LINE_NUMBER (note) = subtype;
4417 BLOCK_FOR_INSN (note) = NULL;
4418 add_insn_after (note, after);
4419 return note;
4420 }
4421
4422 /* Emit a copy of note ORIG after the insn AFTER. */
4423
4424 rtx
emit_note_copy_after(rtx orig,rtx after)4425 emit_note_copy_after (rtx orig, rtx after)
4426 {
4427 rtx note;
4428
4429 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4430 {
4431 cur_insn_uid++;
4432 return 0;
4433 }
4434
4435 note = rtx_alloc (NOTE);
4436 INSN_UID (note) = cur_insn_uid++;
4437 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4438 NOTE_DATA (note) = NOTE_DATA (orig);
4439 BLOCK_FOR_INSN (note) = NULL;
4440 add_insn_after (note, after);
4441 return note;
4442 }
4443
4444 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4445 rtx
emit_insn_after_setloc(rtx pattern,rtx after,int loc)4446 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4447 {
4448 rtx last = emit_insn_after_noloc (pattern, after);
4449
4450 if (pattern == NULL_RTX || !loc)
4451 return last;
4452
4453 after = NEXT_INSN (after);
4454 while (1)
4455 {
4456 if (active_insn_p (after) && !INSN_LOCATOR (after))
4457 INSN_LOCATOR (after) = loc;
4458 if (after == last)
4459 break;
4460 after = NEXT_INSN (after);
4461 }
4462 return last;
4463 }
4464
4465 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4466 rtx
emit_insn_after(rtx pattern,rtx after)4467 emit_insn_after (rtx pattern, rtx after)
4468 {
4469 if (INSN_P (after))
4470 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4471 else
4472 return emit_insn_after_noloc (pattern, after);
4473 }
4474
4475 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4476 rtx
emit_jump_insn_after_setloc(rtx pattern,rtx after,int loc)4477 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4478 {
4479 rtx last = emit_jump_insn_after_noloc (pattern, after);
4480
4481 if (pattern == NULL_RTX || !loc)
4482 return last;
4483
4484 after = NEXT_INSN (after);
4485 while (1)
4486 {
4487 if (active_insn_p (after) && !INSN_LOCATOR (after))
4488 INSN_LOCATOR (after) = loc;
4489 if (after == last)
4490 break;
4491 after = NEXT_INSN (after);
4492 }
4493 return last;
4494 }
4495
4496 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4497 rtx
emit_jump_insn_after(rtx pattern,rtx after)4498 emit_jump_insn_after (rtx pattern, rtx after)
4499 {
4500 if (INSN_P (after))
4501 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4502 else
4503 return emit_jump_insn_after_noloc (pattern, after);
4504 }
4505
4506 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4507 rtx
emit_call_insn_after_setloc(rtx pattern,rtx after,int loc)4508 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4509 {
4510 rtx last = emit_call_insn_after_noloc (pattern, after);
4511
4512 if (pattern == NULL_RTX || !loc)
4513 return last;
4514
4515 after = NEXT_INSN (after);
4516 while (1)
4517 {
4518 if (active_insn_p (after) && !INSN_LOCATOR (after))
4519 INSN_LOCATOR (after) = loc;
4520 if (after == last)
4521 break;
4522 after = NEXT_INSN (after);
4523 }
4524 return last;
4525 }
4526
4527 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4528 rtx
emit_call_insn_after(rtx pattern,rtx after)4529 emit_call_insn_after (rtx pattern, rtx after)
4530 {
4531 if (INSN_P (after))
4532 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4533 else
4534 return emit_call_insn_after_noloc (pattern, after);
4535 }
4536
4537 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4538 rtx
emit_insn_before_setloc(rtx pattern,rtx before,int loc)4539 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4540 {
4541 rtx first = PREV_INSN (before);
4542 rtx last = emit_insn_before_noloc (pattern, before);
4543
4544 if (pattern == NULL_RTX || !loc)
4545 return last;
4546
4547 first = NEXT_INSN (first);
4548 while (1)
4549 {
4550 if (active_insn_p (first) && !INSN_LOCATOR (first))
4551 INSN_LOCATOR (first) = loc;
4552 if (first == last)
4553 break;
4554 first = NEXT_INSN (first);
4555 }
4556 return last;
4557 }
4558
4559 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4560 rtx
emit_insn_before(rtx pattern,rtx before)4561 emit_insn_before (rtx pattern, rtx before)
4562 {
4563 if (INSN_P (before))
4564 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4565 else
4566 return emit_insn_before_noloc (pattern, before);
4567 }
4568
4569 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4570 rtx
emit_jump_insn_before_setloc(rtx pattern,rtx before,int loc)4571 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4572 {
4573 rtx first = PREV_INSN (before);
4574 rtx last = emit_jump_insn_before_noloc (pattern, before);
4575
4576 if (pattern == NULL_RTX)
4577 return last;
4578
4579 first = NEXT_INSN (first);
4580 while (1)
4581 {
4582 if (active_insn_p (first) && !INSN_LOCATOR (first))
4583 INSN_LOCATOR (first) = loc;
4584 if (first == last)
4585 break;
4586 first = NEXT_INSN (first);
4587 }
4588 return last;
4589 }
4590
4591 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4592 rtx
emit_jump_insn_before(rtx pattern,rtx before)4593 emit_jump_insn_before (rtx pattern, rtx before)
4594 {
4595 if (INSN_P (before))
4596 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4597 else
4598 return emit_jump_insn_before_noloc (pattern, before);
4599 }
4600
4601 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4602 rtx
emit_call_insn_before_setloc(rtx pattern,rtx before,int loc)4603 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4604 {
4605 rtx first = PREV_INSN (before);
4606 rtx last = emit_call_insn_before_noloc (pattern, before);
4607
4608 if (pattern == NULL_RTX)
4609 return last;
4610
4611 first = NEXT_INSN (first);
4612 while (1)
4613 {
4614 if (active_insn_p (first) && !INSN_LOCATOR (first))
4615 INSN_LOCATOR (first) = loc;
4616 if (first == last)
4617 break;
4618 first = NEXT_INSN (first);
4619 }
4620 return last;
4621 }
4622
4623 /* like emit_call_insn_before_noloc,
4624 but set insn_locator according to before. */
4625 rtx
emit_call_insn_before(rtx pattern,rtx before)4626 emit_call_insn_before (rtx pattern, rtx before)
4627 {
4628 if (INSN_P (before))
4629 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4630 else
4631 return emit_call_insn_before_noloc (pattern, before);
4632 }
4633
4634 /* Take X and emit it at the end of the doubly-linked
4635 INSN list.
4636
4637 Returns the last insn emitted. */
4638
4639 rtx
emit_insn(rtx x)4640 emit_insn (rtx x)
4641 {
4642 rtx last = last_insn;
4643 rtx insn;
4644
4645 if (x == NULL_RTX)
4646 return last;
4647
4648 switch (GET_CODE (x))
4649 {
4650 case INSN:
4651 case JUMP_INSN:
4652 case CALL_INSN:
4653 case CODE_LABEL:
4654 case BARRIER:
4655 case NOTE:
4656 insn = x;
4657 while (insn)
4658 {
4659 rtx next = NEXT_INSN (insn);
4660 add_insn (insn);
4661 last = insn;
4662 insn = next;
4663 }
4664 break;
4665
4666 #ifdef ENABLE_RTL_CHECKING
4667 case SEQUENCE:
4668 abort ();
4669 break;
4670 #endif
4671
4672 default:
4673 last = make_insn_raw (x);
4674 add_insn (last);
4675 break;
4676 }
4677
4678 return last;
4679 }
4680
4681 /* Make an insn of code JUMP_INSN with pattern X
4682 and add it to the end of the doubly-linked list. */
4683
4684 rtx
emit_jump_insn(rtx x)4685 emit_jump_insn (rtx x)
4686 {
4687 rtx last = NULL_RTX, insn;
4688
4689 switch (GET_CODE (x))
4690 {
4691 case INSN:
4692 case JUMP_INSN:
4693 case CALL_INSN:
4694 case CODE_LABEL:
4695 case BARRIER:
4696 case NOTE:
4697 insn = x;
4698 while (insn)
4699 {
4700 rtx next = NEXT_INSN (insn);
4701 add_insn (insn);
4702 last = insn;
4703 insn = next;
4704 }
4705 break;
4706
4707 #ifdef ENABLE_RTL_CHECKING
4708 case SEQUENCE:
4709 abort ();
4710 break;
4711 #endif
4712
4713 default:
4714 last = make_jump_insn_raw (x);
4715 add_insn (last);
4716 break;
4717 }
4718
4719 return last;
4720 }
4721
4722 /* Make an insn of code CALL_INSN with pattern X
4723 and add it to the end of the doubly-linked list. */
4724
4725 rtx
emit_call_insn(rtx x)4726 emit_call_insn (rtx x)
4727 {
4728 rtx insn;
4729
4730 switch (GET_CODE (x))
4731 {
4732 case INSN:
4733 case JUMP_INSN:
4734 case CALL_INSN:
4735 case CODE_LABEL:
4736 case BARRIER:
4737 case NOTE:
4738 insn = emit_insn (x);
4739 break;
4740
4741 #ifdef ENABLE_RTL_CHECKING
4742 case SEQUENCE:
4743 abort ();
4744 break;
4745 #endif
4746
4747 default:
4748 insn = make_call_insn_raw (x);
4749 add_insn (insn);
4750 break;
4751 }
4752
4753 return insn;
4754 }
4755
4756 /* Add the label LABEL to the end of the doubly-linked list. */
4757
4758 rtx
emit_label(rtx label)4759 emit_label (rtx label)
4760 {
4761 /* This can be called twice for the same label
4762 as a result of the confusion that follows a syntax error!
4763 So make it harmless. */
4764 if (INSN_UID (label) == 0)
4765 {
4766 INSN_UID (label) = cur_insn_uid++;
4767 add_insn (label);
4768 }
4769 return label;
4770 }
4771
4772 /* Make an insn of code BARRIER
4773 and add it to the end of the doubly-linked list. */
4774
4775 rtx
emit_barrier(void)4776 emit_barrier (void)
4777 {
4778 rtx barrier = rtx_alloc (BARRIER);
4779 INSN_UID (barrier) = cur_insn_uid++;
4780 add_insn (barrier);
4781 return barrier;
4782 }
4783
4784 /* Make line numbering NOTE insn for LOCATION add it to the end
4785 of the doubly-linked list, but only if line-numbers are desired for
4786 debugging info and it doesn't match the previous one. */
4787
4788 rtx
emit_line_note(location_t location)4789 emit_line_note (location_t location)
4790 {
4791 rtx note;
4792
4793 set_file_and_line_for_stmt (location);
4794
4795 if (location.file && last_location.file
4796 && !strcmp (location.file, last_location.file)
4797 && location.line == last_location.line)
4798 return NULL_RTX;
4799 last_location = location;
4800
4801 if (no_line_numbers)
4802 {
4803 cur_insn_uid++;
4804 return NULL_RTX;
4805 }
4806
4807 note = emit_note (location.line);
4808 NOTE_SOURCE_FILE (note) = location.file;
4809
4810 return note;
4811 }
4812
4813 /* Emit a copy of note ORIG. */
4814
4815 rtx
emit_note_copy(rtx orig)4816 emit_note_copy (rtx orig)
4817 {
4818 rtx note;
4819
4820 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4821 {
4822 cur_insn_uid++;
4823 return NULL_RTX;
4824 }
4825
4826 note = rtx_alloc (NOTE);
4827
4828 INSN_UID (note) = cur_insn_uid++;
4829 NOTE_DATA (note) = NOTE_DATA (orig);
4830 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4831 BLOCK_FOR_INSN (note) = NULL;
4832 add_insn (note);
4833
4834 return note;
4835 }
4836
4837 /* Make an insn of code NOTE or type NOTE_NO
4838 and add it to the end of the doubly-linked list. */
4839
4840 rtx
emit_note(int note_no)4841 emit_note (int note_no)
4842 {
4843 rtx note;
4844
4845 note = rtx_alloc (NOTE);
4846 INSN_UID (note) = cur_insn_uid++;
4847 NOTE_LINE_NUMBER (note) = note_no;
4848 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4849 BLOCK_FOR_INSN (note) = NULL;
4850 add_insn (note);
4851 return note;
4852 }
4853
4854 /* Cause next statement to emit a line note even if the line number
4855 has not changed. */
4856
4857 void
force_next_line_note(void)4858 force_next_line_note (void)
4859 {
4860 last_location.line = -1;
4861 }
4862
4863 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4864 note of this type already exists, remove it first. */
4865
4866 rtx
set_unique_reg_note(rtx insn,enum reg_note kind,rtx datum)4867 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4868 {
4869 rtx note = find_reg_note (insn, kind, NULL_RTX);
4870
4871 switch (kind)
4872 {
4873 case REG_EQUAL:
4874 case REG_EQUIV:
4875 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4876 has multiple sets (some callers assume single_set
4877 means the insn only has one set, when in fact it
4878 means the insn only has one * useful * set). */
4879 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4880 {
4881 if (note)
4882 abort ();
4883 return NULL_RTX;
4884 }
4885
4886 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4887 It serves no useful purpose and breaks eliminate_regs. */
4888 if (GET_CODE (datum) == ASM_OPERANDS)
4889 return NULL_RTX;
4890 break;
4891
4892 default:
4893 break;
4894 }
4895
4896 if (note)
4897 {
4898 XEXP (note, 0) = datum;
4899 return note;
4900 }
4901
4902 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4903 return REG_NOTES (insn);
4904 }
4905
4906 /* Return an indication of which type of insn should have X as a body.
4907 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4908
4909 enum rtx_code
classify_insn(rtx x)4910 classify_insn (rtx x)
4911 {
4912 if (GET_CODE (x) == CODE_LABEL)
4913 return CODE_LABEL;
4914 if (GET_CODE (x) == CALL)
4915 return CALL_INSN;
4916 if (GET_CODE (x) == RETURN)
4917 return JUMP_INSN;
4918 if (GET_CODE (x) == SET)
4919 {
4920 if (SET_DEST (x) == pc_rtx)
4921 return JUMP_INSN;
4922 else if (GET_CODE (SET_SRC (x)) == CALL)
4923 return CALL_INSN;
4924 else
4925 return INSN;
4926 }
4927 if (GET_CODE (x) == PARALLEL)
4928 {
4929 int j;
4930 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4931 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4932 return CALL_INSN;
4933 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4934 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4935 return JUMP_INSN;
4936 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4937 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4938 return CALL_INSN;
4939 }
4940 return INSN;
4941 }
4942
4943 /* Emit the rtl pattern X as an appropriate kind of insn.
4944 If X is a label, it is simply added into the insn chain. */
4945
4946 rtx
emit(rtx x)4947 emit (rtx x)
4948 {
4949 enum rtx_code code = classify_insn (x);
4950
4951 if (code == CODE_LABEL)
4952 return emit_label (x);
4953 else if (code == INSN)
4954 return emit_insn (x);
4955 else if (code == JUMP_INSN)
4956 {
4957 rtx insn = emit_jump_insn (x);
4958 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4959 return emit_barrier ();
4960 return insn;
4961 }
4962 else if (code == CALL_INSN)
4963 return emit_call_insn (x);
4964 else
4965 abort ();
4966 }
4967
4968 /* Space for free sequence stack entries. */
4969 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4970
4971 /* Begin emitting insns to a sequence which can be packaged in an
4972 RTL_EXPR. If this sequence will contain something that might cause
4973 the compiler to pop arguments to function calls (because those
4974 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4975 details), use do_pending_stack_adjust before calling this function.
4976 That will ensure that the deferred pops are not accidentally
4977 emitted in the middle of this sequence. */
4978
4979 void
start_sequence(void)4980 start_sequence (void)
4981 {
4982 struct sequence_stack *tem;
4983
4984 if (free_sequence_stack != NULL)
4985 {
4986 tem = free_sequence_stack;
4987 free_sequence_stack = tem->next;
4988 }
4989 else
4990 tem = ggc_alloc (sizeof (struct sequence_stack));
4991
4992 tem->next = seq_stack;
4993 tem->first = first_insn;
4994 tem->last = last_insn;
4995 tem->sequence_rtl_expr = seq_rtl_expr;
4996
4997 seq_stack = tem;
4998
4999 first_insn = 0;
5000 last_insn = 0;
5001 }
5002
5003 /* Similarly, but indicate that this sequence will be placed in T, an
5004 RTL_EXPR. See the documentation for start_sequence for more
5005 information about how to use this function. */
5006
5007 void
start_sequence_for_rtl_expr(tree t)5008 start_sequence_for_rtl_expr (tree t)
5009 {
5010 start_sequence ();
5011
5012 seq_rtl_expr = t;
5013 }
5014
5015 /* Set up the insn chain starting with FIRST as the current sequence,
5016 saving the previously current one. See the documentation for
5017 start_sequence for more information about how to use this function. */
5018
5019 void
push_to_sequence(rtx first)5020 push_to_sequence (rtx first)
5021 {
5022 rtx last;
5023
5024 start_sequence ();
5025
5026 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5027
5028 first_insn = first;
5029 last_insn = last;
5030 }
5031
5032 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5033
5034 void
push_to_full_sequence(rtx first,rtx last)5035 push_to_full_sequence (rtx first, rtx last)
5036 {
5037 start_sequence ();
5038 first_insn = first;
5039 last_insn = last;
5040 /* We really should have the end of the insn chain here. */
5041 if (last && NEXT_INSN (last))
5042 abort ();
5043 }
5044
5045 /* Set up the outer-level insn chain
5046 as the current sequence, saving the previously current one. */
5047
5048 void
push_topmost_sequence(void)5049 push_topmost_sequence (void)
5050 {
5051 struct sequence_stack *stack, *top = NULL;
5052
5053 start_sequence ();
5054
5055 for (stack = seq_stack; stack; stack = stack->next)
5056 top = stack;
5057
5058 first_insn = top->first;
5059 last_insn = top->last;
5060 seq_rtl_expr = top->sequence_rtl_expr;
5061 }
5062
5063 /* After emitting to the outer-level insn chain, update the outer-level
5064 insn chain, and restore the previous saved state. */
5065
5066 void
pop_topmost_sequence(void)5067 pop_topmost_sequence (void)
5068 {
5069 struct sequence_stack *stack, *top = NULL;
5070
5071 for (stack = seq_stack; stack; stack = stack->next)
5072 top = stack;
5073
5074 top->first = first_insn;
5075 top->last = last_insn;
5076 /* ??? Why don't we save seq_rtl_expr here? */
5077
5078 end_sequence ();
5079 }
5080
5081 /* After emitting to a sequence, restore previous saved state.
5082
5083 To get the contents of the sequence just made, you must call
5084 `get_insns' *before* calling here.
5085
5086 If the compiler might have deferred popping arguments while
5087 generating this sequence, and this sequence will not be immediately
5088 inserted into the instruction stream, use do_pending_stack_adjust
5089 before calling get_insns. That will ensure that the deferred
5090 pops are inserted into this sequence, and not into some random
5091 location in the instruction stream. See INHIBIT_DEFER_POP for more
5092 information about deferred popping of arguments. */
5093
5094 void
end_sequence(void)5095 end_sequence (void)
5096 {
5097 struct sequence_stack *tem = seq_stack;
5098
5099 first_insn = tem->first;
5100 last_insn = tem->last;
5101 seq_rtl_expr = tem->sequence_rtl_expr;
5102 seq_stack = tem->next;
5103
5104 memset (tem, 0, sizeof (*tem));
5105 tem->next = free_sequence_stack;
5106 free_sequence_stack = tem;
5107 }
5108
5109 /* This works like end_sequence, but records the old sequence in FIRST
5110 and LAST. */
5111
5112 void
end_full_sequence(rtx * first,rtx * last)5113 end_full_sequence (rtx *first, rtx *last)
5114 {
5115 *first = first_insn;
5116 *last = last_insn;
5117 end_sequence ();
5118 }
5119
5120 /* Return 1 if currently emitting into a sequence. */
5121
5122 int
in_sequence_p(void)5123 in_sequence_p (void)
5124 {
5125 return seq_stack != 0;
5126 }
5127
5128 /* Put the various virtual registers into REGNO_REG_RTX. */
5129
5130 void
init_virtual_regs(struct emit_status * es)5131 init_virtual_regs (struct emit_status *es)
5132 {
5133 rtx *ptr = es->x_regno_reg_rtx;
5134 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5135 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5136 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5137 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5138 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5139 }
5140
5141
5142 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5143 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5144 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5145 static int copy_insn_n_scratches;
5146
5147 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5148 copied an ASM_OPERANDS.
5149 In that case, it is the original input-operand vector. */
5150 static rtvec orig_asm_operands_vector;
5151
5152 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5153 copied an ASM_OPERANDS.
5154 In that case, it is the copied input-operand vector. */
5155 static rtvec copy_asm_operands_vector;
5156
5157 /* Likewise for the constraints vector. */
5158 static rtvec orig_asm_constraints_vector;
5159 static rtvec copy_asm_constraints_vector;
5160
5161 /* Recursively create a new copy of an rtx for copy_insn.
5162 This function differs from copy_rtx in that it handles SCRATCHes and
5163 ASM_OPERANDs properly.
5164 Normally, this function is not used directly; use copy_insn as front end.
5165 However, you could first copy an insn pattern with copy_insn and then use
5166 this function afterwards to properly copy any REG_NOTEs containing
5167 SCRATCHes. */
5168
5169 rtx
copy_insn_1(rtx orig)5170 copy_insn_1 (rtx orig)
5171 {
5172 rtx copy;
5173 int i, j;
5174 RTX_CODE code;
5175 const char *format_ptr;
5176
5177 code = GET_CODE (orig);
5178
5179 switch (code)
5180 {
5181 case REG:
5182 case QUEUED:
5183 case CONST_INT:
5184 case CONST_DOUBLE:
5185 case CONST_VECTOR:
5186 case SYMBOL_REF:
5187 case CODE_LABEL:
5188 case PC:
5189 case CC0:
5190 case ADDRESSOF:
5191 return orig;
5192
5193 case SCRATCH:
5194 for (i = 0; i < copy_insn_n_scratches; i++)
5195 if (copy_insn_scratch_in[i] == orig)
5196 return copy_insn_scratch_out[i];
5197 break;
5198
5199 case CONST:
5200 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5201 a LABEL_REF, it isn't sharable. */
5202 if (GET_CODE (XEXP (orig, 0)) == PLUS
5203 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5204 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5205 return orig;
5206 break;
5207
5208 /* A MEM with a constant address is not sharable. The problem is that
5209 the constant address may need to be reloaded. If the mem is shared,
5210 then reloading one copy of this mem will cause all copies to appear
5211 to have been reloaded. */
5212
5213 default:
5214 break;
5215 }
5216
5217 copy = rtx_alloc (code);
5218
5219 /* Copy the various flags, and other information. We assume that
5220 all fields need copying, and then clear the fields that should
5221 not be copied. That is the sensible default behavior, and forces
5222 us to explicitly document why we are *not* copying a flag. */
5223 memcpy (copy, orig, RTX_HDR_SIZE);
5224
5225 /* We do not copy the USED flag, which is used as a mark bit during
5226 walks over the RTL. */
5227 RTX_FLAG (copy, used) = 0;
5228
5229 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5230 if (GET_RTX_CLASS (code) == 'i')
5231 {
5232 RTX_FLAG (copy, jump) = 0;
5233 RTX_FLAG (copy, call) = 0;
5234 RTX_FLAG (copy, frame_related) = 0;
5235 }
5236
5237 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5238
5239 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5240 {
5241 copy->u.fld[i] = orig->u.fld[i];
5242 switch (*format_ptr++)
5243 {
5244 case 'e':
5245 if (XEXP (orig, i) != NULL)
5246 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5247 break;
5248
5249 case 'E':
5250 case 'V':
5251 if (XVEC (orig, i) == orig_asm_constraints_vector)
5252 XVEC (copy, i) = copy_asm_constraints_vector;
5253 else if (XVEC (orig, i) == orig_asm_operands_vector)
5254 XVEC (copy, i) = copy_asm_operands_vector;
5255 else if (XVEC (orig, i) != NULL)
5256 {
5257 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5258 for (j = 0; j < XVECLEN (copy, i); j++)
5259 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5260 }
5261 break;
5262
5263 case 't':
5264 case 'w':
5265 case 'i':
5266 case 's':
5267 case 'S':
5268 case 'u':
5269 case '0':
5270 /* These are left unchanged. */
5271 break;
5272
5273 default:
5274 abort ();
5275 }
5276 }
5277
5278 if (code == SCRATCH)
5279 {
5280 i = copy_insn_n_scratches++;
5281 if (i >= MAX_RECOG_OPERANDS)
5282 abort ();
5283 copy_insn_scratch_in[i] = orig;
5284 copy_insn_scratch_out[i] = copy;
5285 }
5286 else if (code == ASM_OPERANDS)
5287 {
5288 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5289 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5290 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5291 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5292 }
5293
5294 return copy;
5295 }
5296
5297 /* Create a new copy of an rtx.
5298 This function differs from copy_rtx in that it handles SCRATCHes and
5299 ASM_OPERANDs properly.
5300 INSN doesn't really have to be a full INSN; it could be just the
5301 pattern. */
5302 rtx
copy_insn(rtx insn)5303 copy_insn (rtx insn)
5304 {
5305 copy_insn_n_scratches = 0;
5306 orig_asm_operands_vector = 0;
5307 orig_asm_constraints_vector = 0;
5308 copy_asm_operands_vector = 0;
5309 copy_asm_constraints_vector = 0;
5310 return copy_insn_1 (insn);
5311 }
5312
5313 /* Initialize data structures and variables in this file
5314 before generating rtl for each function. */
5315
5316 void
init_emit(void)5317 init_emit (void)
5318 {
5319 struct function *f = cfun;
5320
5321 f->emit = ggc_alloc (sizeof (struct emit_status));
5322 first_insn = NULL;
5323 last_insn = NULL;
5324 seq_rtl_expr = NULL;
5325 cur_insn_uid = 1;
5326 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5327 last_location.line = 0;
5328 last_location.file = 0;
5329 first_label_num = label_num;
5330 last_label_num = 0;
5331 seq_stack = NULL;
5332
5333 /* Init the tables that describe all the pseudo regs. */
5334
5335 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5336
5337 f->emit->regno_pointer_align
5338 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5339 * sizeof (unsigned char));
5340
5341 regno_reg_rtx
5342 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5343
5344 /* Put copies of all the hard registers into regno_reg_rtx. */
5345 memcpy (regno_reg_rtx,
5346 static_regno_reg_rtx,
5347 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5348
5349 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5350 init_virtual_regs (f->emit);
5351
5352 /* Indicate that the virtual registers and stack locations are
5353 all pointers. */
5354 REG_POINTER (stack_pointer_rtx) = 1;
5355 REG_POINTER (frame_pointer_rtx) = 1;
5356 REG_POINTER (hard_frame_pointer_rtx) = 1;
5357 REG_POINTER (arg_pointer_rtx) = 1;
5358
5359 REG_POINTER (virtual_incoming_args_rtx) = 1;
5360 REG_POINTER (virtual_stack_vars_rtx) = 1;
5361 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5362 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5363 REG_POINTER (virtual_cfa_rtx) = 1;
5364
5365 #ifdef STACK_BOUNDARY
5366 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5367 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5368 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5369 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5370
5371 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5372 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5373 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5374 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5375 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5376 #endif
5377
5378 #ifdef INIT_EXPANDERS
5379 INIT_EXPANDERS;
5380 #endif
5381 }
5382
5383 /* Generate the constant 0. */
5384
5385 static rtx
gen_const_vector_0(enum machine_mode mode)5386 gen_const_vector_0 (enum machine_mode mode)
5387 {
5388 rtx tem;
5389 rtvec v;
5390 int units, i;
5391 enum machine_mode inner;
5392
5393 units = GET_MODE_NUNITS (mode);
5394 inner = GET_MODE_INNER (mode);
5395
5396 v = rtvec_alloc (units);
5397
5398 /* We need to call this function after we to set CONST0_RTX first. */
5399 if (!CONST0_RTX (inner))
5400 abort ();
5401
5402 for (i = 0; i < units; ++i)
5403 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5404
5405 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5406 return tem;
5407 }
5408
5409 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5410 all elements are zero. */
5411 rtx
gen_rtx_CONST_VECTOR(enum machine_mode mode,rtvec v)5412 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5413 {
5414 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5415 int i;
5416
5417 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5418 if (RTVEC_ELT (v, i) != inner_zero)
5419 return gen_rtx_raw_CONST_VECTOR (mode, v);
5420 return CONST0_RTX (mode);
5421 }
5422
5423 /* Create some permanent unique rtl objects shared between all functions.
5424 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5425
5426 void
init_emit_once(int line_numbers)5427 init_emit_once (int line_numbers)
5428 {
5429 int i;
5430 enum machine_mode mode;
5431 enum machine_mode double_mode;
5432
5433 /* We need reg_raw_mode, so initialize the modes now. */
5434 init_reg_modes_once ();
5435
5436 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5437 tables. */
5438 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5439 const_int_htab_eq, NULL);
5440
5441 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5442 const_double_htab_eq, NULL);
5443
5444 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5445 mem_attrs_htab_eq, NULL);
5446 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5447 reg_attrs_htab_eq, NULL);
5448
5449 no_line_numbers = ! line_numbers;
5450
5451 /* Compute the word and byte modes. */
5452
5453 byte_mode = VOIDmode;
5454 word_mode = VOIDmode;
5455 double_mode = VOIDmode;
5456
5457 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5458 mode = GET_MODE_WIDER_MODE (mode))
5459 {
5460 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5461 && byte_mode == VOIDmode)
5462 byte_mode = mode;
5463
5464 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5465 && word_mode == VOIDmode)
5466 word_mode = mode;
5467 }
5468
5469 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5470 mode = GET_MODE_WIDER_MODE (mode))
5471 {
5472 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5473 && double_mode == VOIDmode)
5474 double_mode = mode;
5475 }
5476
5477 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5478
5479 /* Assign register numbers to the globally defined register rtx.
5480 This must be done at runtime because the register number field
5481 is in a union and some compilers can't initialize unions. */
5482
5483 pc_rtx = gen_rtx (PC, VOIDmode);
5484 cc0_rtx = gen_rtx (CC0, VOIDmode);
5485 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5486 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5487 if (hard_frame_pointer_rtx == 0)
5488 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5489 HARD_FRAME_POINTER_REGNUM);
5490 if (arg_pointer_rtx == 0)
5491 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5492 virtual_incoming_args_rtx =
5493 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5494 virtual_stack_vars_rtx =
5495 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5496 virtual_stack_dynamic_rtx =
5497 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5498 virtual_outgoing_args_rtx =
5499 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5500 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5501
5502 /* Initialize RTL for commonly used hard registers. These are
5503 copied into regno_reg_rtx as we begin to compile each function. */
5504 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5505 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5506
5507 #ifdef INIT_EXPANDERS
5508 /* This is to initialize {init|mark|free}_machine_status before the first
5509 call to push_function_context_to. This is needed by the Chill front
5510 end which calls push_function_context_to before the first call to
5511 init_function_start. */
5512 INIT_EXPANDERS;
5513 #endif
5514
5515 /* Create the unique rtx's for certain rtx codes and operand values. */
5516
5517 /* Don't use gen_rtx here since gen_rtx in this case
5518 tries to use these variables. */
5519 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5520 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5521 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5522
5523 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5524 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5525 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5526 else
5527 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5528
5529 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5530 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5531 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5532 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5533 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5534 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5535 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5536
5537 dconsthalf = dconst1;
5538 dconsthalf.exp--;
5539
5540 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5541
5542 /* Initialize mathematical constants for constant folding builtins.
5543 These constants need to be given to at least 160 bits precision. */
5544 real_from_string (&dconstpi,
5545 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5546 real_from_string (&dconste,
5547 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5548
5549 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5550 {
5551 REAL_VALUE_TYPE *r =
5552 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5553
5554 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5555 mode = GET_MODE_WIDER_MODE (mode))
5556 const_tiny_rtx[i][(int) mode] =
5557 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5558
5559 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5560
5561 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5562 mode = GET_MODE_WIDER_MODE (mode))
5563 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5564
5565 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5566 mode != VOIDmode;
5567 mode = GET_MODE_WIDER_MODE (mode))
5568 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5569 }
5570
5571 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5572 mode != VOIDmode;
5573 mode = GET_MODE_WIDER_MODE (mode))
5574 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5575
5576 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5577 mode != VOIDmode;
5578 mode = GET_MODE_WIDER_MODE (mode))
5579 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5580
5581 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5582 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5583 const_tiny_rtx[0][i] = const0_rtx;
5584
5585 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5586 if (STORE_FLAG_VALUE == 1)
5587 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5588
5589 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5590 return_address_pointer_rtx
5591 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5592 #endif
5593
5594 #ifdef STATIC_CHAIN_REGNUM
5595 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5596
5597 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5598 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5599 static_chain_incoming_rtx
5600 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5601 else
5602 #endif
5603 static_chain_incoming_rtx = static_chain_rtx;
5604 #endif
5605
5606 #ifdef STATIC_CHAIN
5607 static_chain_rtx = STATIC_CHAIN;
5608
5609 #ifdef STATIC_CHAIN_INCOMING
5610 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5611 #else
5612 static_chain_incoming_rtx = static_chain_rtx;
5613 #endif
5614 #endif
5615
5616 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5617 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5618 }
5619
5620 /* Query and clear/ restore no_line_numbers. This is used by the
5621 switch / case handling in stmt.c to give proper line numbers in
5622 warnings about unreachable code. */
5623
5624 int
force_line_numbers(void)5625 force_line_numbers (void)
5626 {
5627 int old = no_line_numbers;
5628
5629 no_line_numbers = 0;
5630 if (old)
5631 force_next_line_note ();
5632 return old;
5633 }
5634
5635 void
restore_line_number_status(int old_value)5636 restore_line_number_status (int old_value)
5637 {
5638 no_line_numbers = old_value;
5639 }
5640
5641 /* Produce exact duplicate of insn INSN after AFTER.
5642 Care updating of libcall regions if present. */
5643
5644 rtx
emit_copy_of_insn_after(rtx insn,rtx after)5645 emit_copy_of_insn_after (rtx insn, rtx after)
5646 {
5647 rtx new;
5648 rtx note1, note2, link;
5649
5650 switch (GET_CODE (insn))
5651 {
5652 case INSN:
5653 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5654 break;
5655
5656 case JUMP_INSN:
5657 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5658 break;
5659
5660 case CALL_INSN:
5661 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5662 if (CALL_INSN_FUNCTION_USAGE (insn))
5663 CALL_INSN_FUNCTION_USAGE (new)
5664 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5665 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5666 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5667 break;
5668
5669 default:
5670 abort ();
5671 }
5672
5673 /* Update LABEL_NUSES. */
5674 mark_jump_label (PATTERN (new), new, 0);
5675
5676 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5677
5678 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5679 make them. */
5680 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5681 if (REG_NOTE_KIND (link) != REG_LABEL)
5682 {
5683 if (GET_CODE (link) == EXPR_LIST)
5684 REG_NOTES (new)
5685 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5686 XEXP (link, 0),
5687 REG_NOTES (new)));
5688 else
5689 REG_NOTES (new)
5690 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5691 XEXP (link, 0),
5692 REG_NOTES (new)));
5693 }
5694
5695 /* Fix the libcall sequences. */
5696 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5697 {
5698 rtx p = new;
5699 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5700 p = PREV_INSN (p);
5701 XEXP (note1, 0) = p;
5702 XEXP (note2, 0) = new;
5703 }
5704 INSN_CODE (new) = INSN_CODE (insn);
5705 return new;
5706 }
5707
5708 #include "gt-emit-rtl.h"
5709