1/* We want to pretend we're in SHmedia mode, even when assembling for
2   SHcompact.  */
3#if __SH5__ == 32 && ! __SHMEDIA__
4# undef __SHMEDIA__
5# define __SHMEDIA__ 1
6#endif
7
8#if __SHMEDIA__
9	.mode	SHmedia
10#endif
11
12#include "asm.h"
13
14ENTRY(setjmp)
15#if __SH5__
16	ptabs	r18, tr0
17	gettr	tr5, r5
18	gettr	tr6, r6
19	gettr	tr7, r7
20	st.q	r2,  0*8, r18
21	st.q	r2,  1*8, r10
22	st.q	r2,  2*8, r11
23	st.q	r2,  3*8, r12
24	st.q	r2,  4*8, r13
25	st.q	r2,  5*8, r14
26	st.q	r2,  6*8, r15
27	st.q	r2,  7*8, r28
28	st.q	r2,  8*8, r29
29	st.q	r2,  9*8, r30
30	st.q	r2, 10*8, r31
31	st.q	r2, 11*8, r32
32	st.q	r2, 12*8, r33
33	st.q	r2, 13*8, r34
34	st.q	r2, 14*8, r35
35	st.q	r2, 15*8, r44
36	st.q	r2, 16*8, r45
37	st.q	r2, 17*8, r46
38	st.q	r2, 18*8, r47
39	st.q	r2, 19*8, r48
40	st.q	r2, 20*8, r49
41	st.q	r2, 21*8, r50
42	st.q	r2, 22*8, r51
43	st.q	r2, 23*8, r52
44	st.q	r2, 24*8, r53
45	st.q	r2, 25*8, r54
46	st.q	r2, 26*8, r55
47	st.q	r2, 27*8, r56
48	st.q	r2, 28*8, r57
49	st.q	r2, 29*8, r58
50	st.q	r2, 30*8, r59
51	st.q	r2, 31*8, r5
52	st.q	r2, 32*8, r6
53	st.q	r2, 33*8, r7
54#if ! __SH4_NOFPU__
55	fst.d	r2, 34*8, dr12
56	fst.d	r2, 35*8, dr14
57	fst.d	r2, 36*8, dr36
58	fst.d	r2, 37*8, dr38
59	fst.d	r2, 38*8, dr40
60	fst.d	r2, 39*8, dr42
61	fst.d	r2, 40*8, dr44
62	fst.d	r2, 41*8, dr46
63	fst.d	r2, 42*8, dr48
64	fst.d	r2, 43*8, dr50
65	fst.d	r2, 44*8, dr52
66	fst.d	r2, 45*8, dr54
67	fst.d	r2, 46*8, dr56
68	fst.d	r2, 47*8, dr58
69	fst.d	r2, 48*8, dr60
70	fst.d	r2, 49*8, dr62
71#endif
72	movi	0, r2
73	blink	tr0, r63
74#else
75#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
76	add	#(13*4),r4
77#else
78	add	#(9*4),r4
79#endif
80
81	sts.l	pr,@-r4
82
83#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
84	fmov.s	fr15,@-r4	! call saved floating point registers
85	fmov.s	fr14,@-r4
86	fmov.s	fr13,@-r4
87	fmov.s	fr12,@-r4
88#endif
89
90	mov.l	r15,@-r4	! call saved integer registers
91	mov.l	r14,@-r4
92	mov.l	r13,@-r4
93	mov.l	r12,@-r4
94
95	mov.l	r11,@-r4
96	mov.l	r10,@-r4
97	mov.l	r9,@-r4
98	mov.l	r8,@-r4
99
100	rts
101	mov    #0,r0
102#endif /* __SH5__ */
103
104ENTRY(longjmp)
105#if __SH5__
106	ld.q	r2,  0*8, r18
107	ptabs	r18, tr0
108	ld.q	r2,  1*8, r10
109	ld.q	r2,  2*8, r11
110	ld.q	r2,  3*8, r12
111	ld.q	r2,  4*8, r13
112	ld.q	r2,  5*8, r14
113	ld.q	r2,  6*8, r15
114	ld.q	r2,  7*8, r28
115	ld.q	r2,  8*8, r29
116	ld.q	r2,  9*8, r30
117	ld.q	r2, 10*8, r31
118	ld.q	r2, 11*8, r32
119	ld.q	r2, 12*8, r33
120	ld.q	r2, 13*8, r34
121	ld.q	r2, 14*8, r35
122	ld.q	r2, 15*8, r44
123	ld.q	r2, 16*8, r45
124	ld.q	r2, 17*8, r46
125	ld.q	r2, 18*8, r47
126	ld.q	r2, 19*8, r48
127	ld.q	r2, 20*8, r49
128	ld.q	r2, 21*8, r50
129	ld.q	r2, 22*8, r51
130	ld.q	r2, 23*8, r52
131	ld.q	r2, 24*8, r53
132	ld.q	r2, 25*8, r54
133	ld.q	r2, 26*8, r55
134	ld.q	r2, 27*8, r56
135	ld.q	r2, 28*8, r57
136	ld.q	r2, 29*8, r58
137	ld.q	r2, 30*8, r59
138	ld.q	r2, 31*8, r5
139	ld.q	r2, 32*8, r6
140	ld.q	r2, 33*8, r7
141	ptabs	r5, tr5
142	ptabs	r6, tr6
143	ptabs	r7, tr7
144#if ! __SH4_NOFPU__
145	fld.d	r2, 34*8, dr12
146	fld.d	r2, 35*8, dr14
147	fld.d	r2, 36*8, dr36
148	fld.d	r2, 37*8, dr38
149	fld.d	r2, 38*8, dr40
150	fld.d	r2, 39*8, dr42
151	fld.d	r2, 40*8, dr44
152	fld.d	r2, 41*8, dr46
153	fld.d	r2, 42*8, dr48
154	fld.d	r2, 43*8, dr50
155	fld.d	r2, 44*8, dr52
156	fld.d	r2, 45*8, dr54
157	fld.d	r2, 46*8, dr56
158	fld.d	r2, 47*8, dr58
159	fld.d	r2, 48*8, dr60
160	fld.d	r2, 49*8, dr62
161#endif
162	movi	1, r2
163	cmvne	r3, r3, r2
164	blink	tr0, r63
165#else
166	mov.l	@r4+,r8
167	mov.l	@r4+,r9
168	mov.l	@r4+,r10
169	mov.l	@r4+,r11
170
171	mov.l	@r4+,r12
172	mov.l	@r4+,r13
173	mov.l	@r4+,r14
174	mov.l	@r4+,r15
175
176#if defined (__SH2E__) || defined (__SH3E__) || defined(__SH4_SINGLE__) || defined(__SH4__) || defined(__SH4_SINGLE_ONLY__)
177	fmov.s	@r4+,fr12	! call saved floating point registers
178	fmov.s	@r4+,fr13
179	fmov.s	@r4+,fr14
180	fmov.s	@r4+,fr15
181#endif
182
183	lds.l	@r4+,pr
184
185	mov	r5,r0
186	tst	r0,r0
187	bf	retr4
188	movt	r0
189retr4:	rts
190	nop
191#endif /* __SH5__ */
192