1# frv testcase for commitfa
2# mach: frv
3
4	.include "testutils.inc"
5
6	start
7
8	.global commitfa
9commitfa:
10	and_spr_immed	-4081,tbr		; clear tbr.tt
11	set_gr_spr	tbr,gr17
12	inc_gr_immed	0x190,gr17		; address of exception handler
13	set_bctrlr_0_0  gr17
14	set_spr_immed	128,lcr
15	set_psr_et	1
16	set_gr_immed	0,gr15
17
18	nldfi		@(sp,0),fr20	; Activate fr20 with nesr.fr==1
19	nldi		@(sp,0),gr20	; Activate gr20 with nesr.fr==0
20	nldfi		@(sp,0),fr52	; Activate fr52 with nesr.fr==1
21	set_spr_immed	0x00000000,fner1
22	set_spr_immed	0x00000000,fner0
23	set_spr_addr	bad,lr
24	commitfa			; should be nop
25	test_spr_immed	0x00000000,fner1
26	test_spr_immed	0x00000000,fner0
27	test_spr_immed	0xd4800001,nesr0
28	test_spr_gr	neear0,sp
29	test_spr_immed	0x94800401,nesr1
30	test_spr_gr	neear1,sp
31	test_spr_immed	0xf4800801,nesr2
32	test_spr_gr	neear2,sp
33
34	or_spr_immed	0x00100000,fner1
35	or_spr_immed	0x00200000,fner1
36	or_spr_immed	0x00100000,fner0
37	set_spr_addr	ok,lr
38	set_gr_addr	com1,gr16
39com1:	commitfa
40	test_gr_immed	1,gr15
41
42	pass
43
44ok:	test_spr_immed	0x1,esfr1		; esr0 is active
45	test_spr_gr	epcr0,gr16
46	test_spr_bits	0x0001,0,0x1,esr0	; esr0 is valid
47	test_spr_bits	0x003e,1,0x14,esr0	; esr0.ec is set
48	test_spr_bits	0x0800,11,0x0,esr0	; esr0.eav is clear
49	test_spr_bits	0x01000,12,0x0,esr0	; esr0.edv is clear
50	test_spr_immed	0x00000000,fner1
51	test_spr_immed	0x00000000,fner0
52	test_spr_immed	0,nesr0
53	test_spr_immed	0,neear0
54	test_spr_immed	0x94800401,nesr1
55	test_spr_gr	neear1,sp
56	test_spr_immed	0,nesr2
57	test_spr_immed	0,neear2
58	inc_gr_immed	1,gr15
59	rett		0
60
61bad:	fail
62