1# frv testcase for ftge $FCCi_2,$GRi,$GRj
2# mach: all
3
4	.include "testutils.inc"
5
6	start
7
8	.global ftge
9ftge:
10	and_spr_immed	-4081,tbr		; clear tbr.tt
11	set_gr_spr	tbr,gr7
12	inc_gr_immed	2112,gr7		; address of exception handler
13	set_bctrlr_0_0	gr7	; bctrlr 0,0
14
15	set_spr_immed	128,lcr
16	set_gr_immed	0,gr7
17	set_gr_immed	4,gr8
18
19	set_spr_addr	bad,lr
20	set_fcc		0x0 0
21	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
22
23	set_spr_addr	bad,lr
24	set_fcc		0x1 0
25	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
26
27	set_psr_et	1
28	set_spr_addr	ok2,lr
29	set_fcc		0x2 0
30	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
31	fail
32ok2:
33	set_psr_et	1
34	set_spr_addr	ok3,lr
35	set_fcc		0x3 0
36	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
37	fail
38ok3:
39	set_spr_addr	bad,lr
40	set_fcc		0x4 0
41	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
42
43	set_spr_addr	bad,lr
44	set_fcc		0x5 0
45	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
46
47	set_psr_et	1
48	set_spr_addr	ok6,lr
49	set_fcc		0x6 0
50	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
51	fail
52ok6:
53	set_psr_et	1
54	set_spr_addr	ok7,lr
55	set_fcc		0x7 0
56	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
57	fail
58ok7:
59	set_psr_et	1
60	set_spr_addr	ok8,lr
61	set_fcc		0x8 0
62	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
63	fail
64ok8:
65	set_psr_et	1
66	set_spr_addr	ok9,lr
67	set_fcc		0x9 0
68	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
69	fail
70ok9:
71	set_psr_et	1
72	set_spr_addr	oka,lr
73	set_fcc		0xa 0
74	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
75	fail
76oka:
77	set_psr_et	1
78	set_spr_addr	okb,lr
79	set_fcc		0xb 0
80	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
81	fail
82okb:
83	set_psr_et	1
84	set_spr_addr	okc,lr
85	set_fcc		0xc 0
86	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
87	fail
88okc:
89	set_psr_et	1
90	set_spr_addr	okd,lr
91	set_fcc		0xd 0
92	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
93	fail
94okd:
95	set_psr_et	1
96	set_spr_addr	oke,lr
97	set_fcc		0xe 0
98	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
99	fail
100oke:
101	set_psr_et	1
102	set_spr_addr	okf,lr
103	set_fcc		0xf 0
104	ftge 		fcc0,gr7,gr8	; should branch to tbr + (128 + 4)*16
105	fail
106okf:
107	pass
108bad:
109	fail
110