1# frv testcase for nfdivs $FRi,$FRj,$FRk 2# mach: fr500 fr550 frv 3 4 .include "testutils.inc" 5 6 float_constants 7 start 8 load_float_constants 9 10 .global nfdivs 11nfdivs: 12 nfdivs fr0,fr28,fr1 13 test_fr_fr fr1,fr0 14 test_spr_immed 0,fner1 15 test_spr_immed 0,fner0 16 nfdivs fr4,fr28,fr1 17 test_fr_fr fr1,fr4 18 test_spr_immed 0,fner1 19 test_spr_immed 0,fner0 20 nfdivs fr8,fr28,fr1 21 test_fr_fr fr1,fr8 22 test_spr_immed 0,fner1 23 test_spr_immed 0,fner0 24 nfdivs fr12,fr28,fr1 25 test_fr_fr fr1,fr12 26 test_spr_immed 0,fner1 27 test_spr_immed 0,fner0 28 nfdivs fr16,fr28,fr1 29 test_fr_fr fr1,fr16 30 test_fr_fr fr1,fr20 31 test_spr_immed 0,fner1 32 test_spr_immed 0,fner0 33 nfdivs fr20,fr28,fr1 34 test_fr_fr fr1,fr16 35 test_fr_fr fr1,fr20 36 test_spr_immed 0,fner1 37 test_spr_immed 0,fner0 38 nfdivs fr24,fr28,fr1 39 test_fr_fr fr1,fr24 40 test_spr_immed 0,fner1 41 test_spr_immed 0,fner0 42 nfdivs fr28,fr28,fr1 43 test_fr_fr fr1,fr28 44 test_spr_immed 0,fner1 45 test_spr_immed 0,fner0 46 nfdivs fr32,fr28,fr1 47 test_fr_fr fr1,fr32 48 test_spr_immed 0,fner1 49 test_spr_immed 0,fner0 50 nfdivs fr36,fr28,fr1 51 test_fr_fr fr1,fr36 52 test_spr_immed 0,fner1 53 test_spr_immed 0,fner0 54 nfdivs fr40,fr28,fr1 55 test_fr_fr fr1,fr40 56 test_spr_immed 0,fner1 57 test_spr_immed 0,fner0 58 nfdivs fr44,fr28,fr1 59 test_fr_fr fr1,fr44 60 test_spr_immed 0,fner1 61 test_spr_immed 0,fner0 62 nfdivs fr48,fr28,fr1 63 test_fr_fr fr1,fr48 64 test_spr_immed 0,fner1 65 test_spr_immed 0,fner0 66 nfdivs fr52,fr28,fr1 67 test_fr_fr fr1,fr52 68 test_spr_immed 0,fner1 69 test_spr_immed 0,fner0 70 71 nfdivs fr16,fr0,fr1 72 test_fr_fr fr1,fr16 73 test_fr_fr fr1,fr20 74 test_spr_immed 0,fner1 75 test_spr_immed 0,fner0 76 nfdivs fr16,fr4,fr1 77 test_fr_fr fr1,fr16 78 test_fr_fr fr1,fr20 79 test_spr_immed 0,fner1 80 test_spr_immed 0,fner0 81 nfdivs fr16,fr8,fr1 82 test_fr_fr fr1,fr16 83 test_fr_fr fr1,fr20 84 test_spr_immed 0,fner1 85 test_spr_immed 0,fner0 86 nfdivs fr16,fr12,fr1 87 test_fr_fr fr1,fr16 88 test_fr_fr fr1,fr20 89 test_spr_immed 0,fner1 90 test_spr_immed 0,fner0 91 nfdivs fr16,fr24,fr1 92 test_fr_fr fr1,fr16 93 test_fr_fr fr1,fr20 94 test_spr_immed 0,fner1 95 test_spr_immed 0,fner0 96 nfdivs fr16,fr28,fr1 97 test_fr_fr fr1,fr16 98 test_fr_fr fr1,fr20 99 test_spr_immed 0,fner1 100 test_spr_immed 0,fner0 101 nfdivs fr16,fr32,fr1 102 test_fr_fr fr1,fr16 103 test_fr_fr fr1,fr20 104 test_spr_immed 0,fner1 105 test_spr_immed 0,fner0 106 nfdivs fr16,fr36,fr1 107 test_fr_fr fr1,fr16 108 test_fr_fr fr1,fr20 109 test_spr_immed 0,fner1 110 test_spr_immed 0,fner0 111 nfdivs fr16,fr40,fr1 112 test_fr_fr fr1,fr16 113 test_fr_fr fr1,fr20 114 test_spr_immed 0,fner1 115 test_spr_immed 0,fner0 116 nfdivs fr16,fr44,fr1 117 test_fr_fr fr1,fr16 118 test_fr_fr fr1,fr20 119 test_spr_immed 0,fner1 120 test_spr_immed 0,fner0 121 nfdivs fr16,fr48,fr1 122 test_fr_fr fr1,fr16 123 test_fr_fr fr1,fr20 124 test_spr_immed 0,fner1 125 test_spr_immed 0,fner0 126 nfdivs fr16,fr52,fr1 127 test_fr_fr fr1,fr16 128 test_fr_fr fr1,fr20 129 test_spr_immed 0,fner1 130 test_spr_immed 0,fner0 131 132 nfdivs fr20,fr0,fr1 133 test_fr_fr fr1,fr16 134 test_fr_fr fr1,fr20 135 test_spr_immed 0,fner1 136 test_spr_immed 0,fner0 137 nfdivs fr20,fr4,fr1 138 test_fr_fr fr1,fr16 139 test_fr_fr fr1,fr20 140 test_spr_immed 0,fner1 141 test_spr_immed 0,fner0 142 nfdivs fr20,fr8,fr1 143 test_fr_fr fr1,fr16 144 test_fr_fr fr1,fr20 145 test_spr_immed 0,fner1 146 test_spr_immed 0,fner0 147 nfdivs fr20,fr12,fr1 148 test_fr_fr fr1,fr16 149 test_fr_fr fr1,fr20 150 test_spr_immed 0,fner1 151 test_spr_immed 0,fner0 152 nfdivs fr20,fr24,fr1 153 test_fr_fr fr1,fr16 154 test_fr_fr fr1,fr20 155 test_spr_immed 0,fner1 156 test_spr_immed 0,fner0 157 nfdivs fr20,fr28,fr1 158 test_fr_fr fr1,fr16 159 test_fr_fr fr1,fr20 160 test_spr_immed 0,fner1 161 test_spr_immed 0,fner0 162 nfdivs fr20,fr32,fr1 163 test_fr_fr fr1,fr16 164 test_fr_fr fr1,fr20 165 test_spr_immed 0,fner1 166 test_spr_immed 0,fner0 167 nfdivs fr20,fr36,fr1 168 test_fr_fr fr1,fr16 169 test_fr_fr fr1,fr20 170 test_spr_immed 0,fner1 171 test_spr_immed 0,fner0 172 nfdivs fr20,fr40,fr1 173 test_fr_fr fr1,fr16 174 test_fr_fr fr1,fr20 175 test_spr_immed 0,fner1 176 test_spr_immed 0,fner0 177 nfdivs fr20,fr44,fr1 178 test_fr_fr fr1,fr16 179 test_fr_fr fr1,fr20 180 test_spr_immed 0,fner1 181 test_spr_immed 0,fner0 182 nfdivs fr20,fr48,fr1 183 test_fr_fr fr1,fr16 184 test_fr_fr fr1,fr20 185 test_spr_immed 0,fner1 186 test_spr_immed 0,fner0 187 nfdivs fr20,fr52,fr1 188 test_fr_fr fr1,fr16 189 test_fr_fr fr1,fr20 190 test_spr_immed 0,fner1 191 test_spr_immed 0,fner0 192 193 nfdivs fr8,fr28,fr1 194 test_fr_fr fr1,fr8 195 test_spr_immed 0,fner1 196 test_spr_immed 0,fner0 197 nfdivs fr28,fr8,fr1 198 test_fr_fr fr1,fr8 199 test_spr_immed 0,fner1 200 test_spr_immed 0,fner0 201 202 nfdivs fr40,fr32,fr1 203 test_fr_fr fr1,fr36 204 test_spr_immed 0,fner1 205 test_spr_immed 0,fner0 206 207 ; try to cause exceptions 208 set_spr_immed 0,fner0 209 set_spr_immed 0,fner1 210 nfdivs fr48,fr20,fr1 211; test_fr_fr fr1,fr44 212 test_spr_immed 2,fner1 213 test_spr_immed 0,fner0 214 215 set_spr_immed 0,fner0 216 set_spr_immed 0,fner1 217 nfdivs fr52,fr16,fr1 218; test_fr_fr fr1,fr44 219 test_spr_immed 0,fner1 220 test_spr_immed 0,fner0 221 222 nfdivs fr56,fr28,fr1 223; test_fr_fr fr1,fr44 224 test_spr_immed 0,fner1 225 test_spr_immed 0,fner0 226 227 nfdivs fr60,fr28,fr1 228; test_fr_fr fr1,fr44 229 test_spr_immed 2,fner1 230 test_spr_immed 0,fner0 231 232 pass 233 234 235