1 ///////////////////////////////////////////////////////////////////////// 2 // $Id: instrument.h 14110 2021-01-31 05:41:43Z sshwarts $ 3 ///////////////////////////////////////////////////////////////////////// 4 // 5 // Copyright (c) 2006-2015 Stanislav Shwartsman 6 // Written by Stanislav Shwartsman [sshwarts at sourceforge net] 7 // 8 // This library is free software; you can redistribute it and/or 9 // modify it under the terms of the GNU Lesser General Public 10 // License as published by the Free Software Foundation; either 11 // version 2 of the License, or (at your option) any later version. 12 // 13 // This library is distributed in the hope that it will be useful, 14 // but WITHOUT ANY WARRANTY; without even the implied warranty of 15 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 // Lesser General Public License for more details. 17 // 18 // You should have received a copy of the GNU Lesser General Public 19 // License along with this library; if not, write to the Free Software 20 // Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 21 22 #if BX_INSTRUMENTATION 23 24 class bxInstruction_c; 25 26 // define if you want to store instruction opcode bytes in bxInstruction_c 27 //#define BX_INSTR_STORE_OPCODE_BYTES 28 29 void bx_instr_init_env(void); 30 void bx_instr_exit_env(void); 31 32 // called from the CPU core 33 34 void bx_instr_initialize(unsigned cpu); 35 void bx_instr_exit(unsigned cpu); 36 void bx_instr_reset(unsigned cpu, unsigned type); 37 void bx_instr_hlt(unsigned cpu); 38 void bx_instr_mwait(unsigned cpu, bx_phy_address addr, unsigned len, Bit32u flags); 39 40 void bx_instr_debug_promt(); 41 void bx_instr_debug_cmd(const char *cmd); 42 43 void bx_instr_cnear_branch_taken(unsigned cpu, bx_address branch_eip, bx_address new_eip); 44 void bx_instr_cnear_branch_not_taken(unsigned cpu, bx_address branch_eip); 45 void bx_instr_ucnear_branch(unsigned cpu, unsigned what, bx_address branch_eip, bx_address new_eip); 46 void bx_instr_far_branch(unsigned cpu, unsigned what, Bit16u prev_cs, bx_address prev_eip, Bit16u new_cs, bx_address new_eip); 47 48 void bx_instr_opcode(unsigned cpu, bxInstruction_c *i, const Bit8u *opcode, unsigned len, bool is32, bool is64); 49 50 void bx_instr_interrupt(unsigned cpu, unsigned vector); 51 void bx_instr_exception(unsigned cpu, unsigned vector, unsigned error_code); 52 void bx_instr_hwinterrupt(unsigned cpu, unsigned vector, Bit16u cs, bx_address eip); 53 54 void bx_instr_tlb_cntrl(unsigned cpu, unsigned what, bx_phy_address new_cr3); 55 void bx_instr_cache_cntrl(unsigned cpu, unsigned what); 56 void bx_instr_prefetch_hint(unsigned cpu, unsigned what, unsigned seg, bx_address offset); 57 void bx_instr_clflush(unsigned cpu, bx_address laddr, bx_phy_address paddr); 58 59 void bx_instr_before_execution(unsigned cpu, bxInstruction_c *i); 60 void bx_instr_after_execution(unsigned cpu, bxInstruction_c *i); 61 void bx_instr_repeat_iteration(unsigned cpu, bxInstruction_c *i); 62 63 void bx_instr_inp(Bit16u addr, unsigned len); 64 void bx_instr_inp2(Bit16u addr, unsigned len, unsigned val); 65 void bx_instr_outp(Bit16u addr, unsigned len, unsigned val); 66 67 void bx_instr_lin_access(unsigned cpu, bx_address lin, bx_address phy, unsigned len, unsigned memtype, unsigned rw); 68 void bx_instr_phy_access(unsigned cpu, bx_address phy, unsigned len, unsigned memtype, unsigned rw); 69 70 void bx_instr_wrmsr(unsigned cpu, unsigned addr, Bit64u value); 71 72 void bx_instr_vmexit(unsigned cpu, Bit32u reason, Bit64u qualification); 73 74 /* initialization/deinitialization of instrumentalization*/ 75 #define BX_INSTR_INIT_ENV() bx_instr_init_env() 76 #define BX_INSTR_EXIT_ENV() bx_instr_exit_env() 77 78 /* simulation init, shutdown, reset */ 79 #define BX_INSTR_INITIALIZE(cpu_id) bx_instr_initialize(cpu_id) 80 #define BX_INSTR_EXIT(cpu_id) bx_instr_exit(cpu_id) 81 #define BX_INSTR_RESET(cpu_id, type) bx_instr_reset(cpu_id, type) 82 #define BX_INSTR_HLT(cpu_id) bx_instr_hlt(cpu_id) 83 84 #define BX_INSTR_MWAIT(cpu_id, addr, len, flags) \ 85 bx_instr_mwait(cpu_id, addr, len, flags) 86 87 /* called from command line debugger */ 88 #define BX_INSTR_DEBUG_PROMPT() bx_instr_debug_promt() 89 #define BX_INSTR_DEBUG_CMD(cmd) bx_instr_debug_cmd(cmd) 90 91 /* branch resolution */ 92 #define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, branch_eip, new_eip) bx_instr_cnear_branch_taken(cpu_id, branch_eip, new_eip) 93 #define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id, branch_eip) bx_instr_cnear_branch_not_taken(cpu_id, branch_eip) 94 #define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, branch_eip, new_eip) bx_instr_ucnear_branch(cpu_id, what, branch_eip, new_eip) 95 #define BX_INSTR_FAR_BRANCH(cpu_id, what, prev_cs, prev_eip, new_cs, new_eip) \ 96 bx_instr_far_branch(cpu_id, what, prev_cs, prev_eip, new_cs, new_eip) 97 98 /* decoding completed */ 99 #define BX_INSTR_OPCODE(cpu_id, i, opcode, len, is32, is64) \ 100 bx_instr_opcode(cpu_id, i, opcode, len, is32, is64) 101 102 /* exceptional case and interrupt */ 103 #define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) \ 104 bx_instr_exception(cpu_id, vector, error_code) 105 106 #define BX_INSTR_INTERRUPT(cpu_id, vector) bx_instr_interrupt(cpu_id, vector) 107 #define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) bx_instr_hwinterrupt(cpu_id, vector, cs, eip) 108 109 /* TLB/CACHE control instruction executed */ 110 #define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) bx_instr_clflush(cpu_id, laddr, paddr) 111 #define BX_INSTR_CACHE_CNTRL(cpu_id, what) bx_instr_cache_cntrl(cpu_id, what) 112 #define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) bx_instr_tlb_cntrl(cpu_id, what, new_cr3) 113 #define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) \ 114 bx_instr_prefetch_hint(cpu_id, what, seg, offset) 115 116 /* execution */ 117 #define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) bx_instr_before_execution(cpu_id, i) 118 #define BX_INSTR_AFTER_EXECUTION(cpu_id, i) bx_instr_after_execution(cpu_id, i) 119 #define BX_INSTR_REPEAT_ITERATION(cpu_id, i) bx_instr_repeat_iteration(cpu_id, i) 120 121 /* linear memory access */ 122 #define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, memtype, rw) bx_instr_lin_access(cpu_id, lin, phy, len, memtype, rw) 123 124 /* physical memory access */ 125 #define BX_INSTR_PHY_ACCESS(cpu_id, phy, len, memtype, rw) bx_instr_phy_access(cpu_id, phy, len, memtype, rw) 126 127 /* feedback from device units */ 128 #define BX_INSTR_INP(addr, len) bx_instr_inp(addr, len) 129 #define BX_INSTR_INP2(addr, len, val) bx_instr_inp2(addr, len, val) 130 #define BX_INSTR_OUTP(addr, len, val) bx_instr_outp(addr, len, val) 131 132 /* wrmsr callback */ 133 #define BX_INSTR_WRMSR(cpu_id, addr, value) bx_instr_wrmsr(cpu_id, addr, value) 134 135 /* vmexit callback */ 136 #define BX_INSTR_VMEXIT(cpu_id, reason, qualification) bx_instr_vmexit(cpu_id, reason, qualification) 137 138 #else 139 140 /* initialization/deinitialization of instrumentalization */ 141 #define BX_INSTR_INIT_ENV() 142 #define BX_INSTR_EXIT_ENV() 143 144 /* simulation init, shutdown, reset */ 145 #define BX_INSTR_INITIALIZE(cpu_id) 146 #define BX_INSTR_EXIT(cpu_id) 147 #define BX_INSTR_RESET(cpu_id, type) 148 #define BX_INSTR_HLT(cpu_id) 149 #define BX_INSTR_MWAIT(cpu_id, addr, len, flags) 150 151 /* called from command line debugger */ 152 #define BX_INSTR_DEBUG_PROMPT() 153 #define BX_INSTR_DEBUG_CMD(cmd) 154 155 /* branch resolution */ 156 #define BX_INSTR_CNEAR_BRANCH_TAKEN(cpu_id, branch_eip, new_eip) 157 #define BX_INSTR_CNEAR_BRANCH_NOT_TAKEN(cpu_id, branch_eip) 158 #define BX_INSTR_UCNEAR_BRANCH(cpu_id, what, branch_eip, new_eip) 159 #define BX_INSTR_FAR_BRANCH(cpu_id, what, prev_cs, prev_eip, new_cs, new_eip) 160 161 /* decoding completed */ 162 #define BX_INSTR_OPCODE(cpu_id, i, opcode, len, is32, is64) 163 164 /* exceptional case and interrupt */ 165 #define BX_INSTR_EXCEPTION(cpu_id, vector, error_code) 166 #define BX_INSTR_INTERRUPT(cpu_id, vector) 167 #define BX_INSTR_HWINTERRUPT(cpu_id, vector, cs, eip) 168 169 /* TLB/CACHE control instruction executed */ 170 #define BX_INSTR_CLFLUSH(cpu_id, laddr, paddr) 171 #define BX_INSTR_CACHE_CNTRL(cpu_id, what) 172 #define BX_INSTR_TLB_CNTRL(cpu_id, what, new_cr3) 173 #define BX_INSTR_PREFETCH_HINT(cpu_id, what, seg, offset) 174 175 /* execution */ 176 #define BX_INSTR_BEFORE_EXECUTION(cpu_id, i) 177 #define BX_INSTR_AFTER_EXECUTION(cpu_id, i) 178 #define BX_INSTR_REPEAT_ITERATION(cpu_id, i) 179 180 /* linear memory access */ 181 #define BX_INSTR_LIN_ACCESS(cpu_id, lin, phy, len, memtype, rw) 182 183 /* physical memory access */ 184 #define BX_INSTR_PHY_ACCESS(cpu_id, phy, len, memtype, rw) 185 186 /* feedback from device units */ 187 #define BX_INSTR_INP(addr, len) 188 #define BX_INSTR_INP2(addr, len, val) 189 #define BX_INSTR_OUTP(addr, len, val) 190 191 /* wrmsr callback */ 192 #define BX_INSTR_WRMSR(cpu_id, addr, value) 193 194 /* vmexit callback */ 195 #define BX_INSTR_VMEXIT(cpu_id, reason, qualification) 196 197 #endif 198