1 // DGen
2
3 #ifndef __MD_H__
4 #define __MD_H__
5
6 #define VER VERSION
7
8 #include <stdint.h>
9
10 #ifdef WITH_STAR
11 #ifndef __STARCPU_H__
12 #include "star/starcpu.h"
13 #endif
14 #endif
15
16 #ifdef WITH_MUSA
17 #ifndef M68K__HEADER
18 extern "C"
19 {
20 #include "musa/m68k.h"
21 }
22 #endif
23 #endif
24
25 #ifdef WITH_CYCLONE
26 #include "cyclone/Cyclone.h"
27 #endif
28
29 #ifdef WITH_MZ80
30 #ifndef _MZ80_H_
31 #include "mz80/mz80.h"
32 #endif
33 #endif
34
35 #ifdef WITH_CZ80
36 #include "cz80/cz80.h"
37 #endif
38
39 #ifdef WITH_DRZ80
40 #include "drz80/drz80.h"
41 #endif
42
43 #ifdef WITH_DZ80
44 #include "dz80/types.h"
45 #include "dz80/dissz80.h"
46 #endif
47
48 //#define BUILD_YM2612
49 extern "C" {
50 #include "fm.h"
51 }
52
53 #include "sn76496.h"
54 #include "system.h"
55
56 // Debugging macros and support functions. They look like this because C++98
57 // lacks support for variadic macros. Not my fault.
58 #ifndef NDEBUG
59 #include <stdarg.h>
60 #include <stdio.h>
61
debug_basename_(const char * name)62 static inline const char *debug_basename_(const char *name)
63 {
64 const char *tmp;
65
66 for (tmp = name; (*tmp != '\0'); ++tmp)
67 if (*tmp == '/')
68 name = (tmp + 1);
69 return name;
70 }
71
debug_printf__()72 static inline void debug_printf__()
73 {
74 fputc('\n', stderr);
75 }
76
debug_printf_(const char * s,...)77 static inline void (*debug_printf_(const char *s, ...))()
78 {
79 va_list vl;
80
81 va_start(vl, s);
82 vfprintf(stderr, s, vl);
83 va_end(vl);
84 return debug_printf__;
85 }
86
debug_(const char * file,unsigned int line,const char * func)87 static inline void (*(*debug_(const char *file, unsigned int line,
88 const char *func))(const char *, ...))()
89 {
90 fprintf(stderr, "%s:%u: %s: ", debug_basename_(file), line, func);
91 return debug_printf_;
92 }
93
94 #define DEBUG(s) (((debug_(__FILE__, __LINE__, __func__))s)(), (void)0)
95 #else
96 #define DEBUG(s) (void)0
97 #endif
98
99 /* ROM is always byteswapped when StarScream or Cyclone are enabled. */
100 #if defined(WITH_STAR) || defined(WITH_CYCLONE)
101 #define ROM_BYTESWAP
102 #define ROM_ADDR(a) ((a) ^ 1)
103 #else
104 #undef ROM_BYTESWAP
105 #define ROM_ADDR(a) (a)
106 #endif
107
108 #ifdef WITH_DEBUGGER
109 #include "debug.h"
110 #endif
111
112 extern "C" int test_ctv(unsigned char *dest, int len);
113 extern "C" int blur_bitmap_16(unsigned char *dest, int len);
114 extern "C" int blur_bitmap_15(unsigned char *dest, int len);
115
116 struct bmap { unsigned char *data; int w,h; int pitch; int bpp; };
117
118 // New struct, happily encapsulates all the sound info
119 struct sndinfo {
120 int16_t *lr;
121 unsigned int len; /* number of stereo samples */
122 };
123
124 int get_md_palette(unsigned char pal[256],unsigned char *cram);
125
126 class md;
127 class md_vdp
128 {
129 public:
130 // Next three lines are the state of the VDP
131 // They have to be public so we can save and load states
132 // and draw the screen.
133 uint8_t mem[(0x10100 + 0x35)]; //0x20+0x10+0x4+1 for dirt
134 uint8_t *vram, *cram, *vsram;
135 uint8_t reg[0x20];
136 int rw_mode,rw_addr,rw_dma;
137 bool hint_pending;
138 bool vint_pending;
139 bool cmd_pending; // set when first half of command arrives
140 int sprite_overflow_line;
141 private:
142 int poke_vram (int addr,unsigned char d);
143 int poke_cram (int addr,unsigned char d);
144 int poke_vsram(int addr,unsigned char d);
145 int dma_len();
146 int dma_addr();
147 unsigned char dma_mem_read(int addr);
148 int putword(unsigned short d);
149 int putbyte(unsigned char d);
150 // Used by draw_scanline to render the different display components
151 void draw_tile1(int which, int line, unsigned char *where);
152 void draw_tile1_solid(int which, int line, unsigned char *where);
153 void draw_tile2(int which, int line, unsigned char *where);
154 void draw_tile2_solid(int which, int line, unsigned char *where);
155 void draw_tile3(int which, int line, unsigned char *where);
156 void draw_tile3_solid(int which, int line, unsigned char *where);
157 void draw_tile4(int which, int line, unsigned char *where);
158 void draw_tile4_solid(int which, int line, unsigned char *where);
159 void draw_window(int line, int front);
160 void draw_sprites(int line, bool front);
161 void draw_plane_back0(int line);
162 void draw_plane_back1(int line);
163 void draw_plane_front0(int line);
164 void draw_plane_front1(int line);
165 struct sprite_info {
166 uint8_t* sprite; // sprite location
167 uint32_t* tile; // array of tiles (th * tw)
168 int x; // X position in pixels
169 int y; // Y position in pixels
170 int tw; // width in tiles
171 int th; // height in tiles
172 int w; // width in pixels
173 int h; // height in pixels
174 unsigned int prio:1; // high priority bit
175 unsigned int inter:1; // interlaced mode (8x16 tiles)
176 unsigned int xflip:1; // X-flipped
177 unsigned int yflip:1; // Y-flipped
178 };
179 inline void get_sprite_info(struct sprite_info&, int);
180 inline void sprite_mask_add(uint8_t*, int, struct sprite_info&, int);
181 // Working variables for the above
182 unsigned char sprite_order[0x101], *sprite_base;
183 uint8_t sprite_mask[512][512];
184 int sprite_count;
185 int masking_sprite_index_cache;
186 int dots_cache;
187 unsigned int Bpp;
188 unsigned int Bpp_times8;
189 struct bmap *bmap;
190 unsigned char *dest;
191 md& belongs;
192 public:
193 md_vdp(md&);
194 ~md_vdp();
195 // These are called by MEM.CPP
196 int command(uint16_t cmd);
197 unsigned short readword();
198 unsigned char readbyte();
199 int writeword(unsigned short d);
200 int writebyte(unsigned char d);
201
202 unsigned char *dirt; // Bitfield: what has changed VRAM/CRAM/VSRAM/Reg
203 void reset();
204
205 uint32_t highpal[64];
206 // Draw a scanline
207 void sprite_masking_overflow(int line);
208 void sprite_mask_generate();
209 void draw_scanline(struct bmap *bits, int line);
210 void draw_pixel(struct bmap *bits, int x, int y, uint32_t rgb);
211 void write_reg(uint8_t addr, uint8_t data);
212 };
213
214 /* Generic structures for dumping and restoring M68K and Z80 states. */
215
216 typedef struct {
217 /* Stored MSB first (big endian) */
218 uint32_t d[8]; /* D0-D7 */
219 uint32_t a[8]; /* A0-A7 */
220 uint32_t pc;
221 uint16_t sr;
222 } m68k_state_t;
223
224 typedef struct {
225 /* Stored LSB first (little endian) */
226 struct {
227 uint16_t fa;
228 uint16_t cb;
229 uint16_t ed;
230 uint16_t lh;
231 } alt[2]; /* [1] = alternate registers */
232 uint16_t ix;
233 uint16_t iy;
234 uint16_t sp;
235 uint16_t pc;
236 uint8_t r;
237 uint8_t i;
238 uint8_t iff; /* x x x x x x IFF2 IFF1 */
239 uint8_t im; /* interrupt mode */
240 uint8_t irq_asserted; /* IRQ asserted */
241 uint8_t irq_vector; /* IRQ vector */
242 } z80_state_t;
243
244 #define MCLK_CYCLES_PER_LINE 3416 /* XXX ideally 3415.597 */
245 #define M68K_CYCLES_PER_LINE (MCLK_CYCLES_PER_LINE / 7)
246 #define M68K_CYCLES_HBLANK ((M68K_CYCLES_PER_LINE * 36) / 209)
247 #define M68K_CYCLES_VDELAY ((M68K_CYCLES_PER_LINE * 36) / 156)
248 #define Z80_CYCLES_PER_LINE (MCLK_CYCLES_PER_LINE / 15)
249 #define Z80_CYCLES_HBLANK ((Z80_CYCLES_PER_LINE * 36) / 209)
250 #define Z80_CYCLES_VDELAY ((Z80_CYCLES_PER_LINE * 36) / 156)
251 #define NTSC_LINES 262
252 #define NTSC_VBLANK 224
253 #define NTSC_HZ 60
254 #define NTSC_MCLK (MCLK_CYCLES_PER_LINE * NTSC_LINES * NTSC_HZ)
255 #define PAL_LINES 312
256 #define PAL_VBLANK 240
257 #define PAL_HZ 50
258 #define PAL_MCLK (MCLK_CYCLES_PER_LINE * PAL_LINES * PAL_HZ)
259
260 #define MD_UP_MASK (1) // 0x00001
261 #define MD_DOWN_MASK (1 << 1) // 0x00002
262 #define MD_LEFT_MASK (1 << 2) // 0x00004
263 #define MD_RIGHT_MASK (1 << 3) // 0x00008
264 #define MD_B_MASK (1 << 4) // 0x00010
265 #define MD_C_MASK (1 << 5) // 0x00020
266 #define MD_A_MASK (1 << 12) // 0x01000
267 #define MD_START_MASK (1 << 13) // 0x02000
268 #define MD_Z_MASK (1 << 16) // 0x10000
269 #define MD_Y_MASK (1 << 17) // 0x20000
270 #define MD_X_MASK (1 << 18) // 0x40000
271 #define MD_MODE_MASK (1 << 19) // 0x80000
272 #define MD_PAD_UNTOUCHED 0xf303f
273 #ifdef WITH_PICO
274 #define MD_PICO_PENBTN_MASK (1 << 7) // 0x00080
275 #endif
276
277 class md {
278 public:
279 // ROM placeholder.
280 static const uint8_t no_rom[];
281 static const size_t no_rom_size;
282
283 // Get default NTSC/PAL, Hz, VBLANK, lines number and memory byte
284 // for region, which is identified by a single character (J, X, U, E).
region_info(uint8_t region,int * pal,int * hz,int * vblank,int * lines,uint8_t * mem)285 static void region_info(uint8_t region, int* pal, int* hz,
286 int* vblank, int* lines, uint8_t* mem)
287 {
288 // Make region code uppercase and replace space with 0.
289 region &= ~0x20;
290 switch (region) {
291 case 'X':
292 // Japan (PAL). This region code isn't found in ROMs
293 // but I wanted to label it somehow.
294 if (mem)
295 *mem = (0x00 | 0x40); // local + PAL
296 mem = 0;
297 case 'E':
298 // Europe (PAL).
299 if (pal)
300 *pal = 1;
301 if (hz)
302 *hz = PAL_HZ;
303 if (vblank)
304 *vblank = PAL_VBLANK;
305 if (lines)
306 *lines = PAL_LINES;
307 if (mem)
308 *mem = (0x80 | 0x40); // overseas + PAL
309 break;
310 case 'J':
311 default:
312 // Japan (NTSC).
313 if (mem)
314 *mem = 0x00; // local
315 mem = 0;
316 case 'U':
317 // America (NTSC).
318 if (pal)
319 *pal = 0;
320 if (hz)
321 *hz = NTSC_HZ;
322 if (vblank)
323 *vblank = NTSC_VBLANK;
324 if (lines)
325 *lines = NTSC_LINES;
326 if (mem)
327 *mem = 0x80; // overseas
328 break;
329 }
330 }
331
332 #ifdef WITH_MUSA
333 static class md* md_musa;
334 unsigned int md_musa_ref;
335 class md* md_musa_prev;
336
337 bool md_set_musa(bool set);
338 void md_set_musa_sync(bool push);
339 #endif
340 #ifdef WITH_CYCLONE
341 static class md* md_cyclone;
342 unsigned int md_cyclone_ref;
343 class md* md_cyclone_prev;
344
345 bool md_set_cyclone(bool set);
346 void md_set_cyclone_sync(bool push);
347 uintptr_t checkpc(uintptr_t pc);
348 #endif
349 #ifdef WITH_STAR
350 static class md* md_star;
351 unsigned int md_star_ref;
352 class md* md_star_prev;
353
354 bool md_set_star(bool set);
355 void md_set_star_sync(bool push);
356 #endif
357 #ifdef WITH_CZ80
358 unsigned int md_cz80_ref;
359
360 bool md_set_cz80(bool set);
361 void md_set_cz80_sync(bool push);
362 #endif
363 #ifdef WITH_MZ80
364 static class md* md_mz80;
365 unsigned int md_mz80_ref;
366 class md* md_mz80_prev;
367
368 bool md_set_mz80(bool set);
369 void md_set_mz80_sync(bool push);
370 #endif
371 #ifdef WITH_DRZ80
372 static class md* md_drz80;
373 unsigned int md_drz80_ref;
374 class md* md_drz80_prev;
375
376 bool md_set_drz80(bool set);
377 void md_set_drz80_sync(bool push);
378 #endif
379 void md_set(bool set);
380
381 unsigned int mclk; // Master clock
382 unsigned int clk0; // MCLK/15 for Z80, SN76489
383 unsigned int clk1; // MCLK/7 for M68K, YM2612
384 unsigned int lines;
385 unsigned int vhz;
386 unsigned int pal: 1;
387
388 unsigned int vblank(); // Return first vblank line
389
390 private:
391 static bool lock; // Prevent other MD objects
392
393 unsigned int ok: 1;
394 unsigned int ok_ym2612: 1; // YM2612
395 unsigned int ok_sn76496: 1; // SN76496
396
397 unsigned int romlen;
398 unsigned char *mem,*rom,*ram,*z80ram;
399 // Saveram stuff:
400 unsigned char *saveram; // The actual saveram buffer
401 unsigned save_start, save_len; // Start address and length
402 int save_prot, save_active; // Flags set from $A130F1
403 public:
404 md_vdp vdp;
405 m68k_state_t m68k_state;
406 z80_state_t z80_state;
407 void m68k_state_dump();
408 void m68k_state_restore();
409 void z80_state_dump();
410 void z80_state_restore();
411 private:
412 #ifdef WITH_MZ80
413 struct mz80context z80;
414 #endif
415 #ifdef WITH_CZ80
416 cz80_struc cz80;
417 #endif
418 #ifdef WITH_DRZ80
419 struct DrZ80 drz80 __attribute__((packed)); // See drz80.h and drz80.s.
420 friend uintptr_t drz80_rebaseSP(uint16_t new_sp);
421 uintptr_t drz80_rebase_pc(uint16_t address);
422 friend uintptr_t drz80_rebasePC(uint16_t new_pc);
423 uintptr_t drz80_rebase_sp(uint16_t address);
424 friend void drz80_irq_callback();
425 void drz80_irq_cb();
426 #endif
427 #ifdef WITH_STAR
428 struct S68000CONTEXT cpu;
429 STARSCREAM_PROGRAMREGION *fetch;
430 STARSCREAM_DATAREGION *readbyte,*readword,*writebyte,*writeword;
431 int memory_map();
432 friend void star_irq_callback(void);
433 #endif
434 #ifdef WITH_MUSA
435 void *ctx_musa;
436 void musa_memory_map();
437 m68k_mem_t musa_memory[3];
438 friend int musa_irq_callback(int);
439 #endif
440 #ifdef WITH_CYCLONE
441 struct Cyclone cyclonecpu;
442 friend int cyclone_irq_callback(int);
443 #endif
444
445 uint32_t z80_bank68k;
446 unsigned int z80_st_busreq: 1; // in BUSREQ state
447 unsigned int z80_st_reset: 1; // in RESET state
448 unsigned int z80_st_running: 1; // Z80 is running
449 unsigned int z80_st_irq: 1; // Z80 IRQ asserted
450 unsigned int m68k_st_running: 1; // M68K is running
451 int z80_irq_vector; // Z80 IRQ vector
452 struct {
453 int m68k;
454 int m68k_max;
455 int z80;
456 int z80_max;
457 } odo;
458
459 int ras;
460
461 // Note order is (0) Vblank end -------- Vblank Start -- (HIGH)
462 // So int6 happens in the middle of the count
463
464 int aoo3_toggle,aoo5_toggle,aoo3_six,aoo5_six;
465 int aoo3_six_timeout, aoo5_six_timeout;
466 unsigned char calculate_coo8();
467 unsigned char calculate_coo9();
468 int may_want_to_get_pic(struct bmap *bm,unsigned char retpal[256],int mark);
469 int may_want_to_get_sound(struct sndinfo *sndi);
470
471 // Horizontal counter table
472 uint8_t hc_table[512][2];
473
474 unsigned int m68k_read_pc(); // PC data
475 int m68k_odo(); // M68K odometer
476 void m68k_run(); // Run M68K to odo.m68k_max
477 void m68k_busreq_request(); // Issue BUSREQ
478 void m68k_busreq_cancel(); // Cancel BUSREQ
479 void m68k_irq(int i); // Trigger M68K IRQ
480 void m68k_vdp_irq_trigger(); // Trigger IRQ from VDP status
481 void m68k_vdp_irq_handler(); // Called when interrupts are acknowledged
482
483 int z80_odo(); // Z80 odometer
484 void z80_run(); // Run Z80 to odo.z80_max
485 void z80_sync(int fake); // Synchronize Z80 with M68K
486 void z80_irq(int vector); // Trigger Z80 IRQ
487 void z80_irq_clear(); // Clear Z80 IRQ
488
489 // Number of microseconds spent in current frame
490 unsigned int frame_usecs();
491
492 int fm_timer_callback();
493 int myfm_read(int a);
494 int mysn_write(int v);
495 void fm_reset();
496 uint8_t fm_sel[2];
497 uint8_t fm_tover;
498 int fm_ticker[4];
499 signed short fm_reg[2][0x100]; // All of them (-1 = not def'd yet)
500
501 uint8_t dac_data[0x400];
502 unsigned int dac_len;
503 bool dac_enabled;
504 void dac_init();
505 void dac_submit(uint8_t d);
506 void dac_enable(uint8_t d);
507
508 uint8_t m68k_ROM_read(uint32_t a);
509 uint8_t m68k_IO_read(uint32_t a);
510 uint8_t m68k_VDP_read(uint32_t a);
511 void m68k_ROM_write(uint32_t, uint8_t);
512 void m68k_IO_write(uint32_t, uint8_t);
513
514
515 public:
516 int myfm_write(int a,int v,int md);
517
518 #ifdef WITH_VGMDUMP
519 FILE *vgm_dump_file;
520 uint32_t vgm_dump_samples_total;
521 uint32_t vgm_dump_dac_wait;
522 unsigned int vgm_dump_dac_samples;
523 bool vgm_dump;
524 void vgm_dump_ym2612(uint8_t a1, uint8_t reg, uint8_t data);
525 void vgm_dump_sn76496(uint8_t data);
526 int vgm_dump_start(const char *name);
527 void vgm_dump_stop();
528 void vgm_dump_frame();
529 #endif
530
531 // public struct, full with data from the cartridge header
532 struct _carthead_ {
533 char system_name[0x10]; // "SEGA GENESIS ", "SEGA MEGA DRIVE "
534 char copyright[0x10]; // "(C)SEGA 1988.JUL"
535 char domestic_name[0x30]; // Domestic game name
536 char overseas_name[0x30]; // Overseas game name
537 char product_no[0xe]; // "GM XXXXXXXX-XX" or "GM MK-XXXX -00"
538 unsigned short checksum; // ROM checksum
539 char control_data[0x10]; // I/O use data (usually only joystick)
540 unsigned rom_start, rom_end; // ROM start & end addresses
541 unsigned ram_start, ram_end; // RAM start & end addresses
542 unsigned short save_magic; // 0x5241("RA") if saveram, else 0x2020
543 unsigned short save_flags; // Misc saveram info
544 unsigned save_start, save_end; // Saveram start & end
545 unsigned short modem_magic; // 0x4d4f("MO") if uses modem, else 0x2020
546 char modem_firm[4]; // Modem firm name (should be same as (c))
547 char modem_ver[4]; // yy.z, yy=ID number, z=version
548 char memo[0x28]; // Extra data
549 char countries[0x10]; // Country code
550 } cart_head;
551 char region; // Emulator region.
552 uint8_t region_guess();
553 int one_frame(struct bmap *bm,unsigned char retpal[256],struct sndinfo *sndi);
554 void pad_update();
555 int pad[2];
556 uint8_t pad_com[2];
557 #ifdef WITH_PICO
558 bool pico_enabled;
559 uint16_t pico_pen_coords[2];
560 #endif
561 // c000004 bit 1 write fifo empty, bit 0 write fifo full (???)
562 // c000005 vint happened, (sprover, coll, oddinint)
563 // invblank, inhblank, dma busy, pal
564 unsigned char coo4,coo5;
okay()565 int okay() {return ok;}
566 bool plugged;
567 md(bool pal, char region);
568 ~md();
569 void init_pal();
570 bool init_sound();
571 int plug_in(unsigned char *cart,int len);
572 int unplug();
573 int load(const char *name);
574
575 int reset();
576
577 uint8_t misc_readbyte(uint32_t a);
578 void misc_writebyte(uint32_t a, uint8_t d);
579 uint16_t misc_readword(uint32_t a);
580 void misc_writeword(uint32_t a, uint16_t d);
581
582 void z80_init();
583 void z80_reset();
584 uint8_t z80_read(uint16_t a);
585 void z80_write(uint16_t a, uint8_t d);
586 uint8_t z80_port_read(uint16_t a);
587 void z80_port_write(uint16_t a, uint8_t d);
588
589 enum z80_core {
590 Z80_CORE_NONE,
591 #ifdef WITH_MZ80
592 Z80_CORE_MZ80,
593 #endif
594 #ifdef WITH_CZ80
595 Z80_CORE_CZ80,
596 #endif
597 #ifdef WITH_DRZ80
598 Z80_CORE_DRZ80,
599 #endif
600 Z80_CORE_TOTAL
601 } z80_core;
602 void cycle_z80();
603
604 enum cpu_emu {
605 CPU_EMU_NONE,
606 #ifdef WITH_STAR
607 CPU_EMU_STAR,
608 #endif
609 #ifdef WITH_MUSA
610 CPU_EMU_MUSA,
611 #endif
612 #ifdef WITH_CYCLONE
613 CPU_EMU_CYCLONE,
614 #endif
615 CPU_EMU_TOTAL
616 } cpu_emu; // OK to read it but call cycle_cpu() to change it
617 void cycle_cpu();
618
619 #ifdef WITH_MZ80
z80_context()620 mz80context& z80_context() {return z80;}
621 #endif
622 int import_gst(FILE *hand);
623 int export_gst(FILE *hand);
624
625 char romname[256];
626
627 int z80dump();
628
629 // Fix ROM checksum
630 void fix_rom_checksum();
631
632 // List of patches currently applied.
633 struct patch_elem {
634 struct patch_elem *next;
635 uint32_t addr;
636 uint16_t data;
637 } *patch_elem;
638 // Added by Joe Groff:
639 // Patch the ROM code, using Game Genie/Hex codes
640 int patch(const char *list, unsigned int *errors,
641 unsigned int *applied, unsigned int *reverted);
642 // Get/put the battery save RAM
643 int has_save_ram();
644 int get_save_ram(FILE *from);
645 int put_save_ram(FILE *into);
646
647 #ifdef WITH_JOYSTICK
648 // Added by Phillip K. Hornung <redx@pknet.com>
649 void init_joysticks();
650 void deinit_joysticks();
651 #endif
652
653 // Debugger stuff
654 #ifdef WITH_DEBUGGER
655 private:
656 // M68K FLAGS
657 // user byte
658 #define M68K_SR_CARRY (1<<0)
659 #define M68K_SR_OVERFLOW (1<<1)
660 #define M68K_SR_ZERO (1<<2)
661 #define M68K_SR_NEGATIVE (1<<3)
662 #define M68K_SR_EXTEND (1<<4)
663 // system byte
664 #define M68K_SR_IP_MASK1 (1<<8)
665 #define M68K_SR_IP_MASK2 (1<<9)
666 #define M68K_SR_IP_MASK3 (1<<10)
667 #define M68K_SR_MI_STATE (1<<12)
668 #define M68K_SR_SUP_STATE (1<<13)
669 #define M68K_SR_TRACE_EN1 (1<<14)
670 #define M68K_SR_TRACE_EN2 (1<<15)
671 // Z80 FLAGS
672 #define Z80_SR_CARRY (1<<0)
673 #define Z80_SR_ADD_SUB (1<<1)
674 #define Z80_SR_PARITY_OVERFLOW (1<<2)
675 #define Z80_SR_HALF_CARRY (1<<4)
676 #define Z80_SR_ZERO (1<<6)
677 #define Z80_SR_SIGN (1<<7)
678
679 struct dgen_bp debug_bp_m68k[MAX_BREAKPOINTS];
680 struct dgen_wp debug_wp_m68k[MAX_WATCHPOINTS];
681 unsigned int debug_step_m68k;
682 unsigned int debug_trace_m68k;
683 struct dgen_bp debug_bp_z80[MAX_BREAKPOINTS];
684 struct dgen_wp debug_wp_z80[MAX_WATCHPOINTS];
685 unsigned int debug_step_z80;
686 unsigned int debug_trace_z80;
687 int debug_context;
688 unsigned long debug_m68k_instr_count;
689 unsigned long debug_z80_instr_count;
690 bool debug_instr_count_enabled;
691 #ifdef WITH_DZ80
692 DISZ80 disz80;
693 #endif
694
695 bool debug_is_m68k_bp_set();
696 bool debug_is_m68k_wp_set();
697 int debug_next_free_wp_m68k();
698 int debug_next_free_bp_m68k();
699 bool debug_is_z80_bp_set();
700 bool debug_is_z80_wp_set();
701 int debug_next_free_wp_z80();
702 int debug_next_free_bp_z80();
703 void debug_init();
704 int debug_find_bp_m68k(uint32_t);
705 int debug_find_wp_m68k(uint32_t);
706 void debug_print_m68k_wp(int);
707 int debug_should_m68k_wp_fire(struct dgen_wp *w);
708 int debug_find_bp_z80(uint16_t);
709 int debug_find_wp_z80(uint16_t);
710 void debug_print_z80_wp(int);
711 int debug_should_z80_wp_fire(struct dgen_wp *w);
712 uint32_t m68k_get_pc();
713 uint16_t z80_get_pc();
714 bool debug_m68k_check_bps();
715 bool debug_m68k_check_wps();
716 bool debug_z80_check_bps();
717 bool debug_z80_check_wps();
718 void debug_rm_bp_m68k(int);
719 void debug_rm_wp_m68k(int);
720 void debug_rm_bp_z80(int);
721 void debug_rm_wp_z80(int);
722 void debug_list_bps_m68k();
723 void debug_list_wps_m68k();
724 void debug_list_bps_z80();
725 void debug_list_wps_z80();
726 int debug_set_bp_m68k(uint32_t);
727 int debug_set_bp_z80(uint16_t);
728
729 public:
730
731 struct dgen_debugger_cmd {
732 char *cmd;
733 int n_args;
734 int (md::*handler)(int, char **);
735 };
736 const static struct md::dgen_debugger_cmd debug_cmd_list[];
737 bool debug_trap;
738 // commands
739 int debug_despatch_cmd(int n_toks, char **args);
740 int debug_cmd_cont(int n_args, char **args);
741 int debug_cmd_reg(int n_args, char **args);
742 int debug_cmd_help(int n_args, char **args);
743 int debug_cmd_break(int n_args, char **args);
744 int debug_cmd_quit(int n_args, char **args);
745 int debug_cmd_step(int n_args, char **args);
746 int debug_cmd_trace(int n_args, char **args);
747 int debug_cmd_minus_break(int n_args, char **args);
748 int debug_cmd_cpu(int n_args, char **args);
749 int debug_cmd_dis(int n_args, char **args);
750 int debug_cmd_mem(int n_args, char **args);
751 int debug_cmd_setbwlr(int n_args, char **args, unsigned int type);
752 int debug_cmd_setb(int n_args, char **args);
753 int debug_cmd_setw(int n_args, char **args);
754 int debug_cmd_setl(int n_args, char **args);
755 int debug_cmd_setr(int n_args, char **args);
756 int debug_cmd_count(int n_args, char **args);
757 int debug_cmd_watch(int n_args, char **args);
758 int debug_cmd_minus_watch(int n_args, char **args);
759 // misc
760 int debug_enter(void);
761 void debug_leave(void);
762 void debug_update_m68k_wp_cache(struct dgen_wp *w);
763 void debug_update_z80_wp_cache(struct dgen_wp *w);
764 void debug_update_fired_m68k_wps(void);
765 void debug_update_fired_z80_wps(void);
766 void debug_set_wp_m68k(uint32_t start_addr, uint32_t end_addr);
767 void debug_set_wp_z80(uint16_t start_addr, uint16_t end_addr);
768 void debug_print_m68k_disassemble(uint32_t from, int len);
769 void debug_print_z80_disassemble(uint16_t, unsigned int);
770 void debug_show_m68k_regs(void);
771 void debug_show_z80_regs(void);
772 void debug_dump_mem(uint32_t addr, uint32_t len);
773 #endif
774 };
775
has_save_ram()776 inline int md::has_save_ram()
777 {
778 return save_len;
779 }
780
781 #endif // __MD_H__
782