1 #include <stdio.h>
2 /* ======================================================================== */
3 /* ========================= LICENSING & COPYRIGHT ======================== */
4 /* ======================================================================== */
5 /*
6 * MUSASHI
7 * Version 3.31
8 *
9 * A portable Motorola M680x0 processor emulation engine.
10 * Copyright 1998-2007 Karl Stenerud. All rights reserved.
11 *
12 * This code may be freely used for non-commercial purposes as long as this
13 * copyright notice remains unaltered in the source code and any binary files
14 * containing this code in compiled form.
15 *
16 * All other lisencing terms must be negotiated with the author
17 * (Karl Stenerud).
18 *
19 * The latest version of this code can be obtained at:
20 * http://kstenerud.cjb.net
21 */
22
23
24
25
26 #ifndef M68KCPU__HEADER
27 #define M68KCPU__HEADER
28
29 #include <stdint.h>
30 #include "m68k.h"
31 #include <limits.h>
32
33 #if M68K_EMULATE_ADDRESS_ERROR
34 #include <setjmp.h>
35 #endif /* M68K_EMULATE_ADDRESS_ERROR */
36
37 /* ======================================================================== */
38 /* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
39 /* ======================================================================== */
40
41 /* Check for > 32bit sizes */
42 #if UINT_MAX > 0xffffffff
43 #define M68K_INT_GT_32_BIT 1
44 #else
45 #define M68K_INT_GT_32_BIT 0
46 #endif
47
48 /* Data types used in this emulation core */
49 typedef int8_t sint8;
50 typedef int16_t sint16;
51 typedef int32_t sint32;
52 typedef uint8_t uint8;
53 typedef uint16_t uint16;
54 typedef uint32_t uint32;
55
56 /* signed and unsigned int must be at least 32 bits wide */
57 typedef int_least32_t sint;
58 typedef uint_least32_t uint;
59
60 #if M68K_USE_64_BIT
61 typedef int64_t sint64;
62 typedef uint64_t uint64;
63 #else
64 typedef sint32 sint64;
65 typedef uint32 uint64;
66 #endif /* M68K_USE_64_BIT */
67
68 #define UINT16 uint16_t
69 #define UINT64 uint64_t
70
71 #define MAKE_INT_8(A) (sint8)(A)
72 #define MAKE_INT_16(A) (sint16)(A)
73 #define MAKE_INT_32(A) (sint32)(A)
74 #define MAKE_UINT_8(A) (uint8)(A)
75 #define MAKE_UINT_16(A) (uint16)(A)
76 #define MAKE_UINT_32(A) (uint32)(A)
77
78
79 /* ======================================================================== */
80 /* ============================ GENERAL DEFINES =========================== */
81 /* ======================================================================== */
82
83 /* Exception Vectors handled by emulation */
84 #define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
85 #define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
86 #define EXCEPTION_ILLEGAL_INSTRUCTION 4
87 #define EXCEPTION_ZERO_DIVIDE 5
88 #define EXCEPTION_CHK 6
89 #define EXCEPTION_TRAPV 7
90 #define EXCEPTION_PRIVILEGE_VIOLATION 8
91 #define EXCEPTION_TRACE 9
92 #define EXCEPTION_1010 10
93 #define EXCEPTION_1111 11
94 #define EXCEPTION_FORMAT_ERROR 14
95 #define EXCEPTION_UNINITIALIZED_INTERRUPT 15
96 #define EXCEPTION_SPURIOUS_INTERRUPT 24
97 #define EXCEPTION_INTERRUPT_AUTOVECTOR 24
98 #define EXCEPTION_TRAP_BASE 32
99
100 /* Function codes set by CPU during data/address bus activity */
101 #define FUNCTION_CODE_USER_DATA 1
102 #define FUNCTION_CODE_USER_PROGRAM 2
103 #define FUNCTION_CODE_SUPERVISOR_DATA 5
104 #define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
105 #define FUNCTION_CODE_CPU_SPACE 7
106
107 /* CPU types for deciding what to emulate */
108 #define CPU_TYPE_000 1
109 #define CPU_TYPE_008 2
110 #define CPU_TYPE_010 4
111 #define CPU_TYPE_EC020 8
112 #define CPU_TYPE_020 16
113 #define CPU_TYPE_040 32
114
115 /* Different ways to stop the CPU */
116 #define STOP_LEVEL_STOP 1
117 #define STOP_LEVEL_HALT 2
118
119 /* Used for 68000 address error processing */
120 #define INSTRUCTION_YES 0
121 #define INSTRUCTION_NO 0x08
122 #define MODE_READ 0x10
123 #define MODE_WRITE 0
124
125 #define RUN_MODE_NORMAL 0
126 #define RUN_MODE_BERR_AERR_RESET 1
127
128 #ifndef NULL
129 #define NULL ((void*)0)
130 #endif
131
132 /* ======================================================================== */
133 /* ================================ MACROS ================================ */
134 /* ======================================================================== */
135
136
137 /* ---------------------------- General Macros ---------------------------- */
138
139 /* Bit Isolation Macros */
140 #define BIT_0(A) ((A) & 0x00000001)
141 #define BIT_1(A) ((A) & 0x00000002)
142 #define BIT_2(A) ((A) & 0x00000004)
143 #define BIT_3(A) ((A) & 0x00000008)
144 #define BIT_4(A) ((A) & 0x00000010)
145 #define BIT_5(A) ((A) & 0x00000020)
146 #define BIT_6(A) ((A) & 0x00000040)
147 #define BIT_7(A) ((A) & 0x00000080)
148 #define BIT_8(A) ((A) & 0x00000100)
149 #define BIT_9(A) ((A) & 0x00000200)
150 #define BIT_A(A) ((A) & 0x00000400)
151 #define BIT_B(A) ((A) & 0x00000800)
152 #define BIT_C(A) ((A) & 0x00001000)
153 #define BIT_D(A) ((A) & 0x00002000)
154 #define BIT_E(A) ((A) & 0x00004000)
155 #define BIT_F(A) ((A) & 0x00008000)
156 #define BIT_10(A) ((A) & 0x00010000)
157 #define BIT_11(A) ((A) & 0x00020000)
158 #define BIT_12(A) ((A) & 0x00040000)
159 #define BIT_13(A) ((A) & 0x00080000)
160 #define BIT_14(A) ((A) & 0x00100000)
161 #define BIT_15(A) ((A) & 0x00200000)
162 #define BIT_16(A) ((A) & 0x00400000)
163 #define BIT_17(A) ((A) & 0x00800000)
164 #define BIT_18(A) ((A) & 0x01000000)
165 #define BIT_19(A) ((A) & 0x02000000)
166 #define BIT_1A(A) ((A) & 0x04000000)
167 #define BIT_1B(A) ((A) & 0x08000000)
168 #define BIT_1C(A) ((A) & 0x10000000)
169 #define BIT_1D(A) ((A) & 0x20000000)
170 #define BIT_1E(A) ((A) & 0x40000000)
171 #define BIT_1F(A) ((A) & 0x80000000)
172
173 /* Get the most significant bit for specific sizes */
174 #define GET_MSB_8(A) ((A) & 0x80)
175 #define GET_MSB_9(A) ((A) & 0x100)
176 #define GET_MSB_16(A) ((A) & 0x8000)
177 #define GET_MSB_17(A) ((A) & 0x10000)
178 #define GET_MSB_32(A) ((A) & 0x80000000)
179 #if M68K_USE_64_BIT
180 #define GET_MSB_33(A) ((A) & 0x100000000)
181 #endif /* M68K_USE_64_BIT */
182
183 /* Isolate nibbles */
184 #define LOW_NIBBLE(A) ((A) & 0x0f)
185 #define HIGH_NIBBLE(A) ((A) & 0xf0)
186
187 /* These are used to isolate 8, 16, and 32 bit sizes */
188 #define MASK_OUT_ABOVE_2(A) ((A) & 3)
189 #define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
190 #define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
191 #define MASK_OUT_BELOW_2(A) ((A) & ~3)
192 #define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
193 #define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
194
195 /* No need to mask if we are 32 bit */
196 #if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
197 #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
198 #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
199 #else
200 #define MASK_OUT_ABOVE_32(A) (A)
201 #define MASK_OUT_BELOW_32(A) 0
202 #endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
203
204 /* Simulate address lines of 68k family */
205 #define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
206
207
208 /* Shift & Rotate Macros. */
209 #define LSL(A, C) ((A) << (C))
210 #define LSR(A, C) ((A) >> (C))
211
212 /* Some > 32-bit optimizations */
213 #if M68K_INT_GT_32_BIT
214 /* Shift left and right */
215 #define LSR_32(A, C) ((A) >> (C))
216 #define LSL_32(A, C) ((A) << (C))
217 #else
218 /* We have to do this because the morons at ANSI decided that shifts
219 * by >= data size are undefined.
220 */
221 #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
222 #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
223 #endif /* M68K_INT_GT_32_BIT */
224
225 #if M68K_USE_64_BIT
226 #define LSL_32_64(A, C) ((A) << (C))
227 #define LSR_32_64(A, C) ((A) >> (C))
228 #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
229 #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
230 #endif /* M68K_USE_64_BIT */
231
232 #define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
233 #define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
234 #define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
235 #define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
236 #define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
237 #define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
238
239 #define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
240 #define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
241 #define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
242 #define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
243 #define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
244 #define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
245
246
247
248 /* ------------------------------ CPU Access ------------------------------ */
249
250 /* Access the CPU registers */
251 #define CPU_TYPE m68ki_cpu.cpu_type
252
253 #define REG_DA m68ki_cpu.dar /* easy access to data and address regs */
254 #define REG_D m68ki_cpu.dar
255 #define REG_A (m68ki_cpu.dar+8)
256 #define REG_PPC m68ki_cpu.ppc
257 #define REG_PC m68ki_cpu.pc
258 #define REG_SP_BASE m68ki_cpu.sp
259 #define REG_USP m68ki_cpu.sp[0]
260 #define REG_ISP m68ki_cpu.sp[4]
261 #define REG_MSP m68ki_cpu.sp[6]
262 #define REG_SP m68ki_cpu.dar[15]
263 #define REG_VBR m68ki_cpu.vbr
264 #define REG_SFC m68ki_cpu.sfc
265 #define REG_DFC m68ki_cpu.dfc
266 #define REG_CACR m68ki_cpu.cacr
267 #define REG_CAAR m68ki_cpu.caar
268 #define REG_IR m68ki_cpu.ir
269
270 #define REG_FP m68ki_cpu.fpr
271 #define REG_FPCR m68ki_cpu.fpcr
272 #define REG_FPSR m68ki_cpu.fpsr
273 #define REG_FPIAR m68ki_cpu.fpiar
274
275 #define FLAG_T1 m68ki_cpu.t1_flag
276 #define FLAG_T0 m68ki_cpu.t0_flag
277 #define FLAG_S m68ki_cpu.s_flag
278 #define FLAG_M m68ki_cpu.m_flag
279 #define FLAG_X m68ki_cpu.x_flag
280 #define FLAG_N m68ki_cpu.n_flag
281 #define FLAG_Z m68ki_cpu.not_z_flag
282 #define FLAG_V m68ki_cpu.v_flag
283 #define FLAG_C m68ki_cpu.c_flag
284 #define FLAG_INT_MASK m68ki_cpu.int_mask
285
286 #define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
287 #define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */
288 #define CPU_STOPPED m68ki_cpu.stopped
289 #define CPU_PREF_ADDR m68ki_cpu.pref_addr
290 #define CPU_PREF_DATA m68ki_cpu.pref_data
291 #define CPU_ADDRESS_MASK m68ki_cpu.address_mask
292 #define CPU_SR_MASK m68ki_cpu.sr_mask
293 #define CPU_INSTR_MODE m68ki_cpu.instr_mode
294 #define CPU_RUN_MODE m68ki_cpu.run_mode
295
296 #define CYC_INSTRUCTION m68ki_cpu.cyc_instruction
297 #define CYC_EXCEPTION m68ki_cpu.cyc_exception
298 #define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
299 #define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
300 #define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
301 #define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp
302 #define CYC_SCC_R_TRUE m68ki_cpu.cyc_scc_r_true
303 #define CYC_MOVEM_W m68ki_cpu.cyc_movem_w
304 #define CYC_MOVEM_L m68ki_cpu.cyc_movem_l
305 #define CYC_SHIFT m68ki_cpu.cyc_shift
306 #define CYC_RESET m68ki_cpu.cyc_reset
307
308
309 #define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
310 #define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
311 #define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
312 #define CALLBACK_CMPILD_INSTR m68ki_cpu.cmpild_instr_callback
313 #define CALLBACK_RTE_INSTR m68ki_cpu.rte_instr_callback
314 #define CALLBACK_TAS_INSTR m68ki_cpu.tas_instr_callback
315 #define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
316 #define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
317 #define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
318
319
320
321 /* ----------------------------- Configuration ---------------------------- */
322
323 /* These defines are dependant on the configuration defines in m68kconf.h */
324
325 /* Disable certain comparisons if we're not using all CPU types */
326 #if M68K_EMULATE_040
327 #define CPU_TYPE_IS_040_PLUS(A) ((A) & CPU_TYPE_040)
328 #define CPU_TYPE_IS_040_LESS(A) 1
329 #else
330 #define CPU_TYPE_IS_040_PLUS(A) 0
331 #define CPU_TYPE_IS_040_LESS(A) 1
332 #endif
333
334 #if M68K_EMULATE_020
335 #define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_040))
336 #define CPU_TYPE_IS_020_LESS(A) 1
337 #else
338 #define CPU_TYPE_IS_020_PLUS(A) 0
339 #define CPU_TYPE_IS_020_LESS(A) 1
340 #endif
341
342 #if M68K_EMULATE_EC020
343 #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
344 #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020))
345 #else
346 #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
347 #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
348 #endif
349
350 #if M68K_EMULATE_010
351 #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
352 #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
353 #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
354 #else
355 #define CPU_TYPE_IS_010(A) 0
356 #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
357 #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
358 #endif
359
360 #if M68K_EMULATE_020 || M68K_EMULATE_EC020
361 #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
362 #else
363 #define CPU_TYPE_IS_020_VARIANT(A) 0
364 #endif
365
366 #if M68K_EMULATE_040 || M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
367 #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008)
368 #else
369 #define CPU_TYPE_IS_000(A) 1
370 #endif
371
372
373 #if !M68K_SEPARATE_READS
374 #define m68k_read_immediate_16(A) m68ki_read_program_16(A)
375 #define m68k_read_immediate_32(A) m68ki_read_program_32(A)
376
377 #define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
378 #define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
379 #define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
380 #endif /* M68K_SEPARATE_READS */
381
382
383 /* Enable or disable callback functions */
384 #if M68K_EMULATE_INT_ACK
385 #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
386 #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
387 #else
388 #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
389 #endif
390 #else
391 /* Default action is to used autovector mode, which is most common */
392 #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
393 #endif /* M68K_EMULATE_INT_ACK */
394
395 #if M68K_EMULATE_BKPT_ACK
396 #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
397 #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
398 #else
399 #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
400 #endif
401 #else
402 #define m68ki_bkpt_ack(A)
403 #endif /* M68K_EMULATE_BKPT_ACK */
404
405 #if M68K_EMULATE_RESET
406 #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
407 #define m68ki_output_reset() M68K_RESET_CALLBACK()
408 #else
409 #define m68ki_output_reset() CALLBACK_RESET_INSTR()
410 #endif
411 #else
412 #define m68ki_output_reset()
413 #endif /* M68K_EMULATE_RESET */
414
415 #if M68K_CMPILD_HAS_CALLBACK
416 #if M68K_CMPILD_HAS_CALLBACK == OPT_SPECIFY_HANDLER
417 #define m68ki_cmpild_callback(v,r) M68K_CMPILD_CALLBACK(v,r)
418 #else
419 #define m68ki_cmpild_callback(v,r) CALLBACK_CMPILD_INSTR(v,r)
420 #endif
421 #else
422 #define m68ki_cmpild_callback(v,r)
423 #endif /* M68K_CMPILD_HAS_CALLBACK */
424
425 #if M68K_RTE_HAS_CALLBACK
426 #if M68K_RTE_HAS_CALLBACK == OPT_SPECIFY_HANDLER
427 #define m68ki_rte_callback() M68K_RTE_CALLBACK()
428 #else
429 #define m68ki_rte_callback() CALLBACK_RTE_INSTR()
430 #endif
431 #else
432 #define m68ki_rte_callback()
433 #endif /* M68K_RTE_HAS_CALLBACK */
434
435 #if M68K_TAS_HAS_CALLBACK
436 #if M68K_TAS_HAS_CALLBACK == OPT_SPECIFY_HANDLER
437 #define m68ki_tas_callback() M68K_TAS_CALLBACK()
438 #else
439 #define m68ki_tas_callback() CALLBACK_TAS_INSTR()
440 #endif
441 #else
442 #define m68ki_tas_callback() 0
443 #endif /* M68K_TAS_HAS_CALLBACK */
444
445
446 #if M68K_INSTRUCTION_HOOK
447 #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
448 #define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK()
449 #else
450 #define m68ki_instr_hook() CALLBACK_INSTR_HOOK()
451 #endif
452 #else
453 #define m68ki_instr_hook()
454 #endif /* M68K_INSTRUCTION_HOOK */
455
456 #if M68K_MONITOR_PC
457 #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
458 #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
459 #else
460 #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
461 #endif
462 #else
463 #define m68ki_pc_changed(A)
464 #endif /* M68K_MONITOR_PC */
465
466
467 /* Enable or disable function code emulation */
468 #if M68K_EMULATE_FC
469 #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
470 #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
471 #else
472 #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
473 #endif
474 #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
475 #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
476 #define m68ki_get_address_space() m68ki_address_space
477 #else
478 #define m68ki_set_fc(A) (void)(A)
479 #define m68ki_use_data_space()
480 #define m68ki_use_program_space()
481 #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
482 #endif /* M68K_EMULATE_FC */
483
484
485 /* Enable or disable trace emulation */
486 #if M68K_EMULATE_TRACE
487 /* Initiates trace checking before each instruction (t1) */
488 #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
489 /* adds t0 to trace checking if we encounter change of flow */
490 #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
491 /* Clear all tracing */
492 #define m68ki_clear_trace() m68ki_tracing = 0
493 /* Cause a trace exception if we are tracing */
494 #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
495 #else
496 #define m68ki_trace_t1()
497 #define m68ki_trace_t0()
498 #define m68ki_clear_trace()
499 #define m68ki_exception_if_trace()
500 #endif /* M68K_EMULATE_TRACE */
501
502
503
504 /* Address error */
505 #if M68K_EMULATE_ADDRESS_ERROR
506 #include <setjmp.h>
507 extern jmp_buf m68ki_aerr_trap;
508
509 #define m68ki_set_address_error_trap() \
510 if(setjmp(m68ki_aerr_trap) != 0) \
511 { \
512 m68ki_exception_address_error(); \
513 if(CPU_STOPPED) \
514 { \
515 SET_CYCLES(0); \
516 CPU_INT_CYCLES = 0; \
517 return m68ki_initial_cycles; \
518 } \
519 }
520
521 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
522 if((ADDR)&1) \
523 { \
524 m68ki_aerr_address = ADDR; \
525 m68ki_aerr_write_mode = WRITE_MODE; \
526 m68ki_aerr_fc = FC; \
527 longjmp(m68ki_aerr_trap, 1); \
528 }
529
530 #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC) \
531 if (CPU_TYPE_IS_010_LESS(CPU_TYPE)) \
532 { \
533 m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
534 }
535 #else
536 #define m68ki_set_address_error_trap()
537 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC)
538 #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC)
539 #endif /* M68K_ADDRESS_ERROR */
540
541 /* Logging */
542 #if M68K_LOG_ENABLE
543 #include <stdio.h>
544 extern FILE* M68K_LOG_FILEHANDLE
545 extern char* m68ki_cpu_names[];
546
547 #define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A
548 #if M68K_LOG_1010_1111
549 #define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A
550 #else
551 #define M68K_DO_LOG_EMU(A)
552 #endif
553 #else
554 #define M68K_DO_LOG(A)
555 #define M68K_DO_LOG_EMU(A)
556 #endif
557
558
559
560 /* -------------------------- EA / Operand Access ------------------------- */
561
562 /*
563 * The general instruction format follows this pattern:
564 * .... XXX. .... .YYY
565 * where XXX is register X and YYY is register Y
566 */
567 /* Data Register Isolation */
568 #define DX (REG_D[(REG_IR >> 9) & 7])
569 #define DY (REG_D[REG_IR & 7])
570 /* Address Register Isolation */
571 #define AX (REG_A[(REG_IR >> 9) & 7])
572 #define AY (REG_A[REG_IR & 7])
573
574
575 /* Effective Address Calculations */
576 #define EA_AY_AI_8() AY /* address register indirect */
577 #define EA_AY_AI_16() EA_AY_AI_8()
578 #define EA_AY_AI_32() EA_AY_AI_8()
579 #define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
580 #define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
581 #define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
582 #define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
583 #define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
584 #define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
585 #define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
586 #define EA_AY_DI_16() EA_AY_DI_8()
587 #define EA_AY_DI_32() EA_AY_DI_8()
588 #define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */
589 #define EA_AY_IX_16() EA_AY_IX_8()
590 #define EA_AY_IX_32() EA_AY_IX_8()
591
592 #define EA_AX_AI_8() AX
593 #define EA_AX_AI_16() EA_AX_AI_8()
594 #define EA_AX_AI_32() EA_AX_AI_8()
595 #define EA_AX_PI_8() (AX++)
596 #define EA_AX_PI_16() ((AX+=2)-2)
597 #define EA_AX_PI_32() ((AX+=4)-4)
598 #define EA_AX_PD_8() (--AX)
599 #define EA_AX_PD_16() (AX-=2)
600 #define EA_AX_PD_32() (AX-=4)
601 #define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16()))
602 #define EA_AX_DI_16() EA_AX_DI_8()
603 #define EA_AX_DI_32() EA_AX_DI_8()
604 #define EA_AX_IX_8() m68ki_get_ea_ix(AX)
605 #define EA_AX_IX_16() EA_AX_IX_8()
606 #define EA_AX_IX_32() EA_AX_IX_8()
607
608 #define EA_A7_PI_8() ((REG_A[7]+=2)-2)
609 #define EA_A7_PD_8() (REG_A[7]-=2)
610
611 #define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */
612 #define EA_AW_16() EA_AW_8()
613 #define EA_AW_32() EA_AW_8()
614 #define EA_AL_8() m68ki_read_imm_32() /* absolute long */
615 #define EA_AL_16() EA_AL_8()
616 #define EA_AL_32() EA_AL_8()
617 #define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */
618 #define EA_PCDI_16() EA_PCDI_8()
619 #define EA_PCDI_32() EA_PCDI_8()
620 #define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */
621 #define EA_PCIX_16() EA_PCIX_8()
622 #define EA_PCIX_32() EA_PCIX_8()
623
624
625 #define OPER_I_8() m68ki_read_imm_8()
626 #define OPER_I_16() m68ki_read_imm_16()
627 #define OPER_I_32() m68ki_read_imm_32()
628
629
630
631 /* --------------------------- Status Register ---------------------------- */
632
633 /* Flag Calculation Macros */
634 #define CFLAG_8(A) (A)
635 #define CFLAG_16(A) ((A)>>8)
636
637 #if M68K_INT_GT_32_BIT
638 #define CFLAG_ADD_32(S, D, R) ((R)>>24)
639 #define CFLAG_SUB_32(S, D, R) ((R)>>24)
640 #else
641 #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
642 #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
643 #endif /* M68K_INT_GT_32_BIT */
644
645 #define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
646 #define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
647 #define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
648
649 #define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
650 #define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
651 #define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
652
653 #define NFLAG_8(A) (A)
654 #define NFLAG_16(A) ((A)>>8)
655 #define NFLAG_32(A) ((A)>>24)
656 #define NFLAG_64(A) ((A)>>56)
657
658 #define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
659 #define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
660 #define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
661
662
663 /* Flag values */
664 #define NFLAG_SET 0x80
665 #define NFLAG_CLEAR 0
666 #define CFLAG_SET 0x100
667 #define CFLAG_CLEAR 0
668 #define XFLAG_SET 0x100
669 #define XFLAG_CLEAR 0
670 #define VFLAG_SET 0x80
671 #define VFLAG_CLEAR 0
672 #define ZFLAG_SET 0
673 #define ZFLAG_CLEAR 0xffffffff
674
675 #define SFLAG_SET 4
676 #define SFLAG_CLEAR 0
677 #define MFLAG_SET 2
678 #define MFLAG_CLEAR 0
679
680 /* Turn flag values into 1 or 0 */
681 #define XFLAG_AS_1() ((FLAG_X>>8)&1)
682 #define NFLAG_AS_1() ((FLAG_N>>7)&1)
683 #define VFLAG_AS_1() ((FLAG_V>>7)&1)
684 #define ZFLAG_AS_1() (!FLAG_Z)
685 #define CFLAG_AS_1() ((FLAG_C>>8)&1)
686
687
688 /* Conditions */
689 #define COND_CS() (FLAG_C&0x100)
690 #define COND_CC() (!COND_CS())
691 #define COND_VS() (FLAG_V&0x80)
692 #define COND_VC() (!COND_VS())
693 #define COND_NE() FLAG_Z
694 #define COND_EQ() (!COND_NE())
695 #define COND_MI() (FLAG_N&0x80)
696 #define COND_PL() (!COND_MI())
697 #define COND_LT() ((FLAG_N^FLAG_V)&0x80)
698 #define COND_GE() (!COND_LT())
699 #define COND_HI() (COND_CC() && COND_NE())
700 #define COND_LS() (COND_CS() || COND_EQ())
701 #define COND_GT() (COND_GE() && COND_NE())
702 #define COND_LE() (COND_LT() || COND_EQ())
703
704 /* Reversed conditions */
705 #define COND_NOT_CS() COND_CC()
706 #define COND_NOT_CC() COND_CS()
707 #define COND_NOT_VS() COND_VC()
708 #define COND_NOT_VC() COND_VS()
709 #define COND_NOT_NE() COND_EQ()
710 #define COND_NOT_EQ() COND_NE()
711 #define COND_NOT_MI() COND_PL()
712 #define COND_NOT_PL() COND_MI()
713 #define COND_NOT_LT() COND_GE()
714 #define COND_NOT_GE() COND_LT()
715 #define COND_NOT_HI() COND_LS()
716 #define COND_NOT_LS() COND_HI()
717 #define COND_NOT_GT() COND_LE()
718 #define COND_NOT_LE() COND_GT()
719
720 /* Not real conditions, but here for convenience */
721 #define COND_XS() (FLAG_X&0x100)
722 #define COND_XC() (!COND_XS)
723
724
725 /* Get the condition code register */
726 #define m68ki_get_ccr() ((COND_XS() >> 4) | \
727 (COND_MI() >> 4) | \
728 (COND_EQ() << 2) | \
729 (COND_VS() >> 6) | \
730 (COND_CS() >> 8))
731
732 /* Get the status register */
733 #define m68ki_get_sr() ( FLAG_T1 | \
734 FLAG_T0 | \
735 (FLAG_S << 11) | \
736 (FLAG_M << 11) | \
737 FLAG_INT_MASK | \
738 m68ki_get_ccr())
739
740
741
742 /* ---------------------------- Cycle Counting ---------------------------- */
743
744 #define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
745 #define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
746 #define SET_CYCLES(A) m68ki_remaining_cycles = A
747 #define GET_CYCLES() m68ki_remaining_cycles
748 #define USE_ALL_CYCLES() m68ki_remaining_cycles = 0
749
750
751
752 /* ----------------------------- Read / Write ----------------------------- */
753
754 /* Read from the current address space */
755 #define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
756 #define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
757 #define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
758
759 /* Write to the current data space */
760 #define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
761 #define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
762 #define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
763
764 #if M68K_SIMULATE_PD_WRITES
765 #define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
766 #else
767 #define m68ki_write_32_pd(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
768 #endif
769
770 /* map read immediate 8 to read immediate 16 */
771 #define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16())
772
773 /* Map PC-relative reads */
774 #define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
775 #define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
776 #define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
777
778 /* Read from the program space */
779 #define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
780 #define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
781 #define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
782
783 /* Read from the data space */
784 #define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
785 #define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
786 #define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
787
788
789
790 /* ======================================================================== */
791 /* =============================== PROTOTYPES ============================= */
792 /* ======================================================================== */
793
794 typedef union
795 {
796 UINT64 i;
797 double f;
798 } fp_reg;
799
800 typedef struct
801 {
802 uint cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
803 uint dar[16]; /* Data and Address Registers */
804 uint ppc; /* Previous program counter */
805 uint pc; /* Program Counter */
806 uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
807 uint vbr; /* Vector Base Register (m68010+) */
808 uint sfc; /* Source Function Code Register (m68010+) */
809 uint dfc; /* Destination Function Code Register (m68010+) */
810 uint cacr; /* Cache Control Register (m68020, unemulated) */
811 uint caar; /* Cache Address Register (m68020, unemulated) */
812 uint ir; /* Instruction Register */
813 fp_reg fpr[8]; /* FPU Data Register (m68040) */
814 uint fpiar; /* FPU Instruction Address Register (m68040) */
815 uint fpsr; /* FPU Status Register (m68040) */
816 uint fpcr; /* FPU Control Register (m68040) */
817 uint t1_flag; /* Trace 1 */
818 uint t0_flag; /* Trace 0 */
819 uint s_flag; /* Supervisor */
820 uint m_flag; /* Master/Interrupt state */
821 uint x_flag; /* Extend */
822 uint n_flag; /* Negative */
823 uint not_z_flag; /* Zero, inverted for speedups */
824 uint v_flag; /* Overflow */
825 uint c_flag; /* Carry */
826 uint int_mask; /* I0-I2 */
827 uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
828 uint int_cycles; /* ASG: extra cycles from generated interrupts */
829 uint stopped; /* Stopped state */
830 uint pref_addr; /* Last prefetch address */
831 uint pref_data; /* Data in the prefetch queue */
832 uint address_mask; /* Available address pins */
833 uint sr_mask; /* Implemented status register bits */
834 uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
835 uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
836
837 /* Clocks required for instructions / exceptions */
838 uint cyc_bcc_notake_b;
839 uint cyc_bcc_notake_w;
840 uint cyc_dbcc_f_noexp;
841 uint cyc_dbcc_f_exp;
842 uint cyc_scc_r_true;
843 uint cyc_movem_w;
844 uint cyc_movem_l;
845 uint cyc_shift;
846 uint cyc_reset;
847 uint8* cyc_instruction;
848 uint8* cyc_exception;
849
850 /* Memory regions if defined */
851 m68k_mem_t (*mem)[];
852 unsigned int mem_len;
853
854 /* Callbacks to host */
855 int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
856 void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
857 void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
858 void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
859 void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
860 int (*tas_instr_callback)(void); /* Called when a TAS instruction is encountered, allows / disallows writeback */
861 void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
862 void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
863 int (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
864
865 } m68ki_cpu_core;
866
867
868 extern m68ki_cpu_core m68ki_cpu;
869 extern sint m68ki_remaining_cycles;
870 extern uint m68ki_tracing;
871 extern uint8 m68ki_shift_8_table[];
872 extern uint16 m68ki_shift_16_table[];
873 extern uint m68ki_shift_32_table[];
874 extern uint8 m68ki_exception_cycle_table[][256];
875 extern uint m68ki_address_space;
876 extern uint8 m68ki_ea_idx_cycle_table[];
877
878 extern uint m68ki_aerr_address;
879 extern uint m68ki_aerr_write_mode;
880 extern uint m68ki_aerr_fc;
881
882 /* Read data immediately after the program counter */
883 INLINE uint m68ki_read_imm_16(void);
884 INLINE uint m68ki_read_imm_32(void);
885
886 /* Read data with specific function code */
887 INLINE uint m68ki_read_8_fc (uint address, uint fc);
888 INLINE uint m68ki_read_16_fc (uint address, uint fc);
889 INLINE uint m68ki_read_32_fc (uint address, uint fc);
890
891 /* Write data with specific function code */
892 INLINE void m68ki_write_8_fc (uint address, uint fc, uint value);
893 INLINE void m68ki_write_16_fc(uint address, uint fc, uint value);
894 INLINE void m68ki_write_32_fc(uint address, uint fc, uint value);
895 #if M68K_SIMULATE_PD_WRITES
896 INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value);
897 #endif /* M68K_SIMULATE_PD_WRITES */
898
899 /* Indexed and PC-relative ea fetching */
900 INLINE uint m68ki_get_ea_pcdi(void);
901 INLINE uint m68ki_get_ea_pcix(void);
902 INLINE uint m68ki_get_ea_ix(uint An);
903
904 /* Operand fetching */
905 INLINE uint OPER_AY_AI_8(void);
906 INLINE uint OPER_AY_AI_16(void);
907 INLINE uint OPER_AY_AI_32(void);
908 INLINE uint OPER_AY_PI_8(void);
909 INLINE uint OPER_AY_PI_16(void);
910 INLINE uint OPER_AY_PI_32(void);
911 INLINE uint OPER_AY_PD_8(void);
912 INLINE uint OPER_AY_PD_16(void);
913 INLINE uint OPER_AY_PD_32(void);
914 INLINE uint OPER_AY_DI_8(void);
915 INLINE uint OPER_AY_DI_16(void);
916 INLINE uint OPER_AY_DI_32(void);
917 INLINE uint OPER_AY_IX_8(void);
918 INLINE uint OPER_AY_IX_16(void);
919 INLINE uint OPER_AY_IX_32(void);
920
921 INLINE uint OPER_AX_AI_8(void);
922 INLINE uint OPER_AX_AI_16(void);
923 INLINE uint OPER_AX_AI_32(void);
924 INLINE uint OPER_AX_PI_8(void);
925 INLINE uint OPER_AX_PI_16(void);
926 INLINE uint OPER_AX_PI_32(void);
927 INLINE uint OPER_AX_PD_8(void);
928 INLINE uint OPER_AX_PD_16(void);
929 INLINE uint OPER_AX_PD_32(void);
930 INLINE uint OPER_AX_DI_8(void);
931 INLINE uint OPER_AX_DI_16(void);
932 INLINE uint OPER_AX_DI_32(void);
933 INLINE uint OPER_AX_IX_8(void);
934 INLINE uint OPER_AX_IX_16(void);
935 INLINE uint OPER_AX_IX_32(void);
936
937 INLINE uint OPER_A7_PI_8(void);
938 INLINE uint OPER_A7_PD_8(void);
939
940 INLINE uint OPER_AW_8(void);
941 INLINE uint OPER_AW_16(void);
942 INLINE uint OPER_AW_32(void);
943 INLINE uint OPER_AL_8(void);
944 INLINE uint OPER_AL_16(void);
945 INLINE uint OPER_AL_32(void);
946 INLINE uint OPER_PCDI_8(void);
947 INLINE uint OPER_PCDI_16(void);
948 INLINE uint OPER_PCDI_32(void);
949 INLINE uint OPER_PCIX_8(void);
950 INLINE uint OPER_PCIX_16(void);
951 INLINE uint OPER_PCIX_32(void);
952
953 /* Stack operations */
954 INLINE void m68ki_push_16(uint value);
955 INLINE void m68ki_push_32(uint value);
956 INLINE uint m68ki_pull_16(void);
957 INLINE uint m68ki_pull_32(void);
958
959 /* Program flow operations */
960 INLINE void m68ki_jump(uint new_pc);
961 INLINE void m68ki_jump_vector(uint vector);
962 INLINE void m68ki_branch_8(uint offset);
963 INLINE void m68ki_branch_16(uint offset);
964 INLINE void m68ki_branch_32(uint offset);
965
966 /* Status register operations. */
967 INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
968 INLINE void m68ki_set_sm_flag(uint value); /* only bits 1 and 2 of value should be set */
969 INLINE void m68ki_set_ccr(uint value); /* set the condition code register */
970 INLINE void m68ki_set_sr(uint value); /* set the status register */
971 INLINE void m68ki_set_sr_noint(uint value); /* set the status register */
972
973 /* Exception processing */
974 INLINE uint m68ki_init_exception(void); /* Initial exception processing */
975
976 INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */
977 INLINE void m68ki_stack_frame_buserr(uint sr);
978
979 INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector);
980 INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector);
981 INLINE void m68ki_stack_frame_0010(uint sr, uint vector);
982 #if 0 /* unused */
983 INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector);
984 INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc);
985 INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc);
986 #endif
987
988 INLINE void m68ki_exception_trap(uint vector);
989 INLINE void m68ki_exception_trapN(uint vector);
990 INLINE void m68ki_exception_trace(void);
991 INLINE void m68ki_exception_privilege_violation(void);
992 INLINE void m68ki_exception_1010(void);
993 INLINE void m68ki_exception_1111(void);
994 INLINE void m68ki_exception_illegal(void);
995 INLINE void m68ki_exception_format_error(void);
996 INLINE void m68ki_exception_address_error(void);
997 INLINE void m68ki_exception_interrupt(uint int_level);
998 INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */
999
1000 /* quick disassembly (used for logging) */
1001 char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
1002
1003
1004 /* ======================================================================== */
1005 /* =========================== UTILITY FUNCTIONS ========================== */
1006 /* ======================================================================== */
1007
1008
1009 /* ---------------------------- Read Immediate ---------------------------- */
1010
1011 /* Handles all immediate reads, does address error check, function code setting,
1012 * and prefetching if they are enabled in m68kconf.h
1013 */
m68ki_read_imm_16(void)1014 INLINE uint m68ki_read_imm_16(void)
1015 {
1016 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1017 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1018 #if M68K_EMULATE_PREFETCH
1019 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1020 {
1021 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1022 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1023 }
1024 REG_PC += 2;
1025 return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3));
1026 #else
1027 REG_PC += 2;
1028 return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2));
1029 #endif /* M68K_EMULATE_PREFETCH */
1030 }
m68ki_read_imm_32(void)1031 INLINE uint m68ki_read_imm_32(void)
1032 {
1033 #if M68K_EMULATE_PREFETCH
1034 uint temp_val;
1035
1036 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1037 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1038 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1039 {
1040 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1041 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1042 }
1043 temp_val = CPU_PREF_DATA;
1044 REG_PC += 2;
1045 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1046 {
1047 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1048 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1049 temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16));
1050 }
1051 REG_PC += 2;
1052
1053 return temp_val;
1054 #else
1055 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1056 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1057 REG_PC += 4;
1058 return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4));
1059 #endif /* M68K_EMULATE_PREFETCH */
1060 }
1061
1062
1063
1064 /* ------------------------- Top level read/write ------------------------- */
1065
1066 #if M68K_REGISTER_MEMORY
1067
m68ki_locate_memory(uint address)1068 INLINE m68k_mem_t *m68ki_locate_memory(uint address)
1069 {
1070 unsigned int i;
1071
1072 if (m68ki_cpu.mem == NULL)
1073 return NULL;
1074 for (i = 0; (i != m68ki_cpu.mem_len); ++i) {
1075 m68k_mem_t *mem = &(*m68ki_cpu.mem)[i];
1076
1077 if (((address ^ mem->swab) >= mem->addr) &&
1078 ((address ^ mem->swab) < (mem->addr + mem->size)))
1079 return mem;
1080 }
1081 return NULL;
1082 }
1083
1084 #define m68ki_read_memory_8_direct(a) \
1085 do { \
1086 m68k_mem_t *mem = m68ki_locate_memory(a); \
1087 \
1088 if (mem != NULL) \
1089 return ((uint8 *)mem->mem) \
1090 [((((a) - mem->addr) ^ mem->swab) & \
1091 mem->mask)]; \
1092 } \
1093 while (0)
1094
1095 #define m68ki_read_memory_16_direct(a) \
1096 do { \
1097 m68k_mem_t *mem = m68ki_locate_memory(a); \
1098 \
1099 if (mem != NULL) { \
1100 uint8 *m = &((uint8 *)mem->mem) \
1101 [(((a) - mem->addr) & mem->mask)]; \
1102 \
1103 return ((m[mem->swab] << 8) | \
1104 m[(mem->swab ^ 1)]); \
1105 } \
1106 } \
1107 while (0)
1108
1109 #define m68ki_read_memory_32_direct(a) \
1110 do { \
1111 m68k_mem_t *mem = m68ki_locate_memory(a); \
1112 \
1113 if (mem != NULL) { \
1114 uint8 *m = &((uint8 *)mem->mem) \
1115 [(((a) - mem->addr) & mem->mask)]; \
1116 \
1117 return ((m[mem->swab] << 24) | \
1118 (m[(mem->swab ^ 1)] << 16) | \
1119 (m[(mem->swab + 2)] << 8) | \
1120 m[((mem->swab + 2) ^ 1)]); \
1121 } \
1122 } \
1123 while (0)
1124
1125 #define m68ki_write_memory_8_direct(a, v) \
1126 do { \
1127 m68k_mem_t *mem = m68ki_locate_memory(a); \
1128 \
1129 if ((mem != NULL) && (mem->w)) { \
1130 ((uint8 *)mem->mem) \
1131 [((((a) - mem->addr) ^ mem->swab) & \
1132 mem->mask)] = (v); \
1133 return; \
1134 } \
1135 } \
1136 while (0);
1137
1138 #define m68ki_write_memory_16_direct(a, v) \
1139 do { \
1140 m68k_mem_t *mem = m68ki_locate_memory(a); \
1141 \
1142 if ((mem != NULL) && (mem->w)) { \
1143 uint8 *m = &((uint8 *)mem->mem) \
1144 [(((a) - mem->addr) & mem->mask)]; \
1145 \
1146 m[mem->swab] = ((v) >> 8); \
1147 m[(mem->swab ^ 1)] = (v); \
1148 return; \
1149 } \
1150 } \
1151 while (0);
1152
1153 #define m68ki_write_memory_32_direct(a, v) \
1154 do { \
1155 m68k_mem_t *mem = m68ki_locate_memory(a); \
1156 \
1157 if ((mem != NULL) && (mem->w)) { \
1158 uint8 *m = &((uint8 *)mem->mem) \
1159 [(((a) - mem->addr) & mem->mask)]; \
1160 \
1161 m[mem->swab] = ((v) >> 24); \
1162 m[(mem->swab ^ 1)] = ((v) >> 16); \
1163 m[(mem->swab + 2)] = ((v) >> 8); \
1164 m[((mem->swab + 2) ^ 1)] = (v); \
1165 return; \
1166 } \
1167 } \
1168 while (0);
1169
1170 #else /* M68K_REGISTER_MEMORY */
1171
1172 #define m68ki_read_memory_8_direct(a) (void)0
1173 #define m68ki_read_memory_16_direct(a) (void)0
1174 #define m68ki_read_memory_32_direct(a) (void)0
1175
1176 #define m68ki_write_memory_8_direct(a, v) (void)0
1177 #define m68ki_write_memory_16_direct(a, v) (void)0
1178 #define m68ki_write_memory_32_direct(a, v) (void)0
1179
1180 #endif /* M68K_REGISTER_MEMORY */
1181
1182 /* Handles all memory accesses (except for immediate reads if they are
1183 * configured to use separate functions in m68kconf.h).
1184 * All memory accesses must go through these top level functions.
1185 * These functions will also check for address error and set the function
1186 * code if they are enabled in m68kconf.h.
1187 */
m68ki_read_8_fc(uint address,uint fc)1188 INLINE uint m68ki_read_8_fc(uint address, uint fc)
1189 {
1190 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1191 m68ki_read_memory_8_direct(ADDRESS_68K(address));
1192 return m68k_read_memory_8(ADDRESS_68K(address));
1193 }
m68ki_read_16_fc(uint address,uint fc)1194 INLINE uint m68ki_read_16_fc(uint address, uint fc)
1195 {
1196 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1197 m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1198 m68ki_read_memory_16_direct(ADDRESS_68K(address));
1199 return m68k_read_memory_16(ADDRESS_68K(address));
1200 }
m68ki_read_32_fc(uint address,uint fc)1201 INLINE uint m68ki_read_32_fc(uint address, uint fc)
1202 {
1203 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1204 m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1205 m68ki_read_memory_32_direct(ADDRESS_68K(address));
1206 return m68k_read_memory_32(ADDRESS_68K(address));
1207 }
1208
m68ki_write_8_fc(uint address,uint fc,uint value)1209 INLINE void m68ki_write_8_fc(uint address, uint fc, uint value)
1210 {
1211 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1212 m68ki_write_memory_8_direct(ADDRESS_68K(address), value);
1213 m68k_write_memory_8(ADDRESS_68K(address), value);
1214 }
m68ki_write_16_fc(uint address,uint fc,uint value)1215 INLINE void m68ki_write_16_fc(uint address, uint fc, uint value)
1216 {
1217 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1218 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1219 m68ki_write_memory_16_direct(ADDRESS_68K(address), value);
1220 m68k_write_memory_16(ADDRESS_68K(address), value);
1221 }
m68ki_write_32_fc(uint address,uint fc,uint value)1222 INLINE void m68ki_write_32_fc(uint address, uint fc, uint value)
1223 {
1224 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1225 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1226 m68ki_write_memory_32_direct(ADDRESS_68K(address), value);
1227 m68k_write_memory_32(ADDRESS_68K(address), value);
1228 }
1229
1230 #if M68K_SIMULATE_PD_WRITES
m68ki_write_32_pd_fc(uint address,uint fc,uint value)1231 INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
1232 {
1233 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1234 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1235 m68k_write_memory_32_pd(ADDRESS_68K(address), value);
1236 }
1237 #endif
1238
1239
1240 /* --------------------- Effective Address Calculation -------------------- */
1241
1242 /* The program counter relative addressing modes cause operands to be
1243 * retrieved from program space, not data space.
1244 */
m68ki_get_ea_pcdi(void)1245 INLINE uint m68ki_get_ea_pcdi(void)
1246 {
1247 uint old_pc = REG_PC;
1248 m68ki_use_program_space(); /* auto-disable */
1249 return old_pc + MAKE_INT_16(m68ki_read_imm_16());
1250 }
1251
1252
m68ki_get_ea_pcix(void)1253 INLINE uint m68ki_get_ea_pcix(void)
1254 {
1255 m68ki_use_program_space(); /* auto-disable */
1256 return m68ki_get_ea_ix(REG_PC);
1257 }
1258
1259 /* Indexed addressing modes are encoded as follows:
1260 *
1261 * Base instruction format:
1262 * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
1263 * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
1264 *
1265 * Base instruction format for destination EA in move instructions:
1266 * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
1267 * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
1268 *
1269 * Brief extension format:
1270 * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
1271 * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
1272 *
1273 * Full extension format:
1274 * F E D C B A 9 8 7 6 5 4 3 2 1 0
1275 * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
1276 * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
1277 * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
1278 *
1279 * D/A: 0 = Dn, 1 = An (Xn)
1280 * W/L: 0 = W (sign extend), 1 = L (.SIZE)
1281 * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
1282 * BS: 0=add base reg, 1=suppress base reg (An suppressed)
1283 * IS: 0=add index, 1=suppress index (Xn suppressed)
1284 * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
1285 *
1286 * IS I/IS Operation
1287 * 0 000 No Memory Indirect
1288 * 0 001 indir prex with null outer
1289 * 0 010 indir prex with word outer
1290 * 0 011 indir prex with long outer
1291 * 0 100 reserved
1292 * 0 101 indir postx with null outer
1293 * 0 110 indir postx with word outer
1294 * 0 111 indir postx with long outer
1295 * 1 000 no memory indirect
1296 * 1 001 mem indir with null outer
1297 * 1 010 mem indir with word outer
1298 * 1 011 mem indir with long outer
1299 * 1 100-111 reserved
1300 */
m68ki_get_ea_ix(uint An)1301 INLINE uint m68ki_get_ea_ix(uint An)
1302 {
1303 /* An = base register */
1304 uint extension = m68ki_read_imm_16();
1305 uint Xn = 0; /* Index register */
1306 uint bd = 0; /* Base Displacement */
1307 uint od = 0; /* Outer Displacement */
1308
1309 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1310 {
1311 /* Calculate index */
1312 Xn = REG_DA[extension>>12]; /* Xn */
1313 if(!BIT_B(extension)) /* W/L */
1314 Xn = MAKE_INT_16(Xn);
1315
1316 /* Add base register and displacement and return */
1317 return An + Xn + MAKE_INT_8(extension);
1318 }
1319
1320 /* Brief extension format */
1321 if(!BIT_8(extension))
1322 {
1323 /* Calculate index */
1324 Xn = REG_DA[extension>>12]; /* Xn */
1325 if(!BIT_B(extension)) /* W/L */
1326 Xn = MAKE_INT_16(Xn);
1327 /* Add scale if proper CPU type */
1328 if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
1329 Xn <<= (extension>>9) & 3; /* SCALE */
1330
1331 /* Add base register and displacement and return */
1332 return An + Xn + MAKE_INT_8(extension);
1333 }
1334
1335 /* Full extension format */
1336
1337 USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
1338
1339 /* Check if base register is present */
1340 if(BIT_7(extension)) /* BS */
1341 An = 0; /* An */
1342
1343 /* Check if index is present */
1344 if(!BIT_6(extension)) /* IS */
1345 {
1346 Xn = REG_DA[extension>>12]; /* Xn */
1347 if(!BIT_B(extension)) /* W/L */
1348 Xn = MAKE_INT_16(Xn);
1349 Xn <<= (extension>>9) & 3; /* SCALE */
1350 }
1351
1352 /* Check if base displacement is present */
1353 if(BIT_5(extension)) /* BD SIZE */
1354 bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_UINT_16(m68ki_read_imm_16());
1355
1356 /* If no indirect action, we are done */
1357 if(!(extension&7)) /* No Memory Indirect */
1358 return An + bd + Xn;
1359
1360 /* Check if outer displacement is present */
1361 if(BIT_1(extension)) /* I/IS: od */
1362 od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_UINT_16(m68ki_read_imm_16());
1363
1364 /* Postindex */
1365 if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
1366 return m68ki_read_32(An + bd) + Xn + od;
1367
1368 /* Preindex */
1369 return m68ki_read_32(An + bd + Xn) + od;
1370 }
1371
1372
1373 /* Fetch operands */
OPER_AY_AI_8(void)1374 INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); }
OPER_AY_AI_16(void)1375 INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
OPER_AY_AI_32(void)1376 INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
OPER_AY_PI_8(void)1377 INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); }
OPER_AY_PI_16(void)1378 INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
OPER_AY_PI_32(void)1379 INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
OPER_AY_PD_8(void)1380 INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); }
OPER_AY_PD_16(void)1381 INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
OPER_AY_PD_32(void)1382 INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
OPER_AY_DI_8(void)1383 INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); }
OPER_AY_DI_16(void)1384 INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
OPER_AY_DI_32(void)1385 INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
OPER_AY_IX_8(void)1386 INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); }
OPER_AY_IX_16(void)1387 INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
OPER_AY_IX_32(void)1388 INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
1389
OPER_AX_AI_8(void)1390 INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); }
OPER_AX_AI_16(void)1391 INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
OPER_AX_AI_32(void)1392 INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
OPER_AX_PI_8(void)1393 INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); }
OPER_AX_PI_16(void)1394 INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
OPER_AX_PI_32(void)1395 INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
OPER_AX_PD_8(void)1396 INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); }
OPER_AX_PD_16(void)1397 INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
OPER_AX_PD_32(void)1398 INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
OPER_AX_DI_8(void)1399 INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); }
OPER_AX_DI_16(void)1400 INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
OPER_AX_DI_32(void)1401 INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
OPER_AX_IX_8(void)1402 INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); }
OPER_AX_IX_16(void)1403 INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
OPER_AX_IX_32(void)1404 INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
1405
OPER_A7_PI_8(void)1406 INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); }
OPER_A7_PD_8(void)1407 INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); }
1408
OPER_AW_8(void)1409 INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); }
OPER_AW_16(void)1410 INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);}
OPER_AW_32(void)1411 INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);}
OPER_AL_8(void)1412 INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); }
OPER_AL_16(void)1413 INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);}
OPER_AL_32(void)1414 INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);}
OPER_PCDI_8(void)1415 INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); }
OPER_PCDI_16(void)1416 INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);}
OPER_PCDI_32(void)1417 INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);}
OPER_PCIX_8(void)1418 INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); }
OPER_PCIX_16(void)1419 INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);}
OPER_PCIX_32(void)1420 INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);}
1421
1422
1423
1424 /* ---------------------------- Stack Functions --------------------------- */
1425
1426 /* Push/pull data from the stack */
m68ki_push_16(uint value)1427 INLINE void m68ki_push_16(uint value)
1428 {
1429 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1430 m68ki_write_16(REG_SP, value);
1431 }
1432
m68ki_push_32(uint value)1433 INLINE void m68ki_push_32(uint value)
1434 {
1435 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1436 m68ki_write_32(REG_SP, value);
1437 }
1438
m68ki_pull_16(void)1439 INLINE uint m68ki_pull_16(void)
1440 {
1441 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1442 return m68ki_read_16(REG_SP-2);
1443 }
1444
m68ki_pull_32(void)1445 INLINE uint m68ki_pull_32(void)
1446 {
1447 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1448 return m68ki_read_32(REG_SP-4);
1449 }
1450
1451
1452 /* Increment/decrement the stack as if doing a push/pull but
1453 * don't do any memory access.
1454 */
m68ki_fake_push_16(void)1455 INLINE void m68ki_fake_push_16(void)
1456 {
1457 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1458 }
1459
m68ki_fake_push_32(void)1460 INLINE void m68ki_fake_push_32(void)
1461 {
1462 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1463 }
1464
m68ki_fake_pull_16(void)1465 INLINE void m68ki_fake_pull_16(void)
1466 {
1467 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1468 }
1469
m68ki_fake_pull_32(void)1470 INLINE void m68ki_fake_pull_32(void)
1471 {
1472 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1473 }
1474
1475
1476 /* ----------------------------- Program Flow ----------------------------- */
1477
1478 /* Jump to a new program location or vector.
1479 * These functions will also call the pc_changed callback if it was enabled
1480 * in m68kconf.h.
1481 */
m68ki_jump(uint new_pc)1482 INLINE void m68ki_jump(uint new_pc)
1483 {
1484 REG_PC = new_pc;
1485 m68ki_pc_changed(REG_PC);
1486 }
1487
m68ki_jump_vector(uint vector)1488 INLINE void m68ki_jump_vector(uint vector)
1489 {
1490 REG_PC = (vector<<2) + REG_VBR;
1491 REG_PC = m68ki_read_data_32(REG_PC);
1492 m68ki_pc_changed(REG_PC);
1493 }
1494
1495
1496 /* Branch to a new memory location.
1497 * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
1498 * So far I've found no problems with not calling pc_changed for 8 or 16
1499 * bit branches.
1500 */
m68ki_branch_8(uint offset)1501 INLINE void m68ki_branch_8(uint offset)
1502 {
1503 REG_PC += MAKE_INT_8(offset);
1504 }
1505
m68ki_branch_16(uint offset)1506 INLINE void m68ki_branch_16(uint offset)
1507 {
1508 REG_PC += MAKE_INT_16(offset);
1509 }
1510
m68ki_branch_32(uint offset)1511 INLINE void m68ki_branch_32(uint offset)
1512 {
1513 REG_PC += offset;
1514 m68ki_pc_changed(REG_PC);
1515 }
1516
1517
1518
1519 /* ---------------------------- Status Register --------------------------- */
1520
1521 /* Set the S flag and change the active stack pointer.
1522 * Note that value MUST be 4 or 0.
1523 */
m68ki_set_s_flag(uint value)1524 INLINE void m68ki_set_s_flag(uint value)
1525 {
1526 /* Backup the old stack pointer */
1527 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1528 /* Set the S flag */
1529 FLAG_S = value;
1530 /* Set the new stack pointer */
1531 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1532 }
1533
1534 /* Set the S and M flags and change the active stack pointer.
1535 * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
1536 */
m68ki_set_sm_flag(uint value)1537 INLINE void m68ki_set_sm_flag(uint value)
1538 {
1539 /* Backup the old stack pointer */
1540 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1541 /* Set the S and M flags */
1542 FLAG_S = value & SFLAG_SET;
1543 FLAG_M = value & MFLAG_SET;
1544 /* Set the new stack pointer */
1545 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1546 }
1547
1548 /* Set the S and M flags. Don't touch the stack pointer. */
m68ki_set_sm_flag_nosp(uint value)1549 INLINE void m68ki_set_sm_flag_nosp(uint value)
1550 {
1551 /* Set the S and M flags */
1552 FLAG_S = value & SFLAG_SET;
1553 FLAG_M = value & MFLAG_SET;
1554 }
1555
1556
1557 /* Set the condition code register */
m68ki_set_ccr(uint value)1558 INLINE void m68ki_set_ccr(uint value)
1559 {
1560 FLAG_X = BIT_4(value) << 4;
1561 FLAG_N = BIT_3(value) << 4;
1562 FLAG_Z = !BIT_2(value);
1563 FLAG_V = BIT_1(value) << 6;
1564 FLAG_C = BIT_0(value) << 8;
1565 }
1566
1567 /* Set the status register but don't check for interrupts */
m68ki_set_sr_noint(uint value)1568 INLINE void m68ki_set_sr_noint(uint value)
1569 {
1570 /* Mask out the "unimplemented" bits */
1571 value &= CPU_SR_MASK;
1572
1573 /* Now set the status register */
1574 FLAG_T1 = BIT_F(value);
1575 FLAG_T0 = BIT_E(value);
1576 FLAG_INT_MASK = value & 0x0700;
1577 m68ki_set_ccr(value);
1578 m68ki_set_sm_flag((value >> 11) & 6);
1579 }
1580
1581 /* Set the status register but don't check for interrupts nor
1582 * change the stack pointer
1583 */
m68ki_set_sr_noint_nosp(uint value)1584 INLINE void m68ki_set_sr_noint_nosp(uint value)
1585 {
1586 /* Mask out the "unimplemented" bits */
1587 value &= CPU_SR_MASK;
1588
1589 /* Now set the status register */
1590 FLAG_T1 = BIT_F(value);
1591 FLAG_T0 = BIT_E(value);
1592 FLAG_INT_MASK = value & 0x0700;
1593 m68ki_set_ccr(value);
1594 m68ki_set_sm_flag_nosp((value >> 11) & 6);
1595 }
1596
1597 /* Set the status register and check for interrupts */
m68ki_set_sr(uint value)1598 INLINE void m68ki_set_sr(uint value)
1599 {
1600 m68ki_set_sr_noint(value);
1601 m68ki_check_interrupts();
1602 }
1603
1604
1605 /* ------------------------- Exception Processing ------------------------- */
1606
1607 /* Initiate exception processing */
m68ki_init_exception(void)1608 INLINE uint m68ki_init_exception(void)
1609 {
1610 /* Save the old status register */
1611 uint sr = m68ki_get_sr();
1612
1613 /* Turn off trace flag, clear pending traces */
1614 FLAG_T1 = FLAG_T0 = 0;
1615 m68ki_clear_trace();
1616 /* Enter supervisor mode */
1617 m68ki_set_s_flag(SFLAG_SET);
1618
1619 return sr;
1620 }
1621
1622 /* 3 word stack frame (68000 only) */
m68ki_stack_frame_3word(uint pc,uint sr)1623 INLINE void m68ki_stack_frame_3word(uint pc, uint sr)
1624 {
1625 m68ki_push_32(pc);
1626 m68ki_push_16(sr);
1627 }
1628
1629 /* Format 0 stack frame.
1630 * This is the standard stack frame for 68010+.
1631 */
m68ki_stack_frame_0000(uint pc,uint sr,uint vector)1632 INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
1633 {
1634 /* Stack a 3-word frame if we are 68000 */
1635 if(CPU_TYPE == CPU_TYPE_000 || CPU_TYPE == CPU_TYPE_008)
1636 {
1637 m68ki_stack_frame_3word(pc, sr);
1638 return;
1639 }
1640 m68ki_push_16(vector<<2);
1641 m68ki_push_32(pc);
1642 m68ki_push_16(sr);
1643 }
1644
1645 /* Format 1 stack frame (68020).
1646 * For 68020, this is the 4 word throwaway frame.
1647 */
m68ki_stack_frame_0001(uint pc,uint sr,uint vector)1648 INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
1649 {
1650 m68ki_push_16(0x1000 | (vector<<2));
1651 m68ki_push_32(pc);
1652 m68ki_push_16(sr);
1653 }
1654
1655 /* Format 2 stack frame.
1656 * This is used only by 68020 for trap exceptions.
1657 */
m68ki_stack_frame_0010(uint sr,uint vector)1658 INLINE void m68ki_stack_frame_0010(uint sr, uint vector)
1659 {
1660 m68ki_push_32(REG_PPC);
1661 m68ki_push_16(0x2000 | (vector<<2));
1662 m68ki_push_32(REG_PC);
1663 m68ki_push_16(sr);
1664 }
1665
1666
1667 /* Bus error stack frame (68000 only).
1668 */
m68ki_stack_frame_buserr(uint sr)1669 INLINE void m68ki_stack_frame_buserr(uint sr)
1670 {
1671 m68ki_push_32(REG_PC);
1672 m68ki_push_16(sr);
1673 m68ki_push_16(REG_IR);
1674 m68ki_push_32(m68ki_aerr_address); /* access address */
1675 /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
1676 * R/W 0 = write, 1 = read
1677 * I/N 0 = instruction, 1 = not
1678 * FC 3-bit function code
1679 */
1680 m68ki_push_16(m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
1681 }
1682
1683 #if 0 /* unused */
1684 /* Format 8 stack frame (68010).
1685 * 68010 only. This is the 29 word bus/address error frame.
1686 */
1687 void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
1688 {
1689 /* VERSION
1690 * NUMBER
1691 * INTERNAL INFORMATION, 16 WORDS
1692 */
1693 m68ki_fake_push_32();
1694 m68ki_fake_push_32();
1695 m68ki_fake_push_32();
1696 m68ki_fake_push_32();
1697 m68ki_fake_push_32();
1698 m68ki_fake_push_32();
1699 m68ki_fake_push_32();
1700 m68ki_fake_push_32();
1701
1702 /* INSTRUCTION INPUT BUFFER */
1703 m68ki_push_16(0);
1704
1705 /* UNUSED, RESERVED (not written) */
1706 m68ki_fake_push_16();
1707
1708 /* DATA INPUT BUFFER */
1709 m68ki_push_16(0);
1710
1711 /* UNUSED, RESERVED (not written) */
1712 m68ki_fake_push_16();
1713
1714 /* DATA OUTPUT BUFFER */
1715 m68ki_push_16(0);
1716
1717 /* UNUSED, RESERVED (not written) */
1718 m68ki_fake_push_16();
1719
1720 /* FAULT ADDRESS */
1721 m68ki_push_32(0);
1722
1723 /* SPECIAL STATUS WORD */
1724 m68ki_push_16(0);
1725
1726 /* 1000, VECTOR OFFSET */
1727 m68ki_push_16(0x8000 | (vector<<2));
1728
1729 /* PROGRAM COUNTER */
1730 m68ki_push_32(pc);
1731
1732 /* STATUS REGISTER */
1733 m68ki_push_16(sr);
1734 }
1735
1736 /* Format A stack frame (short bus fault).
1737 * This is used only by 68020 for bus fault and address error
1738 * if the error happens at an instruction boundary.
1739 * PC stacked is address of next instruction.
1740 */
1741 void m68ki_stack_frame_1010(uint sr, uint vector, uint pc)
1742 {
1743 /* INTERNAL REGISTER */
1744 m68ki_push_16(0);
1745
1746 /* INTERNAL REGISTER */
1747 m68ki_push_16(0);
1748
1749 /* DATA OUTPUT BUFFER (2 words) */
1750 m68ki_push_32(0);
1751
1752 /* INTERNAL REGISTER */
1753 m68ki_push_16(0);
1754
1755 /* INTERNAL REGISTER */
1756 m68ki_push_16(0);
1757
1758 /* DATA CYCLE FAULT ADDRESS (2 words) */
1759 m68ki_push_32(0);
1760
1761 /* INSTRUCTION PIPE STAGE B */
1762 m68ki_push_16(0);
1763
1764 /* INSTRUCTION PIPE STAGE C */
1765 m68ki_push_16(0);
1766
1767 /* SPECIAL STATUS REGISTER */
1768 m68ki_push_16(0);
1769
1770 /* INTERNAL REGISTER */
1771 m68ki_push_16(0);
1772
1773 /* 1010, VECTOR OFFSET */
1774 m68ki_push_16(0xa000 | (vector<<2));
1775
1776 /* PROGRAM COUNTER */
1777 m68ki_push_32(pc);
1778
1779 /* STATUS REGISTER */
1780 m68ki_push_16(sr);
1781 }
1782
1783 /* Format B stack frame (long bus fault).
1784 * This is used only by 68020 for bus fault and address error
1785 * if the error happens during instruction execution.
1786 * PC stacked is address of instruction in progress.
1787 */
1788 void m68ki_stack_frame_1011(uint sr, uint vector, uint pc)
1789 {
1790 /* INTERNAL REGISTERS (18 words) */
1791 m68ki_push_32(0);
1792 m68ki_push_32(0);
1793 m68ki_push_32(0);
1794 m68ki_push_32(0);
1795 m68ki_push_32(0);
1796 m68ki_push_32(0);
1797 m68ki_push_32(0);
1798 m68ki_push_32(0);
1799 m68ki_push_32(0);
1800
1801 /* VERSION# (4 bits), INTERNAL INFORMATION */
1802 m68ki_push_16(0);
1803
1804 /* INTERNAL REGISTERS (3 words) */
1805 m68ki_push_32(0);
1806 m68ki_push_16(0);
1807
1808 /* DATA INTPUT BUFFER (2 words) */
1809 m68ki_push_32(0);
1810
1811 /* INTERNAL REGISTERS (2 words) */
1812 m68ki_push_32(0);
1813
1814 /* STAGE B ADDRESS (2 words) */
1815 m68ki_push_32(0);
1816
1817 /* INTERNAL REGISTER (4 words) */
1818 m68ki_push_32(0);
1819 m68ki_push_32(0);
1820
1821 /* DATA OUTPUT BUFFER (2 words) */
1822 m68ki_push_32(0);
1823
1824 /* INTERNAL REGISTER */
1825 m68ki_push_16(0);
1826
1827 /* INTERNAL REGISTER */
1828 m68ki_push_16(0);
1829
1830 /* DATA CYCLE FAULT ADDRESS (2 words) */
1831 m68ki_push_32(0);
1832
1833 /* INSTRUCTION PIPE STAGE B */
1834 m68ki_push_16(0);
1835
1836 /* INSTRUCTION PIPE STAGE C */
1837 m68ki_push_16(0);
1838
1839 /* SPECIAL STATUS REGISTER */
1840 m68ki_push_16(0);
1841
1842 /* INTERNAL REGISTER */
1843 m68ki_push_16(0);
1844
1845 /* 1011, VECTOR OFFSET */
1846 m68ki_push_16(0xb000 | (vector<<2));
1847
1848 /* PROGRAM COUNTER */
1849 m68ki_push_32(pc);
1850
1851 /* STATUS REGISTER */
1852 m68ki_push_16(sr);
1853 }
1854 #endif /* unused */
1855
1856
1857 /* Used for Group 2 exceptions.
1858 * These stack a type 2 frame on the 020.
1859 */
m68ki_exception_trap(uint vector)1860 INLINE void m68ki_exception_trap(uint vector)
1861 {
1862 uint sr = m68ki_init_exception();
1863
1864 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1865 m68ki_stack_frame_0000(REG_PC, sr, vector);
1866 else
1867 m68ki_stack_frame_0010(sr, vector);
1868
1869 m68ki_jump_vector(vector);
1870
1871 /* Use up some clock cycles */
1872 USE_CYCLES(CYC_EXCEPTION[vector]);
1873 }
1874
1875 /* Trap#n stacks a 0 frame but behaves like group2 otherwise */
m68ki_exception_trapN(uint vector)1876 INLINE void m68ki_exception_trapN(uint vector)
1877 {
1878 uint sr = m68ki_init_exception();
1879 m68ki_stack_frame_0000(REG_PC, sr, vector);
1880 m68ki_jump_vector(vector);
1881
1882 /* Use up some clock cycles */
1883 USE_CYCLES(CYC_EXCEPTION[vector]);
1884 }
1885
1886 /* Exception for trace mode */
m68ki_exception_trace(void)1887 INLINE void m68ki_exception_trace(void)
1888 {
1889 uint sr = m68ki_init_exception();
1890
1891 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1892 {
1893 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1894 if(CPU_TYPE_IS_000(CPU_TYPE))
1895 {
1896 CPU_INSTR_MODE = INSTRUCTION_NO;
1897 }
1898 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1899 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
1900 }
1901 else
1902 m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
1903
1904 m68ki_jump_vector(EXCEPTION_TRACE);
1905
1906 /* Trace nullifies a STOP instruction */
1907 CPU_STOPPED &= ~STOP_LEVEL_STOP;
1908
1909 /* Use up some clock cycles */
1910 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
1911 }
1912
1913 /* Exception for privilege violation */
m68ki_exception_privilege_violation(void)1914 INLINE void m68ki_exception_privilege_violation(void)
1915 {
1916 uint sr = m68ki_init_exception();
1917
1918 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1919 if(CPU_TYPE_IS_000(CPU_TYPE))
1920 {
1921 CPU_INSTR_MODE = INSTRUCTION_NO;
1922 }
1923 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1924
1925 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
1926 m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
1927
1928 /* Use up some clock cycles and undo the instruction's cycles */
1929 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
1930 }
1931
1932 /* Exception for A-Line instructions */
m68ki_exception_1010(void)1933 INLINE void m68ki_exception_1010(void)
1934 {
1935 uint sr;
1936 #if M68K_LOG_1010_1111 == OPT_ON
1937 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
1938 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1939 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1940 #endif
1941
1942 sr = m68ki_init_exception();
1943 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1010);
1944 m68ki_jump_vector(EXCEPTION_1010);
1945
1946 /* Use up some clock cycles and undo the instruction's cycles */
1947 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
1948 }
1949
1950 /* Exception for F-Line instructions */
m68ki_exception_1111(void)1951 INLINE void m68ki_exception_1111(void)
1952 {
1953 uint sr;
1954
1955 #if M68K_LOG_1010_1111 == OPT_ON
1956 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
1957 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1958 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1959 #endif
1960
1961 sr = m68ki_init_exception();
1962 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1111);
1963 m68ki_jump_vector(EXCEPTION_1111);
1964
1965 /* Use up some clock cycles and undo the instruction's cycles */
1966 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
1967 }
1968
1969 /* Exception for illegal instructions */
m68ki_exception_illegal(void)1970 INLINE void m68ki_exception_illegal(void)
1971 {
1972 uint sr;
1973
1974 M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
1975 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1976 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1977
1978 sr = m68ki_init_exception();
1979
1980 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1981 if(CPU_TYPE_IS_000(CPU_TYPE))
1982 {
1983 CPU_INSTR_MODE = INSTRUCTION_NO;
1984 }
1985 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1986
1987 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
1988 m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
1989
1990 /* Use up some clock cycles and undo the instruction's cycles */
1991 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
1992 }
1993
1994 /* Exception for format errror in RTE */
m68ki_exception_format_error(void)1995 INLINE void m68ki_exception_format_error(void)
1996 {
1997 uint sr = m68ki_init_exception();
1998 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
1999 m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
2000
2001 /* Use up some clock cycles and undo the instruction's cycles */
2002 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
2003 }
2004
2005 /* Exception for address error */
m68ki_exception_address_error(void)2006 INLINE void m68ki_exception_address_error(void)
2007 {
2008 uint sr = m68ki_init_exception();
2009
2010 /* If we were processing a bus error, address error, or reset,
2011 * this is a catastrophic failure.
2012 * Halt the CPU
2013 */
2014 if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
2015 {
2016 m68k_read_memory_8(0x00ffff01);
2017 CPU_STOPPED = STOP_LEVEL_HALT;
2018 return;
2019 }
2020 CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
2021
2022 /* Note: This is implemented for 68000 only! */
2023 m68ki_stack_frame_buserr(sr);
2024
2025 m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR);
2026
2027 /* Use up some clock cycles and undo the instruction's cycles */
2028 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR] - CYC_INSTRUCTION[REG_IR]);
2029 }
2030
2031
2032 /* Service an interrupt request and start exception processing */
m68ki_exception_interrupt(uint int_level)2033 void m68ki_exception_interrupt(uint int_level)
2034 {
2035 uint vector;
2036 uint sr;
2037 uint new_pc;
2038
2039 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
2040 if(CPU_TYPE_IS_000(CPU_TYPE))
2041 {
2042 CPU_INSTR_MODE = INSTRUCTION_NO;
2043 }
2044 #endif /* M68K_EMULATE_ADDRESS_ERROR */
2045
2046 /* Turn off the stopped state */
2047 CPU_STOPPED &= ~STOP_LEVEL_STOP;
2048
2049 /* If we are halted, don't do anything */
2050 if(CPU_STOPPED)
2051 return;
2052
2053 /* Acknowledge the interrupt */
2054 vector = m68ki_int_ack(int_level);
2055
2056 /* Get the interrupt vector */
2057 if(vector == M68K_INT_ACK_AUTOVECTOR)
2058 /* Use the autovectors. This is the most commonly used implementation */
2059 vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
2060 else if(vector == M68K_INT_ACK_SPURIOUS)
2061 /* Called if no devices respond to the interrupt acknowledge */
2062 vector = EXCEPTION_SPURIOUS_INTERRUPT;
2063 else if(vector > 255)
2064 {
2065 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
2066 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
2067 return;
2068 }
2069
2070 /* Start exception processing */
2071 sr = m68ki_init_exception();
2072
2073 /* Set the interrupt mask to the level of the one being serviced */
2074 FLAG_INT_MASK = int_level<<8;
2075
2076 /* Get the new PC */
2077 new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
2078
2079 /* If vector is uninitialized, call the uninitialized interrupt vector */
2080 if(new_pc == 0)
2081 new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
2082
2083 /* Generate a stack frame */
2084 m68ki_stack_frame_0000(REG_PC, sr, vector);
2085 if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
2086 {
2087 /* Create throwaway frame */
2088 m68ki_set_sm_flag(FLAG_S); /* clear M */
2089 sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
2090 m68ki_stack_frame_0001(REG_PC, sr, vector);
2091 }
2092
2093 m68ki_jump(new_pc);
2094
2095 /* Defer cycle counting until later */
2096 CPU_INT_CYCLES += CYC_EXCEPTION[vector];
2097
2098 #if !M68K_EMULATE_INT_ACK
2099 /* Automatically clear IRQ if we are not using an acknowledge scheme */
2100 CPU_INT_LEVEL = 0;
2101 #endif /* M68K_EMULATE_INT_ACK */
2102 }
2103
2104
2105 /* ASG: Check for interrupts */
m68ki_check_interrupts(void)2106 INLINE void m68ki_check_interrupts(void)
2107 {
2108 if(CPU_INT_LEVEL > FLAG_INT_MASK)
2109 m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
2110 }
2111
2112
2113
2114 /* ======================================================================== */
2115 /* ============================== END OF FILE ============================= */
2116 /* ======================================================================== */
2117
2118 #endif /* M68KCPU__HEADER */
2119