1 //////////////////////////////////////////////////
2 // //
3 // Emu64 //
4 // von Thorsten Kattanek //
5 // //
6 // #file: mos6502_class.cpp //
7 // //
8 // Dieser Sourcecode ist Copyright geschützt! //
9 // Geistiges Eigentum von Th.Kattanek //
10 // //
11 // Letzte Änderung am 18.09.2019 //
12 // www.emu64.de //
13 // //
14 //////////////////////////////////////////////////
15
16 #include "mos6502_class.h"
17 #include "micro_code_tbl_6502.h"
18
MOS6502(void)19 MOS6502::MOS6502(void)
20 {
21 ReadProcTbl = 0;
22 WriteProcTbl = 0;
23
24 MCT = ((unsigned char*)MicroCodeTable6502 + (0x100*MCTItemSize));
25 Pointer = 0;
26 Adresse = 0x0000;
27 BranchAdresse = 0x0000;
28 AktOpcodePC = 0x0100;
29 JAMFlag = false;
30 TMPByte = 0;
31
32 PC = 0;
33 AC = 0;
34 XR = 0;
35 YR = 0;
36 SP = 0;
37 SR = 32;
38
39 irq_state = 0; // if Größer 0 ist die Leitung low
40 irq_is_low_pegel = false;
41 irq_is_active = false;
42
43 irq_delay = false;
44 irq_delay_sr_value = 0;
45 }
46
~MOS6502(void)47 MOS6502::~MOS6502(void)
48 {
49 }
50
Reset(void)51 void MOS6502::Reset(void)
52 {
53 SR=0x24;
54 SP=0;
55 PC=0;
56 AC=0;
57 XR=0;
58 YR=0;
59
60 MCT = ((unsigned char*)MicroCodeTable6502 + (0x100*MCTItemSize));
61 JAMFlag = false;
62 AktOpcodePC = PC;
63 PC++;
64 }
65
TriggerInterrupt(int typ)66 void MOS6502::TriggerInterrupt(int typ)
67 {
68 switch (typ)
69 {
70 case VIA1_IRQ:
71 irq_state |= 0x01;
72 break;
73 case VIA2_IRQ:
74 irq_state |= 0x02;
75 break;
76 }
77 }
78
ClearInterrupt(int typ)79 void MOS6502::ClearInterrupt(int typ)
80 {
81 switch (typ)
82 {
83 case VIA1_IRQ:
84 irq_state &= ~0x01;
85 break;
86 case VIA2_IRQ:
87 irq_state &= ~0x02;
88 break;
89 }
90 }
91
ClearJAMFlag(void)92 void MOS6502::ClearJAMFlag(void)
93 {
94 JAMFlag = false;
95 }
96
SetRegister(REG_STRUCT * reg)97 void MOS6502::SetRegister(REG_STRUCT *reg)
98 {
99 if(reg == 0) return;
100
101 unsigned char mask = reg->reg_mask;
102 if((mask&1) == 1)
103 {
104 PC = reg->pc;
105 MCT = ((unsigned char*)MicroCodeTable6502 + 6);
106 }
107 mask>>=1;
108 if((mask&1) == 1) AC = (unsigned char)reg->ac;
109 mask>>=1;
110 if((mask&1) == 1) XR = (unsigned char)reg->xr;
111 mask>>=1;
112 if((mask&1) == 1) YR = (unsigned char)reg->yr;
113 mask>>=1;
114 if((mask&1) == 1) SP = (unsigned char)reg->sp;
115 mask>>=1;
116 if((mask&1) == 1) SR = (unsigned char)reg->sr | 32;
117 }
118
GetRegister(REG_STRUCT * reg)119 void MOS6502::GetRegister(REG_STRUCT *reg)
120 {
121 if(reg == 0) return;
122
123 unsigned char mask = reg->reg_mask;
124 if((mask&1) == 1) reg->pc = PC;
125 mask>>=1;
126 if((mask&1) == 1) reg->ac = AC;
127 mask>>=1;
128 if((mask&1) == 1) reg->xr = XR;
129 mask>>=1;
130 if((mask&1) == 1) reg->yr = YR;
131 mask>>=1;
132 if((mask&1) == 1) reg->sp = SP;
133 mask>>=1;
134 if((mask&1) == 1) reg->sr = SR;
135 mask>>=1;
136 if((mask&1) == 1)
137 {
138 reg->irq = Read(0xFFFE);
139 reg->irq |= Read(0xFFFF)<<8;
140 }
141 mask>>=1;
142 if((mask&1) == 1)
143 {
144 reg->nmi = Read(0xFFFA);
145 reg->nmi |= Read(0xFFFB)<<8;
146 }
147 reg->_0314 = Read(0x314);
148 reg->_0314 |= Read(0x315)<<8;
149 reg->_0318 = Read(0x318);
150 reg->_0318 |= Read(0x319)<<8;
151 }
152
GetInterneRegister(IREG_STRUCT * ireg)153 void MOS6502::GetInterneRegister(IREG_STRUCT* ireg)
154 {
155 if(ireg == 0) return;
156 ireg->current_opcode_pc = AktOpcodePC;
157 ireg->current_opcode = AktOpcode;
158 ireg->current_micro_code = *MCT;
159 ireg->jam_flag = JAMFlag;
160 ireg->pointer = Pointer;
161 ireg->address = Adresse;
162 ireg->branch_address = BranchAdresse;
163 ireg->tmp_byte = TMPByte;
164 ireg->irq = irq_state;
165 ireg->reset = *RESET;
166 }
167
SET_SR_BIT6(void)168 void MOS6502::SET_SR_BIT6(void)
169 {
170 SR |= 64;
171 }
172
SET_SR_NZ(unsigned char wert)173 inline void MOS6502::SET_SR_NZ(unsigned char wert)
174 {
175 SR = (SR&0x7D)|(wert&0x80);
176 if (wert==0) SR|=2;
177 }
178
SET_SIGN(unsigned char wert)179 inline void MOS6502::SET_SIGN(unsigned char wert)
180 {
181 SR = (SR&127)|(wert&0x80);
182 }
183
SET_ZERO(unsigned char wert)184 inline void MOS6502::SET_ZERO(unsigned char wert)
185 {
186 if(wert==0) SR|=2;
187 else SR&=0xFD;
188 }
189
SET_CARRY(unsigned char status)190 inline void MOS6502::SET_CARRY(unsigned char status)
191 {
192 if (status!=0) SR|=1;
193 else SR&=0xFE;
194 }
195
IF_CARRY(void)196 inline bool MOS6502::IF_CARRY(void)
197 {
198 if(SR&1) return true;
199 return false;
200 }
201
IF_DECIMAL(void)202 inline bool MOS6502::IF_DECIMAL(void)
203 {
204 if(SR&8) return true;
205 return false;
206 }
207
SET_OVERFLOW(bool status)208 inline void MOS6502::SET_OVERFLOW(bool status)
209 {
210 if (status!=0) SR|=64;
211 else SR&=0xBF;
212 }
213
Read(unsigned short adresse)214 inline unsigned char MOS6502::Read(unsigned short adresse)
215 {
216 unsigned char wert = ReadProcTbl[(adresse)>>8](adresse);
217
218 if(Breakpoints[adresse] & 16)
219 {
220 *BreakStatus |=16;
221 BreakWerte[4] = adresse;
222 }
223
224 if(Breakpoints[wert] & 64)
225 {
226 *BreakStatus |=64;
227 BreakWerte[6] = wert;
228 }
229 return wert;
230 }
231
Write(unsigned short adresse,unsigned char wert)232 inline void MOS6502::Write(unsigned short adresse, unsigned char wert)
233 {
234 if(Breakpoints[adresse] & 32)
235 {
236 *BreakStatus |=32;
237 BreakWerte[5] = adresse;
238 }
239
240 if(Breakpoints[wert] & 128)
241 {
242 *BreakStatus |=128;
243 BreakWerte[7] = wert;
244 }
245 WriteProcTbl[(adresse)>>8](adresse,wert);
246 }
247
OneZyklus(void)248 bool MOS6502::OneZyklus(void)
249 {
250 if(!*RESET)
251 {
252 SR=0x24;
253 JAMFlag = false;
254 AktOpcodePC = PC;
255 PC++;
256 MCT = ((unsigned char*)MicroCodeTable6502 + (0x100*MCTItemSize));
257 AktOpcode = 0x100;
258 }
259
260 // IRQ auf low Pegel prüfen
261 if(irq_state > 0)
262 irq_is_low_pegel = true;
263 else
264 irq_is_low_pegel = false;
265
266 switch(*MCT)
267 {
268 //R // Feetch Opcode
269 case 0:
270 if(JAMFlag) return false;
271
272 if((irq_is_active == true) && (irq_delay ? ((irq_delay_sr_value&4)==0) : ((SR&4)==0)))
273 {
274 MCT = ((unsigned char*)MicroCodeTable6502 + (0x101*MCTItemSize));
275 AktOpcode = 0x101;
276
277 if(irq_delay)
278 {
279 irq_delay = false;
280 SR = irq_delay_sr_value;
281 }
282
283 irq_delay = false;
284
285 return false;
286 }
287
288 irq_delay = false;
289
290 MCT = ((unsigned char*)MicroCodeTable6502 + (Read(PC)*MCTItemSize));
291 AktOpcode = ReadProcTbl[(AktOpcodePC)>>8](AktOpcodePC);
292
293 if(irq_delay)
294 {
295 irq_delay = false;
296 SR = irq_delay_sr_value;
297 }
298
299 *HistoryPointer = *HistoryPointer+1;
300 History[*HistoryPointer] = AktOpcodePC;
301
302 PC++;
303
304 return false;
305
306 break;
307
308 //R // Lesen von PC-Adresse und verwerfen // PC++
309 case 1:
310 Read(PC);
311 PC++;
312 break;
313 //W // PC Hi -> Stack // SR|16 // SP--
314 case 2:
315 Write(0x0100+(SP),GetPCHi);
316 SR|=16;
317 SP--;
318 break;
319 //W // PC Lo -> Stack // SP--
320 case 3:
321 Write(0x0100+(SP),GetPCLo);
322 SP--;
323 break;
324 //W // SR -> Stack // SR|4 // SP--
325 case 4:
326 Write(0x0100+(SP),SR);
327 SR|=4;
328 SP--;
329 break;
330 //R // PC Lo von 0xFFFE holen
331 case 5:
332 SetPCLo(Read(0xFFFE));
333 break;
334 //R // PC Hi von 0xFFFF holen
335 case 6:
336 SetPCHi(Read(0xFFFF));
337 break;
338 //R // Pointer von PC-Adresse holen // PC++
339 case 7:
340 Pointer = Read(PC);
341 PC++;
342 break;
343 //R // Lesen von Pointer und verwerfen // Pointer+XR
344 case 8:
345 Read((unsigned short)Pointer);
346 Pointer += XR;
347 break;
348 //R // Adresse Lo von Pointer-Adresse holen // Pointer++
349 case 9:
350
351 SetAdresseLo(Read((unsigned short)Pointer));
352 Pointer++;
353 break;
354 //R // Adresse Hi von Pointer-Adresse holen //
355 case 10:
356 SetAdresseHi(Read((unsigned short)Pointer));
357 break;
358 //R // TMPByte von Adresse holen // AC or TMPByte // Set SR(NZ)
359 case 11:
360 TMPByte = Read(Adresse);
361 AC |= TMPByte;
362 SET_SR_NZ(AC);
363 break;
364 //R // JAM
365 case 12:
366 JAMFlag = true;
367 //IRQOld = true;
368 //NMIOld = true;
369 //IRQCounter=0;
370 //NMICounter=0;
371 //*IRQ = false;
372 //*NMI = false;
373 //SR = 0x04;
374 //MCT = ((unsigned char*)MicroCodeTable6502 + (0x100*MCTItemSize));
375 return 0;
376 break;
377 //R // TMPByte von Adresse holen
378 case 13:
379 TMPByte = Read(Adresse);
380 break;
381 //W // TMPByte nach Adresse schreiben // ASL MEMORY // ORA
382 case 14:
383 Write(Adresse,TMPByte);
384
385 SET_CARRY(TMPByte&0x80); // ASL MEMORY
386 TMPByte <<= 1;
387 TMPByte &= 0xFF;
388
389 AC|=TMPByte; // ORA
390 SET_SR_NZ(AC);
391
392 break;
393 //W // TMPByte nach Adresse schreiben
394 case 15:
395 Write(Adresse,TMPByte);
396 break;
397 //R // Adresse Hi = 0 // Adresse Lo von PC-Adresse holen // PC++
398 case 16:
399 Adresse = Read(PC);
400 PC++;
401 break;
402 //R // TMPByte von Adresse lesen // Adresse Lo + YR
403 case 17:
404 TMPByte = Read(Adresse);
405 Adresse += YR;
406 Adresse &= 0xFF;
407 break;
408 //W // TMPByte nach Adresse schreiben // TMPByte<<1 // Set SR(NZC)
409 case 18:
410 Write(Adresse,TMPByte);
411 SET_CARRY(TMPByte&0x80);
412 TMPByte <<= 1;
413 TMPByte &= 0xFF;
414 SET_SIGN(TMPByte);
415 SET_ZERO(TMPByte);
416 break;
417 //R // TMPByte von PC-Adresse holen
418 case 19:
419 TMPByte = Read(PC);
420 break;
421 //W // SR nach SP+0x0100 schreiben // SP-1
422 case 20:
423 Write(SP+0x0100,SR|16);
424 SP--;
425 break;
426 //R // TMPByte von PC-Adresse holen // AC or TMPByte // PC+1
427 case 21:
428 TMPByte = Read(PC);
429 AC|=TMPByte;
430 SET_SR_NZ(AC);
431 PC++;
432 break;
433 //R // TMPByte von PC-Adresse holen // AC<<1 // Set SR(NZC)
434 case 22:
435 TMPByte = Read(PC);
436 SET_CARRY(AC&0x80);
437 AC <<= 1;
438 AC &= 0xFF;
439 SET_SIGN(AC);
440 SET_ZERO(AC);
441 break;
442 //R // TMPByte von PC-Adresse holen // AC and TMPByte // Set SR(NZC) // PC+1
443 case 23:
444 TMPByte = Read(PC);
445 AC&=TMPByte;
446 SET_SR_NZ(AC);
447 SR&=0xFE;
448 SR|=AC>>7;
449 PC++;
450 break;
451 //R // Adresse Lo von PC-Adresse holen // PC+1
452 case 24:
453 SetAdresseLo(Read(PC));
454 PC++;
455 break;
456 //R // Adresse Hi von PC-Adresse holen // PC+1
457 case 25:
458 SetAdresseHi(Read(PC));
459 PC++;
460 break;
461 //R // TMPByte von PC-Adresse holen // PC+1 // SR(N) auf FALSE prüfen (BPL)
462 case 26:
463 TMPByte = Read(PC);
464 PC++;
465 if((SR&0x80)!=0x00) MCT+=2;
466 break;
467 //R // TMPByte von PC-Adresse holen // PC+1 // SR(N) auf TRUE prüfen (BMI)
468 case 27:
469 TMPByte = Read(PC);
470 PC++;
471 if((SR&0x80)!=0x80) MCT+=2;
472 break;
473 //R // TMPByte von PC-Adresse holen // PC+1 // SR(V) auf FALSE prüfen (BVC)
474 case 28:
475 TMPByte = Read(PC);
476 PC++;
477 if((SR&0x40)!=0x00) MCT+=2;
478 break;
479 //R // TMPByte von PC-Adresse holen // PC+1 // SR(V) auf TRUE prüfen (BVS)
480 case 29:
481 TMPByte = Read(PC);
482 PC++;
483 if((SR&0x40)!=0x40) MCT+=2;
484 break;
485 //R // TMPByte von PC-Adresse holen // PC+1 // SR(C) auf FALSE prüfen (BCC)
486 case 30:
487 TMPByte = Read(PC);
488 PC++;
489 if((SR&0x01)!=0x00) MCT+=2;
490 break;
491 //R // TMPByte von PC-Adresse holen // PC+1 // SR(C) auf TRUE prüfen (BCS)
492 case 31:
493 TMPByte = Read(PC);
494 PC++;
495 if((SR&0x01)!=0x01) MCT+=2;
496 break;
497 //R // TMPByte von PC-Adresse holen // PC+1 // SR(Z) auf FALSE prüfen (BNE)
498 case 32:
499 TMPByte = Read(PC);
500 PC++;
501 if((SR&0x02)!=0x00) MCT+=2;
502 break;
503 //R // TMPByte von PC-Adresse holen // PC+1 // SR(Z) auf TRUE prüfen (BEQ)
504 case 33:
505 TMPByte = Read(PC);
506 PC++;
507 if((SR&0x02)!=0x02) MCT+=2;
508 break;
509 //R // Lesen von PC-Adresse und verwerfen // BranchAdresse=PC+TMPByte
510 case 34:
511 Read(PC);
512 BranchAdresse = PC + (signed char)(TMPByte);
513 if ((PC ^ BranchAdresse) & 0xFF00)
514 {
515 PC = (PC&0xFF00)|(BranchAdresse&0xFF);
516 }
517 else
518 {
519 PC = BranchAdresse;
520 MCT+=1;
521 }
522 break;
523 //R // FIX PC Hi Adresse (Im Branchbefehl)
524 case 35:
525 Read(PC);
526 PC = BranchAdresse;
527 break;
528 //R // Adresse Hi von Pointer-Adresse holen // Adresse+YR
529 case 36:
530 SetAdresseHi(Read((unsigned short)Pointer));
531 Adresse += YR;
532 idxReg = YR;
533 break;
534 //R // TMPByte von Adresse holen // Fix Adresse Hi MCT+1 // AC or TMPByte //
535 case 37:
536 if((Adresse&0xFF) >= idxReg)
537 {
538 TMPByte = Read(Adresse);
539 AC|=TMPByte;
540 SET_SR_NZ(AC);
541 MCT++;
542 }
543 break;
544 //R // Adresse Hi von PC-Adresse holen // PC=Adresse
545 case 38:
546 SetAdresseHi(Read(PC));
547 PC = Adresse;
548 break;
549 //R // Lesen von PC-Adresse und verwerfen // XR=AC // Set SR(NZ)
550 case 39:
551 Read(PC);
552 XR = AC;
553 SET_SR_NZ(XR);
554 break;
555 //R // Lesen von PC-Adresse und verwerfen // YR=AC // Set SR(NZ)
556 case 40:
557 Read(PC);
558 YR = AC;
559 SET_SR_NZ(YR);
560 break;
561 //R // Lesen von PC-Adresse und verwerfen // XR=SP // Set SR(NZ)
562 case 41:
563 Read(PC);
564 XR = SP;
565 SET_SR_NZ(XR);
566 break;
567 //R // Lesen von PC-Adresse und verwerfen // AC=XR // Set SR(NZ)
568 case 42:
569 Read(PC);
570 AC = XR;
571 SET_SR_NZ(AC);
572 break;
573 //R // Lesen von PC-Adresse und verwerfen // SP=XR
574 case 43:
575 Read(PC);
576 SP = XR;
577 break;
578 //R // Lesen von PC-Adresse und verwerfen // AC=YR // Set SR(NZ)
579 case 44:
580 Read(PC);
581 AC = YR;
582 SET_SR_NZ(AC);
583 break;
584 //W // AC nach SP+0x0100 schreiben // SP-1
585 case 45:
586 Write(SP+0x0100,AC);
587 SP--;
588 break;
589 //R // AC von SP+0x0100 lesen // SP+1
590 case 46:
591 AC = Read(SP+0x0100);
592 SP++;
593 break;
594 //R // AC von SP+0x0100 lesen // Set SR(NZ)
595 case 47:
596 AC = Read(SP+0x0100);
597 SET_SR_NZ(AC);
598 break;
599 //R // SR von SP+0x0100 lesen // SP+1
600 case 48:
601 SR = Read(SP+0x0100)|32;
602 SP++;
603 break;
604 //R // SR von SP+0x0100 lesen
605 case 49:
606 SR = Read(SP+0x0100)|32;
607 break;
608 //R // TMPByte von PC-Adresse lesen // AC + TMPByte + Carry // PC+1
609 case 50:
610 tmp1 = Read(PC);
611
612 if (IF_DECIMAL())
613 {
614 tmp = (AC & 0xF) + (tmp1 & 0xF) + (SR & 0x1);
615 if (tmp > 0x9) tmp += 0x6;
616 if (tmp <= 0x0F) tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0);
617 else tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0) + 0x10;
618 SET_ZERO(((AC + tmp1 + (SR & 0x1)) & 0xFF));
619 SET_SIGN(tmp & 0x80);
620 SET_OVERFLOW(((AC ^ tmp) & 0x80) && !((AC ^ tmp1) & 0x80));
621 if ((tmp & 0x1F0) > 0x90) tmp += 0x60;
622 SET_CARRY((tmp & 0xFF0) > 0xF0);
623 }
624 else
625 {
626 tmp = tmp1 + AC + (SR & 0x01);
627 SET_SR_NZ(tmp & 0xff);
628 SET_OVERFLOW(!((AC ^ tmp1) & 0x80) && ((AC ^ tmp) & 0x80));
629 SET_CARRY(tmp > 0xFF);
630 }
631 AC = (unsigned char)tmp;
632 PC++;
633 break;
634 //R // TMPByte von Adresse lesen // AC + TMPByte + Carry
635 case 51:
636 tmp1 = Read(Adresse);
637
638 if (IF_DECIMAL())
639 {
640 tmp = (AC & 0xF) + (tmp1 & 0xF) + (SR & 0x1);
641 if (tmp > 0x9) tmp += 0x6;
642 if (tmp <= 0x0F) tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0);
643 else tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0) + 0x10;
644 SET_ZERO(((AC + tmp1 + (SR & 0x1)) & 0xFF));
645 SET_SIGN(tmp & 0x80);
646 SET_OVERFLOW(((AC ^ tmp) & 0x80) && !((AC ^ tmp1) & 0x80));
647 if ((tmp & 0x1F0) > 0x90) tmp += 0x60;
648 SET_CARRY((tmp & 0xFF0) > 0xF0);
649 }
650 else
651 {
652 tmp = tmp1 + AC + (SR & 0x01);
653 SET_SR_NZ(tmp & 0xff);
654 SET_OVERFLOW(!((AC ^ tmp1) & 0x80) && ((AC ^ tmp) & 0x80));
655 SET_CARRY(tmp > 0xFF);
656 }
657 AC = (unsigned char)tmp;
658 break;
659 //R // TMPByte von Adresse lesen // Adresse Lo + XR
660 case 52:
661 TMPByte = Read(Adresse);
662 Adresse += XR;
663 Adresse &= 0xFF;
664 break;
665 //R // Adresse Hi von PC-Adresse holen // Adresse+XR // PC+1 //
666 case 53:
667 SetAdresseHi(Read(PC));
668 Adresse += XR;
669 idxReg = XR;
670 PC++;
671 break;
672 //R // Adresse Hi von PC-Adresse holen // Adresse+YR // PC+1 //
673 case 54:
674 SetAdresseHi(Read(PC));
675 Adresse += YR;
676 idxReg = YR;
677 PC++;
678 break;
679 //R // TMPByte von Adresse lesen // AC + TMPByte + Carry // if(idxReg<Adresse Lo) MCT++
680 case 55:
681 if((Adresse&0xFF)>=(idxReg))
682 {
683 tmp1 = Read(Adresse);
684 if (IF_DECIMAL())
685 {
686 tmp = (AC & 0xF) + (tmp1 & 0xF) + (SR & 0x1);
687 if (tmp > 0x9) tmp += 0x6;
688 if (tmp <= 0x0F) tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0);
689 else tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0) + 0x10;
690 SET_ZERO(((AC + tmp1 + (SR & 0x1)) & 0xFF));
691 SET_SIGN(tmp & 0x80);
692 SET_OVERFLOW(((AC ^ tmp) & 0x80) && !((AC ^ tmp1) & 0x80));
693 if ((tmp & 0x1F0) > 0x90) tmp += 0x60;
694 SET_CARRY((tmp & 0xFF0) > 0xF0);
695 }
696 else
697 {
698 tmp = tmp1 + AC + (SR & 0x01);
699 SET_SR_NZ(tmp & 0xff);
700 SET_OVERFLOW(!((AC ^ tmp1) & 0x80) && ((AC ^ tmp) & 0x80));
701 SET_CARRY(tmp > 0xFF);
702 }
703 AC = (unsigned char)tmp;
704 MCT++;
705 }
706 break;
707 //R // TMPByte von PC-Adresse lesen // AC - TMPByte - Carry // PC+1
708 case 56:
709 src=Read(PC);
710 tmp2 = AC - src - ((SR & 0x01) ? 0 : 1);
711 if (IF_DECIMAL())
712 {
713 tmp = (AC & 0xF) - (src & 0xF) - ((SR & 0x1) ? 0 : 1);
714 if (tmp & 0x10) tmp = ((tmp - 6) & 0xF)| ((AC & 0xF0) - (src & 0xF0) - 0x10);
715 else tmp = (tmp & 0xF) | ((AC & 0xF0) - (src & 0xF0));
716 if (tmp & 0x100) tmp -= 0x60;
717 SET_CARRY(tmp2 < 0x100);
718 SET_SR_NZ(tmp2 & 0xFF);
719 SET_OVERFLOW(((AC ^ tmp2) & 0x80) && ((AC ^ src) & 0x80));
720 AC = (unsigned char) tmp;
721 }
722 else
723 {
724 SET_SR_NZ(tmp2 & 0xff);
725 SET_CARRY(tmp2 < 0x100);
726 SET_OVERFLOW(((AC ^ tmp2) & 0x80) && ((AC ^ src) & 0x80));
727 AC = (unsigned char) tmp2;
728 }
729 PC++;
730 break;
731 //R // TMPByte von Adresse lesen // AC - TMPByte - Carry
732 case 57:
733 src=Read(Adresse);
734 tmp2 = AC - src - ((SR & 0x01) ? 0 : 1);
735 if (IF_DECIMAL())
736 {
737 tmp = (AC & 0xF) - (src & 0xF) - ((SR & 0x1) ? 0 : 1);
738 if (tmp & 0x10) tmp = ((tmp - 6) & 0xF)| ((AC & 0xF0) - (src & 0xF0) - 0x10);
739 else tmp = (tmp & 0xF) | ((AC & 0xF0) - (src & 0xF0));
740 if (tmp & 0x100) tmp -= 0x60;
741 SET_CARRY(tmp2 < 0x100);
742 SET_SR_NZ(tmp2 & 0xFF);
743 SET_OVERFLOW(((AC ^ tmp2) & 0x80) && ((AC ^ src) & 0x80));
744 AC = (unsigned char) tmp;
745 }
746 else
747 {
748 SET_SR_NZ(tmp2 & 0xff);
749 SET_CARRY(tmp2 < 0x100);
750 SET_OVERFLOW(((AC ^ tmp2) & 0x80) && ((AC ^ src) & 0x80));
751 AC = (unsigned char) tmp2;
752 }
753 break;
754 //R // TMPByte von Adresse lesen // AC - TMPByte - Carry // if(idxReg<Adresse Lo) MCT++
755 case 58:
756 if((Adresse&0xFF)>=(idxReg))
757 {
758 src=Read(Adresse);
759 tmp2 = AC - src - ((SR & 0x01) ? 0 : 1);
760 if (IF_DECIMAL())
761 {
762 tmp = (AC & 0xF) - (src & 0xF) - ((SR & 0x1) ? 0 : 1);
763 if (tmp & 0x10) tmp = ((tmp - 6) & 0xF)| ((AC & 0xF0) - (src & 0xF0) - 0x10);
764 else tmp = (tmp & 0xF) | ((AC & 0xF0) - (src & 0xF0));
765 if (tmp & 0x100) tmp -= 0x60;
766 SET_CARRY(tmp2 < 0x100);
767 SET_SR_NZ(tmp2 & 0xFF);
768 SET_OVERFLOW(((AC ^ tmp2) & 0x80) && ((AC ^ src) & 0x80));
769 AC = (unsigned char) tmp;
770 }
771 else
772 {
773 SET_SR_NZ(tmp2 & 0xff);
774 SET_CARRY(tmp2 < 0x100);
775 SET_OVERFLOW(((AC ^ tmp2) & 0x80) && ((AC ^ src) & 0x80));
776 AC = (unsigned char) tmp2;
777 }
778 MCT++;
779 }
780 break;
781 //R // TMPByte von SP+0x0100 holen
782 case 59:
783 TMPByte=Read(SP + 0x0100);
784 break;
785 //W // PC-Adresse Hi nach SP+0x0100 schreiben // SP-1
786 case 60:
787 Write(SP+0x0100,GetPCHi);
788 SP--;
789 break;
790 //W // PC-Adresse Lo nach SP+0x0100 schreiben // SP-1
791 case 61:
792 Write(SP+0x0100,GetPCLo);
793 SP--;
794 break;
795 //R // TMPByte von SP+0x0100 holen // SP+1
796 case 62:
797 TMPByte = Read(SP+0x0100);
798 SP++;
799 break;
800 //R // PC-Adresse Lo von SP+0x0100 holen // SP+1
801 case 63:
802 SetPCLo(Read(SP+0x0100));
803 SP++;
804 break;
805 //R // PC-Adresse Hi von SP+0x0100 holen
806 case 64:
807 SetPCHi(Read(SP+0x0100));
808 break;
809 //R // TMPByte von PC-Adresse laden // PC+1
810 case 65:
811 TMPByte = Read(PC);
812 PC++;
813 break;
814 //R // TMPByte von PC-Adresse lesen // AC and TMPByte // Set SR(NZ) // PC+1
815 case 66:
816 TMPByte=Read(PC);
817 AC &= TMPByte;
818 SET_SR_NZ(AC);
819 PC++;
820 break;
821 //R // TMPByte von Adresse lesen // AC and TMPByte // Set SR(NZ)
822 case 67:
823 TMPByte=Read(Adresse);
824 AC &= TMPByte;
825 SET_SR_NZ(AC);
826 break;
827 //R // TMPByte von Adresse lesen // AC and TMPByte // Set SR(NZ) // if(idxReg<Adresse Lo) MCT++
828 case 68:
829 if((Adresse&0xFF)>=(idxReg))
830 {
831 TMPByte=Read(Adresse);
832 AC &= TMPByte;
833 SET_SR_NZ(AC);
834 MCT++;
835 }
836 break;
837 //R // TMPByte von Adresse lesen // CarrayFalg=0
838 case 69:
839 TMPByte = Read(PC);
840 SR &= 0xFE;
841 break;
842 //R // TMPByte von Adresse lesen // DezimalFalg=0
843 case 70:
844 TMPByte = Read(PC);
845 SR &= 0xF7;
846 break;
847 //R // TMPByte von Adresse lesen // InterruptFalg=0
848 case 71:
849 TMPByte = Read(PC);
850 irq_delay_sr_value = SR;
851 SR &= 0xFB;
852 irq_delay = true;
853 break;
854 //R // TMPByte von Adresse lesen // OverflowFalg=0
855 case 72:
856 TMPByte = Read(PC);
857 SR &= 0xBF;
858 break;
859 //R // TMPByte von Adresse lesen // CarrayFalg=1
860 case 73:
861 TMPByte = Read(PC);
862 SR |= 0x01;
863 break;
864 //R // TMPByte von Adresse lesen // DezimalFalg=1
865 case 74:
866 TMPByte = Read(PC);
867 SR |= 0x08;
868 break;
869 //R // TMPByte von Adresse lesen // InterruptFalg=1
870 case 75:
871 TMPByte = Read(PC);
872 irq_delay_sr_value = SR;
873 SR |= 0x04;
874 irq_delay = true;
875 break;
876 //R // TMPByte von Adresse lesen // BIT Operation
877 case 76:
878 TMPByte = Read(Adresse);
879 SET_ZERO(AC & TMPByte);
880 SR = (TMPByte & 0xC0) | (SR & 0x3F);
881 break;
882 //W // AC nach Adresse schreiben
883 case 77:
884 Write(Adresse,AC);
885 break;
886 //W // XR nach Adresse schreiben
887 case 78:
888 Write(Adresse,XR);
889 break;
890 //W // YR nach Adresse schreiben
891 case 79:
892 Write(Adresse,YR);
893 break;
894 //R // AC von PC-Adresse lesen // Set SR(NZ) // PC+1
895 case 80:
896 AC = Read(PC);
897 SET_SR_NZ(AC);
898 PC++;
899 break;
900 //R // AC von Adresse lesen // Set SR(NZ)
901 case 81:
902 AC = Read(Adresse);
903 SET_SR_NZ(AC);
904 break;
905 //R // AC von Adresse lesen // Set SR(NZ) // if(idxReg<Adresse Lo) MCT++
906 case 82:
907 if((Adresse&0xFF)>=(idxReg))
908 {
909 TMPByte=Read(Adresse);
910 AC = TMPByte;
911 SET_SR_NZ(AC);
912 MCT++;
913 }
914 break;
915 //R // XR von PC-Adresse lesen // Set SR(NZ) // PC+1
916 case 83:
917 XR = Read(PC);
918 SET_SR_NZ(XR);
919 PC++;
920 break;
921 //R // XR von Adresse lesen // Set SR(NZ)
922 case 84:
923 XR = Read(Adresse);
924 SET_SR_NZ(XR);
925 break;
926 //R // XR von Adresse lesen // Set SR(NZ) // if(idxReg<Adresse Lo) MCT++
927 case 85:
928 if((Adresse&0xFF)>=(idxReg))
929 {
930 TMPByte=Read(Adresse);
931 XR = TMPByte;
932 SET_SR_NZ(XR);
933 MCT++;
934 }
935 break;
936 //R // YR von PC-Adresse lesen // Set SR(NZ) // PC+1
937 case 86:
938 YR = Read(PC);
939 SET_SR_NZ(YR);
940 PC++;
941 break;
942 //R // YR von Adresse lesen // Set SR(NZ)
943 case 87:
944 YR = Read(Adresse);
945 SET_SR_NZ(YR);
946 break;
947 //R // YR von Adresse lesen // Set SR(NZ) // if(idxReg<Adresse Lo) MCT++
948 case 88:
949 if((Adresse&0xFF)>=(idxReg))
950 {
951 TMPByte=Read(Adresse);
952 YR = TMPByte;
953 SET_SR_NZ(YR);
954 MCT++;
955 }
956 break;
957 //R // TMPByte von Adresse lesen // XR+1 // Set SR(NZ)
958 case 89:
959 TMPByte = Read(PC);
960 XR ++;
961 SET_SR_NZ(XR);
962 break;
963 //R // TMPByte von Adresse lesen // YR+1 // Set SR(NZ)
964 case 90:
965 TMPByte = Read(PC);
966 YR ++;
967 SET_SR_NZ(YR);
968 break;
969 //R // TMPByte von Adresse lesen // XR-1 // Set SR(NZ)
970 case 91:
971 TMPByte = Read(PC);
972 XR --;
973 SET_SR_NZ(XR);
974 break;
975 //R // TMPByte von Adresse lesen // YR-1 // Set SR(NZ)
976 case 92:
977 TMPByte = Read(PC);
978 YR --;
979 SET_SR_NZ(YR);
980 break;
981 //R // Illegale Opcode //
982 case 93:
983 //// Wird nie angesprungen !!! ////
984 break;
985 //R // PC LO von Adresse lesen // AdresseLo+1
986 case 94:
987 SetPCLo(Read(Adresse));
988 Adresse = (Adresse&0xFF00)|((Adresse+1)&0x00FF);
989 break;
990 //R // PC HI von Adresse lesen
991 case 95:
992 SetPCHi(Read(Adresse));
993 break;
994 //R // PC LO von $FFFC lesen
995 case 96:
996 SetPCLo(Read(0xFFFC));
997 break;
998 //R // PC HI von $FFFD lesen
999 case 97:
1000 SetPCHi(Read(0xFFFD));
1001 break;
1002 //R // TMPByte von PC-Adresse lesen // AC - TMPByte (AC wird nicht verändert) // Set SR(NZC) // PC+1
1003 case 98:
1004 TMPByte=Read(PC);
1005 tmp = AC - TMPByte;
1006 SET_CARRY(tmp < 0x100);
1007 SET_SIGN(tmp);
1008 SET_ZERO(tmp &= 0xFF);
1009 PC++;
1010 break;
1011 //R // TMPByte von Adresse lesen // AC - TMPByte (AC wird nicht verändert) // Set SR(NZC)
1012 case 99:
1013 TMPByte=Read(Adresse);
1014 tmp = AC - TMPByte;
1015 SET_CARRY(tmp < 0x100);
1016 SET_SIGN(tmp);
1017 SET_ZERO(tmp &= 0xFF);
1018 break;
1019 //R // TMPByte von Adresse lesen // AC - TMPByte (AC wird nicht verändert) // if(idxReg<Adresse Lo) MCT++
1020 case 100:
1021 if((Adresse&0xFF)>=(idxReg))
1022 {
1023 TMPByte=Read(Adresse);
1024 tmp = AC - TMPByte;
1025 SET_CARRY(tmp < 0x100);
1026 SET_SIGN(tmp);
1027 SET_ZERO(tmp &= 0xFF);
1028 MCT++;
1029 }
1030 break;
1031 //R // TMPByte von PC-Adresse lesen // XR - TMPByte (XR wird nicht verändert) // Set SR(NZC) // PC+1
1032 case 101:
1033 TMPByte=Read(PC);
1034 tmp = XR - TMPByte;
1035 SET_CARRY(tmp < 0x100);
1036 SET_SIGN(tmp);
1037 SET_ZERO(tmp &= 0xFF);
1038 PC++;
1039 break;
1040 //R // TMPByte von Adresse lesen // XR - TMPByte (XR wird nicht verändert) // Set SR(NZC)
1041 case 102:
1042 TMPByte=Read(Adresse);
1043 tmp = XR - TMPByte;
1044 SET_CARRY(tmp < 0x100);
1045 SET_SIGN(tmp);
1046 SET_ZERO(tmp &= 0xFF);
1047 break;
1048 //R // TMPByte von PC-Adresse lesen // YR - TMPByte (XR wird nicht verändert) // Set SR(NZC) // PC+1
1049 case 103:
1050 TMPByte=Read(PC);
1051 tmp = YR - TMPByte;
1052 SET_CARRY(tmp < 0x100);
1053 SET_SIGN(tmp);
1054 SET_ZERO(tmp &= 0xFF);
1055 PC++;
1056 break;
1057 //R // TMPByte von Adresse lesen // YR - TMPByte (XR wird nicht verändert) // Set SR(NZC)
1058 case 104:
1059 TMPByte=Read(Adresse);
1060 tmp = YR - TMPByte;
1061 SET_CARRY(tmp < 0x100);
1062 SET_SIGN(tmp);
1063 SET_ZERO(tmp &= 0xFF);
1064 break;
1065 //R // TMPByte von PC-Adresse lesen // AC XOR TMPByte // Set SR(NZC) // PC+1
1066 case 105:
1067 TMPByte=Read(PC);
1068 AC^=TMPByte;
1069 SET_SR_NZ(AC);
1070 PC++;
1071 break;
1072 //R // TMPByte von Adresse lesen // AC XOR TMPByte // Set SR(NZC)
1073 case 106:
1074 TMPByte=Read(Adresse);
1075 AC^=TMPByte;
1076 SET_SR_NZ(AC);
1077 break;
1078 //R // TMPByte von Adresse lesen // AC XOR TMPByte // if(idxReg<Adresse Lo) MCT++
1079 case 107:
1080 if((Adresse&0xFF)>=(idxReg))
1081 {
1082 TMPByte=Read(Adresse);
1083 AC^=TMPByte;
1084 SET_SR_NZ(AC);
1085 MCT++;
1086 }
1087 break;
1088 //R // TMPByte von PC-Adresse holen // AC>>1 // Set SR(NZC)
1089 case 108:
1090 TMPByte = Read(PC);
1091 SET_CARRY(AC&0x01);
1092 AC >>= 1;
1093 SET_SIGN(0);
1094 SET_ZERO(AC);
1095 break;
1096 //W // TMPByte nach Adresse schreiben // TMPByte>>1 // Set SR(NZC)
1097 case 109:
1098 Write(Adresse,TMPByte);
1099 SET_CARRY(TMPByte&0x01);
1100 TMPByte >>= 1;
1101 SET_SIGN(0);
1102 SET_ZERO(TMPByte);
1103 break;
1104 //R // TMPByte von PC-Adresse holen // C<-AC<<1<-C // Set SR(NZC)
1105 case 110:
1106 TMPByte = Read(PC);
1107 tmp = AC;
1108 tmp <<= 1;
1109 if (IF_CARRY()) tmp |= 0x1;
1110 SET_CARRY(tmp > 0xff);
1111 tmp &= 0xff;
1112 SET_SIGN(tmp);
1113 SET_ZERO(tmp);
1114 AC = tmp;
1115 break;
1116 //W // TMPByte nach Adresse schreiben // C<-TMPByte<<1<-C // Set SR(NZC)
1117 case 111:
1118 Write(Adresse,TMPByte);
1119 tmp = TMPByte;
1120 tmp <<= 1;
1121 if (IF_CARRY()) tmp |= 0x1;
1122 SET_CARRY(tmp > 0xff);
1123 tmp &= 0xff;
1124 SET_SIGN(tmp);
1125 SET_ZERO(tmp);
1126 TMPByte = tmp;
1127 break;
1128 //R // TMPByte von PC-Adresse holen // C->AC>>1->C // Set SR(NZC)
1129 case 112:
1130 TMPByte = Read(PC);
1131 carry_tmp=IF_CARRY();
1132 SET_CARRY(AC & 0x01);
1133 AC >>= 1;
1134 if(carry_tmp) AC |= 0x80;
1135 SET_SIGN(AC);
1136 SET_ZERO(AC);
1137 break;
1138 //W // TMPByte nach Adresse schreiben // C->TMPByte>>1->C // Set SR(NZC)
1139 case 113:
1140 Write(Adresse,TMPByte);
1141 carry_tmp=IF_CARRY();
1142 SET_CARRY(TMPByte & 0x01);
1143 TMPByte >>= 1;
1144 if(carry_tmp) TMPByte |= 0x80;
1145 SET_SIGN(TMPByte);
1146 SET_ZERO(TMPByte);
1147 break;
1148 //W // TMPByte nach Adresse schreiben // TMPByte+1 // Set SR(NZ)
1149 case 114:
1150 Write(Adresse,TMPByte);
1151 TMPByte++;
1152 SET_SR_NZ(TMPByte);
1153 break;
1154 //W // TMPByte nach Adresse schreiben // TMPByte-1 // Set SR(NZ)
1155 case 115:
1156 Write(Adresse,TMPByte);
1157 TMPByte--;
1158 SET_SR_NZ(TMPByte);
1159 break;
1160 //W // SR nach 0x100+SP schreiben // SP-- // IFlag setzen // BFlag löschen
1161 case 116:
1162 SR&=239;
1163 Write(0x0100+SP,SR);
1164 SP--;
1165 SR|=4;
1166 break;
1167 //R // PC Lo von 0xFFFA holen
1168 case 117:
1169 SetPCLo(Read(0xFFFA));
1170 break;
1171 //R // PC Hi von 0xFFFB holen
1172 case 118:
1173 SetPCHi(Read(0xFFFB));
1174 break;
1175 //R // TMPByte von Adresse holen // Fix Adresse Hi MCT+1
1176 case 119:
1177 if((Adresse&0xFF)>=(idxReg))
1178 {
1179 TMPByte = Read(Adresse);
1180 MCT++;
1181 }
1182 break;
1183 //W // TMPByte nach Adresse schreiben // Illegal [SLO]
1184 case 120:
1185 Write(Adresse,TMPByte);
1186 SET_CARRY(TMPByte&0x80); // ASL MEMORY
1187 TMPByte <<= 1;
1188 AC |= TMPByte; // ORA
1189 SET_SR_NZ(AC);
1190 break;
1191 //W // TMPByte nach Adresse schreiben // Illegal [RLA]
1192 case 121:
1193 Write(Adresse,TMPByte);
1194 tmp = TMPByte;
1195 tmp <<= 1; // ROL
1196 if (IF_CARRY()) tmp |= 0x1;
1197 SET_CARRY(tmp > 0xFF);
1198 tmp &= 0xFF;
1199 TMPByte = tmp;
1200 AC &= TMPByte; // AND
1201 SET_SR_NZ(AC);
1202 break;
1203 //W // TMPByte nach Adresse schreiben // Illegal [SRE]
1204 case 122:
1205 Write(Adresse,TMPByte);
1206 SET_CARRY(TMPByte & 0x01); // LSR
1207 TMPByte >>= 1;
1208 AC ^= TMPByte; // EOR
1209 SET_SR_NZ(AC);
1210 break;
1211 //W // TMPByte nach Adresse schreiben // Illegal [RRA]
1212 case 123:
1213 Write(Adresse,TMPByte);
1214
1215 carry_tmp = IF_CARRY(); // ROR
1216 SET_CARRY(TMPByte & 0x01);
1217 TMPByte >>= 1;
1218 if(carry_tmp) TMPByte |= 0x80;
1219
1220 tmp1 = TMPByte; // ADC
1221 if (IF_DECIMAL())
1222 {
1223 tmp = (AC & 0xF) + (tmp1 & 0xF) + (SR & 0x1);
1224 if (tmp > 0x9) tmp += 0x6;
1225 if (tmp <= 0x0F) tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0);
1226 else tmp = (tmp & 0xF) + (AC & 0xF0) + (tmp1 & 0xF0) + 0x10;
1227 SET_ZERO(((AC + tmp1 + (SR & 0x1)) & 0xFF));
1228 SET_SIGN(tmp & 0x80);
1229 SET_OVERFLOW(((AC ^ tmp) & 0x80) && !((AC ^ tmp1) & 0x80));
1230 if ((tmp & 0x1F0) > 0x90) tmp += 0x60;
1231 SET_CARRY((tmp & 0xFF0) > 0xF0);
1232 }
1233 else
1234 {
1235 tmp = tmp1 + AC + (SR & 0x01);
1236 SET_SR_NZ(tmp & 0xff);
1237 SET_OVERFLOW(!((AC ^ tmp1) & 0x80) && ((AC ^ tmp) & 0x80));
1238 SET_CARRY(tmp > 0xFF);
1239 }
1240 AC = (unsigned char)tmp;
1241 break;
1242 //W // TMPByte nach Adresse schreiben // Illegal [DCP]
1243 case 124:
1244 Write(Adresse,TMPByte);
1245 TMPByte--; //DEC
1246
1247 tmp = AC - TMPByte; //CMP
1248 SET_CARRY(tmp < 0x100);
1249 SET_SIGN(tmp);
1250 SET_ZERO(tmp &= 0xFF);
1251 break;
1252 //W // TMPByte nach Adresse schreiben // Illegal [ISB]
1253 case 125:
1254 Write(Adresse,TMPByte);
1255 TMPByte++; //INC
1256
1257 src=TMPByte; //SBC
1258 tmp2 = AC - src - ((SR & 0x01) ? 0 : 1);
1259 if (IF_DECIMAL())
1260 {
1261 tmp = (AC & 0xF) - (src & 0xF) - ((SR & 0x1) ? 0 : 1);
1262 if (tmp & 0x10) tmp = ((tmp - 6) & 0xF)| ((AC & 0xF0) - (src & 0xF0) - 0x10);
1263 else tmp = (tmp & 0xF) | ((AC & 0xF0) - (src & 0xF0));
1264 if (tmp & 0x100) tmp -= 0x60;
1265 SET_CARRY(tmp2 < 0x100);
1266 SET_SR_NZ(tmp2 & 0xFF);
1267 SET_OVERFLOW(((AC ^ tmp2) & 0x80) && ((AC ^ src) & 0x80));
1268 AC = (unsigned char) tmp;
1269 }
1270 else
1271 {
1272 SET_SR_NZ(tmp2 & 0xff);
1273 SET_CARRY(tmp2 < 0x100);
1274 SET_OVERFLOW(((AC ^ tmp2) & 0x80)
1275 && ((AC ^ src) & 0x80));
1276 AC = (unsigned char) tmp2;
1277 }
1278 break;
1279 //R // AC von Adresse lesen // AC -> XR // Set SR(NZ) // Illegal [LAX]
1280 case 126:
1281 AC = Read(Adresse);
1282 XR = AC;
1283 SET_SR_NZ(AC);
1284 break;
1285 //R // AC von Adresse lesen // AC -> XR // Set SR(NZ) // if(idxReg<Adresse Lo) MCT++ // Illegal [LAX]
1286 case 127:
1287 if((Adresse&0xFF)>=(idxReg))
1288 {
1289 TMPByte=Read(Adresse);
1290 AC = TMPByte;
1291 XR = AC;
1292 SET_SR_NZ(AC);
1293 MCT++;
1294 }
1295 break;
1296 //W // TMPByte = AC & XR // TMPByte nach Adresse schreiben // Set SR(NZ) // Illegal [SAX]
1297 case 128:
1298 TMPByte = AC & XR;
1299 Write(Adresse,TMPByte);
1300 break;
1301 //R // Illegal [ASR]
1302 case 129:
1303 AC &= Read(PC); // AND
1304
1305 SET_CARRY(AC & 0x01); // LSR
1306 AC >>= 1;
1307 SET_SIGN(0);
1308 SET_ZERO(AC);
1309 PC++;
1310 break;
1311 //R // Illegal [ARR]
1312 case 130:
1313 tmp2 = Read(PC) & AC;
1314 AC = ((SR & 0x01) ? (tmp2 >> 1) | 0x80 : tmp2 >> 1);
1315 if (!IF_DECIMAL())
1316 {
1317 SET_SR_NZ(AC);
1318 SET_CARRY(AC & 0x40);
1319 SET_OVERFLOW(!!((AC & 0x40) ^ ((AC & 0x20) << 1)));
1320 }
1321 else
1322 {
1323 SET_SIGN((SR & 0x01) ? 0x80 : 0);
1324 SET_ZERO(AC);
1325 SET_OVERFLOW(!!((tmp2 ^ AC) & 0x40));
1326 if ((tmp2 & 0x0F) + (tmp2 & 0x01) > 5) AC = (AC & 0xF0) | ((AC + 6) & 0x0F);
1327 SET_CARRY(((tmp2 + (tmp2 & 0x10)) & 0x1F0)>0x50);
1328 if(IF_CARRY()) AC += 0x60;
1329 }
1330 PC++;
1331 break;
1332 //R // Illegal [ANE]
1333 case 131:
1334 TMPByte = Read(PC);
1335 AC = (AC | 0xEE) & XR & TMPByte;
1336 SET_SR_NZ(AC);
1337 PC++;
1338 break;
1339 //R // Illegal [LXA]
1340 case 132:
1341 TMPByte = Read(PC);
1342 AC = XR = ((AC | 0xEE) & TMPByte);
1343 SET_SR_NZ(AC);
1344 PC++;
1345 break;
1346 //R // Illegal [SBX]
1347 case 133:
1348 tmp = Read(PC);
1349 tmp = (AC & XR) - tmp;
1350 SET_CARRY(tmp < 0x100);
1351 XR = tmp & 0xFF;
1352 SET_SR_NZ(XR);
1353 PC++;
1354 break;
1355 //W // Illegal [SHY]
1356 case 134:
1357 Write(Adresse,YR & ((((Adresse) + XR) >> 8)));
1358 break;
1359 //W // Illegal [SHX]
1360 case 135:
1361 Write(Adresse,XR & ((((Adresse) + YR) >> 8)));
1362 break;
1363 //W // Illegal [SHA]
1364 case 136:
1365 Write(Adresse,AC & XR & ((((Adresse) + YR) >> 8)));
1366 break;
1367 //W // Illegal [SHS]
1368 case 137:
1369 Write(Adresse,AC & XR & ((((Adresse) + YR) >> 8)));
1370 SP = AC & XR;
1371 break;
1372 //R // Illegal [ANC]
1373 case 138:
1374 AC &= Read(PC);
1375 SET_SR_NZ(AC);
1376 SET_CARRY(SR&0x80);
1377 PC++;
1378 break;
1379 //R // Illegal [LAE]
1380 case 139:
1381 TMPByte = Read(Adresse);
1382 AC = XR = SP = SP & (TMPByte);
1383 SET_SR_NZ(AC);
1384 break;
1385 //R // Illegal [LAE]
1386 case 140:
1387 if((Adresse&0xFF)>=(idxReg))
1388 {
1389 TMPByte=Read(Adresse);
1390 AC = XR = SP = SP & (TMPByte);
1391 SET_SR_NZ(AC);
1392 MCT++;
1393 }
1394 break;
1395 }
1396 MCT++;
1397
1398 if(*MCT == 0)
1399 {
1400 AktOpcodePC = PC;
1401 if(ResetReadyAdr == PC) *ResetReady = true;
1402
1403 AktOpcodePC = PC;
1404 if(Breakpoints[PC] & 1)
1405 {
1406 *BreakStatus |=1;
1407 BreakWerte[0] = PC;
1408 }
1409 if(Breakpoints[AC] & 2)
1410 {
1411 *BreakStatus |=2;
1412 BreakWerte[1] = AC;
1413 }
1414 if(Breakpoints[XR] & 4)
1415 {
1416 *BreakStatus |=4;
1417 BreakWerte[2] = XR;
1418 }
1419 if(Breakpoints[YR] & 8)
1420 {
1421 *BreakStatus |=8;
1422 BreakWerte[3] = YR;
1423 }
1424
1425 if(ResetReadyAdr == PC)
1426 {
1427 *ResetReady = true;
1428 }
1429 return true;
1430 }
1431 else return false;
1432 }
1433
Phi1()1434 void MOS6502::Phi1()
1435 {
1436 if(irq_is_low_pegel)
1437 {
1438 irq_is_active = true;
1439 }
1440 else irq_is_active = false;
1441 }
1442